target/linux/generic/backport-5.15/731-v6.1-0001-net-phy-Introduce-QUSGMII-PHY-mode.patch

   1 From 5e61fe157a27afc7c0d4f7bcbceefdca536c015f Mon Sep 17 00:00:00 2001
   2 From: Maxime Chevallier <maxime.chevallier@bootlin.com>
   3 Date: Wed, 17 Aug 2022 14:32:52 +0200
   4 Subject: [PATCH] net: phy: Introduce QUSGMII PHY mode
   5
   6 The QUSGMII mode is a derivative of Cisco's USXGMII standard. This
   7 standard is pretty similar to SGMII, but allows for faster speeds, and
   8 has the build-in bits for Quad and Octa variants (like QSGMII).
   9
  10 The main difference with SGMII/QSGMII is that USXGMII/QUSGMII re-uses
  11 the preamble to carry various information, named 'Extensions'.
  12
  13 As of today, the USXGMII standard only mentions the "PCH" extension,
  14 which is used to convey timestamps, allowing in-band signaling of PTP
  15 timestamps without having to modify the frame itself.
  16
  17 This commit adds support for that mode. When no extension is in use, it
  18 behaves exactly like QSGMII, although it's not compatible with QSGMII.
  19
  20 Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
  21 Reviewed-by: Andrew Lunn <andrew@lunn.ch>
  22 Signed-off-by: David S. Miller <davem@davemloft.net>
  23 ---
  24  Documentation/networking/phy.rst | 9 +++++++++
  25  drivers/net/phy/phylink.c        | 3 +++
  26  include/linux/phy.h              | 4 ++++
  27  3 files changed, 16 insertions(+)
  28
  29 --- a/Documentation/networking/phy.rst
  30 +++ b/Documentation/networking/phy.rst
  31 @@ -303,6 +303,15 @@ Some of the interface modes are describe
  32      rate of 125Mpbs using a 4B/5B encoding scheme, resulting in an underlying
  33      data rate of 100Mpbs.
  34
  35 +``PHY_INTERFACE_MODE_QUSGMII``
  36 +    This defines the Cisco the Quad USGMII mode, which is the Quad variant of
  37 +    the USGMII (Universal SGMII) link. It's very similar to QSGMII, but uses
  38 +    a Packet Control Header (PCH) instead of the 7 bytes preamble to carry not
  39 +    only the port id, but also so-called "extensions". The only documented
  40 +    extension so-far in the specification is the inclusion of timestamps, for
  41 +    PTP-enabled PHYs. This mode isn't compatible with QSGMII, but offers the
  42 +    same capabilities in terms of link speed and negociation.
  43 +
  44  Pause frames / flow control
  45  ===========================
  46
  47 --- a/drivers/net/phy/phylink.c
  48 +++ b/drivers/net/phy/phylink.c
  49 @@ -367,6 +367,7 @@ void phylink_get_linkmodes(unsigned long
  50         case PHY_INTERFACE_MODE_RGMII_ID:
  51         case PHY_INTERFACE_MODE_RGMII:
  52         case PHY_INTERFACE_MODE_QSGMII:
  53 +       case PHY_INTERFACE_MODE_QUSGMII:
  54         case PHY_INTERFACE_MODE_SGMII:
  55         case PHY_INTERFACE_MODE_GMII:
  56                 caps |= MAC_1000HD | MAC_1000FD;
  57 @@ -630,6 +631,7 @@ static int phylink_parse_mode(struct phy
  58                 switch (pl->link_config.interface) {
  59                 case PHY_INTERFACE_MODE_SGMII:
  60                 case PHY_INTERFACE_MODE_QSGMII:
  61 +               case PHY_INTERFACE_MODE_QUSGMII:
  62                         phylink_set(pl->supported, 10baseT_Half);
  63                         phylink_set(pl->supported, 10baseT_Full);
  64                         phylink_set(pl->supported, 100baseT_Half);
  65 @@ -2956,6 +2958,7 @@ void phylink_mii_c22_pcs_get_state(struc
  66
  67         case PHY_INTERFACE_MODE_SGMII:
  68         case PHY_INTERFACE_MODE_QSGMII:
  69 +       case PHY_INTERFACE_MODE_QUSGMII:
  70                 phylink_decode_sgmii_word(state, lpa);
  71                 break;
  72
  73 --- a/include/linux/phy.h
  74 +++ b/include/linux/phy.h
  75 @@ -115,6 +115,7 @@ extern const int phy_10gbit_features_arr
  76   * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR
  77   * @PHY_INTERFACE_MODE_USXGMII:  Universal Serial 10GE MII
  78   * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN
  79 + * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII
  80   * @PHY_INTERFACE_MODE_MAX: Book keeping
  81   *
  82   * Describes the interface between the MAC and PHY.
  83 @@ -152,6 +153,7 @@ typedef enum {
  84         PHY_INTERFACE_MODE_USXGMII,
  85         /* 10GBASE-KR - with Clause 73 AN */
  86         PHY_INTERFACE_MODE_10GKR,
  87 +       PHY_INTERFACE_MODE_QUSGMII,
  88         PHY_INTERFACE_MODE_MAX,
  89  } phy_interface_t;
  90
  91 @@ -267,6 +269,8 @@ static inline const char *phy_modes(phy_
  92                 return "10gbase-kr";
  93         case PHY_INTERFACE_MODE_100BASEX:
  94                 return "100base-x";
  95 +       case PHY_INTERFACE_MODE_QUSGMII:
  96 +               return "qusgmii";
  97         default:
  98                 return "unknown";
  99         }