target/linux/starfive/patches-6.1/1003-riscv-dts-starfive-Group-tuples-in-interrupt-propert.patch

   1 From 790e1157753b4dcc9bad4521987fe09aa6657876 Mon Sep 17 00:00:00 2001
   2 From: Geert Uytterhoeven <geert@linux-m68k.org>
   3 Date: Thu, 25 Nov 2021 14:21:18 +0100
   4 Subject: [PATCH 1003/1024] riscv: dts: starfive: Group tuples in interrupt
   5  properties
   6
   7 To improve human readability and enable automatic validation, the tuples
   8 in the various properties containing interrupt specifiers should be
   9 grouped.
  10
  11 Fix this by grouping the tuples of "interrupts-extended" properties
  12 using angle brackets.
  13
  14 Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
  15 ---
  16  arch/riscv/boot/dts/starfive/jh7100.dtsi | 8 ++++----
  17  1 file changed, 4 insertions(+), 4 deletions(-)
  18
  19 --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi
  20 +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi
  21 @@ -118,15 +118,15 @@
  22                 clint: clint@2000000 {
  23                         compatible = "starfive,jh7100-clint", "sifive,clint0";
  24                         reg = <0x0 0x2000000 0x0 0x10000>;
  25 -                       interrupts-extended = <&cpu0_intc 3 &cpu0_intc 7
  26 -                                              &cpu1_intc 3 &cpu1_intc 7>;
  27 +                       interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
  28 +                                             <&cpu1_intc 3>, <&cpu1_intc 7>;
  29                 };
  30
  31                 plic: interrupt-controller@c000000 {
  32                         compatible = "starfive,jh7100-plic", "sifive,plic-1.0.0";
  33                         reg = <0x0 0xc000000 0x0 0x4000000>;
  34 -                       interrupts-extended = <&cpu0_intc 11 &cpu0_intc 9
  35 -                                              &cpu1_intc 11 &cpu1_intc 9>;
  36 +                       interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>,
  37 +                                             <&cpu1_intc 11>, <&cpu1_intc 9>;
  38                         interrupt-controller;
  39                         #address-cells = <0>;
  40                         #interrupt-cells = <1>;