uboot-sunxi: add PSCI patches to enable 2nd CPU on T113

uboot-sunxi: add PSCI patches to enable 2nd CPU on T113

Add support for bringing up secondary CPU via PSCI (as it's done on
other Allwinner platforms). Please note that with these patches added,
uboot doesn't compile on non-T113 platforms for now.

[    0.006172] CPU: Testing write buffer coherency: ok
[    0.007066] /cpus/cpu@0 missing clock-frequency property
[    0.007145] /cpus/cpu@1 missing clock-frequency property
[    0.007181] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[    0.009503] cblist_init_generic: Setting adjustable number of callback queues.
[    0.009533] cblist_init_generic: Setting shift to 1 and lim to 1.
[    0.009963] Setting up static identity map for 0x40200000 - 0x40200060
[    0.010371] rcu: Hierarchical SRCU implementation.
[    0.010388] rcu:     Max phase no-delay instances is 1000.
[    0.011158] dyndbg: Ignore empty _ddebug table in a CONFIG_DYNAMIC_DEBUG_CORE build
[    0.011959] smp: Bringing up secondary CPUs ...
[    0.013757] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[    0.014077] smp: Brought up 1 node, 2 CPUs
[    0.014110] SMP: Total of 2 processors activated (96.00 BogoMIPS).
[    0.014134] CPU: All CPU(s) started in SVC mode.

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>