From a3e4bf8e5585869aec7dce994997c2a1bb1f33f8 Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Sun, 13 May 2007 15:59:34 +0000 Subject: [PATCH] remove unsupported targets SVN-Revision: 7206 --- target/linux/adm5120-2.6/Makefile | 25 - target/linux/adm5120-2.6/config/default | 277 - .../files/arch/mips/adm5120/Makefile | 7 - .../files/arch/mips/adm5120/adm5120_info.c | 710 - .../files/arch/mips/adm5120/int-handler.S | 135 - .../adm5120-2.6/files/arch/mips/adm5120/irq.c | 156 - .../files/arch/mips/adm5120/memory.c | 135 - .../files/arch/mips/adm5120/prom.c | 119 - .../files/arch/mips/adm5120/setup.c | 107 - .../files/arch/mips/pci/ops-adm5120.c | 63 - .../files/arch/mips/pci/pci-adm5120.c | 96 - .../files/drivers/char/adm5120_gpio.c | 52 - .../files/drivers/mtd/maps/adm5120_mtd.c | 494 - .../adm5120-2.6/files/drivers/mtd/myloader.c | 176 - .../files/drivers/mtd/nand/rbmipsnand.c | 111 - .../adm5120-2.6/files/drivers/net/adm5120sw.c | 502 - .../adm5120-2.6/files/drivers/net/adm5120sw.h | 106 - .../files/drivers/serial/adm5120_uart.c | 524 - .../files/drivers/usb/host/adm5120-hcd.c | 835 - .../asm-mips/mach-adm5120/adm5120_defs.h | 60 - .../asm-mips/mach-adm5120/adm5120_info.h | 70 - .../asm-mips/mach-adm5120/adm5120_switch.h | 89 - .../include/asm-mips/mach-adm5120/myloader.h | 167 - .../asm-mips/mach-adm5120/routerboot.h | 104 - .../include/asm-mips/mach-adm5120/zynos.h | 78 - target/linux/adm5120-2.6/image/Makefile | 100 - .../adm5120-2.6/image/lzma-loader/Makefile | 38 - .../image/lzma-loader/src/LzmaDecode.c | 663 - .../image/lzma-loader/src/LzmaDecode.h | 100 - .../image/lzma-loader/src/Makefile | 72 - .../adm5120-2.6/image/lzma-loader/src/README | 55 - .../image/lzma-loader/src/decompress.c | 241 - .../image/lzma-loader/src/decompress.lds.in | 0 .../adm5120-2.6/image/lzma-loader/src/head.S | 194 - .../image/lzma-loader/src/loader.lds.in | 27 - .../adm5120-2.6/patches/001-adm5120.patch | 90 - .../patches/002-adm5120_flash.patch | 25 - .../patches/003-adm5120_switch.patch | 25 - .../patches/004-adm5120_uart.patch | 50 - .../adm5120-2.6/patches/005-adm5120_usb.patch | 53 - .../patches/006-adm5120_gpio.patch | 25 - .../100-mtd-myloder-partition-parser.patch | 37 - .../adm5120-2.6/patches/101-mtd-mxflash.patch | 31 - .../patches/140-cmdline_hack.patch | 50 - .../linux/adm5120-2.6/patches/500-Nand.patch | 29 - .../linux/adm5120-2.6/profiles/100-Atheros.mk | 17 - .../linux/adm5120-2.6/profiles/105-Texas.mk | 17 - target/linux/adm5120-2.6/profiles/110-None.mk | 17 - target/linux/adm5120-2.6/profiles/RB1xx.mk | 17 - target/linux/adm5120eb-2.6/Makefile | 25 - target/linux/adm5120eb-2.6/config/default | 278 - target/linux/adm5120eb-2.6/files | 1 - target/linux/adm5120eb-2.6/image/Makefile | 48 - target/linux/adm5120eb-2.6/image/lzma-loader | 1 - target/linux/adm5120eb-2.6/patches | 1 - .../linux/adm5120eb-2.6/profiles/100-Texas.mk | 17 - .../adm5120eb-2.6/profiles/110-Atheros.mk | 17 - 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.../ar7-2.6/files/drivers/leds/leds-ar7.c | 132 - .../linux/ar7-2.6/files/drivers/mtd/ar7part.c | 140 - .../linux/ar7-2.6/files/drivers/net/cpmac.c | 1200 - .../ar7-2.6/files/include/asm-generic/gpio.h | 25 - .../ar7-2.6/files/include/asm-mips/ar7/ar7.h | 168 - .../ar7-2.6/files/include/asm-mips/ar7/gpio.h | 116 - .../files/include/asm-mips/ar7/mmzone.h | 29 - .../files/include/asm-mips/ar7/spaces.h | 33 - .../files/include/asm-mips/ar7/vlynq.h | 92 - .../ar7-2.6/files/include/asm-mips/gpio.h | 6 - target/linux/ar7-2.6/image/Makefile | 79 - .../ar7-2.6/patches/100-board_support.patch | 103 - target/linux/ar7-2.6/patches/110-flash.patch | 39 - .../ar7-2.6/patches/120-gpio_chrdev.patch | 30 - target/linux/ar7-2.6/patches/130-leds.patch | 27 - .../linux/ar7-2.6/patches/140-watchdog.patch | 27 - .../ar7-2.6/patches/200-ethernet_driver.patch | 30 - .../ar7-2.6/patches/500-serial_kludge.patch | 52 - target/linux/ar7-2.6/patches/900-git-fix.diff | 11 - target/linux/ar7-2.6/profiles/100-Texas.mk | 17 - target/linux/ar7-2.6/profiles/110-None.mk | 17 - target/linux/ar7-2.6/src/adam2patcher.c | 59 - target/linux/aruba-2.6/Makefile | 24 - .../base-files/default/etc/config/network | 11 - target/linux/aruba-2.6/config/default | 204 - target/linux/aruba-2.6/image/Makefile | 43 - target/linux/aruba-2.6/image/addVersion | Bin 34464 -> 0 bytes target/linux/aruba-2.6/image/version | 1 - .../linux/aruba-2.6/patches/000-aruba.patch | 10499 --------- .../linux/aruba-2.6/patches/001-flash.patch | 121 - target/linux/aruba-2.6/patches/002-irq.patch | 289 - target/linux/aruba-2.6/patches/003-pci.patch | 618 - target/linux/aruba-2.6/patches/004-wdt.patch | 126 - .../aruba-2.6/patches/010-ar2313_enet.patch | 2175 -- .../patches/011-ap6x_serial_fix.patch | 31 - .../aruba-2.6/patches/012-ehci_softirq.patch | 70 - target/linux/at91-2.6/Makefile | 24 - .../at91-2.6/base-files/default/etc/inittab | 5 - .../at91-2.6/base-files/default/etc/ipkg.conf | 3 - target/linux/at91-2.6/config/default | 262 - .../at91-2.6/files/drivers/mtd/at91part.c | 121 - target/linux/at91-2.6/image/Config.in | 18 - target/linux/at91-2.6/image/Makefile | 46 - target/linux/at91-2.6/image/romboot/Makefile | 30 - .../image/romboot/patches/000-fixenv.patch | 57 - .../image/romboot/patches/001-makefile.patch | 50 - .../romboot/patches/002-Add-SD-Card.patch | 1822 -- .../romboot/patches/003-SD-reflash.patch | 948 - .../romboot/patches/004-code-cleanup.patch | 423 - .../romboot/patches/005-erase-flash.patch | 37 - .../romboot/patches/006-erase-fixup.patch | 11 - target/linux/at91-2.6/image/u-boot/Makefile | 44 - .../u-boot/patches/001-lowlevel-config.patch | 91 - .../patches/002-dataflash_machine.patch | 6065 ----- .../image/u-boot/patches/003-mac_init.patch | 14 - .../image/u-boot/patches/004-mac_config.patch | 15 - .../u-boot/patches/005-remove_float.patch | 13 - .../u-boot/patches/006-generate_params.patch | 115 - .../u-boot/patches/007-ubparams_bugfix.patch | 11 - .../u-boot/patches/008-ubparams_bugfix.patch | 10 - .../u-boot/patches/009-mac_init_bugfix.patch | 12 - .../patches/010-irda-patch-remove.patch | 13 - .../u-boot/patches/011-ubparams_update.patch | 19 - .../at91-2.6/image/u-boot/ubclient/Makefile | 15 - .../at91-2.6/image/u-boot/ubclient/ubpar.c | 124 - .../at91-2.6/patches/000-at91patches.patch | 19066 ---------------- .../at91-2.6/patches/001-vlink-machine.patch | 191 - .../at91-2.6/patches/002-led-driver.patch | 166 - .../at91-2.6/patches/003-gpio-driver.patch | 357 - .../at91-2.6/patches/004-mmc-driver.patch | 30 - .../at91-2.6/patches/005-activity-led.patch | 61 - .../at91-2.6/patches/006-change-gpios.patch | 60 - .../at91-2.6/patches/007-mtd-partition.patch | 36 - .../at91-2.6/patches/008-fdl-serial.patch | 164 - .../at91-2.6/patches/009-fdl-uartinit.patch | 43 - target/linux/brcm63xx-2.6/Makefile | 24 - target/linux/brcm63xx-2.6/config/default | 392 - .../files/arch/mips/bcm963xx/Makefile | 9 - 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a/target/linux/adm5120-2.6/Makefile b/target/linux/adm5120-2.6/Makefile deleted file mode 100644 index 1ac2093930..0000000000 --- a/target/linux/adm5120-2.6/Makefile +++ /dev/null @@ -1,25 +0,0 @@ -# -# Copyright (C) 2006 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# -include $(TOPDIR)/rules.mk - -ARCH:=mipsel -BOARD:=adm5120 -BOARDNAME:=ADM5120 (Little Endian) -FEATURES:=squashfs jffs2 pci usb - -define Target/Description - Build firmware images for Infineon/ADMtek ADM5120 based boards - (e.g : RouterBoard RB1xx, Compex WP54G-WRT ...) -endef - -include $(INCLUDE_DIR)/kernel-build.mk -DEFAULT_PACKAGES += admswconfig - -# include the profiles --include profiles/*.mk - -$(eval $(call BuildKernel)) diff --git a/target/linux/adm5120-2.6/config/default b/target/linux/adm5120-2.6/config/default deleted file mode 100644 index 9747a42a75..0000000000 --- a/target/linux/adm5120-2.6/config/default +++ /dev/null @@ -1,277 +0,0 @@ -CONFIG_32BIT=y -# CONFIG_64BIT is not set -# CONFIG_64BIT_PHYS_ADDR is not set -CONFIG_ADM5120_GPIO=y -CONFIG_ADM5120_NR_UARTS=2 -CONFIG_BASE_SMALL=0 -CONFIG_BAYCOM_SER_FDX=m -CONFIG_BAYCOM_SER_HDX=m -CONFIG_BINFMT_MISC=m -CONFIG_CIFS_DEBUG2=y -CONFIG_CIFS_EXPERIMENTAL=y -CONFIG_CIFS_STATS2=y -CONFIG_CIFS_WEAK_PW_HASH=y -CONFIG_CIFS_XATTR=y -CONFIG_CMDLINE="console=ttyS0,115200 rootfs=jffs2,squashfs init=/etc/preinit" -# CONFIG_CPU_BIG_ENDIAN is not set -CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_CPU_MIPS32=y -CONFIG_CPU_MIPS32_R1=y -# CONFIG_CPU_MIPS32_R2 is not set -# CONFIG_CPU_MIPS64_R1 is not set -# CONFIG_CPU_MIPS64_R2 is not set -CONFIG_CPU_MIPSR1=y -# CONFIG_CPU_NEVADA is not set -# CONFIG_CPU_R10000 is not set -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R4300 is not set -# CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_R8000 is not set -# CONFIG_CPU_RM7000 is not set -# CONFIG_CPU_RM9000 is not set -# CONFIG_CPU_SB1 is not set -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_TX49XX is not set -# CONFIG_CPU_VR41XX is not set -CONFIG_CRYPTO_SHA1=y -# CONFIG_DDB5477 is not set -# CONFIG_DM9000 is not set -CONFIG_DMA_NEED_PCI_MAP_STATE=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_ELF_CORE=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -CONFIG_EXT3_FS_XATTR=y -CONFIG_FIRMWARE_EDID=y -CONFIG_FS_MBCACHE=m -CONFIG_FS_POSIX_ACL=y -CONFIG_GENERIC_ACL=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -# CONFIG_GEN_RTC is not set -CONFIG_HWMON=y -# CONFIG_HWMON_DEBUG_CHIP is not set -CONFIG_HW_HAS_PCI=y -CONFIG_HW_RANDOM=y -CONFIG_HZ=250 -# CONFIG_HZ_100 is not set -# CONFIG_HZ_1024 is not set -# CONFIG_HZ_128 is not set -CONFIG_HZ_250=y -# CONFIG_HZ_256 is not set -# CONFIG_HZ_48 is not set -# CONFIG_I2C is not set -# CONFIG_IDE is not set -CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m -CONFIG_INET_XFRM_MODE_BEET=m -CONFIG_INET_XFRM_MODE_TRANSPORT=m -CONFIG_INET_XFRM_MODE_TUNNEL=m -CONFIG_INITRAMFS_SOURCE="" -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_INPUT=y -# CONFIG_INPUT_EVDEV is not set -CONFIG_IPV6_MIP6=y -CONFIG_IPV6_PRIVACY=y -CONFIG_IPV6_ROUTE_INFO=y -CONFIG_IPV6_TUNNEL=m -CONFIG_IP_NF_NAT_SNMP_BASIC=m -CONFIG_IP_NF_NETBIOS_NS=m -CONFIG_IP_NF_TARGET_CLUSTERIP=m -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_POSIX_ACL=y -CONFIG_JFFS2_FS_SECURITY=y -CONFIG_JFFS2_FS_XATTR=y -CONFIG_JFFS2_SUMMARY=y -# CONFIG_JOLIET is not set -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MACH_JAZZ is not set -# CONFIG_MACH_VR41XX is not set -CONFIG_MII=m -# CONFIG_MINIX_FS is not set -CONFIG_MINI_FO=y -CONFIG_MIPS=y -CONFIG_MIPS_ADM5120=y -CONFIG_MIPS_ADM5120_ENET=y -# CONFIG_MIPS_ATLAS is not set -# CONFIG_MIPS_BOSPORUS is not set -# CONFIG_MIPS_COBALT is not set -# CONFIG_MIPS_DB1000 is not set -# CONFIG_MIPS_DB1100 is not set -# CONFIG_MIPS_DB1200 is not set -# CONFIG_MIPS_DB1500 is not set -# CONFIG_MIPS_DB1550 is not set -# CONFIG_MIPS_EV64120 is not set -CONFIG_MIPS_L1_CACHE_SHIFT=5 -# CONFIG_MIPS_MALTA is not set -# CONFIG_MIPS_MIRAGE is not set -# CONFIG_MIPS_MTX1 is not set -CONFIG_MIPS_MT_DISABLED=y -# CONFIG_MIPS_MT_SMP is not set -# CONFIG_MIPS_MT_SMTC is not set -# CONFIG_MIPS_PB1000 is not set -# CONFIG_MIPS_PB1100 is not set -# CONFIG_MIPS_PB1200 is not set -# CONFIG_MIPS_PB1500 is not set -# CONFIG_MIPS_PB1550 is not set -# CONFIG_MIPS_SEAD is not set -# CONFIG_MIPS_SIM is not set -# CONFIG_MIPS_VPE_LOADER is not set -# CONFIG_MIPS_XXS1500 is not set -CONFIG_MODULE_FORCE_UNLOAD=y -# CONFIG_MOMENCO_JAGUAR_ATX is not set -# CONFIG_MOMENCO_OCELOT is not set -# CONFIG_MOMENCO_OCELOT_3 is not set -# CONFIG_MOMENCO_OCELOT_C is not set -# CONFIG_MOMENCO_OCELOT_G is not set -CONFIG_MTD=y -# CONFIG_MTD_ABSENT is not set -CONFIG_MTD_ADM5120=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_BLOCK2MTD=y -CONFIG_MTD_CFI=y -# CONFIG_MTD_CFI_ADV_OPTIONS is not set -CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_CFI_AMDSTD_FORCE_BOTTOM_BOOT=y -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_CFI_INTELEXT is not set -# CONFIG_MTD_CFI_STAA is not set -CONFIG_MTD_CFI_UTIL=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_COMPLEX_MAPPINGS=y -# CONFIG_MTD_CONCAT is not set -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_GEN_PROBE=y -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -CONFIG_MTD_MAP_BANK_WIDTH_2=y -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MTDRAM is not set -CONFIG_MTD_MYLOADER_PARTS=y -CONFIG_MTD_NAND=y -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_ECC_SMC is not set -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_NANDSIM is not set -CONFIG_MTD_NAND_RB100=y -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_OBSOLETE_CHIPS is not set -# CONFIG_MTD_ONENAND is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_PCI is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_PHYSMAP is not set -# CONFIG_MTD_PLATRAM is not set -# CONFIG_MTD_PMC551 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_SLRAM is not set -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set -CONFIG_NET_ACT_SIMP=m -CONFIG_NET_KEY=y -# CONFIG_NET_PCI is not set -# CONFIG_NET_PKTGEN is not set -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_PAGE_SIZE_16KB is not set -CONFIG_PAGE_SIZE_4KB=y -# CONFIG_PAGE_SIZE_64KB is not set -# CONFIG_PAGE_SIZE_8KB is not set -# CONFIG_PARTITION_ADVANCED is not set -# CONFIG_PCIPCWATCHDOG is not set -CONFIG_PCI_ADM5120=y -# CONFIG_PMC_YOSEMITE is not set -# CONFIG_PNX8550_JBS is not set -# CONFIG_PNX8550_V2PCI is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_RTC is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y -# CONFIG_SENSORS_ABITUGURU is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SERIAL_8250 is not set -CONFIG_SERIAL_ADM5120=y -CONFIG_SERIO=y -# CONFIG_SERIO_I8042 is not set -# CONFIG_SERIO_LIBPS2 is not set -# CONFIG_SERIO_PCIPS2 is not set -# CONFIG_SERIO_RAW is not set -CONFIG_SERIO_SERPORT=y -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_PTSWARM is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_SWARM is not set -# CONFIG_SND_USB_AUDIO is not set -CONFIG_SOFT_WATCHDOG=m -# CONFIG_SPARSEMEM_STATIC is not set -CONFIG_SYS_HAS_CPU_MIPS32_R1=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y -CONFIG_TMPFS_POSIX_ACL=y -# CONFIG_TOSHIBA_JMR3927 is not set -# CONFIG_TOSHIBA_RBTX4927 is not set -# CONFIG_TOSHIBA_RBTX4938 is not set -CONFIG_TRAD_SIGNALS=y -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_USB=y -# CONFIG_USBPCWATCHDOG is not set -# CONFIG_USB_ACM is not set -CONFIG_USB_ADM5120_HCD=y -# CONFIG_USB_ATM is not set -# CONFIG_USB_CATC is not set -# CONFIG_USB_DEVICEFS is not set -# CONFIG_USB_EHCI_HCD is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_PRINTER is not set -# CONFIG_USB_RTL8150 is not set -# CONFIG_USB_SERIAL is not set -# CONFIG_USB_STORAGE is not set -# CONFIG_USB_UHCI_HCD is not set -# CONFIG_USB_USBNET is not set -# CONFIG_USB_USBNET_MII is not set -# CONFIG_USB_ZD1201 is not set -CONFIG_VM_EVENT_COUNTERS=y -# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set -CONFIG_YAFFS_AUTO_YAFFS2=y -# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set -# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set -# CONFIG_YAFFS_DOES_ECC is not set -CONFIG_YAFFS_FS=y -CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y -CONFIG_YAFFS_YAFFS1=y -CONFIG_YAFFS_YAFFS2=y -# CONFIG_ZD1211RW is not set diff --git a/target/linux/adm5120-2.6/files/arch/mips/adm5120/Makefile b/target/linux/adm5120-2.6/files/arch/mips/adm5120/Makefile deleted file mode 100644 index 7ea82a1309..0000000000 --- a/target/linux/adm5120-2.6/files/arch/mips/adm5120/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -# -# Makefile for the ADMtek ADM5120 SoC specific parts of the kernel -# - -obj-y := setup.o prom.o irq.o memory.o int-handler.o adm5120_info.o - -EXTRA_AFLAGS := $(CFLAGS) diff --git a/target/linux/adm5120-2.6/files/arch/mips/adm5120/adm5120_info.c b/target/linux/adm5120-2.6/files/arch/mips/adm5120/adm5120_info.c deleted file mode 100644 index 67b3e42ee7..0000000000 --- a/target/linux/adm5120-2.6/files/arch/mips/adm5120/adm5120_info.c +++ /dev/null @@ -1,710 +0,0 @@ -/* - * $Id$ - * - * Copyright (C) 2007 OpenWrt.org - * Copyright (C) 2007 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include -#include - -/* - * Globals - */ -struct adm5120_board adm5120_board; -unsigned int adm5120_boot_loader; - -unsigned int adm5120_product_code; -unsigned int adm5120_revision; -unsigned int adm5120_package; -unsigned int adm5120_nand_boot; -unsigned long adm5120_speed; - -/* - * Locals - */ -static char *boot_loader_names[BOOT_LOADER_LAST+1] = { - [BOOT_LOADER_UNKNOWN] = "Unknown", - [BOOT_LOADER_CFE] = "CFE", - [BOOT_LOADER_UBOOT] = "U-Boot", - [BOOT_LOADER_MYLOADER] = "MyLoader", - [BOOT_LOADER_ROUTERBOOT]= "RouterBOOT", - [BOOT_LOADER_BOOTBASE] = "Bootbase" -}; - -static struct adm5120_board __initdata adm5120_boards[] = { - { - .name = "Compex NetPassage 27G", - .mach_type = MACH_ADM5120_NP27G, - .has_usb = 1, - .iface_num = 5, - .flash0_size = 4*1024*1024, - }, - { - .name = "Compex NetPassage 28G", - .mach_type = MACH_ADM5120_NP28G, - .has_usb = 0, - .iface_num = 4, - .flash0_size = 4*1024*1024, - }, - { - .name = "Compex NP28G (HotSpot)", - .mach_type = MACH_ADM5120_NP28GHS, - .has_usb = 0, - .iface_num = 4, - .flash0_size = 4*1024*1024, - }, - { - .name = "Compex WP54AG", - .mach_type = MACH_ADM5120_WP54AG, - .has_usb = 0, - .iface_num = 2, - .flash0_size = 4*1024*1024, - }, - { - .name = "Compex WP54G", - .mach_type = MACH_ADM5120_WP54G, - .has_usb = 0, - .iface_num = 2, - .flash0_size = 4*1024*1024, - }, - { - .name = "Compex WP54G-WRT", - .mach_type = MACH_ADM5120_WP54G_WRT, - .has_usb = 0, - .iface_num = 2, - .flash0_size = 4*1024*1024, - }, - { - .name = "Compex WP54G v1C", - .mach_type = MACH_ADM5120_WP54Gv1C, - .has_usb = 0, - .iface_num = 2, - .flash0_size = 2*1024*1024, - }, - { - .name = "Compex WPP54AG", - .mach_type = MACH_ADM5120_WPP54AG, - .has_usb = 0, - .iface_num = 2, - .flash0_size = 4*1024*1024, - }, - { - .name = "Compex WPP54G", - .mach_type = MACH_ADM5120_WPP54G, - .has_usb = 0, - .iface_num = 2, - .flash0_size = 4*1024*1024, - }, - { - .name = "RouterBOARD RB-111", - .mach_type = MACH_ADM5120_RB_111, - .has_usb = 0, - .iface_num = 1, - .flash0_size = 128*1024, - }, - { - .name = "RouterBOARD RB-112", - .mach_type = MACH_ADM5120_RB_112, - .has_usb = 0, - .iface_num = 1, - .flash0_size = 128*1024, - }, - { - .name = "RouterBOARD RB-133", - .mach_type = MACH_ADM5120_RB_133, - .has_usb = 0, - .iface_num = 3, - .flash0_size = 128*1024, - }, - { - .name = "RouterBOARD RB-133C", - .mach_type = MACH_ADM5120_RB_133C, - .has_usb = 0, - .iface_num = 1, - .flash0_size = 128*1024, - }, - { - .name = "RouterBOARD RB-150", - .mach_type = MACH_ADM5120_RB_150, - .has_usb = 0, - .iface_num = 5, - .flash0_size = 128*1024, - }, - { - .name = "RouterBOARD RB-153", - .mach_type = MACH_ADM5120_RB_153, - .has_usb = 0, - .iface_num = 5, - .flash0_size = 128*1024, - }, - { - .name = "ZyXEL HomeSafe 100/100W", - .mach_type = MACH_ADM5120_HS100, - .has_usb = 0, - .iface_num = 5, - .flash0_size = 4*1024*1024, - }, - { - .name = "ZyXEL Prestige 334", - .mach_type = MACH_ADM5120_P334, - .has_usb = 0, - .iface_num = 5, - .flash0_size = 2*1024*1024, - }, - { - .name = "ZyXEL Prestige 334U", - .mach_type = MACH_ADM5120_P334U, - .has_usb = 0, - .iface_num = 5, - .flash0_size = 4*1024*1024, - }, - { - .name = "ZyXEL Prestige 334W", - .mach_type = MACH_ADM5120_P334W, - .has_usb = 0, - .iface_num = 5, - .flash0_size = 2*1024*1024, - }, - { - .name = "ZyXEL Prestige 334WH", - .mach_type = MACH_ADM5120_P334WH, - .has_usb = 0, - .iface_num = 5, - .flash0_size = 4*1024*1024, - }, - { - .name = "ZyXEL Prestige 334WHD", - .mach_type = MACH_ADM5120_P334WHD, - .has_usb = 0, - .iface_num = 5, - .flash0_size = 4*1024*1024, - }, - { - .name = "ZyXEL Prestige 334WT", - .mach_type = MACH_ADM5120_P334WT, - .has_usb = 1, - .iface_num = 5, - .flash0_size = 4*1024*1024, - }, - { - .name = "ZyXEL Prestige 335/335WT", - .mach_type = MACH_ADM5120_P335, - .has_usb = 1, - .iface_num = 5, - .flash0_size = 4*1024*1024, - }, - { - .name = "ZyXEL Prestige 335Plus", - .mach_type = MACH_ADM5120_P335PLUS, - .has_usb = 1, - .iface_num = 5, - .flash0_size = 4*1024*1024, - }, - { - .name = "ZyXEL Prestige 335U", - .mach_type = MACH_ADM5120_P335U, - .has_usb = 1, - .iface_num = 5, - .flash0_size = 4*1024*1024, - }, - { - .name = "Unknown ADM5120 board", - .mach_type = MACH_ADM5120_UNKNOWN, - .has_usb = 1, - .iface_num = 5, - .flash0_size = 0, - } -}; - -#define DUMMY_BOARD() {.mach_type = MACH_ADM5120_UNKNOWN} - -struct mylo_board { - u16 vid; - u16 did; - u16 svid; - u16 sdid; - unsigned long mach_type; -}; - - -#define MYLO_BOARD(v,d,sv,sd,mt) { .vid = (v), .did = (d), .svid = (sv), \ - .sdid = (sd), .mach_type = (mt) } - -#define COMPEX_BOARD(d,mt) MYLO_BOARD(VENID_COMPEX,(d),VENID_COMPEX,(d),(mt)) - -static struct mylo_board __initdata mylo_boards[] = { - COMPEX_BOARD(DEVID_COMPEX_NP27G, MACH_ADM5120_NP27G), - COMPEX_BOARD(DEVID_COMPEX_NP28G, MACH_ADM5120_NP28G), - COMPEX_BOARD(DEVID_COMPEX_NP28GHS, MACH_ADM5120_NP28GHS), - COMPEX_BOARD(DEVID_COMPEX_WP54G, MACH_ADM5120_WP54G), - COMPEX_BOARD(DEVID_COMPEX_WP54Gv1C, MACH_ADM5120_WP54Gv1C), - COMPEX_BOARD(DEVID_COMPEX_WP54AG, MACH_ADM5120_WP54AG), - COMPEX_BOARD(DEVID_COMPEX_WPP54G, MACH_ADM5120_WPP54G), - COMPEX_BOARD(DEVID_COMPEX_WPP54AG, MACH_ADM5120_WPP54AG), - DUMMY_BOARD() -}; - -#define ROUTERBOARD_NAME_LEN 16 - -struct routerboard { - unsigned long mach_type; - char name[ROUTERBOARD_NAME_LEN]; -}; - -#define ROUTERBOARD(n, mt) { .name = (n), .mach_type = (mt) } -static struct routerboard __initdata routerboards[] = { - ROUTERBOARD("111", MACH_ADM5120_RB_111), - ROUTERBOARD("112", MACH_ADM5120_RB_112), - ROUTERBOARD("133", MACH_ADM5120_RB_133), - ROUTERBOARD("133C", MACH_ADM5120_RB_133C), - ROUTERBOARD("miniROUTER", MACH_ADM5120_RB_150), - ROUTERBOARD("153", MACH_ADM5120_RB_150), - DUMMY_BOARD() -}; - -struct zynos_board { - unsigned long mach_type; - unsigned int vendor_id; - u16 board_id; -}; - -#define ZYNOS_BOARD(vi, bi, mt) { .vendor_id = (vi), .board_id = (bi), \ - .mach_type = (mt) } - -#define ZYXEL_BOARD(bi, mt) ZYNOS_BOARD(ZYNOS_VENDOR_ID_ZYXEL, bi, mt) -#define DLINK_BOARD(bi, mt) ZYNOS_BOARD(ZYNOS_VENDOR_ID_DLINK, bi, mt) -#define LUCENT_BOARD(bi, mt) ZYNOS_BOARD(ZYNOS_VENDOR_ID_LUCENT, bi, mt) - -static struct zynos_board __initdata zynos_boards[] = { - ZYXEL_BOARD(ZYNOS_BOARD_HS100, MACH_ADM5120_HS100), - ZYXEL_BOARD(ZYNOS_BOARD_P334, MACH_ADM5120_P334), - ZYXEL_BOARD(ZYNOS_BOARD_P334U, MACH_ADM5120_P334U), - ZYXEL_BOARD(ZYNOS_BOARD_P334W, MACH_ADM5120_P334W), - ZYXEL_BOARD(ZYNOS_BOARD_P334WH, MACH_ADM5120_P334WH), - ZYXEL_BOARD(ZYNOS_BOARD_P334WHD, MACH_ADM5120_P334WHD), - ZYXEL_BOARD(ZYNOS_BOARD_P334WT, MACH_ADM5120_P334WT), - ZYXEL_BOARD(ZYNOS_BOARD_P335, MACH_ADM5120_P335), - ZYXEL_BOARD(ZYNOS_BOARD_P335PLUS, MACH_ADM5120_P335PLUS), - ZYXEL_BOARD(ZYNOS_BOARD_P335U, MACH_ADM5120_P335U), - DUMMY_BOARD() -}; - -/* - * Helper routines - */ -static inline u16 read_le16(void *buf) -{ - u8 *p; - - p = buf; - return ((u16)p[0] + ((u16)p[1] << 8)); -} - -static inline u32 read_le32(void *buf) -{ - u8 *p; - - p = buf; - return ((u32)p[0] + ((u32)p[1] << 8) + ((u32)p[2] << 16) + - ((u32)p[3] << 24)); -} - -static inline u16 read_be16(void *buf) -{ - u8 *p; - - p = buf; - return (((u16)p[0] << 8) + (u16)p[1]); -} - -static inline u32 read_be32(void *buf) -{ - u8 *p; - - p = buf; - return (((u32)p[0] << 24) + ((u32)p[1] << 16) + ((u32)p[2] << 8) + - ((u32)p[3])); -} - -/* - * CFE based boards - */ -#define CFE_EPTSEAL 0x43464531 /* CFE1 is the magic number to recognize CFE -from other bootloaders */ - -static int __init cfe_present(void) -{ - /* - * This method only works, when we are booted directly from the CFE. - */ - u32 cfe_handle = (u32) fw_arg0; - u32 cfe_a1_val = (u32) fw_arg1; - u32 cfe_entry = (u32) fw_arg2; - u32 cfe_seal = (u32) fw_arg3; - - /* Check for CFE by finding the CFE magic number */ - if (cfe_seal != CFE_EPTSEAL) { - /* We are not booted from CFE */ - return 0; - } - - /* cfe_a1_val must be 0, because only one CPU present in the ADM5120 SoC -*/ - if (cfe_a1_val != 0) { - return 0; - } - - /* The cfe_handle, and the cfe_entry must be kernel mode addresses */ - if ((cfe_handle < KSEG0) || (cfe_entry < KSEG0)) { - return 0; - } - - return 1; -} - -static unsigned long __init cfe_detect_board(void) -{ - return MACH_ADM5120_WP54G_WRT; -} - -/* - * MyLoader based boards - */ -#define SYS_PARAMS_ADDR KSEG1ADDR(ADM5120_SRAM0_BASE+0x0F000) -#define BOARD_PARAMS_ADDR KSEG1ADDR(ADM5120_SRAM0_BASE+0x0F800) -#define PART_TABLE_ADDR KSEG1ADDR(ADM5120_SRAM0_BASE+0x10000) - -static unsigned long __init myloader_detect_board(void) -{ - struct mylo_system_params *sysp; - struct mylo_board_params *boardp; - struct mylo_partition_table *parts; - struct mylo_board *board; - unsigned long ret; - - ret = MACH_ADM5120_UNKNOWN; - - sysp = (struct mylo_system_params *)(SYS_PARAMS_ADDR); - boardp = (struct mylo_board_params *)(BOARD_PARAMS_ADDR); - parts = (struct mylo_partition_table *)(PART_TABLE_ADDR); - - /* Check for some magic numbers */ - if ((le32_to_cpu(sysp->magic) != MYLO_MAGIC_SYS_PARAMS) || - (le32_to_cpu(boardp->magic) != MYLO_MAGIC_BOARD_PARAMS) || - (le32_to_cpu(parts->magic) != MYLO_MAGIC_PARTITIONS)) - goto out; - - for (board = mylo_boards; board->mach_type != MACH_ADM5120_UNKNOWN; - board++) { - if ((le16_to_cpu(sysp->vid) == board->vid) && - (le16_to_cpu(sysp->did) == board->did) && - (le16_to_cpu(sysp->svid) == board->svid) && - (le16_to_cpu(sysp->sdid) == board->sdid)) { - ret = board->mach_type; - break; - } - } - - /* assume MyLoader as the boot-loader */ - adm5120_boot_loader = BOOT_LOADER_MYLOADER; - -out: - return ret; -} - -/* - * RouterBOOT based boards - */ -static int __init routerboot_find_tag(u8 *buf, u16 tagid, void **tagval, - u16 *taglen) -{ - u16 id,len; - int ret; - - ret = -1; - /* skip header */ - buf += 8; - for (;;) { - id = read_le16(buf); - buf += 2; - if (id == RB_ID_TERMINATOR) - break; - - len = read_le16(buf); - buf += 2; - if (id == tagid) { - *tagval = buf; - *taglen = len; - ret = 0; - break; - } - - buf += len; - } - - return ret; -} - -#define RB_HS_ADDR KSEG1ADDR(ADM5120_SRAM0_BASE+0x1000) -#define RB_SS_ADDR KSEG1ADDR(ADM5120_SRAM0_BASE+0x2000) -#define RB_FW_ADDR KSEG1ADDR(ADM5120_SRAM0_BASE+0x10000) - -static unsigned long __init routerboot_detect_board(void) -{ - struct routerboard *board; - u32 magic; - char *name; - u16 namelen; - unsigned long ret; - - ret = MACH_ADM5120_UNKNOWN; - - magic = le32_to_cpu(*(u32 *)RB_HS_ADDR); - if (magic != RB_MAGIC_HARD) - goto out; - - magic = le32_to_cpu(*(u32 *)RB_SS_ADDR); - if ((magic != RB_MAGIC_SOFT) && (magic != RB_MAGIC_DAWN)) - goto out; - - if (routerboot_find_tag((u8 *)RB_HS_ADDR, RB_ID_BOARD_NAME, - (void *)&name, &namelen)) - goto out; - - for (board = routerboards; board->mach_type != MACH_ADM5120_UNKNOWN; - board++) { - if (strncmp(board->name, name, strlen(board->name)) == 0) { - ret = board->mach_type; - break; - } - - } - - /* assume RouterBOOT as the boot-loader */ - adm5120_boot_loader = BOOT_LOADER_ROUTERBOOT; - -out: - return ret; -} - -/* - * ZyNOS based boards - */ -static inline u32 zynos_dbgarea_present(u8 *data) -{ - u32 t; - - t = read_be32(data+5); - if (t != ZYNOS_MAGIC_DBGAREA1) - return 0; - - t = read_be32(data+9); - if (t != ZYNOS_MAGIC_DBGAREA2) - return 0; - - return 1; -} - -#define CHECK_VENDOR(n) (strnicmp(vendor,(n),strlen(n)) == 0) - -static inline unsigned int zynos_get_vendor_id(struct zynos_board_info *info) -{ - unsigned char vendor[ZYNOS_NAME_LEN]; - int i; - - for (i=0; ivendor[i]; - - if CHECK_VENDOR(ZYNOS_VENDOR_ZYXEL) - return ZYNOS_VENDOR_ID_ZYXEL; -#if 0 - /* TODO: there are no known ADM5120 based boards from other vendors */ - if CHECK_VENDOR(ZYNOS_VENDOR_DLINK) - return ZYNOS_VENDOR_ID_DLINK; - - if CHECK_VENDOR(ZYNOS_VENDOR_LUCENT) - return ZYNOS_VENDOR_ID_LUCENT; - - if CHECK_VENDOR(ZYNOS_VENDOR_NETGEAR) - return ZYNOS_VENDOR_ID_NETGEAR; -#endif - - return ZYNOS_VENDOR_ID_OTHER; -} - -static inline u16 zynos_get_board_id(struct zynos_board_info *info) -{ - return read_be16(&info->board_id); -} - -static inline u32 zynos_get_bootext_addr(struct zynos_board_info *info) -{ - return read_be32(&info->bootext_addr); -} - - -#define ZYNOS_INFO_ADDR KSEG1ADDR(ADM5120_SRAM0_BASE+0x3F90) -#define ZYNOS_HDBG_ADDR KSEG1ADDR(ADM5120_SRAM0_BASE+0x4000) -#define BOOTEXT_ADDR_MIN KSEG1ADDR(ADM5120_SRAM0_BASE) -#define BOOTEXT_ADDR_MAX (BOOTEXT_ADDR_MIN + (2*1024*1024)) - -static unsigned long __init zynos_detect_board(void) -{ - struct zynos_board_info *info; - struct zynos_board *board; - unsigned int vendor_id; - u16 board_id; - u32 t; - unsigned long ret; - - ret = MACH_ADM5120_UNKNOWN; - /* check presence of the dbgarea */ - if (zynos_dbgarea_present((u8 *)ZYNOS_HDBG_ADDR) == 0) - goto out; - - info = (struct zynos_board_info *)(ZYNOS_INFO_ADDR); - - /* check for a valid BootExt address */ - t = zynos_get_bootext_addr(info); - if ((t < BOOTEXT_ADDR_MIN) || (t > BOOTEXT_ADDR_MAX)) - goto out; - - vendor_id = zynos_get_vendor_id(info); - board_id = zynos_get_board_id(info); - - for (board = zynos_boards; board->mach_type != MACH_ADM5120_UNKNOWN; - board++) { - if ((board->vendor_id == vendor_id) && - (board->board_id == board_id)) { - ret = board->mach_type; - break; - } - } - - /* assume Bootbase as the boot-loader */ - adm5120_boot_loader = BOOT_LOADER_BOOTBASE; - -out: - return ret; -} - -/* - * U-Boot based boards - */ -static int __init uboot_present(void) -{ - /* FIXME: not yet implemented */ - return 0; -} - -static unsigned long __init uboot_detect_board(void) -{ - /* FIXME: not yet implemented */ - return MACH_ADM5120_UNKNOWN; -} - -static void __init adm5120_detect_board(void) -{ - struct adm5120_board *board; - unsigned long t; - - adm5120_boot_loader = BOOT_LOADER_UNKNOWN; - - /* Try to detect board type without bootloader */ - t = routerboot_detect_board(); - - if (t == MACH_ADM5120_UNKNOWN) - t = zynos_detect_board(); - - if (t == MACH_ADM5120_UNKNOWN) - t = myloader_detect_board(); - - /* Try to detect bootloader type */ - if (cfe_present()) { - adm5120_boot_loader = BOOT_LOADER_CFE; - if (t == MACH_ADM5120_UNKNOWN) - t = cfe_detect_board(); - } else if (uboot_present()) { - adm5120_boot_loader = BOOT_LOADER_UBOOT; - if (t == MACH_ADM5120_UNKNOWN) - t = uboot_detect_board(); - } - - for (board = adm5120_boards; board->mach_type != MACH_ADM5120_UNKNOWN; - board++) { - if (board->mach_type == t) - break; - } - - memcpy(&adm5120_board, board, sizeof(adm5120_board)); -} - -/* - * CPU settings detection - */ -#define CODE_GET_PC(c) ((c) & CODE_PC_MASK) -#define CODE_GET_REV(c) (((c) >> CODE_REV_SHIFT) & CODE_REV_MASK) -#define CODE_GET_PK(c) (((c) >> CODE_PK_SHIFT) & CODE_PK_MASK) -#define CODE_GET_CLKS(c) (((c) >> CODE_CLKS_SHIFT) & CODE_CLKS_MASK) -#define CODE_GET_NAB(c) (((c) & CODE_NAB) != 0) - -static void __init adm5120_detect_cpuinfo(void) -{ - u32 code; - u32 clks; - - code = *(u32 *)KSEG1ADDR(ADM5120_SWITCH_BASE+SWITCH_REG_CODE); - - adm5120_product_code = CODE_GET_PC(code); - adm5120_revision = CODE_GET_REV(code); - adm5120_package = (CODE_GET_PK(code) == CODE_PK_BGA) ? - ADM5120_PACKAGE_BGA : ADM5120_PACKAGE_PQFP; - adm5120_nand_boot = CODE_GET_NAB(code); - - clks = CODE_GET_CLKS(code); - adm5120_speed = ADM5120_SPEED_175; - if (clks & 1) - adm5120_speed += 25000000; - if (clks & 2) - adm5120_speed += 50000000; -} - -void __init adm5120_info_show(void) -{ - /* FIXME: move this somewhere else */ - printk("ADM%04X%s revision %d, running at %ldMHz\n", - adm5120_product_code, - (adm5120_package == ADM5120_PACKAGE_BGA) ? "" : "P", - adm5120_revision, (adm5120_speed / 1000000) - ); - printk("Boot loader is: %s\n", boot_loader_names[adm5120_boot_loader]); - printk("Booted from : %s flash\n", adm5120_nand_boot ? "NAND":"NOR"); - printk("Board is : %s\n", adm5120_board_name()); -} - -void __init adm5120_info_init(void) -{ - adm5120_detect_cpuinfo(); - adm5120_detect_board(); - - adm5120_info_show(); -} diff --git a/target/linux/adm5120-2.6/files/arch/mips/adm5120/int-handler.S b/target/linux/adm5120-2.6/files/arch/mips/adm5120/int-handler.S deleted file mode 100644 index f118fb402b..0000000000 --- a/target/linux/adm5120-2.6/files/arch/mips/adm5120/int-handler.S +++ /dev/null @@ -1,135 +0,0 @@ -/* - * Carsten Langgaard, carstenl@mips.com - * Copyright (C) 1999, 2000 MIPS Technologies, Inc. All rights reserved. - * - * ######################################################################## - * - * This program is free software; you can distribute it and/or modify it - * under the terms of the GNU General Public License (Version 2) as - * published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. - * - * ######################################################################## - * - * Interrupt exception dispatch code. - * - */ -#include - -#include -#include -#include -#include - -#define STATUS_IE 0x00000001 - -/* A lot of complication here is taken away because: - * - * 1) We handle one interrupt and return, sitting in a loop and moving across - * all the pending IRQ bits in the cause register is _NOT_ the answer, the - * common case is one pending IRQ so optimize in that direction. - * - * 2) We need not check against bits in the status register IRQ mask, that - * would make this routine slow as hell. - * - * 3) Linux only thinks in terms of all IRQs on or all IRQs off, nothing in - * between like BSD spl() brain-damage. - * - * Furthermore, the IRQs on the MIPS board look basically (barring software - * IRQs which we don't use at all and all external interrupt sources are - * combined together on hardware interrupt 0 (MIPS IRQ 2)) like: - * - * MIPS IRQ Source - * -------- ------ - * 0 Software (ignored) - * 1 Software (ignored) - * 2 Combined hardware interrupt (hw0) - * 3 Hardware (ignored) - * 4 Hardware (ignored) - * 5 Hardware (ignored) - * 6 Hardware (ignored) - * 7 R4k timer (what we use) - * - * Note: On the SEAD board thing are a little bit different. - * Here IRQ 2 (hw0) is wired to the UART0 and IRQ 3 (hw1) is wired - * wired to UART1. - * - * We handle the IRQ according to _our_ priority which is: - * - * Highest ---- R4k Timer - * Lowest ---- Combined hardware interrupt - * - * then we just return, if multiple IRQs are pending then we will just take - * another exception, big deal. - */ - - .text - .set noreorder - .set noat - .align 5 - -NESTED(mipsIRQ, PT_SIZE, sp) - SAVE_ALL - CLI - .set at - - mfc0 s0, CP0_CAUSE - mfc0 s1, CP0_STATUS - and s0, s0, s1 - - /* First we check for r4k counter/timer IRQ. */ - andi a0, s0, CAUSEF_IP7 - beq a0, zero, 1f - nop - - move a0, sp - jal mips_timer_interrupt - nop - - j ret_from_irq - nop - -1: - andi a0, s0, CAUSEF_IP2 - beq a0, zero, 1f - nop - - move a0, sp - jal adm5120_hw0_irqdispatch - nop -1: - j ret_from_irq - nop - -END(mipsIRQ) - - -LEAF(mips_int_lock) - .set noreorder - mfc0 v0, CP0_STATUS - li v1, ~STATUS_IE - and v1, v1, v0 - mtc0 v1, CP0_STATUS - j ra - and v0, v0, STATUS_IE - .set reorder -END(mips_int_lock) - - -LEAF(mips_int_unlock) - mfc0 v0, CP0_STATUS - and a0, a0, STATUS_IE - or v0, v0, a0 - mtc0 v0, CP0_STATUS - j ra - nop -END(mips_int_unlock) - diff --git a/target/linux/adm5120-2.6/files/arch/mips/adm5120/irq.c b/target/linux/adm5120-2.6/files/arch/mips/adm5120/irq.c deleted file mode 100644 index 46f3bb05ee..0000000000 --- a/target/linux/adm5120-2.6/files/arch/mips/adm5120/irq.c +++ /dev/null @@ -1,156 +0,0 @@ -/* - * Copyright (C) ADMtek Incorporated. - * Creator : daniell@admtek.com.tw - * Carsten Langgaard, carstenl@mips.com - * Copyright (C) 2000, 2001 MIPS Technologies, Inc. - * Copyright (C) 2001 Ralf Baechle - * Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org) - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#define MIPS_CPU_TIMER_IRQ 7 - -extern int setup_irq(unsigned int irq, struct irqaction *irqaction); -extern irq_desc_t irq_desc[]; -extern asmlinkage void mipsIRQ(void); - -int mips_int_lock(void); -void mips_int_unlock(int); - -unsigned int mips_counter_frequency; - -#define ADM5120_INTC_REG(reg) (*(volatile u32 *)(KSEG1ADDR(0x12200000+(reg)))) -#define ADM5120_INTC_STATUS ADM5120_INTC_REG(0x00) -#define ADM5120_INTC_ENABLE ADM5120_INTC_REG(0x08) -#define ADM5120_INTC_DISABLE ADM5120_INTC_REG(0x0c) -#define ADM5120_IRQ_MAX 9 -#define ADM5120_IRQ_MASK 0x3ff - -void adm5120_hw0_irqdispatch(struct pt_regs *regs) -{ - unsigned long intsrc; - int i; - - intsrc = ADM5120_INTC_STATUS & ADM5120_IRQ_MASK; - - for (i = 0; intsrc; intsrc >>= 1, i++) - if (intsrc & 0x1) - do_IRQ(i); - else - spurious_interrupt(); -} - -void mips_timer_interrupt(struct pt_regs *regs) -{ - write_c0_compare(read_c0_count()+ mips_counter_frequency/HZ); - ll_timer_interrupt(MIPS_CPU_TIMER_IRQ); -} - -/* Main interrupt dispatcher */ -asmlinkage void plat_irq_dispatch(struct pt_regs *regs) -{ - unsigned int cp0_cause = read_c0_cause() & read_c0_status(); - - if (cp0_cause & CAUSEF_IP7) { - mips_timer_interrupt( regs); - } else if (cp0_cause & CAUSEF_IP2) { - adm5120_hw0_irqdispatch( regs); - } -} - -void enable_adm5120_irq(unsigned int irq) -{ - int s; - - /* Disable all interrupts (FIQ/IRQ) */ - s = mips_int_lock(); - - if ((irq < 0) || (irq > ADM5120_IRQ_MAX)) - goto err_exit; - - ADM5120_INTC_ENABLE = (1< ADM5120_IRQ_MAX)) - goto err_exit; - - ADM5120_INTC_DISABLE = (1< -#include -#include -#include -#include -#include - -#include -#include -#include - -#include - -extern char *prom_getenv(char *envname); - -#define PFN_ALIGN(x) (((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK) - -#define ADM5120_MEMCTRL 0x1200001c -#define ADM5120_MEMCTRL_SDRAM_MASK 0x7 - -static const unsigned long adm_sdramsize[] __initdata = { - 0x0, /* Reserved */ - 0x0400000, /* 4Mb */ - 0x0800000, /* 8Mb */ - 0x1000000, /* 16Mb */ - 0x4000000, /* 64Mb */ - 0x8000000, /* 128Mb */ -}; - -/* determined physical memory size, not overridden by command line args */ -unsigned long physical_memsize = 0L; - -struct prom_pmemblock mdesc[PROM_MAX_PMEMBLOCKS]; - -struct prom_pmemblock * __init prom_getmdesc(void) -{ - char *memsize_str; - unsigned int memsize; - char cmdline[CL_SIZE], *ptr; - - memsize_str = prom_getenv("memsize"); - - if (!memsize_str) - { - prom_printf("memsize not set in boot prom, set to default (8Mb)\n"); - physical_memsize = 0x00800000; - } - else -#ifdef DEBUG - prom_printf("prom_memsize = %s\n", memsize_str); -#endif - physical_memsize = simple_strtol(memsize_str, NULL, 0); - - /* Check the command line for a memsize directive that overrides - * the physical/default amount */ - strcpy(cmdline, arcs_cmdline); - ptr = strstr(cmdline, "memsize="); - if (ptr && (ptr != cmdline) && (*(ptr - 1) != ' ')) - ptr = strstr(ptr, " memsize="); - - if (ptr) - memsize = memparse(ptr + 8, &ptr); - else - memsize = physical_memsize; - - memset(mdesc, 0, sizeof(mdesc)); - - mdesc[0].type = BOOT_MEM_RAM; - mdesc[0].base = CPHYSADDR(PFN_ALIGN(&_end)); - mdesc[0].size = memsize - mdesc[0].base; - - return &mdesc[0]; -} - -void __init prom_meminit(void) -{ - struct prom_pmemblock *p; - - p = prom_getmdesc(); - - while (p->size) - { - long type; - unsigned long base, size; - base = p->base; - type = p->type, - size = p->size; - add_memory_region(base, size, type); - p++; - } -} - -#if 0 -void __init prom_meminit(void) -{ - unsigned long base = CPHYSADDR(PFN_ALIGN(&_end)); - unsigned long size; - - u32 memctrl = *(u32*)KSEG1ADDR(ADM5120_MEMCTRL); - size = adm_sdramsize[memctrl & ADM5120_MEMCTRL_SDRAM_MASK]; - add_memory_region(base, size-base, BOOT_MEM_RAM); -} -#endif - -unsigned long __init prom_free_prom_memory(void) -{ - /* We do not have to prom memory to free */ - return 0; -} diff --git a/target/linux/adm5120-2.6/files/arch/mips/adm5120/prom.c b/target/linux/adm5120-2.6/files/arch/mips/adm5120/prom.c deleted file mode 100644 index 63e5b8602c..0000000000 --- a/target/linux/adm5120-2.6/files/arch/mips/adm5120/prom.c +++ /dev/null @@ -1,119 +0,0 @@ -/***************************************************************************** - * Carsten Langgaard, carstenl@mips.com - * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. - * Copyright (C) 2003 ADMtek Incorporated. - * daniell@admtek.com.tw - * Copyright (C) 2007 OpenWrt.org - * - * This program is free software; you can distribute it and/or modify it - * under the terms of the GNU General Public License (Version 2) as - * published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. - * - *****************************************************************************/ - -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -void setup_prom_printf(int); -void prom_printf(char *, ...); -void prom_meminit(void); - -#define ADM5120_ENVC 1 - -char *adm5120_envp[2*ADM5120_ENVC] = {"memsize","0x001000000"}; - -#define READCSR(r) *(volatile unsigned long *)(0xB2600000+(r)) -#define WRITECSR(r,v) *(volatile unsigned long *)(0xB2600000+(r)) = v - -#define UART_DR_REG 0x00 -#define UART_FR_REG 0x18 -#define UART_TX_FIFO_FULL 0x20 - -int putPromChar(char c) -{ - WRITECSR(UART_DR_REG, c); - while ( (READCSR(UART_FR_REG) & UART_TX_FIFO_FULL) ); - return 0; -} - -/* - * Ugly prom_printf used for debugging - */ - -void prom_printf(char *fmt, ...) -{ - va_list args; - int l; - char *p, *buf_end; - char buf[1024]; - - va_start(args, fmt); - l = vsprintf(buf, fmt, args); /* hopefully i < sizeof(buf) */ - va_end(args); - - buf_end = buf + l; - - for (p = buf; p < buf_end; p++) { - /* Crude cr/nl handling is better than none */ - if (*p == '\n') - putPromChar('\r'); - putPromChar(*p); - } -} - -char *prom_getenv(char *envname) -{ - int i, index=0; - - i = strlen(envname); - - printk(KERN_INFO "GETENV: envname is %s\n", envname); - - while(index < (2*ADM5120_ENVC)) { - if(strncmp(envname, adm5120_envp[index], i) == 0) { - printk(KERN_INFO "GETENV: returning %s\n", adm5120_envp[index+1]); - return(adm5120_envp[index+1]); - } - index += 2; - } - - printk(KERN_INFO "GETENV: not found.\n"); - return(NULL); -} - - -/* - * initialize the prom module. - */ -void __init prom_init(void) -{ - adm5120_info_init(); - - /* you should these macros defined in include/asm/bootinfo.h */ - mips_machgroup = MACH_GROUP_ADM5120; - mips_machtype = adm5120_board.mach_type; - - /* init command line, register a default kernel command line */ - strcpy(&(arcs_cmdline[0]), CONFIG_CMDLINE); - - /* init memory map */ - prom_meminit(); -} diff --git a/target/linux/adm5120-2.6/files/arch/mips/adm5120/setup.c b/target/linux/adm5120-2.6/files/arch/mips/adm5120/setup.c deleted file mode 100644 index 3f4f365610..0000000000 --- a/target/linux/adm5120-2.6/files/arch/mips/adm5120/setup.c +++ /dev/null @@ -1,107 +0,0 @@ -/* - * Copyright (C) ADMtek Incorporated. - * Creator : daniell@admtek.com.tw - * Copyright 1999, 2000 MIPS Technologies, Inc. - * Copyright Jeroen Vreeken (pe1rxq@amsat.org), 2005 - * Copyright (C) 2007 OpenWrt.org - */ - -#include -#include -#include -#include - -#include -#include -#include - -#include - -#define ADM5120_SOFTRESET 0x12000004 -#define STATUS_IE 0x00000001 -#define ALLINTS (IE_IRQ0 | IE_IRQ5 | STATUS_IE) - -void mips_time_init(void); - -extern unsigned int mips_counter_frequency; - -void adm5120_restart(char *command) -{ - *(u32*)KSEG1ADDR(ADM5120_SOFTRESET)=1; -} - - -void adm5120_halt(void) -{ - printk(KERN_NOTICE "\n** You can safely turn off the power\n"); - while (1); -} - - -void adm5120_power_off(void) -{ - adm5120_halt(); -} - -void __init adm5120_time_init(void) -{ - mips_counter_frequency = adm5120_speed >> 1; -} - -void __init plat_timer_setup(struct irqaction *irq) -{ - /* to generate the first timer interrupt */ - write_c0_compare(read_c0_count()+ mips_counter_frequency/HZ); - clear_c0_status(ST0_BEV); - set_c0_status(ALLINTS); -} - -void __init plat_mem_setup(void) -{ - printk(KERN_INFO "ADM5120 board setup\n"); - - board_time_init = adm5120_time_init; - //board_timer_setup = mips_timer_setup; - - _machine_restart = adm5120_restart; - _machine_halt = adm5120_halt; - pm_power_off = adm5120_power_off; - - set_io_port_base(KSEG1); -} - -const char *get_system_type(void) -{ - return adm5120_board_name(); -} - -static struct resource adm5120_hcd_resources[] = { - [0] = { - .start = 0x11200000, - .end = 0x11200084, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 0x3, - .end = 0x3, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device adm5120hcd_device = { - .name = "adm5120-hcd", - .id = -1, - .num_resources = ARRAY_SIZE(adm5120_hcd_resources), - .resource = adm5120_hcd_resources, -}; - -static struct platform_device *devices[] __initdata = { - &adm5120hcd_device, -}; - -static int __init adm5120_init(void) -{ - return platform_add_devices(devices, ARRAY_SIZE(devices)); -} - -subsys_initcall(adm5120_init); diff --git a/target/linux/adm5120-2.6/files/arch/mips/pci/ops-adm5120.c b/target/linux/adm5120-2.6/files/arch/mips/pci/ops-adm5120.c deleted file mode 100644 index 91dae89999..0000000000 --- a/target/linux/adm5120-2.6/files/arch/mips/pci/ops-adm5120.c +++ /dev/null @@ -1,63 +0,0 @@ -/* - * Copyright (C) ADMtek Incorporated. - * Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org) - * Copyright (C) 2007 Gabor Juhos - * Copyright (C) 2007 OpenWrt.org - */ - -#include -#include -#include -#include -#include - -#include - -volatile u32* pci_config_address_reg = (volatile u32*)KSEG1ADDR(ADM5120_PCICFG_ADDR); -volatile u32* pci_config_data_reg = (volatile u32*)KSEG1ADDR(ADM5120_PCICFG_DATA); - -#define PCI_ENABLE 0x80000000 - -static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, - int size, uint32_t *val) -{ - *pci_config_address_reg = ((bus->number & 0xff) << 0x10) | - ((devfn & 0xff) << 0x08) | (where & 0xfc) | PCI_ENABLE; - switch (size) { - case 1: - *val = ((*pci_config_data_reg)>>((where&3)<<3))&0xff; - break; - case 2: - *val = ((*pci_config_data_reg)>>((where&3)<<3))&0xffff; - break; - default: - *val = (*pci_config_data_reg); - } - return PCIBIOS_SUCCESSFUL; -} - -static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where, - int size, uint32_t val) -{ - *pci_config_address_reg = ((bus->number & 0xff) << 0x10) | - ((devfn & 0xff) << 0x08) | (where & 0xfc) | PCI_ENABLE; - switch (size) { - case 1: - *(volatile u8 *)(((int)pci_config_data_reg) + - (where & 3)) = val; - break; - case 2: - *(volatile u16 *)(((int)pci_config_data_reg) + - (where & 2)) = (val); - break; - default: - *pci_config_data_reg = (val); - } - - return PCIBIOS_SUCCESSFUL; -} - -struct pci_ops adm5120_pci_ops = { - .read = pci_config_read, - .write = pci_config_write, -}; diff --git a/target/linux/adm5120-2.6/files/arch/mips/pci/pci-adm5120.c b/target/linux/adm5120-2.6/files/arch/mips/pci/pci-adm5120.c deleted file mode 100644 index 0fa3986e19..0000000000 --- a/target/linux/adm5120-2.6/files/arch/mips/pci/pci-adm5120.c +++ /dev/null @@ -1,96 +0,0 @@ -/* - * Copyright (C) ADMtek Incorporated. - * Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org) - * Copyright (C) 2007 Gabor Juhos - * Copyright (C) 2007 OpenWrt.org - */ - -#include -#include -#include -#include -#include - -#include -#include - -extern struct pci_ops adm5120_pci_ops; - -#define PCI_CMM_IOACC_EN 0x1 -#define PCI_CMM_MEMACC_EN 0x2 -#define PCI_CMM_MASTER_EN 0x4 -#define PCI_CMM_DEF \ - (PCI_CMM_IOACC_EN | PCI_CMM_MEMACC_EN | PCI_CMM_MASTER_EN) - -#define PCI_DEF_CACHE_LINE_SZ 4 - - -struct resource pci_io_resource = { - .name = "ADM5120 PCI I/O", - .start = ADM5120_PCIIO_BASE, - .end = ADM5120_PCICFG_ADDR-1, - .flags = IORESOURCE_IO -}; - -struct resource pci_mem_resource = { - .name = "ADM5120 PCI MEM", - .start = ADM5120_PCIMEM_BASE, - .end = ADM5120_PCIIO_BASE-1, - .flags = IORESOURCE_MEM -}; - -static struct pci_controller adm5120_controller = { - .pci_ops = &adm5120_pci_ops, - .io_resource = &pci_io_resource, - .mem_resource = &pci_mem_resource, -}; - -int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) -{ - if (slot < 2 || slot > 4) - return -1; - return slot + 4; -} - -static void adm5120_pci_fixup(struct pci_dev *dev) -{ - if (dev->devfn == 0) { - pci_write_config_word(dev, PCI_COMMAND, PCI_CMM_DEF); - pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, - PCI_DEF_CACHE_LINE_SZ); - pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0); - pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, 0); - } -} - -DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, adm5120_pci_fixup); - - -int pcibios_plat_dev_init(struct pci_dev *dev) -{ - return 0; -} - -static int __init adm5120_pci_setup(void) -{ - int pci_bios; - - pci_bios = adm5120_has_pci(); - - printk("adm5120: system has %sPCI BIOS\n", pci_bios ? "" : "no "); - if (pci_bios == 0) - return 1; - - /* Avoid ISA compat ranges. */ - PCIBIOS_MIN_IO = 0x00000000; - PCIBIOS_MIN_MEM = 0x00000000; - - /* Set I/O resource limits. */ - ioport_resource.end = 0x1fffffff; - iomem_resource.end = 0xffffffff; - - register_pci_controller(&adm5120_controller); - return 0; -} - -arch_initcall(adm5120_pci_setup); diff --git a/target/linux/adm5120-2.6/files/drivers/char/adm5120_gpio.c b/target/linux/adm5120-2.6/files/drivers/char/adm5120_gpio.c deleted file mode 100644 index 090c53a25a..0000000000 --- a/target/linux/adm5120-2.6/files/drivers/char/adm5120_gpio.c +++ /dev/null @@ -1,52 +0,0 @@ -/* - * ADM5120 LED (GPIO) driver - * - * Copyright (C) Jeroen Vreeken (pe1rxq@amsat.org), 2005 - * Copyright (C) OpenWrt.org, Florian Fainelli , 2007 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include - -#define GPIO_IO ((unsigned long *)0xb20000b8) - -static void adm5120_led_set(struct led_classdev *led_cdev, enum led_brightness brightness) -{ - if (brightness) - *GPIO_IO=(*GPIO_IO & 0x00ffffff) | (brightness << 24); - else - *GPIO_IO=(*GPIO_IO & 0x00ffffff) | (0 << 24); -} - -static struct led_classdev adm5120_gpio_led = { - .name = "adm5120:led", - .brightness_set = adm5120_led_set, -}; - -static int __init adm5120_led_init(void) -{ - int ret = led_classdev_register(NULL, &adm5120_gpio_led); - - if (ret < 0) - printk(KERN_WARNING "adm5120: unable to register LED device\n"); - - return ret; -} - -static void __exit adm5120_led_exit(void) -{ - led_classdev_unregister(&adm5120_gpio_led); -} - -module_init(adm5120_led_init); -module_exit(adm5120_led_exit); - -MODULE_DESCRIPTION("ADM5120 LED driver"); -MODULE_AUTHOR("Jeroen Vreeken, OpenWrt.org"); -MODULE_LICENSE("GPL"); diff --git a/target/linux/adm5120-2.6/files/drivers/mtd/maps/adm5120_mtd.c b/target/linux/adm5120-2.6/files/drivers/mtd/maps/adm5120_mtd.c deleted file mode 100644 index a353926746..0000000000 --- a/target/linux/adm5120-2.6/files/drivers/mtd/maps/adm5120_mtd.c +++ /dev/null @@ -1,494 +0,0 @@ -/* - * Copyright (C) 2006 Felix Fietkau - * Copyright (C) 2005 Waldemar Brodkorb - * Copyright (C) 2004 Florian Schirmer (jolt@tuxbox.org) - * - * original functions for finding root filesystem from Mike Baker - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - * - * Copyright 2001-2003, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * - * Flash mapping for ADM5120 boards - */ - -#include -#include -#include -#include -#include -#include -#include -#ifdef CONFIG_MTD_PARTITIONS -#include -#endif -#include -#include -#include -#include -#include -#include - -extern int parse_myloader_partitions(struct mtd_info *master, - struct mtd_partition **pparts, - unsigned long origin); - -/* Macros for switching flash bank - ADM5120 only support 2MB flash address space - so GPIO5 is used as A20 - */ -#define GPIO_IO ((volatile unsigned long *)0xb20000b8) -#define FLASH_A20_GPIO 5 -#define FLASH_BOUNDARY 0x200000 - - -#define TRX_MAGIC 0x30524448 /* "HDR0" */ -#define TRX_VERSION 1 -#define TRX_MAX_LEN 0x3A0000 -#define TRX_NO_HEADER 1 /* Do not write TRX header */ -#define TRX_GZ_FILES 0x2 /* Contains up to TRX_MAX_OFFSET individual gzip files */ -#define TRX_MAX_OFFSET 3 - -struct trx_header { - u32 magic; /* "HDR0" */ - u32 len; /* Length of file including header */ - u32 crc32; /* 32-bit CRC from flag_version to end of file */ - u32 flag_version; /* 0:15 flags, 16:31 version */ - u32 offsets[TRX_MAX_OFFSET]; /* Offsets of partitions from start of header */ -}; - -#define ROUNDUP(x, y) ((((x)+((y)-1))/(y))*(y)) -#define NVRAM_SPACE 0x8000 -#define WINDOW_ADDR 0x1fc00000 -#define WINDOW_SIZE 0x400000 -#define BUSWIDTH 2 - -static struct mtd_info *adm5120_mtd; - -static struct map_info adm5120_map = { - name: "adm5120 physically mapped flash", - size: WINDOW_SIZE, - bankwidth: BUSWIDTH, - phys: WINDOW_ADDR, -}; - -#ifdef CONFIG_MTD_PARTITIONS - -static struct mtd_partition adm5120_cfe_parts[] = { - { name: "cfe", offset: 0, size: 0, mask_flags: MTD_WRITEABLE, }, - { name: "linux", offset: 0, size: 0, }, - { name: "rootfs", offset: 0, size: 0, }, - { name: "nvram", offset: 0, size: 0, }, - { name: NULL, }, -}; - - -static void flash_switch_bank(unsigned long addr) -{ - unsigned long val; - - /* Set GPIO as output */ - val = *GPIO_IO | (1 << (FLASH_A20_GPIO+16)); - if ( addr & FLASH_BOUNDARY ) { - val |= 1 << (FLASH_A20_GPIO + 24); - } else { - val &= ~(1 << (FLASH_A20_GPIO + 24)); - } - *GPIO_IO = val; -} - -static map_word adm5120_map_read(struct map_info *map, unsigned long ofs) -{ - flash_switch_bank(ofs); - return inline_map_read(map, ofs); -} - -static void adm5120_map_write(struct map_info *map, const map_word datum, unsigned long ofs) -{ - flash_switch_bank(ofs); - inline_map_write(map, datum, ofs); -} - -static void adm5120_map_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len) -{ - ssize_t tmp; - - if (from < FLASH_BOUNDARY) { - tmp = (len < (FLASH_BOUNDARY - from)) ? len : (FLASH_BOUNDARY - from); - flash_switch_bank(0); - inline_map_copy_from(map, to, from, tmp); - to = (void *)((char *)to + tmp); - from += tmp; - len -= tmp; - } - if (len > 0) { - flash_switch_bank(FLASH_BOUNDARY); - inline_map_copy_from(map, to, from, len); - } - -} - -static int __init -find_cfe_size(struct mtd_info *mtd, size_t size) -{ - struct trx_header *trx; - unsigned char buf[512]; - int off; - size_t len; - int blocksize; - - trx = (struct trx_header *) buf; - - blocksize = mtd->erasesize; - if (blocksize < 0x10000) - blocksize = 0x10000; - - for (off = (128*1024); off < size; off += blocksize) { - memset(buf, 0xe5, sizeof(buf)); - - /* - * Read into buffer - */ - if (mtd->read(mtd, off, sizeof(buf), &len, buf) || - len != sizeof(buf)) - continue; - - /* found a TRX header */ - if (le32_to_cpu(trx->magic) == TRX_MAGIC) { - goto found; - } - } - - printk(KERN_NOTICE - "%s: Couldn't find bootloader size\n", - mtd->name); - return -1; - - found: - printk(KERN_NOTICE "bootloader size: %d\n", off); - return off; - -} - -/* - * Copied from mtdblock.c - * - * Cache stuff... - * - * Since typical flash erasable sectors are much larger than what Linux's - * buffer cache can handle, we must implement read-modify-write on flash - * sectors for each block write requests. To avoid over-erasing flash sectors - * and to speed things up, we locally cache a whole flash sector while it is - * being written to until a different sector is required. - */ - -static void erase_callback(struct erase_info *done) -{ - wait_queue_head_t *wait_q = (wait_queue_head_t *)done->priv; - wake_up(wait_q); -} - -static int erase_write (struct mtd_info *mtd, unsigned long pos, - int len, const char *buf) -{ - struct erase_info erase; - DECLARE_WAITQUEUE(wait, current); - wait_queue_head_t wait_q; - size_t retlen; - int ret; - - /* - * First, let's erase the flash block. - */ - - init_waitqueue_head(&wait_q); - erase.mtd = mtd; - erase.callback = erase_callback; - erase.addr = pos; - erase.len = len; - erase.priv = (u_long)&wait_q; - - set_current_state(TASK_INTERRUPTIBLE); - add_wait_queue(&wait_q, &wait); - - ret = mtd->erase(mtd, &erase); - if (ret) { - set_current_state(TASK_RUNNING); - remove_wait_queue(&wait_q, &wait); - printk (KERN_WARNING "erase of region [0x%lx, 0x%x] " - "on \"%s\" failed\n", - pos, len, mtd->name); - return ret; - } - - schedule(); /* Wait for erase to finish. */ - remove_wait_queue(&wait_q, &wait); - - /* - * Next, writhe data to flash. - */ - - ret = mtd->write (mtd, pos, len, &retlen, buf); - if (ret) - return ret; - if (retlen != len) - return -EIO; - return 0; -} - - - - -static int __init -find_root(struct mtd_info *mtd, size_t size, struct mtd_partition *part) -{ - struct trx_header trx, *trx2; - unsigned char buf[512], *block; - int off, blocksize; - u32 i, crc = ~0; - size_t len; - struct squashfs_super_block *sb = (struct squashfs_super_block *) buf; - - blocksize = mtd->erasesize; - if (blocksize < 0x10000) - blocksize = 0x10000; - - for (off = (128*1024); off < size; off += blocksize) { - memset(&trx, 0xe5, sizeof(trx)); - - /* - * Read into buffer - */ - if (mtd->read(mtd, off, sizeof(trx), &len, (char *) &trx) || - len != sizeof(trx)) - continue; - - /* found a TRX header */ - if (le32_to_cpu(trx.magic) == TRX_MAGIC) { - part->offset = le32_to_cpu(trx.offsets[2]) ? : - le32_to_cpu(trx.offsets[1]); - part->size = le32_to_cpu(trx.len); - - part->size -= part->offset; - part->offset += off; - - goto found; - } - } - - printk(KERN_NOTICE - "%s: Couldn't find root filesystem\n", - mtd->name); - return -1; - - found: - if (part->size == 0) - return 0; - - if (mtd->read(mtd, part->offset, sizeof(buf), &len, buf) || len != sizeof(buf)) - return 0; - - /* Move the fs outside of the trx */ - part->size = 0; - - if (trx.len != part->offset + part->size - off) { - /* Update the trx offsets and length */ - trx.len = part->offset + part->size - off; - - /* Update the trx crc32 */ - for (i = (u32) &(((struct trx_header *)NULL)->flag_version); i <= trx.len; i += sizeof(buf)) { - if (mtd->read(mtd, off + i, sizeof(buf), &len, buf) || len != sizeof(buf)) - return 0; - crc = crc32_le(crc, buf, min(sizeof(buf), trx.len - i)); - } - trx.crc32 = crc; - - /* read first eraseblock from the trx */ - block = kmalloc(mtd->erasesize, GFP_KERNEL); - trx2 = (struct trx_header *) block; - if (mtd->read(mtd, off, mtd->erasesize, &len, block) || len != mtd->erasesize) { - printk("Error accessing the first trx eraseblock\n"); - return 0; - } - - printk("Updating TRX offsets and length:\n"); - printk("old trx = [0x%08x, 0x%08x, 0x%08x], len=0x%08x crc32=0x%08x\n", trx2->offsets[0], trx2->offsets[1], trx2->offsets[2], trx2->len, trx2->crc32); - printk("new trx = [0x%08x, 0x%08x, 0x%08x], len=0x%08x crc32=0x%08x\n", trx.offsets[0], trx.offsets[1], trx.offsets[2], trx.len, trx.crc32); - - /* Write updated trx header to the flash */ - memcpy(block, &trx, sizeof(trx)); - if (mtd->unlock) - mtd->unlock(mtd, off, mtd->erasesize); - erase_write(mtd, off, mtd->erasesize, block); - if (mtd->sync) - mtd->sync(mtd); - kfree(block); - printk("Done\n"); - } - - return part->size; -} - -struct mtd_partition * __init -init_mtd_partitions(struct mtd_info *mtd, size_t size) -{ - int cfe_size; - - if ((cfe_size = find_cfe_size(mtd,size)) < 0) - return NULL; - - /* boot loader */ - adm5120_cfe_parts[0].offset = 0; - adm5120_cfe_parts[0].size = cfe_size; - - /* nvram */ - if (cfe_size != 384 * 1024) { - adm5120_cfe_parts[3].offset = size - ROUNDUP(NVRAM_SPACE, mtd->erasesize); - adm5120_cfe_parts[3].size = ROUNDUP(NVRAM_SPACE, mtd->erasesize); - } else { - /* nvram (old 128kb config partition on netgear wgt634u) */ - adm5120_cfe_parts[3].offset = adm5120_cfe_parts[0].size; - adm5120_cfe_parts[3].size = ROUNDUP(NVRAM_SPACE, mtd->erasesize); - } - - /* linux (kernel and rootfs) */ - if (cfe_size != 384 * 1024) { - adm5120_cfe_parts[1].offset = adm5120_cfe_parts[0].size; - adm5120_cfe_parts[1].size = adm5120_cfe_parts[3].offset - - adm5120_cfe_parts[1].offset; - } else { - /* do not count the elf loader, which is on one block */ - adm5120_cfe_parts[1].offset = adm5120_cfe_parts[0].size + - adm5120_cfe_parts[3].size + mtd->erasesize; - adm5120_cfe_parts[1].size = size - - adm5120_cfe_parts[0].size - - (2*adm5120_cfe_parts[3].size) - - mtd->erasesize; - } - - /* find and size rootfs */ - if (find_root(mtd,size,&adm5120_cfe_parts[2])==0) { - adm5120_cfe_parts[2].size = size - adm5120_cfe_parts[2].offset - - adm5120_cfe_parts[3].size; - } - - return adm5120_cfe_parts; -} -#endif - -int __init init_adm5120_map(void) -{ - size_t size; - int ret = 0; -#if defined (CONFIG_MTD_PARTITIONS) || (CONFIG_MTD_MYLOADER_PARTS) - struct mtd_partition *parts; - int i, parsed_nr_parts = 0; -#endif - printk("adm5120 : flash init : 0x%08x 0x%08x\n", WINDOW_ADDR, WINDOW_SIZE); - adm5120_map.virt = ioremap_nocache(WINDOW_ADDR, WINDOW_SIZE); - - if (!adm5120_map.virt) { - printk("Failed to ioremap\n"); - return -EIO; - } - simple_map_init(&adm5120_map); - adm5120_map.read = adm5120_map_read; - adm5120_map.write = adm5120_map_write; - adm5120_map.copy_from = adm5120_map_copy_from; - - if (!(adm5120_mtd = do_map_probe("cfi_probe", &adm5120_map))) { - printk("Failed to do_map_probe\n"); - iounmap((void *)adm5120_map.virt); - return -ENXIO; - } - - adm5120_mtd->owner = THIS_MODULE; - - size = adm5120_mtd->size; - - printk(KERN_NOTICE "Flash device: 0x%x at 0x%x\n", size, WINDOW_ADDR); - -#ifdef CONFIG_MTD_PARTITIONS - - if (adm5120_boot_loader == BOOT_LOADER_CFE) - { - printk(KERN_NOTICE "adm5120 : using CFE flash mapping\n"); - parts = init_mtd_partitions(adm5120_mtd, size); - - for (i = 0; parts[i].name; i++); - ret = add_mtd_partitions(adm5120_mtd, parts, i); - - if (ret) { - printk(KERN_ERR "Flash: add_mtd_partitions failed\n"); - goto fail; - } - } -#endif -#ifdef CONFIG_MTD_MYLOADER_PARTS - if (adm5120_boot_loader == BOOT_LOADER_MYLOADER) - { - printk(KERN_NOTICE "adm5120 : using MyLoader flash mapping\n"); - char *part_type; - - if (parsed_nr_parts == 0) { - ret = parse_myloader_partitions(adm5120_mtd, &parts, 0); - - if (ret > 0) { - part_type ="MyLoader"; - parsed_nr_parts = ret; - } - } - ret = add_mtd_partitions(adm5120_mtd, parts, parsed_nr_parts); - - if (ret) { - printk(KERN_ERR "Flash: add_mtd_partitions failed\n"); - goto fail; - } - } -#endif - return 0; - - fail: - if (adm5120_mtd) - map_destroy(adm5120_mtd); - if (adm5120_map.virt) - iounmap((void *)adm5120_map.virt); - adm5120_map.virt = 0; - return ret; -} - -void __exit cleanup_adm5120_map(void) -{ -#ifdef CONFIG_MTD_PARTITIONS - del_mtd_partitions(adm5120_mtd); -#endif - map_destroy(adm5120_mtd); - iounmap((void *)adm5120_map.virt); -} - -module_init(init_adm5120_map); -module_exit(cleanup_adm5120_map); diff --git a/target/linux/adm5120-2.6/files/drivers/mtd/myloader.c b/target/linux/adm5120-2.6/files/drivers/mtd/myloader.c deleted file mode 100644 index ee916d7800..0000000000 --- a/target/linux/adm5120-2.6/files/drivers/mtd/myloader.c +++ /dev/null @@ -1,176 +0,0 @@ -/* - * Parse MyLoader-style flash partition tables and produce a Linux partition - * array to match. - * - * Copyright (C) 2007 OpenWrt.org - * Copyright (C) 2007 Gabor Juhos - * - * This file was based on drivers/mtd/redboot.c - * Author: Red Hat, Inc. - David Woodhouse - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the - * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, - * Boston, MA 02110-1301, USA. - */ - -#include -#include -#include -#include - -#include -#include - -#include -#include - -#define NAME_LEN_MAX 20 -#define NAME_MYLOADER "MyLoader" -#define NAME_PARTITION_TABLE "Partition Table" -#define BLOCK_LEN_MIN 0x10000 - -int parse_myloader_partitions(struct mtd_info *master, - struct mtd_partition **pparts, - unsigned long origin) -{ - struct mylo_partition_table *tab; - struct mylo_partition *part; - struct mtd_partition *mtd_parts; - struct mtd_partition *mtd_part; - int num_parts; - int ret, i; - size_t retlen; - size_t parts_len; - char *names; - unsigned long offset; - unsigned long blocklen; - - tab = vmalloc(sizeof(*tab)); - if (!tab) { - return -ENOMEM; - goto out; - } - - blocklen = master->erasesize; - if (blocklen < BLOCK_LEN_MIN) - blocklen = BLOCK_LEN_MIN; - - /* Partition Table is always located on the second erase block */ - offset = blocklen; - printk(KERN_NOTICE "Searching for MyLoader partition table " - "in %s at offset 0x%lx\n", master->name, offset); - - ret = master->read(master, offset, sizeof(*tab), &retlen, - (void *)tab); - - if (ret) - goto out; - - if (retlen != sizeof(*tab)) { - ret = -EIO; - goto out_free_buf; - } - - /* Check for Partition Table magic number */ - if (tab->magic != le32_to_cpu(MYLO_MAGIC_PARTITIONS)) { - printk(KERN_NOTICE "No MyLoader partition table detected " - "in %s\n", master->name); - ret = 0; - goto out_free_buf; - } - - /* The MyLoader and the Partition Table is always present */ - num_parts = 2; - - /* Detect number of used partitions */ - for (i = 0; i < MYLO_MAX_PARTITIONS; i++) { - part = &tab->partitions[i]; - - if (le16_to_cpu(part->type) == PARTITION_TYPE_FREE) - continue; - - num_parts++; - } - - - mtd_parts = kzalloc((num_parts*sizeof(*mtd_part) + num_parts*NAME_LEN_MAX), - GFP_KERNEL); - - if (!mtd_parts) { - ret = -ENOMEM; - goto out_free_buf; - } - - mtd_part = mtd_parts; - names = (char *)&mtd_parts[num_parts]; - - strncpy(names, NAME_MYLOADER, NAME_LEN_MAX-1); - mtd_part->name = names; - mtd_part->offset = 0; - mtd_part->size = blocklen; - mtd_part++; - names += NAME_LEN_MAX; - - strncpy(names, NAME_PARTITION_TABLE, NAME_LEN_MAX-1); - mtd_part->name = names; - mtd_part->offset = blocklen; - mtd_part->size = blocklen; - mtd_part++; - names += NAME_LEN_MAX; - - for (i = 0; i < MYLO_MAX_PARTITIONS; i++) { - part = &tab->partitions[i]; - - if (le16_to_cpu(part->type) == PARTITION_TYPE_FREE) - continue; - - sprintf(names, "partition%d", i); - mtd_part->name = names; - mtd_part->offset = le32_to_cpu(part->addr); - mtd_part->size = le32_to_cpu(part->size); - mtd_part++; - names += NAME_LEN_MAX; - } - - *pparts = mtd_parts; - ret = num_parts; - -out_free_buf: - vfree(tab); -out: - return ret; -} - -static struct mtd_part_parser mylo_mtd_parser = { - .owner = THIS_MODULE, - .parse_fn = parse_myloader_partitions, - .name = NAME_MYLOADER, -}; - -static int __init mylo_mtd_parser_init(void) -{ - return register_mtd_parser(&mylo_mtd_parser); -} - -static void __exit mylo_mtd_parser_exit(void) -{ - deregister_mtd_parser(&mylo_mtd_parser); -} - -module_init(mylo_mtd_parser_init); -module_exit(mylo_mtd_parser_exit); - -MODULE_AUTHOR("Gabor Juhos "); -MODULE_DESCRIPTION("Parsing code for MyLoader partition tables"); -MODULE_LICENSE("GPL"); diff --git a/target/linux/adm5120-2.6/files/drivers/mtd/nand/rbmipsnand.c b/target/linux/adm5120-2.6/files/drivers/mtd/nand/rbmipsnand.c deleted file mode 100644 index caecd50659..0000000000 --- a/target/linux/adm5120-2.6/files/drivers/mtd/nand/rbmipsnand.c +++ /dev/null @@ -1,111 +0,0 @@ -/*==============================================================================*/ -/* rbmipsnand.c */ -/* This module is derived from the 2.4 driver shipped by Microtik for their */ -/* Routerboard 1xx and 5xx series boards. It provides support for the built in */ -/* NAND flash on the Routerboard 1xx series boards for Linux 2.6.19+. */ -/* Licence: Original Microtik code seems not to have a licence. */ -/* Rewritten code all GPL V2. */ -/* Copyright(C) 2007 david.goodenough@linkchoose.co.uk (for rewriten code) */ -/*==============================================================================*/ - -#include -#include -#include -#include -#include -#include -#include -#include - -#define SMEM1_BASE 0x10000000 // from ADM5120 documentation -#define SMEM1(x) (*((volatile unsigned char *) (KSEG1ADDR(SMEM1_BASE) + x))) - -#define NAND_RW_REG 0x0 //data register -#define NAND_SET_CEn 0x1 //CE# low -#define NAND_CLR_CEn 0x2 //CE# high -#define NAND_CLR_CLE 0x3 //CLE low -#define NAND_SET_CLE 0x4 //CLE high -#define NAND_CLR_ALE 0x5 //ALE low -#define NAND_SET_ALE 0x6 //ALE high -#define NAND_SET_SPn 0x7 //SP# low (use spare area) -#define NAND_CLR_SPn 0x8 //SP# high (do not use spare area) -#define NAND_SET_WPn 0x9 //WP# low -#define NAND_CLR_WPn 0xA //WP# high -#define NAND_STS_REG 0xB //Status register - -#define MEM32(x) *((volatile unsigned *) (x)) -static void __iomem *p_nand; - -static int rb100_dev_ready(struct mtd_info *mtd) { - return SMEM1(NAND_STS_REG) & 0x80; -} - -static void rbmips_hwcontrol100(struct mtd_info *mtd, int cmd, unsigned int ctrl) { - struct nand_chip *chip = mtd->priv; - if (ctrl & NAND_CTRL_CHANGE) { - SMEM1((( ctrl & NAND_CLE) ? NAND_SET_CLE : NAND_CLR_CLE)) = 0x01; - SMEM1((( ctrl & NAND_ALE) ? NAND_SET_ALE : NAND_CLR_ALE)) = 0x01; - SMEM1((( ctrl & NAND_NCE) ? NAND_SET_CEn : NAND_CLR_CEn)) = 0x01; - } - if( cmd != NAND_CMD_NONE) - writeb( cmd, chip->IO_ADDR_W); -} - -static struct mtd_partition partition_info[] = { - { - name: "RouterBoard NAND Boot", - offset: 0, - size: 4 * 1024 * 1024 - }, - { - name: "RouterBoard NAND Main", - offset: MTDPART_OFS_NXTBLK, - size: MTDPART_SIZ_FULL - } -}; - -static struct mtd_info rmtd; -static struct nand_chip rnand; - -static unsigned init_ok = 0; - -unsigned get_rbnand_block_size(void) { - return init_ok ? rmtd.writesize : 0; -} - -EXPORT_SYMBOL(get_rbnand_block_size); - -int __init rbmips_init(void) { - memset(&rmtd, 0, sizeof(rmtd)); - memset(&rnand, 0, sizeof(rnand)); - printk(KERN_INFO "RB1xx nand\n"); - MEM32(0xB2000064) = 0x100; - MEM32(0xB2000008) = 0x1; - SMEM1(NAND_SET_SPn) = 0x01; - SMEM1(NAND_CLR_WPn) = 0x01; - rnand.IO_ADDR_R = (unsigned char *)KSEG1ADDR(SMEM1_BASE); - rnand.IO_ADDR_W = rnand.IO_ADDR_R; - rnand.cmd_ctrl = rbmips_hwcontrol100; - rnand.dev_ready = rb100_dev_ready; - p_nand = (void __iomem *)ioremap(( unsigned long)SMEM1_BASE, 0x1000); - if (!p_nand) { - printk(KERN_WARNING "RB1xx nand Unable ioremap buffer\n"); - return -ENXIO; - } - rnand.ecc.mode = NAND_ECC_SOFT; - rnand.chip_delay = 25; - rnand.options |= NAND_NO_AUTOINCR; - rmtd.priv = &rnand; - if (nand_scan(&rmtd, 1) && nand_scan(&rmtd, 1) - && nand_scan(&rmtd, 1) && nand_scan(&rmtd, 1)) { - printk(KERN_INFO "RB1xxx nand device not found\n"); - iounmap ((void *)p_nand); - return -ENXIO; - } - add_mtd_partitions(&rmtd, partition_info, 2); - init_ok = 1; - return 0; -} - -module_init(rbmips_init); - diff --git a/target/linux/adm5120-2.6/files/drivers/net/adm5120sw.c b/target/linux/adm5120-2.6/files/drivers/net/adm5120sw.c deleted file mode 100644 index 1391bbe8c7..0000000000 --- a/target/linux/adm5120-2.6/files/drivers/net/adm5120sw.c +++ /dev/null @@ -1,502 +0,0 @@ -/* - * ADM5120 built in ethernet switch driver - * - * Copyright Jeroen Vreeken (pe1rxq@amsat.org), 2005 - * - * Inspiration for this driver came from the original ADMtek 2.4 - * driver, Copyright ADMtek Inc. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "adm5120sw.h" - -#include - -MODULE_AUTHOR("Jeroen Vreeken (pe1rxq@amsat.org)"); -MODULE_DESCRIPTION("ADM5120 ethernet switch driver"); -MODULE_LICENSE("GPL"); - -/* - * The ADM5120 uses an internal matrix to determine which ports - * belong to which VLAN. - * The default generates a VLAN (and device) for each port - * (including MII port) and the CPU port is part of all of them. - * - * Another example, one big switch and everything mapped to eth0: - * 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00 - */ -static unsigned char vlan_matrix[SW_DEVS] = { - 0x41, 0x42, 0x44, 0x48, 0x50, 0x60 -}; - -static int adm5120_nrdevs; - -static struct net_device *adm5120_devs[SW_DEVS]; -static struct adm5120_dma - adm5120_dma_txh_v[ADM5120_DMA_TXH] __attribute__((aligned(16))), - adm5120_dma_txl_v[ADM5120_DMA_TXL] __attribute__((aligned(16))), - adm5120_dma_rxh_v[ADM5120_DMA_RXH] __attribute__((aligned(16))), - adm5120_dma_rxl_v[ADM5120_DMA_RXL] __attribute__((aligned(16))), - *adm5120_dma_txh, - *adm5120_dma_txl, - *adm5120_dma_rxh, - *adm5120_dma_rxl; -static struct sk_buff - *adm5120_skb_rxh[ADM5120_DMA_RXH], - *adm5120_skb_rxl[ADM5120_DMA_RXL], - *adm5120_skb_txh[ADM5120_DMA_TXH], - *adm5120_skb_txl[ADM5120_DMA_TXL]; -static int adm5120_rxhi = 0; -static int adm5120_rxli = 0; -/* We don't use high priority tx for now */ -/*static int adm5120_txhi = 0;*/ -static int adm5120_txli = 0; -static int adm5120_txhit = 0; -static int adm5120_txlit = 0; -static int adm5120_if_open = 0; - -static inline void adm5120_set_reg(unsigned int reg, unsigned long val) -{ - *(volatile unsigned long*)(SW_BASE+reg) = val; -} - -static inline unsigned long adm5120_get_reg(unsigned int reg) -{ - return *(volatile unsigned long*)(SW_BASE+reg); -} - -static inline void adm5120_rxfixup(struct adm5120_dma *dma, - struct sk_buff **skbl, int num) -{ - int i; - - /* Resubmit the entire ring */ - for (i=0; idata) | - ADM5120_DMA_OWN | (i==num-1 ? ADM5120_DMA_RINGEND : 0); - } -} - -static inline void adm5120_rx(struct adm5120_dma *dma, struct sk_buff **skbl, - int *index, int num) -{ - struct sk_buff *skb, *skbn; - struct adm5120_sw *priv; - struct net_device *dev; - int port, vlan, len; - - while (!(dma[*index].data & ADM5120_DMA_OWN)) { - port = (dma[*index].status & ADM5120_DMA_PORTID); - port >>= ADM5120_DMA_PORTSHIFT; - for (vlan = 0; vlan < adm5120_nrdevs; vlan++) { - if ((1<>= ADM5120_DMA_LENSHIFT; - len -= ETH_FCS; - - priv = netdev_priv(dev); - if (len <= 0 || len > ADM5120_DMA_RXSIZE || - dma[*index].status & ADM5120_DMA_FCSERR) { - priv->stats.rx_errors++; - skbn = NULL; - } else { - skbn = dev_alloc_skb(ADM5120_DMA_RXSIZE+16); - if (skbn) { - skb_put(skb, len); - skb->dev = dev; - skb->protocol = eth_type_trans(skb, dev); - skb->ip_summed = CHECKSUM_UNNECESSARY; - dev->last_rx = jiffies; - priv->stats.rx_packets++; - priv->stats.rx_bytes+=len; - skb_reserve(skbn, 2); - skbl[*index] = skbn; - } else { - printk(KERN_INFO "%s recycling!\n", dev->name); - } - } - - dma[*index].status = 0; - dma[*index].cntl = 0; - dma[*index].len = ADM5120_DMA_RXSIZE; - dma[*index].data = ADM5120_DMA_ADDR(skbl[*index]->data) | - ADM5120_DMA_OWN | - (num-1==*index ? ADM5120_DMA_RINGEND : 0); - if (num == ++*index) - *index = 0; - if (skbn) - netif_rx(skb); - } -} - -static inline void adm5120_tx(struct adm5120_dma *dma, struct sk_buff **skbl, - int *index, int num) -{ - while((dma[*index].data & ADM5120_DMA_OWN) == 0 && skbl[*index]) { - dev_kfree_skb_irq(skbl[*index]); - skbl[*index] = NULL; - if (++*index == num) - *index = 0; - } -} - -static irqreturn_t adm5120_sw_irq(int irq, void *dev_id) -{ - unsigned long intreg; - - adm5120_set_reg(ADM5120_INT_MASK, - adm5120_get_reg(ADM5120_INT_MASK) | ADM5120_INTHANDLE); - - intreg = adm5120_get_reg(ADM5120_INT_ST); - adm5120_set_reg(ADM5120_INT_ST, intreg); - - if (intreg & ADM5120_INT_RXH) - adm5120_rx(adm5120_dma_rxh, adm5120_skb_rxh, &adm5120_rxhi, - ADM5120_DMA_RXH); - if (intreg & ADM5120_INT_HFULL) - adm5120_rxfixup(adm5120_dma_rxh, adm5120_skb_rxh, - ADM5120_DMA_RXH); - if (intreg & ADM5120_INT_RXL) - adm5120_rx(adm5120_dma_rxl, adm5120_skb_rxl, &adm5120_rxli, - ADM5120_DMA_RXL); - if (intreg & ADM5120_INT_LFULL) - adm5120_rxfixup(adm5120_dma_rxl, adm5120_skb_rxl, - ADM5120_DMA_RXL); - if (intreg & ADM5120_INT_TXH) - adm5120_tx(adm5120_dma_txh, adm5120_skb_txh, &adm5120_txhit, - ADM5120_DMA_TXH); - if (intreg & ADM5120_INT_TXL) - adm5120_tx(adm5120_dma_txl, adm5120_skb_txl, &adm5120_txlit, - ADM5120_DMA_TXL); - - adm5120_set_reg(ADM5120_INT_MASK, - adm5120_get_reg(ADM5120_INT_MASK) & ~ADM5120_INTHANDLE); - - return IRQ_HANDLED; -} - -static void adm5120_set_vlan(char *matrix) -{ - unsigned long val; - - val = matrix[0] + (matrix[1]<<8) + (matrix[2]<<16) + (matrix[3]<<24); - adm5120_set_reg(ADM5120_VLAN_GI, val); - val = matrix[4] + (matrix[5]<<8); - adm5120_set_reg(ADM5120_VLAN_GII, val); -} - -static int adm5120_sw_open(struct net_device *dev) -{ - if (!adm5120_if_open++) - adm5120_set_reg(ADM5120_INT_MASK, - adm5120_get_reg(ADM5120_INT_MASK) & ~ADM5120_INTHANDLE); - netif_start_queue(dev); - return 0; -} - -static int adm5120_sw_stop(struct net_device *dev) -{ - netif_stop_queue(dev); - if (!--adm5120_if_open) - adm5120_set_reg(ADM5120_INT_MASK, - adm5120_get_reg(ADM5120_INT_MASK) | ADM5120_INTMASKALL); - return 0; -} - -static int adm5120_sw_tx(struct sk_buff *skb, struct net_device *dev) -{ - struct adm5120_dma *dma = adm5120_dma_txl; - struct sk_buff **skbl = adm5120_skb_txl; - struct adm5120_sw *priv = netdev_priv(dev); - int *index = &adm5120_txli; - int num = ADM5120_DMA_TXL; - int trigger = ADM5120_SEND_TRIG_L; - - dev->trans_start = jiffies; - if (dma[*index].data & ADM5120_DMA_OWN) { - dev_kfree_skb(skb); - priv->stats.tx_dropped++; - return 0; - } - - dma[*index].data = ADM5120_DMA_ADDR(skb->data) | ADM5120_DMA_OWN; - if (*index == num-1) - dma[*index].data |= ADM5120_DMA_RINGEND; - dma[*index].status = - ((skb->lenlen) << ADM5120_DMA_LENSHIFT) | - (0x1 << priv->port); - dma[*index].len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len; - priv->stats.tx_packets++; - priv->stats.tx_bytes += skb->len; - skbl[*index]=skb; - - if (++*index == num) - *index = 0; - adm5120_set_reg(ADM5120_SEND_TRIG, trigger); - - return 0; -} - -static void adm5120_tx_timeout(struct net_device *dev) -{ - netif_wake_queue(dev); -} - -static struct net_device_stats *adm5120_sw_stats(struct net_device *dev) -{ - return &((struct adm5120_sw *)netdev_priv(dev))->stats; -} - -static void adm5120_set_multicast_list(struct net_device *dev) -{ - struct adm5120_sw *priv = netdev_priv(dev); - int portmask; - - portmask = vlan_matrix[priv->port] & 0x3f; - - if (dev->flags & IFF_PROMISC) - adm5120_set_reg(ADM5120_CPUP_CONF, - adm5120_get_reg(ADM5120_CPUP_CONF) & - ~((portmask << ADM5120_DISUNSHIFT) & ADM5120_DISUNALL)); - else - adm5120_set_reg(ADM5120_CPUP_CONF, - adm5120_get_reg(ADM5120_CPUP_CONF) | - (portmask << ADM5120_DISUNSHIFT)); - - if (dev->flags & IFF_PROMISC || dev->flags & IFF_ALLMULTI || - dev->mc_count) - adm5120_set_reg(ADM5120_CPUP_CONF, - adm5120_get_reg(ADM5120_CPUP_CONF) & - ~((portmask << ADM5120_DISMCSHIFT) & ADM5120_DISMCALL)); - else - adm5120_set_reg(ADM5120_CPUP_CONF, - adm5120_get_reg(ADM5120_CPUP_CONF) | - (portmask << ADM5120_DISMCSHIFT)); -} - -static void adm5120_write_mac(struct net_device *dev) -{ - struct adm5120_sw *priv = netdev_priv(dev); - unsigned char *mac = dev->dev_addr; - - adm5120_set_reg(ADM5120_MAC_WT1, - mac[2] | (mac[3]<<8) | (mac[4]<<16) | (mac[5]<<24)); - adm5120_set_reg(ADM5120_MAC_WT0, (priv->port<<3) | - (mac[0]<<16) | (mac[1]<<24) | ADM5120_MAC_WRITE | ADM5120_VLAN_EN); - - while (!(adm5120_get_reg(ADM5120_MAC_WT0) & ADM5120_MAC_WRITE_DONE)); -} - -static int adm5120_sw_set_mac_address(struct net_device *dev, void *p) -{ - struct sockaddr *addr = p; - - memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); - adm5120_write_mac(dev); - return 0; -} - -static int adm5120_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) -{ - int err; - struct adm5120_sw_info info; - struct adm5120_sw *priv = netdev_priv(dev); - - switch(cmd) { - case SIOCGADMINFO: - info.magic = 0x5120; - info.ports = adm5120_nrdevs; - info.vlan = priv->port; - err = copy_to_user(rq->ifr_data, &info, sizeof(info)); - if (err) - return -EFAULT; - break; - case SIOCSMATRIX: - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - err = copy_from_user(vlan_matrix, rq->ifr_data, - sizeof(vlan_matrix)); - if (err) - return -EFAULT; - adm5120_set_vlan(vlan_matrix); - break; - case SIOCGMATRIX: - err = copy_to_user(rq->ifr_data, vlan_matrix, - sizeof(vlan_matrix)); - if (err) - return -EFAULT; - break; - default: - return -EOPNOTSUPP; - } - return 0; -} - -static void adm5120_dma_tx_init(struct adm5120_dma *dma, struct sk_buff **skb, - int num) -{ - memset(dma, 0, sizeof(struct adm5120_dma)*num); - dma[num-1].data |= ADM5120_DMA_RINGEND; - memset(skb, 0, sizeof(struct skb*)*num); -} - -static void adm5120_dma_rx_init(struct adm5120_dma *dma, struct sk_buff **skb, - int num) -{ - int i; - - memset(dma, 0, sizeof(struct adm5120_dma)*num); - for (i=0; idata) | ADM5120_DMA_OWN; - dma[i].cntl = 0; - dma[i].len = ADM5120_DMA_RXSIZE; - dma[i].status = 0; - } - dma[i-1].data |= ADM5120_DMA_RINGEND; -} - -static int __init adm5120_sw_init(void) -{ - int i, err; - struct net_device *dev; - - err = request_irq(SW_IRQ, adm5120_sw_irq, 0, "ethernet switch", NULL); - if (err) - goto out; - - adm5120_nrdevs = adm5120_board.iface_num; - if (adm5120_nrdevs > 5 && !adm5120_has_gmii()) - adm5120_nrdevs = 5; - - adm5120_set_reg(ADM5120_CPUP_CONF, - ADM5120_DISCCPUPORT | ADM5120_CRC_PADDING | - ADM5120_DISUNALL | ADM5120_DISMCALL); - adm5120_set_reg(ADM5120_PORT_CONF0, ADM5120_ENMC | ADM5120_ENBP); - - adm5120_set_reg(ADM5120_PHY_CNTL2, adm5120_get_reg(ADM5120_PHY_CNTL2) | - ADM5120_AUTONEG | ADM5120_NORMAL | ADM5120_AUTOMDIX); - adm5120_set_reg(ADM5120_PHY_CNTL3, adm5120_get_reg(ADM5120_PHY_CNTL3) | - ADM5120_PHY_NTH); - - adm5120_set_reg(ADM5120_INT_MASK, ADM5120_INTMASKALL); - adm5120_set_reg(ADM5120_INT_ST, ADM5120_INTMASKALL); - - adm5120_dma_txh = (void *)KSEG1ADDR((u32)adm5120_dma_txh_v); - adm5120_dma_txl = (void *)KSEG1ADDR((u32)adm5120_dma_txl_v); - adm5120_dma_rxh = (void *)KSEG1ADDR((u32)adm5120_dma_rxh_v); - adm5120_dma_rxl = (void *)KSEG1ADDR((u32)adm5120_dma_rxl_v); - - adm5120_dma_tx_init(adm5120_dma_txh, adm5120_skb_txh, ADM5120_DMA_TXH); - adm5120_dma_tx_init(adm5120_dma_txl, adm5120_skb_txl, ADM5120_DMA_TXL); - adm5120_dma_rx_init(adm5120_dma_rxh, adm5120_skb_rxh, ADM5120_DMA_RXH); - adm5120_dma_rx_init(adm5120_dma_rxl, adm5120_skb_rxl, ADM5120_DMA_RXL); - adm5120_set_reg(ADM5120_SEND_HBADDR, KSEG1ADDR(adm5120_dma_txh)); - adm5120_set_reg(ADM5120_SEND_LBADDR, KSEG1ADDR(adm5120_dma_txl)); - adm5120_set_reg(ADM5120_RECEIVE_HBADDR, KSEG1ADDR(adm5120_dma_rxh)); - adm5120_set_reg(ADM5120_RECEIVE_LBADDR, KSEG1ADDR(adm5120_dma_rxl)); - - adm5120_set_vlan(vlan_matrix); - - for (i=0; iport = i; - dev->base_addr = SW_BASE; - dev->irq = SW_IRQ; - dev->open = adm5120_sw_open; - dev->hard_start_xmit = adm5120_sw_tx; - dev->stop = adm5120_sw_stop; - dev->get_stats = adm5120_sw_stats; - dev->set_multicast_list = adm5120_set_multicast_list; - dev->do_ioctl = adm5120_do_ioctl; - dev->tx_timeout = adm5120_tx_timeout; - dev->watchdog_timeo = ETH_TX_TIMEOUT; - dev->set_mac_address = adm5120_sw_set_mac_address; - /* HACK alert!!! In the original admtek driver it is asumed - that you can read the MAC addressess from flash, but edimax - decided to leave that space intentionally blank... - */ - memcpy(dev->dev_addr, "\x00\x50\xfc\x11\x22\x01", 6); - dev->dev_addr[5] += i; - adm5120_write_mac(dev); - - if ((err = register_netdev(dev))) { - free_netdev(dev); - goto out_int; - } - printk(KERN_INFO "%s: ADM5120 switch port%d\n", dev->name, i); - } - adm5120_set_reg(ADM5120_CPUP_CONF, - ADM5120_CRC_PADDING | ADM5120_DISUNALL | ADM5120_DISMCALL); - - return 0; - -out_int: - /* Undo everything that did succeed */ - for (; i; i--) { - unregister_netdev(adm5120_devs[i-1]); - free_netdev(adm5120_devs[i-1]); - } - free_irq(SW_IRQ, NULL); -out: - printk(KERN_ERR "ADM5120 Ethernet switch init failed\n"); - return err; -} - -static void __exit adm5120_sw_exit(void) -{ - int i; - - for (i = 0; i < adm5120_nrdevs; i++) { - unregister_netdev(adm5120_devs[i]); - free_netdev(adm5120_devs[i-1]); - } - - free_irq(SW_IRQ, NULL); - - for (i = 0; i < ADM5120_DMA_RXH; i++) { - if (!adm5120_skb_rxh[i]) - break; - kfree_skb(adm5120_skb_rxh[i]); - } - for (i = 0; i < ADM5120_DMA_RXL; i++) { - if (!adm5120_skb_rxl[i]) - break; - kfree_skb(adm5120_skb_rxl[i]); - } -} - -module_init(adm5120_sw_init); -module_exit(adm5120_sw_exit); diff --git a/target/linux/adm5120-2.6/files/drivers/net/adm5120sw.h b/target/linux/adm5120-2.6/files/drivers/net/adm5120sw.h deleted file mode 100644 index 19388a9064..0000000000 --- a/target/linux/adm5120-2.6/files/drivers/net/adm5120sw.h +++ /dev/null @@ -1,106 +0,0 @@ -/* - * Defines for ADM5120 built in ethernet switch driver - * - * Copyright Jeroen Vreeken (pe1rxq@amsat.org), 2005 - * - * Values come from ADM5120 datasheet and original ADMtek 2.4 driver, - * Copyright ADMtek Inc. - */ - -#ifndef _INCLUDE_ADM5120SW_H_ -#define _INCLUDE_ADM5120SW_H_ - -#define SW_BASE KSEG1ADDR(0x12000000) -#define SW_DEVS 6 -#define SW_IRQ 9 - -#define ETH_TX_TIMEOUT HZ/4 -#define ETH_FCS 4; - -#define ADM5120_CODE 0x00 /* CPU description */ -#define ADM5120_CODE_PQFP 0x20000000 /* package type */ -#define ADM5120_CPUP_CONF 0x24 /* CPU port config */ -#define ADM5120_DISCCPUPORT 0x00000001 /* disable cpu port */ -#define ADM5120_CRC_PADDING 0x00000002 /* software crc */ -#define ADM5120_DISUNSHIFT 9 -#define ADM5120_DISUNALL 0x00007e00 /* disable unknown from all */ -#define ADM5120_DISMCSHIFT 16 -#define ADM5120_DISMCALL 0x003f0000 /* disable multicast from all */ -#define ADM5120_PORT_CONF0 0x28 -#define ADM5120_ENMC 0x00003f00 /* Enable MC routing (ex cpu) */ -#define ADM5120_ENBP 0x003f0000 /* Enable Back Pressure */ -#define ADM5120_VLAN_GI 0x40 /* VLAN settings */ -#define ADM5120_VLAN_GII 0x44 -#define ADM5120_SEND_TRIG 0x48 -#define ADM5120_SEND_TRIG_L 0x00000001 -#define ADM5120_SEND_TRIG_H 0x00000002 -#define ADM5120_MAC_WT0 0x58 -#define ADM5120_MAC_WRITE 0x00000001 -#define ADM5120_MAC_WRITE_DONE 0x00000002 -#define ADM5120_VLAN_EN 0x00000040 -#define ADM5120_MAC_WT1 0x5c -#define ADM5120_PHY_CNTL2 0x7c -#define ADM5120_AUTONEG 0x0000001f /* Auto negotiate */ -#define ADM5120_NORMAL 0x01f00000 /* PHY normal mode */ -#define ADM5120_AUTOMDIX 0x3e000000 /* Auto MDIX */ -#define ADM5120_PHY_CNTL3 0x80 -#define ADM5120_PHY_NTH 0x00000400 -#define ADM5120_INT_ST 0xb0 -#define ADM5120_INT_RXH 0x0000004 -#define ADM5120_INT_RXL 0x0000008 -#define ADM5120_INT_HFULL 0x0000010 -#define ADM5120_INT_LFULL 0x0000020 -#define ADM5120_INT_TXH 0x0000001 -#define ADM5120_INT_TXL 0x0000002 -#define ADM5120_INT_MASK 0xb4 -#define ADM5120_INTMASKALL 0x1FDEFFF /* All interrupts */ -#define ADM5120_INTHANDLE (ADM5120_INT_RXH | ADM5120_INT_RXL | \ - ADM5120_INT_HFULL | ADM5120_INT_LFULL | \ - ADM5120_INT_TXH | ADM5120_INT_TXL) -#define ADM5120_SEND_HBADDR 0xd0 -#define ADM5120_SEND_LBADDR 0xd4 -#define ADM5120_RECEIVE_HBADDR 0xd8 -#define ADM5120_RECEIVE_LBADDR 0xdc - -struct adm5120_dma { - u32 data; - u32 cntl; - u32 len; - u32 status; -} __attribute__ ((packed)); - -#define ADM5120_DMA_MASK 0x01ffffff -#define ADM5120_DMA_OWN 0x80000000 /* buffer owner */ -#define ADM5120_DMA_RINGEND 0x10000000 /* Last in DMA ring */ - -#define ADM5120_DMA_ADDR(ptr) ((u32)(ptr) & ADM5120_DMA_MASK) -#define ADM5120_DMA_PORTID 0x00007000 -#define ADM5120_DMA_PORTSHIFT 12 -#define ADM5120_DMA_LEN 0x07ff0000 -#define ADM5120_DMA_LENSHIFT 16 -#define ADM5120_DMA_FCSERR 0x00000008 - -#define ADM5120_DMA_TXH 16 -#define ADM5120_DMA_TXL 64 -#define ADM5120_DMA_RXH 16 -#define ADM5120_DMA_RXL 8 - -#define ADM5120_DMA_RXSIZE 1550 -#define ADM5120_DMA_EXTRA 20 - -struct adm5120_sw { - int port; - struct net_device_stats stats; -}; - -#define SIOCSMATRIX SIOCDEVPRIVATE -#define SIOCGMATRIX SIOCDEVPRIVATE+1 -#define SIOCGADMINFO SIOCDEVPRIVATE+2 - -struct adm5120_sw_info { - u16 magic; - u16 ports; - u16 vlan; -}; - -#endif /* _INCLUDE_ADM5120SW_H_ */ diff --git a/target/linux/adm5120-2.6/files/drivers/serial/adm5120_uart.c b/target/linux/adm5120-2.6/files/drivers/serial/adm5120_uart.c deleted file mode 100644 index 6b42928679..0000000000 --- a/target/linux/adm5120-2.6/files/drivers/serial/adm5120_uart.c +++ /dev/null @@ -1,524 +0,0 @@ -/* - * Serial driver for ADM5120 SoC - * - * Derived from drivers/serial/uart00.c - * Copyright 2001 Altera Corporation - * - * Some pieces are derived from the ADMtek 2.4 serial driver. - * Copyright (C) ADMtek Incorporated, 2003 - * daniell@admtek.com.tw - * Which again was derived from drivers/char/serial.c - * Copyright (C) Linus Torvalds et al. - * - * Copyright Jeroen Vreeken (pe1rxq@amsat.org), 2005 - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define ADM5120_UART_BASE0 0x12600000 -#define ADM5120_UART_BASE1 0x12800000 -#define ADM5120_UART_SIZE 0x20 - -#define ADM5120_UART_IRQ0 1 -#define ADM5120_UART_IRQ1 2 - -#define ADM5120_UART_REG(base, reg) \ - (*(volatile u32 *)KSEG1ADDR((base)+(reg))) - -#define ADM5120_UARTCLK_FREQ 62500000 -#define ADM5120_UART_BAUDDIV(rate) ((unsigned long)(ADM5120_UARTCLK_FREQ/(16*(rate)) - 1)) - -#define ADM5120_UART_BAUD115200 ADM5120_UART_BAUDDIV(115200) - -#define ADM5120_UART_DATA 0x00 -#define ADM5120_UART_RS 0x04 -#define ADM5120_UART_LCR_H 0x08 -#define ADM5120_UART_LCR_M 0x0c -#define ADM5120_UART_LCR_L 0x10 -#define ADM5120_UART_CR 0x14 -#define ADM5120_UART_FR 0x18 -#define ADM5120_UART_IR 0x1c - -#define ADM5120_UART_FE 0x01 -#define ADM5120_UART_PE 0x02 -#define ADM5120_UART_BE 0x04 -#define ADM5120_UART_OE 0x08 -#define ADM5120_UART_ERR 0x0f -#define ADM5120_UART_FIFO_EN 0x10 -#define ADM5120_UART_EN 0x01 -#define ADM5120_UART_TIE 0x20 -#define ADM5120_UART_RIE 0x50 -#define ADM5120_UART_IE 0x78 -#define ADM5120_UART_CTS 0x01 -#define ADM5120_UART_DSR 0x02 -#define ADM5120_UART_DCD 0x04 -#define ADM5120_UART_TXFF 0x20 -#define ADM5120_UART_TXFE 0x80 -#define ADM5120_UART_RXFE 0x10 -#define ADM5120_UART_BRK 0x01 -#define ADM5120_UART_PEN 0x02 -#define ADM5120_UART_EPS 0x04 -#define ADM5120_UART_STP2 0x08 -#define ADM5120_UART_W5 0x00 -#define ADM5120_UART_W6 0x20 -#define ADM5120_UART_W7 0x40 -#define ADM5120_UART_W8 0x60 -#define ADM5120_UART_MIS 0x01 -#define ADM5120_UART_RIS 0x02 -#define ADM5120_UART_TIS 0x04 -#define ADM5120_UART_RTIS 0x08 - -static void adm5120ser_stop_tx(struct uart_port *port) -{ - ADM5120_UART_REG(port->iobase, ADM5120_UART_CR) &= ~ADM5120_UART_TIE; -} - -static void adm5120ser_irq_rx(struct uart_port *port) -{ - struct tty_struct *tty = port->info->tty; - unsigned int status, ch, rds, flg, ignored = 0; - - status = ADM5120_UART_REG(port->iobase, ADM5120_UART_FR); - while (!(status & ADM5120_UART_RXFE)) { - /* - * We need to read rds before reading the - * character from the fifo - */ - rds = ADM5120_UART_REG(port->iobase, ADM5120_UART_RS); - ch = ADM5120_UART_REG(port->iobase, ADM5120_UART_DATA); - port->icount.rx++; - - if (tty->low_latency) - tty_flip_buffer_push(tty); - - flg = TTY_NORMAL; - - /* - * Note that the error handling code is - * out of the main execution path - */ - if (rds & ADM5120_UART_ERR) - goto handle_error; - if (uart_handle_sysrq_char(port, ch)) - goto ignore_char; - - error_return: - tty_insert_flip_char(tty, ch, flg); - - ignore_char: - status = ADM5120_UART_REG(port->iobase, ADM5120_UART_FR); - } - out: - tty_flip_buffer_push(tty); - return; - - handle_error: - ADM5120_UART_REG(port->iobase, ADM5120_UART_RS) = 0xff; - if (rds & ADM5120_UART_BE) { - port->icount.brk++; - if (uart_handle_break(port)) - goto ignore_char; - } else if (rds & ADM5120_UART_PE) - port->icount.parity++; - else if (rds & ADM5120_UART_FE) - port->icount.frame++; - if (rds & ADM5120_UART_OE) - port->icount.overrun++; - - if (rds & port->ignore_status_mask) { - if (++ignored > 100) - goto out; - goto ignore_char; - } - rds &= port->read_status_mask; - - if (rds & ADM5120_UART_BE) - flg = TTY_BREAK; - else if (rds & ADM5120_UART_PE) - flg = TTY_PARITY; - else if (rds & ADM5120_UART_FE) - flg = TTY_FRAME; - - if (rds & ADM5120_UART_OE) { - /* - * CHECK: does overrun affect the current character? - * ASSUMPTION: it does not. - */ - tty_insert_flip_char(tty, ch, flg); - ch = 0; - flg = TTY_OVERRUN; - } -#ifdef CONFIG_MAGIC_SYSRQ - port->sysrq = 0; -#endif - goto error_return; -} - -static void adm5120ser_irq_tx(struct uart_port *port) -{ - struct circ_buf *xmit = &port->info->xmit; - int count; - - if (port->x_char) { - ADM5120_UART_REG(port->iobase, ADM5120_UART_DATA) = - port->x_char; - port->icount.tx++; - port->x_char = 0; - return; - } - if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { - adm5120ser_stop_tx(port); - return; - } - - count = port->fifosize >> 1; - do { - ADM5120_UART_REG(port->iobase, ADM5120_UART_DATA) = - xmit->buf[xmit->tail]; - xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); - port->icount.tx++; - if (uart_circ_empty(xmit)) - break; - } while (--count > 0); - - if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) - uart_write_wakeup(port); - - if (uart_circ_empty(xmit)) - adm5120ser_stop_tx(port); -} - -static void adm5120ser_irq_modem(struct uart_port *port) -{ - unsigned int status; - - status = ADM5120_UART_REG(port->iobase, ADM5120_UART_FR); - - if (status & ADM5120_UART_DCD) - uart_handle_dcd_change(port, status & ADM5120_UART_DCD); - - if (status & ADM5120_UART_DSR) - port->icount.dsr++; - - if (status & ADM5120_UART_CTS) - uart_handle_cts_change(port, status & ADM5120_UART_CTS); - - wake_up_interruptible(&port->info->delta_msr_wait); -} - -static irqreturn_t adm5120ser_irq(int irq, void *dev_id) -{ - struct uart_port *port = dev_id; - unsigned long ir = ADM5120_UART_REG(port->iobase, ADM5120_UART_IR); - - if (ir & (ADM5120_UART_RIS | ADM5120_UART_RTIS)) - adm5120ser_irq_rx(port); - if (ir & ADM5120_UART_TIS) - adm5120ser_irq_tx(port); - if (ir & ADM5120_UART_MIS) { - adm5120ser_irq_modem(port); - ADM5120_UART_REG(port->iobase, ADM5120_UART_IR) = 0xff; - } - - return IRQ_HANDLED; -} - -static unsigned int adm5120ser_tx_empty(struct uart_port *port) -{ - unsigned int fr = ADM5120_UART_REG(port->iobase, ADM5120_UART_FR); - return (fr & ADM5120_UART_TXFE) ? TIOCSER_TEMT : 0; -} - -static void adm5120ser_set_mctrl(struct uart_port *port, unsigned int mctrl) -{ -} - -static unsigned int adm5120ser_get_mctrl(struct uart_port *port) -{ - unsigned int result = 0; - unsigned int fr = ADM5120_UART_REG(port->iobase, ADM5120_UART_FR); - - if (fr & ADM5120_UART_CTS) - result |= TIOCM_CTS; - if (fr & ADM5120_UART_DSR) - result |= TIOCM_DSR; - if (fr & ADM5120_UART_DCD) - result |= TIOCM_CAR; - return result; -} - -static void adm5120ser_start_tx(struct uart_port *port) -{ - ADM5120_UART_REG(port->iobase, ADM5120_UART_CR) |= ADM5120_UART_TIE; -} - -static void adm5120ser_stop_rx(struct uart_port *port) -{ - ADM5120_UART_REG(port->iobase, ADM5120_UART_CR) &= ~ADM5120_UART_RIE; -} - -static void adm5120ser_enable_ms(struct uart_port *port) -{ -} - -static void adm5120ser_break_ctl(struct uart_port *port, int break_state) -{ - unsigned long flags; - unsigned long lcrh; - - spin_lock_irqsave(&port->lock, flags); - lcrh = ADM5120_UART_REG(port->iobase, ADM5120_UART_LCR_H); - if (break_state == -1) - lcrh |= ADM5120_UART_BRK; - else - lcrh &= ~ADM5120_UART_BRK; - ADM5120_UART_REG(port->iobase, ADM5120_UART_LCR_H) = lcrh; - spin_unlock_irqrestore(&port->lock, flags); -} - -static int adm5120ser_startup(struct uart_port *port) -{ - int ret; - - ret = request_irq(port->irq, adm5120ser_irq, 0, "ADM5120 UART", port); - if (ret) { - printk(KERN_ERR "Couldn't get irq %d\n", port->irq); - return ret; - } - ADM5120_UART_REG(port->iobase, ADM5120_UART_LCR_H) |= - ADM5120_UART_FIFO_EN; - ADM5120_UART_REG(port->iobase, ADM5120_UART_CR) |= - ADM5120_UART_EN | ADM5120_UART_IE; - return 0; -} - -static void adm5120ser_shutdown(struct uart_port *port) -{ - ADM5120_UART_REG(port->iobase, ADM5120_UART_CR) &= ~ADM5120_UART_IE; - free_irq(port->irq, port); -} - -static void adm5120ser_set_termios(struct uart_port *port, - struct termios *termios, struct termios *old) -{ - unsigned int baud, quot, lcrh; - unsigned long flags; - - termios->c_cflag |= CREAD; - - baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); - quot = uart_get_divisor(port, baud); - - lcrh = ADM5120_UART_FIFO_EN; - switch (termios->c_cflag & CSIZE) { - case CS5: - lcrh |= ADM5120_UART_W5; - break; - case CS6: - lcrh |= ADM5120_UART_W6; - break; - case CS7: - lcrh |= ADM5120_UART_W7; - break; - default: - lcrh |= ADM5120_UART_W8; - break; - } - if (termios->c_cflag & CSTOPB) - lcrh |= ADM5120_UART_STP2; - if (termios->c_cflag & PARENB) { - lcrh |= ADM5120_UART_PEN; - if (!(termios->c_cflag & PARODD)) - lcrh |= ADM5120_UART_EPS; - } - - spin_lock_irqsave(port->lock, flags); - - ADM5120_UART_REG(port->iobase, ADM5120_UART_LCR_H) = lcrh; - - /* - * Update the per-port timeout. - */ - uart_update_timeout(port, termios->c_cflag, baud); - - port->read_status_mask = ADM5120_UART_OE; - if (termios->c_iflag & INPCK) - port->read_status_mask |= ADM5120_UART_FE | ADM5120_UART_PE; - if (termios->c_iflag & (BRKINT | PARMRK)) - port->read_status_mask |= ADM5120_UART_BE; - - /* - * Characters to ignore - */ - port->ignore_status_mask = 0; - if (termios->c_iflag & IGNPAR) - port->ignore_status_mask |= ADM5120_UART_FE | ADM5120_UART_PE; - if (termios->c_iflag & IGNBRK) { - port->ignore_status_mask |= ADM5120_UART_BE; - /* - * If we're ignoring parity and break indicators, - * ignore overruns to (for real raw support). - */ - if (termios->c_iflag & IGNPAR) - port->ignore_status_mask |= ADM5120_UART_OE; - } - - quot = ADM5120_UART_BAUD115200; - ADM5120_UART_REG(port->iobase, ADM5120_UART_LCR_L) = quot & 0xff; - ADM5120_UART_REG(port->iobase, ADM5120_UART_LCR_M) = quot >> 8; - - spin_unlock_irqrestore(&port->lock, flags); -} - -static const char *adm5120ser_type(struct uart_port *port) -{ - return port->type == PORT_ADM5120 ? "ADM5120" : NULL; -} - -static void adm5120ser_config_port(struct uart_port *port, int flags) -{ - if (flags & UART_CONFIG_TYPE) - port->type = PORT_ADM5120; -} - -static void adm5120ser_release_port(struct uart_port *port) -{ - release_mem_region(port->iobase, ADM5120_UART_SIZE); -} - -static int adm5120ser_request_port(struct uart_port *port) -{ - return request_mem_region(port->iobase, ADM5120_UART_SIZE, - "adm5120-uart") != NULL ? 0 : -EBUSY; -} - -static struct uart_ops adm5120ser_ops = { - .tx_empty = adm5120ser_tx_empty, - .set_mctrl = adm5120ser_set_mctrl, - .get_mctrl = adm5120ser_get_mctrl, - .stop_tx = adm5120ser_stop_tx, - .start_tx = adm5120ser_start_tx, - .stop_rx = adm5120ser_stop_rx, - .enable_ms = adm5120ser_enable_ms, - .break_ctl = adm5120ser_break_ctl, - .startup = adm5120ser_startup, - .shutdown = adm5120ser_shutdown, - .set_termios = adm5120ser_set_termios, - .type = adm5120ser_type, - .config_port = adm5120ser_config_port, - .release_port = adm5120ser_release_port, - .request_port = adm5120ser_request_port, -}; - -static void adm5120console_put(const char c) -{ - while ((ADM5120_UART_REG(ADM5120_UART_BASE0, ADM5120_UART_FR) & - ADM5120_UART_TXFF) != 0); - ADM5120_UART_REG(ADM5120_UART_BASE0, ADM5120_UART_DATA) = c; -} - -static void adm5120console_write(struct console *con, const char *s, - unsigned int count) -{ - while (count--) { - if (*s == '\n') - adm5120console_put('\r'); - adm5120console_put(*s); - s++; - } -} - -static int __init adm5120console_setup(struct console *con, char *options) -{ - /* Set to 115200 baud, 8N1 and enable FIFO */ - ADM5120_UART_REG(ADM5120_UART_BASE0, ADM5120_UART_LCR_L) = - ADM5120_UART_BAUD115200 & 0xff; - ADM5120_UART_REG(ADM5120_UART_BASE0, ADM5120_UART_LCR_M) = - ADM5120_UART_BAUD115200 >> 8; - ADM5120_UART_REG(ADM5120_UART_BASE0, ADM5120_UART_LCR_H) = - ADM5120_UART_W8 | ADM5120_UART_FIFO_EN; - /* Enable port */ - ADM5120_UART_REG(ADM5120_UART_BASE0, ADM5120_UART_CR) = - ADM5120_UART_EN; - - return 0; -} - -static struct uart_driver adm5120ser_reg; - -static struct console adm5120_serconsole = { - .name = "ttyS", - .write = adm5120console_write, - .device = uart_console_device, - .setup = adm5120console_setup, - .flags = CON_PRINTBUFFER, - .cflag = B115200 | CS8 | CREAD, - .index = 0, - .data = &adm5120ser_reg, -}; - -static int __init adm5120console_init(void) -{ - register_console(&adm5120_serconsole); - return 0; -} - -console_initcall(adm5120console_init); - - -static struct uart_port adm5120ser_ports[] = { - { - .iobase = ADM5120_UART_BASE0, - .irq = ADM5120_UART_IRQ0, - .uartclk = ADM5120_UARTCLK_FREQ, - .fifosize = 16, - .ops = &adm5120ser_ops, - .line = 0, - .flags = ASYNC_BOOT_AUTOCONF, - }, -#if (CONFIG_ADM5120_NR_UARTS > 1) - { - .iobase = ADM5120_UART_BASE1, - .irq = ADM5120_UART_IRQ1, - .uartclk = ADM5120_UARTCLK_FREQ, - .fifosize = 16, - .ops = &adm5120ser_ops, - .line = 1, - .flags = ASYNC_BOOT_AUTOCONF, - }, -#endif -}; - -static struct uart_driver adm5120ser_reg = { - .owner = THIS_MODULE, - .driver_name = "ttyS", - .dev_name = "ttyS", - .major = TTY_MAJOR, - .minor = 64, - .nr = CONFIG_ADM5120_NR_UARTS, - .cons = &adm5120_serconsole, -}; - -static int __init adm5120ser_init(void) -{ - int ret, i; - - ret = uart_register_driver(&adm5120ser_reg); - if (!ret) { - for (i = 0; i < CONFIG_ADM5120_NR_UARTS; i++) - uart_add_one_port(&adm5120ser_reg, &adm5120ser_ports[i]); - } - - return ret; -} - -__initcall(adm5120ser_init); diff --git a/target/linux/adm5120-2.6/files/drivers/usb/host/adm5120-hcd.c b/target/linux/adm5120-2.6/files/drivers/usb/host/adm5120-hcd.c deleted file mode 100644 index 0f0a72a895..0000000000 --- a/target/linux/adm5120-2.6/files/drivers/usb/host/adm5120-hcd.c +++ /dev/null @@ -1,835 +0,0 @@ -/* - * HCD driver for ADM5120 SoC - * - * Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org) - * - * Based on the ADMtek 2.4 driver - * (C) Copyright 2003 Junius Chen - * Which again was based on the ohci and uhci drivers. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include "../core/hcd.h" - -MODULE_DESCRIPTION("ADM5120 USB Host Controller Driver"); -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Jeroen Vreeken (pe1rxq@amsat.org)"); - -#define ADMHCD_REG_CONTROL 0x00 -#define ADMHCD_REG_INTSTATUS 0x04 -#define ADMHCD_REG_INTENABLE 0x08 -#define ADMHCD_REG_HOSTCONTROL 0x10 -#define ADMHCD_REG_FMINTERVAL 0x18 -#define ADMHCD_REG_FMNUMBER 0x1c -#define ADMHCD_REG_LSTHRESH 0x70 -#define ADMHCD_REG_RHDESCR 0x74 -#define ADMHCD_REG_PORTSTATUS0 0x78 -#define ADMHCD_REG_PORTSTATUS1 0x7c -#define ADMHCD_REG_HOSTHEAD 0x80 - - -#define ADMHCD_NUMPORTS 2 - -#define ADMHCD_HOST_EN 0x00000001 /* Host enable */ -#define ADMHCD_SW_INTREQ 0x00000002 /* request software int */ -#define ADMHCD_SW_RESET 0x00000008 /* Reset */ - -#define ADMHCD_INT_TD 0x00100000 /* TD completed */ -#define ADMHCD_INT_SW 0x20000000 /* software interrupt */ -#define ADMHCD_INT_FATAL 0x40000000 /* Fatal interrupt */ -#define ADMHCD_INT_ACT 0x80000000 /* Interrupt active */ - -#define ADMHCD_STATE_RST 0x00000000 /* bus state reset */ -#define ADMHCD_STATE_RES 0x00000001 /* bus state resume */ -#define ADMHCD_STATE_OP 0x00000002 /* bus state operational */ -#define ADMHCD_STATE_SUS 0x00000003 /* bus state suspended */ -#define ADMHCD_DMA_EN 0x00000004 /* enable dma engine */ - -#define ADMHCD_NPS 0x00000020 /* No Power Switch */ -#define ADMHCD_LPSC 0x04000000 /* Local power switch change */ - -#define ADMHCD_CCS 0x00000001 /* current connect status */ -#define ADMHCD_PES 0x00000002 /* port enable status */ -#define ADMHCD_PSS 0x00000004 /* port suspend status */ -#define ADMHCD_POCI 0x00000008 /* port overcurrent indicator */ -#define ADMHCD_PRS 0x00000010 /* port reset status */ -#define ADMHCD_PPS 0x00000100 /* port power status */ -#define ADMHCD_LSDA 0x00000200 /* low speed device attached */ -#define ADMHCD_CSC 0x00010000 /* connect status change */ -#define ADMHCD_PESC 0x00020000 /* enable status change */ -#define ADMHCD_PSSC 0x00040000 /* suspend status change */ -#define ADMHCD_OCIC 0x00080000 /* overcurrent change*/ -#define ADMHCD_PRSC 0x00100000 /* reset status change */ - - -struct admhcd_ed { - /* Don't change first four, they used for DMA */ - u32 control; - struct admhcd_td *tail; - struct admhcd_td *head; - struct admhcd_ed *next; - /* the rest is for the driver only: */ - struct admhcd_td *cur; - struct usb_host_endpoint *ep; - struct urb *urb; - struct admhcd_ed *real; -} __attribute__ ((packed)); - -#define ADMHCD_ED_EPSHIFT 7 /* Shift for endpoint number */ -#define ADMHCD_ED_INT 0x00000800 /* Is this an int endpoint */ -#define ADMHCD_ED_SPEED 0x00002000 /* Is it a high speed dev? */ -#define ADMHCD_ED_SKIP 0x00004000 /* Skip this ED */ -#define ADMHCD_ED_FORMAT 0x00008000 /* Is this an isoc endpoint */ -#define ADMHCD_ED_MAXSHIFT 16 /* Shift for max packet size */ - -struct admhcd_td { - /* Don't change first four, they are used for DMA */ - u32 control; - u32 buffer; - u32 buflen; - struct admhcd_td *next; - /* the rest is for the driver only: */ - struct urb *urb; - struct admhcd_td *real; -} __attribute__ ((packed)); - -#define ADMHCD_TD_OWN 0x80000000 -#define ADMHCD_TD_TOGGLE 0x00000000 -#define ADMHCD_TD_DATA0 0x01000000 -#define ADMHCD_TD_DATA1 0x01800000 -#define ADMHCD_TD_OUT 0x00200000 -#define ADMHCD_TD_IN 0x00400000 -#define ADMHCD_TD_SETUP 0x00000000 -#define ADMHCD_TD_ISO 0x00010000 -#define ADMHCD_TD_R 0x00040000 -#define ADMHCD_TD_INTEN 0x00010000 - -static int admhcd_td_err[16] = { - 0, /* No */ - -EREMOTEIO, /* CRC */ - -EREMOTEIO, /* bit stuff */ - -EREMOTEIO, /* data toggle */ - -EPIPE, /* stall */ - -ETIMEDOUT, /* timeout */ - -EPROTO, /* pid err */ - -EPROTO, /* unexpected pid */ - -EREMOTEIO, /* data overrun */ - -EREMOTEIO, /* data underrun */ - -ETIMEDOUT, /* 1010 */ - -ETIMEDOUT, /* 1011 */ - -EREMOTEIO, /* buffer overrun */ - -EREMOTEIO, /* buffer underrun */ - -ETIMEDOUT, /* 1110 */ - -ETIMEDOUT, /* 1111 */ -}; - -#define ADMHCD_TD_ERRMASK 0x38000000 -#define ADMHCD_TD_ERRSHIFT 27 - -#define TD(td) ((struct admhcd_td *)(((u32)(td)) & ~0xf)) -#define ED(ed) ((struct admhcd_ed *)(((u32)(ed)) & ~0xf)) - -struct admhcd { - spinlock_t lock; - - void __iomem *addr_reg; - void __iomem *data_reg; - /* Root hub registers */ - u32 rhdesca; - u32 rhdescb; - u32 rhstatus; - u32 rhport[2]; - - /* async schedule: control, bulk */ - struct list_head async; - u32 base; - u32 dma_en; - unsigned long flags; - -}; - -static inline struct admhcd *hcd_to_admhcd(struct usb_hcd *hcd) -{ - return (struct admhcd *)(hcd->hcd_priv); -} - -static inline struct usb_hcd *admhcd_to_hcd(struct admhcd *admhcd) -{ - return container_of((void *)admhcd, struct usb_hcd, hcd_priv); -} - -static char hcd_name[] = "adm5120-hcd"; - -static u32 admhcd_reg_get(struct admhcd *ahcd, int reg) -{ - return *(volatile u32 *)KSEG1ADDR(ahcd->base+reg); -} - -static void admhcd_reg_set(struct admhcd *ahcd, int reg, u32 val) -{ - *(volatile u32 *)KSEG1ADDR(ahcd->base+reg) = val; -} - -static void admhcd_lock(struct admhcd *ahcd) -{ - spin_lock_irqsave(&ahcd->lock, ahcd->flags); - ahcd->dma_en = admhcd_reg_get(ahcd, ADMHCD_REG_HOSTCONTROL) & - ADMHCD_DMA_EN; - admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP); -} - -static void admhcd_unlock(struct admhcd *ahcd) -{ - admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL, - ADMHCD_STATE_OP | ahcd->dma_en); - spin_unlock_irqrestore(&ahcd->lock, ahcd->flags); -} - -static struct admhcd_td *admhcd_td_alloc(struct admhcd_ed *ed, struct urb *urb) -{ - struct admhcd_td *tdn, *td; - - tdn = kmalloc(sizeof(struct admhcd_td), GFP_ATOMIC); - if (!tdn) - return NULL; - tdn->real = tdn; - tdn = (struct admhcd_td *)KSEG1ADDR(tdn); - memset(tdn, 0, sizeof(struct admhcd_td)); - if (ed->cur == NULL) { - ed->cur = tdn; - ed->head = tdn; - ed->tail = tdn; - td = tdn; - } else { - /* Supply back the old tail and link in new td as tail */ - td = TD(ed->tail); - TD(ed->tail)->next = tdn; - ed->tail = tdn; - } - td->urb = urb; - - return td; -} - -static void admhcd_td_free(struct admhcd_ed *ed, struct urb *urb) -{ - struct admhcd_td *td, **tdp; - - if (urb == NULL) - ed->control |= ADMHCD_ED_SKIP; - tdp = &ed->cur; - td = ed->cur; - do { - if (td->urb == urb) - break; - tdp = &td->next; - td = TD(td->next); - } while (td); - while (td && td->urb == urb) { - *tdp = TD(td->next); - kfree(td->real); - td = *tdp; - } -} - -/* Find an endpoint's descriptor, if needed allocate a new one and link it - in the DMA chain - */ -static struct admhcd_ed *admhcd_get_ed(struct admhcd *ahcd, - struct usb_host_endpoint *ep, struct urb *urb) -{ - struct admhcd_ed *hosthead; - struct admhcd_ed *found = NULL, *ed = NULL; - unsigned int pipe = urb->pipe; - - admhcd_lock(ahcd); - hosthead = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD); - if (hosthead) { - for (ed = hosthead;; ed = ED(ed->next)) { - if (ed->ep == ep) { - found = ed; - break; - } - if (ED(ed->next) == hosthead) - break; - } - } - if (!found) { - found = kmalloc(sizeof(struct admhcd_ed), GFP_ATOMIC); - if (!found) - goto out; - memset(found, 0, sizeof(struct admhcd_ed)); - found->real = found; - found->ep = ep; - found = (struct admhcd_ed *)KSEG1ADDR(found); - found->control = usb_pipedevice(pipe) | - (usb_pipeendpoint(pipe) << ADMHCD_ED_EPSHIFT) | - (usb_pipeint(pipe) ? ADMHCD_ED_INT : 0) | - (urb->dev->speed == USB_SPEED_FULL ? ADMHCD_ED_SPEED : 0) | - (usb_pipeisoc(pipe) ? ADMHCD_ED_FORMAT : 0) | - (usb_maxpacket(urb->dev, pipe, usb_pipeout(pipe)) << ADMHCD_ED_MAXSHIFT); - /* Alloc first dummy td */ - admhcd_td_alloc(found, NULL); - if (hosthead) { - found->next = hosthead; - ed->next = found; - } else { - found->next = found; - admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, (u32)found); - } - } -out: - admhcd_unlock(ahcd); - return found; -} - -static struct admhcd_td *admhcd_td_fill(u32 control, struct admhcd_td *td, - dma_addr_t data, int len) -{ - td->buffer = data; - td->buflen = len; - td->control = control; - return TD(td->next); -} - -static void admhcd_ed_start(struct admhcd *ahcd, struct admhcd_ed *ed) -{ - struct admhcd_td *td = ed->cur; - - if (ed->urb) - return; - if (td->urb) { - ed->urb = td->urb; - while (1) { - td->control |= ADMHCD_TD_OWN; - if (TD(td->next)->urb != td->urb) { - td->buflen |= ADMHCD_TD_INTEN; - break; - } - td = TD(td->next); - } - } - ed->head = TD(ed->head); - ahcd->dma_en |= ADMHCD_DMA_EN; -} - -static irqreturn_t adm5120hcd_irq(int irq, void *ptr, struct pt_regs *regs) -{ - struct usb_hcd *hcd = (struct usb_hcd *)ptr; - struct admhcd *ahcd = hcd_to_admhcd(hcd); - u32 intstatus; - - intstatus = admhcd_reg_get(ahcd, ADMHCD_REG_INTSTATUS); - if (intstatus & ADMHCD_INT_FATAL) { - admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_FATAL); - // - } - if (intstatus & ADMHCD_INT_SW) { - admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_SW); - // - } - if (intstatus & ADMHCD_INT_TD) { - struct admhcd_ed *ed, *head; - - admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_TD); - - head = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD); - ed = head; - if (ed) do { - /* Is it a finished TD? */ - if (ed->urb && !(ed->cur->control & ADMHCD_TD_OWN)) { - struct admhcd_td *td; - int error; - - td = ed->cur; - error = (td->control & ADMHCD_TD_ERRMASK) >> - ADMHCD_TD_ERRSHIFT; - ed->urb->status = admhcd_td_err[error]; - admhcd_td_free(ed, ed->urb); - // Calculate real length!!! - ed->urb->actual_length = ed->urb->transfer_buffer_length; - ed->urb->hcpriv = NULL; - usb_hcd_giveback_urb(hcd, ed->urb); - ed->urb = NULL; - } - admhcd_ed_start(ahcd, ed); - ed = ED(ed->next); - } while (ed != head); - } - - return IRQ_HANDLED; -} - -static int admhcd_urb_enqueue(struct usb_hcd *hcd, struct usb_host_endpoint *ep, - struct urb *urb, gfp_t mem_flags) -{ - struct admhcd *ahcd = hcd_to_admhcd(hcd); - struct admhcd_ed *ed; - struct admhcd_td *td; - int size = 0, i, zero = 0, ret = 0; - unsigned int pipe = urb->pipe, toggle = 0; - dma_addr_t data = (dma_addr_t)urb->transfer_buffer; - int data_len = urb->transfer_buffer_length; - - ed = admhcd_get_ed(ahcd, ep, urb); - if (!ed) - return -ENOMEM; - - switch(usb_pipetype(pipe)) { - case PIPE_CONTROL: - size = 2; - case PIPE_INTERRUPT: - case PIPE_BULK: - default: - size += urb->transfer_buffer_length / 4096; - if (urb->transfer_buffer_length % 4096) - size++; - if (size == 0) - size++; - else if (urb->transfer_flags & URB_ZERO_PACKET && - !(urb->transfer_buffer_length % - usb_maxpacket(urb->dev, pipe, usb_pipeout(pipe)))) { - size++; - zero = 1; - } - break; - case PIPE_ISOCHRONOUS: - size = urb->number_of_packets; - break; - } - - admhcd_lock(ahcd); - /* Remember the first td */ - td = admhcd_td_alloc(ed, urb); - if (!td) { - ret = -ENOMEM; - goto out; - } - /* Allocate additionall tds first */ - for (i = 1; i < size; i++) { - if (admhcd_td_alloc(ed, urb) == NULL) { - admhcd_td_free(ed, urb); - ret = -ENOMEM; - goto out; - } - } - - if (usb_gettoggle(urb->dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) - toggle = ADMHCD_TD_TOGGLE; - else { - toggle = ADMHCD_TD_DATA0; - usb_settoggle(urb->dev, usb_pipeendpoint(pipe), - usb_pipeout(pipe), 1); - } - - switch(usb_pipetype(pipe)) { - case PIPE_CONTROL: - td = admhcd_td_fill(ADMHCD_TD_SETUP | ADMHCD_TD_DATA0, - td, (dma_addr_t)urb->setup_packet, 8); - while (data_len > 0) { - td = admhcd_td_fill(ADMHCD_TD_DATA1 - | ADMHCD_TD_R | - (usb_pipeout(pipe) ? - ADMHCD_TD_OUT : ADMHCD_TD_IN), td, - data, data_len % 4097); - data_len -= 4096; - } - admhcd_td_fill(ADMHCD_TD_DATA1 | (usb_pipeout(pipe) ? - ADMHCD_TD_IN : ADMHCD_TD_OUT), td, - data, 0); - break; - case PIPE_INTERRUPT: - case PIPE_BULK: - //info ok for interrupt? - i = 0; - while(data_len > 4096) { - td = admhcd_td_fill((usb_pipeout(pipe) ? - ADMHCD_TD_OUT : - ADMHCD_TD_IN | ADMHCD_TD_R) | - (i ? ADMHCD_TD_TOGGLE : toggle), td, - data, 4096); - data += 4096; - data_len -= 4096; - i++; - } - td = admhcd_td_fill((usb_pipeout(pipe) ? - ADMHCD_TD_OUT : ADMHCD_TD_IN) | - (i ? ADMHCD_TD_TOGGLE : toggle), td, data, data_len); - i++; - if (zero) - admhcd_td_fill((usb_pipeout(pipe) ? - ADMHCD_TD_OUT : ADMHCD_TD_IN) | - (i ? ADMHCD_TD_TOGGLE : toggle), td, 0, 0); - break; - case PIPE_ISOCHRONOUS: - for (i = 0; i < urb->number_of_packets; i++) { - td = admhcd_td_fill(ADMHCD_TD_ISO | - ((urb->start_frame + i) & 0xffff), td, - data + urb->iso_frame_desc[i].offset, - urb->iso_frame_desc[i].length); - } - break; - } - urb->hcpriv = ed; - admhcd_ed_start(ahcd, ed); -out: - admhcd_unlock(ahcd); - return ret; -} - -static int admhcd_urb_dequeue(struct usb_hcd *hcd, struct urb *urb) -{ - struct admhcd *ahcd = hcd_to_admhcd(hcd); - struct admhcd_ed *ed; - - admhcd_lock(ahcd); - - ed = urb->hcpriv; - if (ed && ed->urb != urb) - admhcd_td_free(ed, urb); - - admhcd_unlock(ahcd); - return 0; -} - -static void admhcd_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep) -{ - struct admhcd *ahcd = hcd_to_admhcd(hcd); - struct admhcd_ed *ed, *edt, *head; - - admhcd_lock(ahcd); - - head = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD); - if (!head) - goto out; - for (ed = head; ED(ed->next) != head; ed = ED(ed->next)) - if (ed->ep == ep) - break; - if (ed->ep != ep) - goto out; - while (ed->cur) - admhcd_td_free(ed, ed->cur->urb); - if (head == ed) { - if (ED(ed->next) == ed) { - admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, 0); - ahcd->dma_en = 0; - goto out_free; - } - head = ED(ed->next); - for (edt = head; ED(edt->next) != head; edt = ED(edt->next)); - edt->next = ED(ed->next); - admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, (u32)ed->next); - goto out_free; - } - for (edt = head; edt->next != ed; edt = edt->next); - edt->next = ed->next; -out_free: - kfree(ed->real); -out: - admhcd_unlock(ahcd); -} - -static int admhcd_get_frame_number(struct usb_hcd *hcd) -{ - struct admhcd *ahcd = hcd_to_admhcd(hcd); - - return admhcd_reg_get(ahcd, ADMHCD_REG_FMNUMBER) & 0x0000ffff; -} - -static int admhcd_hub_status_data(struct usb_hcd *hcd, char *buf) -{ - struct admhcd *ahcd = hcd_to_admhcd(hcd); - int port; - - *buf = 0; - for (port = 0; port < ADMHCD_NUMPORTS; port++) { - if (admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4) & - (ADMHCD_CSC | ADMHCD_PESC | ADMHCD_PSSC | ADMHCD_OCIC | - ADMHCD_PRSC)) - *buf |= (1 << (port + 1)); - } - return !!*buf; -} - -static __u8 root_hub_hub_des[] = { - 0x09, /* __u8 bLength; */ - 0x29, /* __u8 bDescriptorType; Hub-descriptor */ - 0x02, /* __u8 bNbrPorts; */ - 0x0a, 0x00, /* __u16 wHubCharacteristics; */ - 0x01, /* __u8 bPwrOn2pwrGood; 2ms */ - 0x00, /* __u8 bHubContrCurrent; 0mA */ - 0x00, /* __u8 DeviceRemovable; */ - 0xff, /* __u8 PortPwrCtrlMask; */ -}; - -static int admhcd_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, - u16 wIndex, char *buf, u16 wLength) -{ - struct admhcd *ahcd = hcd_to_admhcd(hcd); - int retval = 0, len; - unsigned int port = wIndex -1; - - switch (typeReq) { - - case GetHubStatus: - *(__le32 *)buf = cpu_to_le32(0); - break; - case GetPortStatus: - if (port >= ADMHCD_NUMPORTS) - goto err; - *(__le32 *)buf = cpu_to_le32( - admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4)); - break; - case SetHubFeature: /* We don't implement these */ - case ClearHubFeature: - switch (wValue) { - case C_HUB_OVER_CURRENT: - case C_HUB_LOCAL_POWER: - break; - default: - goto err; - } - case SetPortFeature: - if (port >= ADMHCD_NUMPORTS) - goto err; - - switch (wValue) { - case USB_PORT_FEAT_SUSPEND: - admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4, - ADMHCD_PSS); - break; - case USB_PORT_FEAT_RESET: - if (admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4) - & ADMHCD_CCS) { - admhcd_reg_set(ahcd, - ADMHCD_REG_PORTSTATUS0 + port*4, - ADMHCD_PRS | ADMHCD_CSC); - mdelay(50); - admhcd_reg_set(ahcd, - ADMHCD_REG_PORTSTATUS0 + port*4, - ADMHCD_PES | ADMHCD_CSC); - } - break; - case USB_PORT_FEAT_POWER: - admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4, - ADMHCD_PPS); - break; - default: - goto err; - } - break; - case ClearPortFeature: - if (port >= ADMHCD_NUMPORTS) - goto err; - - switch (wValue) { - case USB_PORT_FEAT_ENABLE: - admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4, - ADMHCD_CCS); - break; - case USB_PORT_FEAT_C_ENABLE: - admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4, - ADMHCD_PESC); - break; - case USB_PORT_FEAT_SUSPEND: - admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4, - ADMHCD_POCI); - break; - case USB_PORT_FEAT_C_SUSPEND: - admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4, - ADMHCD_PSSC); - case USB_PORT_FEAT_POWER: - admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4, - ADMHCD_LSDA); - break; - case USB_PORT_FEAT_C_CONNECTION: - admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4, - ADMHCD_CSC); - break; - case USB_PORT_FEAT_C_OVER_CURRENT: - admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4, - ADMHCD_OCIC); - break; - case USB_PORT_FEAT_C_RESET: - admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4, - ADMHCD_PRSC); - break; - default: - goto err; - } - break; - case GetHubDescriptor: - len = min_t(unsigned int, sizeof(root_hub_hub_des), wLength); - memcpy(buf, root_hub_hub_des, len); - break; - default: -err: - retval = -EPIPE; - } - - return retval; -} - -static struct hc_driver adm5120_hc_driver = { - .description = hcd_name, - .product_desc = "ADM5120 HCD", - .hcd_priv_size = sizeof(struct admhcd), - .flags = HCD_USB11, - .urb_enqueue = admhcd_urb_enqueue, - .urb_dequeue = admhcd_urb_dequeue, - .endpoint_disable = admhcd_endpoint_disable, - .get_frame_number = admhcd_get_frame_number, - .hub_status_data = admhcd_hub_status_data, - .hub_control = admhcd_hub_control, -}; - -#define resource_len(r) (((r)->end - (r)->start) + 1) - -static int __init adm5120hcd_probe(struct platform_device *pdev) -{ - struct usb_hcd *hcd; - struct admhcd *ahcd; - struct resource *addr, *data; - void __iomem *addr_reg; - void __iomem *data_reg; - int irq, err = 0; - - if (pdev->num_resources < 3) { - err = -ENODEV; - goto out; - } - - data = platform_get_resource(pdev, IORESOURCE_MEM, 0); - addr = platform_get_resource(pdev, IORESOURCE_MEM, 1); - irq = platform_get_irq(pdev, 0); - - if (!addr || !data || irq < 0) { - err = -ENODEV; - goto out; - } - - if (pdev->dev.dma_mask) { - printk(KERN_DEBUG "DMA not supported\n"); - err = -EINVAL; - goto out; - } - - if (!request_mem_region(addr->start, 2, hcd_name)) { - err = -EBUSY; - goto out; - } - addr_reg = ioremap(addr->start, resource_len(addr)); - if (addr_reg == NULL) { - err = -ENOMEM; - goto out_mem; - } - if (!request_mem_region(data->start, 2, hcd_name)) { - err = -EBUSY; - goto out_unmap; - } - data_reg = ioremap(data->start, resource_len(data)); - if (data_reg == NULL) { - err = -ENOMEM; - goto out_mem; - } - - - hcd = usb_create_hcd(&adm5120_hc_driver, &pdev->dev, pdev->dev.bus_id); - if (!hcd) - goto out_mem; - - ahcd = hcd_to_admhcd(hcd); - ahcd->data_reg = data_reg; - ahcd->addr_reg = addr_reg; - spin_lock_init(&ahcd->lock); - INIT_LIST_HEAD(&ahcd->async); - - /* Initialise the HCD registers */ - admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE, 0); - mdelay(10); - admhcd_reg_set(ahcd, ADMHCD_REG_CONTROL, ADMHCD_SW_RESET); - while (admhcd_reg_get(ahcd, ADMHCD_REG_CONTROL) & ADMHCD_SW_RESET) - mdelay(1); - - admhcd_reg_set(ahcd, ADMHCD_REG_CONTROL, ADMHCD_HOST_EN); - admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, 0x00000000); - admhcd_reg_set(ahcd, ADMHCD_REG_FMINTERVAL, 0x20002edf); - admhcd_reg_set(ahcd, ADMHCD_REG_LSTHRESH, 0x628); - admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE, - ADMHCD_INT_ACT | ADMHCD_INT_FATAL | ADMHCD_INT_SW | ADMHCD_INT_TD); - admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, - ADMHCD_INT_ACT | ADMHCD_INT_FATAL | ADMHCD_INT_SW | ADMHCD_INT_TD); - admhcd_reg_set(ahcd, ADMHCD_REG_RHDESCR, ADMHCD_NPS | ADMHCD_LPSC); - admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP); - - err = usb_add_hcd(hcd, irq, IRQF_DISABLED); - if (err) - goto out_dev; - - return 0; - -out_dev: - usb_put_hcd(hcd); -out_unmap: - iounmap(addr_reg); -out_mem: - release_mem_region(addr->start, 2); -out: - return err; -} - -static int __init_or_module adm5120hcd_remove(struct platform_device *pdev) -{ - struct usb_hcd *hcd = platform_get_drvdata(pdev); - struct admhcd *ahcd; - - if (!hcd) - return 0; - ahcd = hcd_to_admhcd(hcd); - usb_remove_hcd(hcd); - - usb_put_hcd(hcd); - return 0; -} - -static struct platform_driver adm5120hcd_driver = { - .probe = adm5120hcd_probe, - .remove = adm5120hcd_remove, - .driver = { - .name = "adm5120-hcd", - .owner = THIS_MODULE, - }, -}; - -static int __init adm5120hcd_init(void) -{ - if (usb_disabled()) - return -ENODEV; - if (!adm5120_board.has_usb) - return -ENODEV; - - return platform_driver_register(&adm5120hcd_driver); -} - -static void __exit adm5120hcd_exit(void) -{ - platform_driver_unregister(&adm5120hcd_driver); -} - -module_init(adm5120hcd_init); -module_exit(adm5120hcd_exit); diff --git a/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/adm5120_defs.h b/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/adm5120_defs.h deleted file mode 100644 index 36979c225e..0000000000 --- a/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/adm5120_defs.h +++ /dev/null @@ -1,60 +0,0 @@ -/* - * $Id$ - * - * ADM5120 SoC definitions - * - * This file defines some constants specific to the ADM5120 SoC - * - * Copyright (C) 2007 OpenWrt.org - * Copyright (C) 2007 Gabor Juhos - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the - * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, - * Boston, MA 02110-1301, USA. - */ -#ifndef _ADM5120_DEFS_H -#define _ADM5120_DEFS_H - -#define ADM5120_SDRAM0_BASE 0x00000000 -#define ADM5120_SDRAM1_BASE 0x01000000 -#define ADM5120_SRAM1_BASE 0x10000000 -#define ADM5120_MPMC_BASE 0x11000000 -#define ADM5120_USBC_BASE 0x11200000 -#define ADM5120_PCIMEM_BASE 0x11400000 -#define ADM5120_PCIIO_BASE 0x11500000 -#define ADM5120_PCICFG_ADDR 0x115FFFF0 -#define ADM5120_PCICFG_DATA 0x115FFFF8 -#define ADM5120_SWITCH_BASE 0x12000000 -#define ADM5120_INTC_BASE 0x12200000 -#define ADM5120_UART0_BASE 0x12600000 -#define ADM5120_UART1_BASE 0x12800000 -#define ADM5120_SRAM0_BASE 0x1FC00000 - -#define ADM5120_MPMC_SIZE 0x1000 -#define ADM5120_USBC_SIZE 0x84 -#define ADM5120_PCIMEM_SIZE (ADM5120_PCIIO_BASE - ADM5120_PCIMEM_BASE) -#define ADM5120_PCIIO_SIZE (ADM5120_PCICFG_ADDR - ADM5120_PCIIO_BASE) -#define ADM5120_PCICFG_SIZE 0x10 -#define ADM5120_SWITCH_SIZE 0x114 -#define ADM5120_INTC_SIZE 0x28 -#define ADM5120_UART_SIZE 0x20 - -#define ADM5120_CLK_175 175000000 -#define ADM5120_CLK_200 200000000 -#define ADM5120_CLK_225 225000000 -#define ADM5120_CLK_250 250000000 - -#define ADM5120_UART_CLOCK 62500000 - -#endif /* _ADM5120_DEFS_H */ diff --git a/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/adm5120_info.h b/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/adm5120_info.h deleted file mode 100644 index dbb02cf8ed..0000000000 --- a/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/adm5120_info.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * $Id$ - * - * Copyright (C) 2007 OpenWrt.org - * Copyright (C) Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifndef _ADM5120_INFO_H -#define _ADM5120_INFO_H - -#include - -#define ADM5120_BOARD_NAMELEN 64 - -struct adm5120_board { - char name[ADM5120_BOARD_NAMELEN]; - unsigned long mach_type; - unsigned int iface_num; /* Number of Ethernet interfaces */ - unsigned int has_usb; /* USB controller presence flag */ - u32 flash0_size; /* Flash 0 size */ -}; - -extern struct adm5120_board adm5120_board; - -extern unsigned int adm5120_boot_loader; -#define BOOT_LOADER_UNKNOWN 0 -#define BOOT_LOADER_CFE 1 -#define BOOT_LOADER_UBOOT 2 -#define BOOT_LOADER_MYLOADER 3 -#define BOOT_LOADER_ROUTERBOOT 4 -#define BOOT_LOADER_BOOTBASE 5 -#define BOOT_LOADER_LAST 5 - -extern unsigned int adm5120_product_code; -extern unsigned int adm5120_revision; -extern unsigned int adm5120_nand_boot; - -extern unsigned long adm5120_speed; -#define ADM5120_SPEED_175 175000000 -#define ADM5120_SPEED_200 200000000 -#define ADM5120_SPEED_225 225000000 -#define ADM5120_SPEED_250 250000000 - -extern unsigned int adm5120_package; -#define ADM5120_PACKAGE_PQFP 0 -#define ADM5120_PACKAGE_BGA 1 - -extern void adm5120_info_init(void); - -static inline int adm5120_has_pci(void) -{ - return (adm5120_package == ADM5120_PACKAGE_BGA); -} - -static inline int adm5120_has_gmii(void) -{ - return (adm5120_package == ADM5120_PACKAGE_BGA); -} - -static inline char *adm5120_board_name(void) -{ - return adm5120_board.name; -} - -#endif /* _ADM5120_INFO_H */ diff --git a/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/adm5120_switch.h b/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/adm5120_switch.h deleted file mode 100644 index 52ea79e7ab..0000000000 --- a/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/adm5120_switch.h +++ /dev/null @@ -1,89 +0,0 @@ -/* - * ADM5120 ethernet switch definitions - * - * This header file defines the hardware registers of the ADM5120 SoC - * built-in Ethernet switch. - * - * Copyright (C) 2007 OpenWrt.org - * Copyright (C) 2007 Gabor Juhos - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the - * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, - * Boston, MA 02110-1301, USA. - */ - -#ifndef _ADM5120_SWITCH_H -#define _ADM5120_SWITCH_H - -#define BITMASK(len) ((1 << (len))-1) -#define ONEBIT(at) (1 << (at)) - -/* Switch register offsets */ -#define SWITCH_REG_CODE 0x0000 -#define SWITCH_REG_SOFT_RESET 0x0004 -#define SWITCH_REG_MEMCTRL 0x001C -#define SWITCH_REG_CPUP_CONF 0x0024 -#define SWITCH_REG_PORT_CONF0 0x0028 -#define SWITCH_REG_PORT_CONF1 0x002C -#define SWITCH_REG_PORT_CONF2 0x0030 -#define SWITCH_REG_VLAN_G1 0x0040 -#define SWITCH_REG_VLAN_G2 0x0044 -#define SWITCH_REG_SEND_TRIG 0x0048 -#define SWITCH_REG_MAC_WT0 0x0058 -#define SWITCH_REG_MAC_WT1 0x005C -#define SWITCH_REG_PHY_CNTL0 0x0068 -#define SWITCH_REG_PHY_CNTL1 0x006C -#define SWITCH_REG_PHY_CNTL2 0x007C -#define SWITCH_REG_PHY_CNTL3 0x0080 -#define SWITCH_REG_PRI_CNTL 0x0084 -#define SWITCH_REG_INT_STATUS 0x00B0 -#define SWITCH_REG_INT_MASK 0x00B4 -#define SWITCH_REG_GPIO_CONF0 0x00B8 -#define SWITCH_REG_GPIO_CONF2 0x00BC -#define SWITCH_REG_WDOG0 0x00C0 -#define SWITCH_REG_WDOG1 0x00C4 -#define SWITCH_REG_PHY_CNTL4 0x00A0 - -#define SWITCH_REG_SEND_HBADDR 0x00D0 -#define SWITCH_REG_SEND_LBADDR 0x00D4 -#define SWITCH_REG_RECV_HBADDR 0x00D8 -#define SWITCH_REG_RECV_LBADDR 0x00DC - -#define SWITCH_REG_TIMER_INT 0x00F0 -#define SWITCH_REG_TIMER 0x00F4 - -#define SWITCH_REG_PORT0_LED 0x0100 -#define SWITCH_REG_PORT1_LED 0x0104 -#define SWITCH_REG_PORT2_LED 0x0108 -#define SWITCH_REG_PORT3_LED 0x010C -#define SWITCH_REG_PORT4_LED 0x0110 - -/* CODE register bits */ -#define CODE_PC_MASK BITMASK(16) /* Product Code */ -#define CODE_REV_SHIFT 16 -#define CODE_REV_MASK BITMASK(4) /* Product Revision */ -#define CODE_CLKS_SHIFT 20 -#define CODE_CLKS_MASK BITMASK(2) /* Clock Speed */ -#define CODE_CLKS_175 0 /* 175 MHz */ -#define CODE_CLKS_200 1 /* 200 MHz */ -#define CODE_CLKS_225 2 /* 225 MHz */ -#define CODE_CLKS_250 3 /* 250 MHz */ -#define CODE_NAB ONEBIT(24) /* NAND boot */ -#define CODE_PK_MASK BITMASK(1) /* Package type */ -#define CODE_PK_SHIFT 29 -#define CODE_PK_BGA 0 /* BGA package */ -#define CODE_PK_PQFP 1 /* PQFP package */ - - -#endif /* _ADM5120_SWITCH_H */ diff --git a/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/myloader.h b/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/myloader.h deleted file mode 100644 index 3c0c6021b1..0000000000 --- a/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/myloader.h +++ /dev/null @@ -1,167 +0,0 @@ -/* - * Copyright (C) 2006,2007 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ - -#ifndef _MYLOADER_H_ -#define _MYLOADER_H_ - -/* - * Firmware file format: - * - *
- * [] - * ... - * [] - * - * [] - * ... - * [] - * - * - */ - -/* Myloader specific magic numbers */ -#define MYLO_MAGIC_FIRMWARE 0x4C594D00 -#define MYLO_MAGIC_20021103 0x20021103 -#define MYLO_MAGIC_20021107 0x20021107 - -#define MYLO_MAGIC_SYS_PARAMS MYLO_MAGIC_20021107 -#define MYLO_MAGIC_PARTITIONS MYLO_MAGIC_20021103 -#define MYLO_MAGIC_BOARD_PARAMS MYLO_MAGIC_20021103 - -/* - * Addresses of the data structures provided by MyLoader - */ -#define MYLO_MIPS_SYS_PARAMS 0x80000800 /* System Parameters */ -#define MYLO_MIPS_BOARD_PARAMS 0x80000A00 /* Board Parameters */ -#define MYLO_MIPS_PARTITIONS 0x80000C00 /* Partition Table */ -#define MYLO_MIPS_BOOT_PARAMS 0x80000E00 /* Boot Parameters */ - -/* Vendor ID's (seems to be same as the PCI vendor ID's) */ -#define VENID_COMPEX 0x11F6 - -/* Devices based on the ADM5120 */ -#define DEVID_COMPEX_NP27G 0x0078 -#define DEVID_COMPEX_NP28G 0x044C -#define DEVID_COMPEX_NP28GHS 0x044E -#define DEVID_COMPEX_WP54Gv1C 0x0514 -#define DEVID_COMPEX_WP54G 0x0515 -#define DEVID_COMPEX_WP54AG 0x0546 -#define DEVID_COMPEX_WPP54AG 0x0550 -#define DEVID_COMPEX_WPP54G 0x0555 - -/* Devices based on the IXP422 */ -#define DEVID_COMPEX_WP18 0x047E -#define DEVID_COMPEX_NP18A 0x0489 - -/* Other devices */ -#define DEVID_COMPEX_NP26G8M 0x03E8 -#define DEVID_COMPEX_NP26G16M 0x03E9 - -struct mylo_fw_header { - uint32_t magic; /* must be MYLO_MAGIC_FIRMWARE */ - uint32_t crc; /* CRC of the whole firmware */ - uint32_t res0; /* unknown/unused */ - uint32_t res1; /* unknown/unused */ - uint16_t vid; /* vendor ID */ - uint16_t did; /* device ID */ - uint16_t svid; /* sub vendor ID */ - uint16_t sdid; /* sub device ID */ - uint32_t rev; /* device revision */ - uint32_t fwhi; /* FIXME: firmware version high? */ - uint32_t fwlo; /* FIXME: firmware version low? */ - uint32_t flags; /* firmware flags */ -}; - -#define FW_FLAG_BOARD_PARAMS_WP 0x01 /* board parameters are write protected */ -#define FW_FLAG_BOOT_SECTOR_WE 0x02 /* enable of write boot sectors (below 64K) */ - -struct mylo_fw_blockdesc { - uint32_t type; /* block type */ - uint32_t addr; /* relative address to flash start */ - uint32_t dlen; /* size of block data in bytes */ - uint32_t blen; /* total size of block in bytes */ -}; - -#define FW_DESC_TYPE_UNUSED 0 -#define FW_DESC_TYPE_USED 1 - -struct mylo_partition { - uint16_t flags; /* partition flags */ - uint16_t type; /* type of the partition */ - uint32_t addr; /* relative address of the partition from the - flash start */ - uint32_t size; /* size of the partition in bytes */ - uint32_t param; /* if this is the active partition, the - MyLoader load code to this address */ -}; - -#define PARTITION_FLAG_ACTIVE 0x8000 /* this is the active partition, - * MyLoader loads firmware from here */ -#define PARTITION_FLAG_ISRAM 0x2000 /* FIXME: this is a RAM partition? */ -#define PARTIIION_FLAG_RAMLOAD 0x1000 /* FIXME: load this partition into the RAM? */ -#define PARTITION_FLAG_PRELOAD 0x0800 /* the partition data preloaded to RAM - * before decompression */ -#define PARTITION_FLAG_HAVEHDR 0x0002 /* the partition data have a header */ - -#define PARTITION_TYPE_FREE 0 -#define PARTITION_TYPE_USED 1 - -#define MYLO_MAX_PARTITIONS 8 /* maximum number of partitions in the - partition table */ - -struct mylo_partition_table { - uint32_t magic; /* must be MYLO_MAGIC_PARTITIONS */ - uint32_t res0; /* unknown/unused */ - uint32_t res1; /* unknown/unused */ - uint32_t res2; /* unknown/unused */ - struct mylo_partition partitions[MYLO_MAX_PARTITIONS]; -}; - -struct mylo_partition_header { - uint32_t len; /* length of the partition data */ - uint32_t crc; /* CRC value of the partition data */ -}; - -struct mylo_system_params { - uint32_t magic; /* must be MYLO_MAGIC_SYS_PARAMS */ - uint32_t res0; - uint32_t res1; - uint32_t mylo_ver; - uint16_t vid; /* Vendor ID */ - uint16_t did; /* Device ID */ - uint16_t svid; /* Sub Vendor ID */ - uint16_t sdid; /* Sub Device ID */ - uint32_t rev; /* device revision */ - uint32_t fwhi; - uint32_t fwlo; - uint32_t tftp_addr; - uint32_t prog_start; - uint32_t flash_size; /* Size of boot FLASH in bytes */ - uint32_t dram_size; /* Size of onboard RAM in bytes */ -}; - - -struct mylo_eth_addr { - uint8_t mac[6]; - uint8_t csum[2]; -}; - -#define MYLO_ETHADDR_COUNT 8 /* maximum number of ethernet address - in the board parameters */ - -struct mylo_board_params { - uint32_t magic; /* must be MYLO_MAGIC_BOARD_PARAMS */ - uint32_t res0; - uint32_t res1; - uint32_t res2; - struct mylo_eth_addr addr[MYLO_ETHADDR_COUNT]; -}; - -#endif /* _MYLOADER_H_*/ diff --git a/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/routerboot.h b/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/routerboot.h deleted file mode 100644 index 1e2b973679..0000000000 --- a/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/routerboot.h +++ /dev/null @@ -1,104 +0,0 @@ -/* - * $Id$ - * - * Copyright (C) 2007 OpenWrt.org - * Copyright (C) 2007 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ - -#ifndef _ROUTERBOOT_H -#define _ROUTERBOOT_H - -/* - * Magic numbers - */ -#define RB_MAGIC_HARD 0x64726148 /* "Hard" */ -#define RB_MAGIC_SOFT 0x74666F53 /* "Soft" */ -#define RB_MAGIC_DAWN 0x6E776144 /* "Dawn" */ - -#define RB_ID_TERMINATOR 0 - -/* - * ID values for Hardware settings - */ -#define RB_ID_HARD_01 1 -#define RB_ID_HARD_02 2 -#define RB_ID_FLASH_INFO 3 -#define RB_ID_MAC_ADDRESS_PACK 4 -#define RB_ID_BOARD_NAME 5 -#define RB_ID_BIOS_VERSION 6 -#define RB_ID_HARD_07 7 -#define RB_ID_SDRAM_TIMINGS 8 -#define RB_ID_DEVICE_TIMINGS 9 -#define RB_ID_SOFTWARE_ID 10 -#define RB_ID_SERIAL_NUMBER 11 -#define RB_ID_HARD_12 12 -#define RB_ID_MEMORY_SIZE 13 -#define RB_ID_MAC_ADDRESS_COUNT 14 - -/* - * ID values for Software settings - */ -#define RB_ID_UART_SPEED 1 -#define RB_ID_BOOT_DELAY 2 -#define RB_ID_BOOT_DEVICE 3 -#define RB_ID_BOOT_KEY 4 -#define RB_ID_CPU_MODE 5 -#define RB_ID_FW_VERSION 6 -#define RB_ID_SOFT_07 7 -#define RB_ID_SOFT_08 8 -#define RB_ID_BOOT_PROTOCOL 9 -#define RB_ID_SOFT_10 10 -#define RB_ID_SOFT_11 11 - -/* - * UART_SPEED values - */ -#define RB_UART_SPEED_115200 0 -#define RB_UART_SPEED_57600 1 -#define RB_UART_SPEED_38400 2 -#define RB_UART_SPEED_19200 3 -#define RB_UART_SPEED_9600 4 -#define RB_UART_SPEED_4800 5 -#define RB_UART_SPEED_2400 6 -#define RB_UART_SPEED_1200 7 - -/* - * BOOT_DELAY values - */ -#define RB_BOOT_DELAY_0SEC 0 -#define RB_BOOT_DELAY_1SEC 1 -#define RB_BOOT_DELAY_2SEC 2 - -/* - * BOOT_DEVICE values - */ -#define RB_BOOT_DEVICE_ETHER 0 -#define RB_BOOT_DEVICE_NANDETH 1 -#define RB_BOOT_DEVICE_ETHONCE 2 -#define RB_BOOT_DEVICE_NANDONLY 3 - -/* - * BOOT_KEY values - */ -#define RB_BOOT_KEY_ANY 0 -#define RB_BOOT_KEY_DEL 1 - -/* - * CPU_MODE values - */ -#define RB_CPU_MODE_POWERSAVE 0 -#define RB_CPU_MODE_REGULAR 1 - -/* - * BOOT_PROTOCOL values - */ -#define RB_BOOT_PROTOCOL_BOOTP 0 -#define RB_BOOT_PROTOCOL_DHCP 1 - -#endif /* _ROUTERBOOT_H */ diff --git a/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/zynos.h b/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/zynos.h deleted file mode 100644 index ba372d3d3e..0000000000 --- a/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/zynos.h +++ /dev/null @@ -1,78 +0,0 @@ -/* - * $Id$ - * - * Copyright (C) 2007 OpenWrt.org - * Copyright (C) 2007 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ - -#ifndef _ZYNOS_H -#define _ZYNOS_H - -#define ZYNOS_NAME_LEN 32 -#define ZYNOS_FEAT_BYTES 22 -#define ZYNOS_MAC_LEN 6 - -struct zynos_board_info { - unsigned char vendor[ZYNOS_NAME_LEN]; - unsigned char product[ZYNOS_NAME_LEN]; - u32 bootext_addr; - u32 res0; - u16 board_id; - u8 res1[6]; - u8 feat_other[ZYNOS_FEAT_BYTES]; - u8 feat_main; - u8 res2; - u8 mac[ZYNOS_MAC_LEN]; - u8 country; - u8 dbgflag; -} __attribute__ ((packed)); - -/* - * Vendor IDs - */ -#define ZYNOS_VENDOR_ID_ZYXEL 0 -#define ZYNOS_VENDOR_ID_NETGEAR 1 -#define ZYNOS_VENDOR_ID_DLINK 2 -#define ZYNOS_VENDOR_ID_OTHER 3 -#define ZYNOS_VENDOR_ID_LUCENT 4 - -/* - * Vendor names - */ -#define ZYNOS_VENDOR_DLINK "D-Link" -#define ZYNOS_VENDOR_LUCENT "LUCENT" -#define ZYNOS_VENDOR_NETGEAR "NetGear" -#define ZYNOS_VENDOR_ZYXEL "ZyXEL" - -/* - * Board IDs (big-endian) - */ -#define ZYNOS_BOARD_ES2108 0x00F2 /* Ethernet Switch 2108 */ -#define ZYNOS_BOARD_ES2108F 0x01AF /* Ethernet Switch 2108-F */ -#define ZYNOS_BOARD_ES2108G 0x00F3 /* Ethernet Switch 2108-G */ -#define ZYNOS_BOARD_ES2108LC 0x00FC /* Ethernet Switch 2108-LC */ -#define ZYNOS_BOARD_ES2108PWR 0x00F4 /* Ethernet Switch 2108PWR */ -#define ZYNOS_BOARD_HS100 0x9FF1 /* HomeSafe 100/100W */ -#define ZYNOS_BOARD_P334 0x9FF5 /* Prestige 334 */ -#define ZYNOS_BOARD_P334U 0x9FDD /* Prestige 334U */ -#define ZYNOS_BOARD_P334W 0x9FF3 /* Prestige 334W */ -#define ZYNOS_BOARD_P334WH 0x00E0 /* Prestige 334WH */ -#define ZYNOS_BOARD_P334WHD 0x00E1 /* Prestige 334WHD */ -#define ZYNOS_BOARD_P334WT 0x9FEF /* Prestige 334WT */ -#define ZYNOS_BOARD_P335 0x9FED /* Prestige 335/335WT */ -#define ZYNOS_BOARD_P335PLUS 0x0025 /* Prestige 335Plus */ -#define ZYNOS_BOARD_P335U 0x9FDC /* Prestige 335U */ - -/* - * Some magic numbers (big-endian) - */ -#define ZYNOS_MAGIC_DBGAREA1 0x48646267 /* "Hdbg" */ -#define ZYNOS_MAGIC_DBGAREA2 0x61726561 /* "area" */ - -#endif /* _ZYNOS_H */ diff --git a/target/linux/adm5120-2.6/image/Makefile b/target/linux/adm5120-2.6/image/Makefile deleted file mode 100644 index 9c7b9bd7be..0000000000 --- a/target/linux/adm5120-2.6/image/Makefile +++ /dev/null @@ -1,100 +0,0 @@ -# -# Copyright (C) 2006 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# -include $(TOPDIR)/rules.mk -include $(INCLUDE_DIR)/image.mk - -define Build/Compile - rm -f $(KDIR)/loader.gz $(KDIR)/loader-edimax.gz - $(MAKE) -C lzma-loader \ - BUILD_DIR="$(KDIR)" \ - TARGET="$(KDIR)" \ - install - echo -ne "\\x00" >> $(KDIR)/loader.gz - $(MAKE) -C lzma-loader \ - BUILD_DIR="$(KDIR)" \ - TARGET="$(KDIR)" \ - LOADER=loader-edimax \ - BZ_STARTUP_ORG=0x6D8 \ - install - echo -ne "\\x00" >> $(KDIR)/loader-edimax.gz -endef - -define Build/Clean - $(MAKE) -C lzma-loader clean -endef - -define Image/Prepare - cat $(KDIR)/vmlinux | $(STAGING_DIR)/bin/lzma e -si -so -eos -lc1 -lp2 -pb2 > $(KDIR)/vmlinux.lzma -endef - -define trxalign/jffs2-128k --a 0x20000 -endef -define trxalign/jffs2-64k --a 0x10000 -endef -define trxalign/squashfs --a 1024 -endef - -define Image/Build/Compex - $(CP) $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1).trx $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(3)-$(2).trx -endef - -define Image/Build/Edimax - $(STAGING_DIR)/bin/mkcsysimg -B $(4) -d -w \ - -r $(KDIR)/loader-edimax.gz \ - -x $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1)-noloader.trx \ - $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(3)-$(2).bin -endef - -define Image/Build/MyLoader - $(CP) $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1)-noloader.trx $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(3)-$(2).trx - $(STAGING_DIR)/bin/mkmylofw -B $(4) \ - -p0x20000:0x10000:ahp:0x80001000 \ - -p0x30000:0 \ - -b0x20000:0x10000:h:$(KDIR)/loader.gz \ - -b0x30000:0::$(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(3)-$(2).trx \ - $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(3)-$(2).bin -endef - -define Image/Build/RouterBoard - $(CP) $(KDIR)/vmlinux.elf $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-vmlinux -endef - -define Image/Build - $(STAGING_DIR)/bin/trx -o $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1).trx -f $(KDIR)/loader.gz -f $(KDIR)/vmlinux.lzma $(call trxalign/$(1)) -f $(KDIR)/root.$(1) - $(STAGING_DIR)/bin/trx -o $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1)-noloader.trx -f $(KDIR)/vmlinux.lzma $(call trxalign/$(1)) -f $(KDIR)/root.$(1) -ifneq ($(1),jffs2-128K) - $(call Image/Build/Compex,$(1),wp54g-wrt,$(patsubst jffs2-%,jffs2,$(1))) - $(call Image/Build/Edimax,$(1),br-6104k,$(patsubst jffs2-%,jffs2,$(1)),BR-6104K) - $(call Image/Build/Edimax,$(1),br-6104kp,$(patsubst jffs2-%,jffs2,$(1)),BR-6104KP) - $(call Image/Build/Edimax,$(1),br-6114wg,$(patsubst jffs2-%,jffs2,$(1)),BR-6114WG) - $(call Image/Build/Edimax,$(1),br-6524k,$(patsubst jffs2-%,jffs2,$(1)),BR-6524K) - $(call Image/Build/Edimax,$(1),br-6524kp,$(patsubst jffs2-%,jffs2,$(1)),BR-6524KP) - $(call Image/Build/Edimax,$(1),br-6541k,$(patsubst jffs2-%,jffs2,$(1)),BR-6541K) - $(call Image/Build/Edimax,$(1),br-6541kp,$(patsubst jffs2-%,jffs2,$(1)),BR-6541KP) - $(call Image/Build/Edimax,$(1),ew-7207apg,$(patsubst jffs2-%,jffs2,$(1)),EW-7207APg) - $(call Image/Build/Edimax,$(1),ps-1205uwg,$(patsubst jffs2-%,jffs2,$(1)),PS-1205UWg) - $(call Image/Build/Edimax,$(1),ps-3205u,$(patsubst jffs2-%,jffs2,$(1)),PS-3205U) - $(call Image/Build/Edimax,$(1),ps-3205uwg,$(patsubst jffs2-%,jffs2,$(1)),PS-3205UWg) - $(call Image/Build/Edimax,$(1),br-6524wg,$(patsubst jffs2-%,jffs2,$(1)),BR-6524WG) - $(call Image/Build/Edimax,$(1),br-6524wp,$(patsubst jffs2-%,jffs2,$(1)),BR-6524WP) - $(call Image/Build/MyLoader,$(1),np27g,$(patsubst jffs2-%,jffs2,$(1)),NP27G) - $(call Image/Build/MyLoader,$(1),np28g,$(patsubst jffs2-%,jffs2,$(1)),NP28G) - $(call Image/Build/MyLoader,$(1),np28ghs,$(patsubst jffs2-%,jffs2,$(1)),NP28GHS) - $(call Image/Build/MyLoader,$(1),wp54g,$(patsubst jffs2-%,jffs2,$(1)),WP54G) - $(call Image/Build/MyLoader,$(1),wp54ag,$(patsubst jffs2-%,jffs2,$(1)),WP54AG) - $(call Image/Build/MyLoader,$(1),wpp54g,$(patsubst jffs2-%,jffs2,$(1)),WPP54G) - $(call Image/Build/MyLoader,$(1),wpp54ag,$(patsubst jffs2-%,jffs2,$(1)),WPP54AG) -endif -ifeq ($(1),tgz) - $(call Image/Build/RouterBoard) -endif -endef - -$(eval $(call BuildImage)) diff --git a/target/linux/adm5120-2.6/image/lzma-loader/Makefile b/target/linux/adm5120-2.6/image/lzma-loader/Makefile deleted file mode 100644 index 175a1845ce..0000000000 --- a/target/linux/adm5120-2.6/image/lzma-loader/Makefile +++ /dev/null @@ -1,38 +0,0 @@ -# -# Copyright (C) 2006 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# -# $Id: Makefile 4439 2006-08-04 17:14:36Z nbd $ - -include $(TOPDIR)/rules.mk - -LOADER := loader -BZ_STARTUP_ORG := 0 - -PKG_NAME := lzma-loader -PKG_BUILD_DIR := $(BUILD_DIR)/$(PKG_NAME) - -$(PKG_BUILD_DIR)/.prepared: - mkdir $(PKG_BUILD_DIR) - $(CP) ./src/* $(PKG_BUILD_DIR)/ - touch $@ - -$(PKG_BUILD_DIR)/$(LOADER).gz: $(PKG_BUILD_DIR)/.prepared - $(MAKE) -C $(PKG_BUILD_DIR) CC="$(TARGET_CC)" \ - LD="$(TARGET_CROSS)ld" CROSS_COMPILE="$(TARGET_CROSS)" \ - LOADER=$(LOADER) BZ_STARTUP_ORG=$(BZ_STARTUP_ORG) - -download: -prepare: $(PKG_BUILD_DIR)/.prepared -compile: $(PKG_BUILD_DIR)/$(LOADER).gz -install: - -ifneq ($(TARGET),) -install: compile - $(CP) $(PKG_BUILD_DIR)/$(LOADER).gz $(PKG_BUILD_DIR)/$(LOADER).elf $(PKG_BUILD_DIR)/$(LOADER).bin $(TARGET)/ -endif - -clean: - rm -rf $(PKG_BUILD_DIR) diff --git a/target/linux/adm5120-2.6/image/lzma-loader/src/LzmaDecode.c b/target/linux/adm5120-2.6/image/lzma-loader/src/LzmaDecode.c deleted file mode 100644 index 951700bddf..0000000000 --- a/target/linux/adm5120-2.6/image/lzma-loader/src/LzmaDecode.c +++ /dev/null @@ -1,663 +0,0 @@ -/* - LzmaDecode.c - LZMA Decoder - - LZMA SDK 4.05 Copyright (c) 1999-2004 Igor Pavlov (2004-08-25) - http://www.7-zip.org/ - - LZMA SDK is licensed under two licenses: - 1) GNU Lesser General Public License (GNU LGPL) - 2) Common Public License (CPL) - It means that you can select one of these two licenses and - follow rules of that license. - - SPECIAL EXCEPTION: - Igor Pavlov, as the author of this code, expressly permits you to - statically or dynamically link your code (or bind by name) to the - interfaces of this file without subjecting your linked code to the - terms of the CPL or GNU LGPL. Any modifications or additions - to this file, however, are subject to the LGPL or CPL terms. -*/ - -#include "LzmaDecode.h" - -#ifndef Byte -#define Byte unsigned char -#endif - -#define kNumTopBits 24 -#define kTopValue ((UInt32)1 << kNumTopBits) - -#define kNumBitModelTotalBits 11 -#define kBitModelTotal (1 << kNumBitModelTotalBits) -#define kNumMoveBits 5 - -typedef struct _CRangeDecoder -{ - Byte *Buffer; - Byte *BufferLim; - UInt32 Range; - UInt32 Code; - #ifdef _LZMA_IN_CB - ILzmaInCallback *InCallback; - int Result; - #endif - int ExtraBytes; -} CRangeDecoder; - -Byte RangeDecoderReadByte(CRangeDecoder *rd) -{ - if (rd->Buffer == rd->BufferLim) - { - #ifdef _LZMA_IN_CB - UInt32 size; - rd->Result = rd->InCallback->Read(rd->InCallback, &rd->Buffer, &size); - rd->BufferLim = rd->Buffer + size; - if (size == 0) - #endif - { - rd->ExtraBytes = 1; - return 0xFF; - } - } - return (*rd->Buffer++); -} - -/* #define ReadByte (*rd->Buffer++) */ -#define ReadByte (RangeDecoderReadByte(rd)) - -void RangeDecoderInit(CRangeDecoder *rd, - #ifdef _LZMA_IN_CB - ILzmaInCallback *inCallback - #else - Byte *stream, UInt32 bufferSize - #endif - ) -{ - int i; - #ifdef _LZMA_IN_CB - rd->InCallback = inCallback; - rd->Buffer = rd->BufferLim = 0; - #else - rd->Buffer = stream; - rd->BufferLim = stream + bufferSize; - #endif - rd->ExtraBytes = 0; - rd->Code = 0; - rd->Range = (0xFFFFFFFF); - for(i = 0; i < 5; i++) - rd->Code = (rd->Code << 8) | ReadByte; -} - -#define RC_INIT_VAR UInt32 range = rd->Range; UInt32 code = rd->Code; -#define RC_FLUSH_VAR rd->Range = range; rd->Code = code; -#define RC_NORMALIZE if (range < kTopValue) { range <<= 8; code = (code << 8) | ReadByte; } - -UInt32 RangeDecoderDecodeDirectBits(CRangeDecoder *rd, int numTotalBits) -{ - RC_INIT_VAR - UInt32 result = 0; - int i; - for (i = numTotalBits; i > 0; i--) - { - /* UInt32 t; */ - range >>= 1; - - result <<= 1; - if (code >= range) - { - code -= range; - result |= 1; - } - /* - t = (code - range) >> 31; - t &= 1; - code -= range & (t - 1); - result = (result + result) | (1 - t); - */ - RC_NORMALIZE - } - RC_FLUSH_VAR - return result; -} - -int RangeDecoderBitDecode(CProb *prob, CRangeDecoder *rd) -{ - UInt32 bound = (rd->Range >> kNumBitModelTotalBits) * *prob; - if (rd->Code < bound) - { - rd->Range = bound; - *prob += (kBitModelTotal - *prob) >> kNumMoveBits; - if (rd->Range < kTopValue) - { - rd->Code = (rd->Code << 8) | ReadByte; - rd->Range <<= 8; - } - return 0; - } - else - { - rd->Range -= bound; - rd->Code -= bound; - *prob -= (*prob) >> kNumMoveBits; - if (rd->Range < kTopValue) - { - rd->Code = (rd->Code << 8) | ReadByte; - rd->Range <<= 8; - } - return 1; - } -} - -#define RC_GET_BIT2(prob, mi, A0, A1) \ - UInt32 bound = (range >> kNumBitModelTotalBits) * *prob; \ - if (code < bound) \ - { A0; range = bound; *prob += (kBitModelTotal - *prob) >> kNumMoveBits; mi <<= 1; } \ - else \ - { A1; range -= bound; code -= bound; *prob -= (*prob) >> kNumMoveBits; mi = (mi + mi) + 1; } \ - RC_NORMALIZE - -#define RC_GET_BIT(prob, mi) RC_GET_BIT2(prob, mi, ; , ;) - -int RangeDecoderBitTreeDecode(CProb *probs, int numLevels, CRangeDecoder *rd) -{ - int mi = 1; - int i; - #ifdef _LZMA_LOC_OPT - RC_INIT_VAR - #endif - for(i = numLevels; i > 0; i--) - { - #ifdef _LZMA_LOC_OPT - CProb *prob = probs + mi; - RC_GET_BIT(prob, mi) - #else - mi = (mi + mi) + RangeDecoderBitDecode(probs + mi, rd); - #endif - } - #ifdef _LZMA_LOC_OPT - RC_FLUSH_VAR - #endif - return mi - (1 << numLevels); -} - -int RangeDecoderReverseBitTreeDecode(CProb *probs, int numLevels, CRangeDecoder *rd) -{ - int mi = 1; - int i; - int symbol = 0; - #ifdef _LZMA_LOC_OPT - RC_INIT_VAR - #endif - for(i = 0; i < numLevels; i++) - { - #ifdef _LZMA_LOC_OPT - CProb *prob = probs + mi; - RC_GET_BIT2(prob, mi, ; , symbol |= (1 << i)) - #else - int bit = RangeDecoderBitDecode(probs + mi, rd); - mi = mi + mi + bit; - symbol |= (bit << i); - #endif - } - #ifdef _LZMA_LOC_OPT - RC_FLUSH_VAR - #endif - return symbol; -} - -Byte LzmaLiteralDecode(CProb *probs, CRangeDecoder *rd) -{ - int symbol = 1; - #ifdef _LZMA_LOC_OPT - RC_INIT_VAR - #endif - do - { - #ifdef _LZMA_LOC_OPT - CProb *prob = probs + symbol; - RC_GET_BIT(prob, symbol) - #else - symbol = (symbol + symbol) | RangeDecoderBitDecode(probs + symbol, rd); - #endif - } - while (symbol < 0x100); - #ifdef _LZMA_LOC_OPT - RC_FLUSH_VAR - #endif - return symbol; -} - -Byte LzmaLiteralDecodeMatch(CProb *probs, CRangeDecoder *rd, Byte matchByte) -{ - int symbol = 1; - #ifdef _LZMA_LOC_OPT - RC_INIT_VAR - #endif - do - { - int bit; - int matchBit = (matchByte >> 7) & 1; - matchByte <<= 1; - #ifdef _LZMA_LOC_OPT - { - CProb *prob = probs + ((1 + matchBit) << 8) + symbol; - RC_GET_BIT2(prob, symbol, bit = 0, bit = 1) - } - #else - bit = RangeDecoderBitDecode(probs + ((1 + matchBit) << 8) + symbol, rd); - symbol = (symbol << 1) | bit; - #endif - if (matchBit != bit) - { - while (symbol < 0x100) - { - #ifdef _LZMA_LOC_OPT - CProb *prob = probs + symbol; - RC_GET_BIT(prob, symbol) - #else - symbol = (symbol + symbol) | RangeDecoderBitDecode(probs + symbol, rd); - #endif - } - break; - } - } - while (symbol < 0x100); - #ifdef _LZMA_LOC_OPT - RC_FLUSH_VAR - #endif - return symbol; -} - -#define kNumPosBitsMax 4 -#define kNumPosStatesMax (1 << kNumPosBitsMax) - -#define kLenNumLowBits 3 -#define kLenNumLowSymbols (1 << kLenNumLowBits) -#define kLenNumMidBits 3 -#define kLenNumMidSymbols (1 << kLenNumMidBits) -#define kLenNumHighBits 8 -#define kLenNumHighSymbols (1 << kLenNumHighBits) - -#define LenChoice 0 -#define LenChoice2 (LenChoice + 1) -#define LenLow (LenChoice2 + 1) -#define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits)) -#define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits)) -#define kNumLenProbs (LenHigh + kLenNumHighSymbols) - -int LzmaLenDecode(CProb *p, CRangeDecoder *rd, int posState) -{ - if(RangeDecoderBitDecode(p + LenChoice, rd) == 0) - return RangeDecoderBitTreeDecode(p + LenLow + - (posState << kLenNumLowBits), kLenNumLowBits, rd); - if(RangeDecoderBitDecode(p + LenChoice2, rd) == 0) - return kLenNumLowSymbols + RangeDecoderBitTreeDecode(p + LenMid + - (posState << kLenNumMidBits), kLenNumMidBits, rd); - return kLenNumLowSymbols + kLenNumMidSymbols + - RangeDecoderBitTreeDecode(p + LenHigh, kLenNumHighBits, rd); -} - -#define kNumStates 12 - -#define kStartPosModelIndex 4 -#define kEndPosModelIndex 14 -#define kNumFullDistances (1 << (kEndPosModelIndex >> 1)) - -#define kNumPosSlotBits 6 -#define kNumLenToPosStates 4 - -#define kNumAlignBits 4 -#define kAlignTableSize (1 << kNumAlignBits) - -#define kMatchMinLen 2 - -#define IsMatch 0 -#define IsRep (IsMatch + (kNumStates << kNumPosBitsMax)) -#define IsRepG0 (IsRep + kNumStates) -#define IsRepG1 (IsRepG0 + kNumStates) -#define IsRepG2 (IsRepG1 + kNumStates) -#define IsRep0Long (IsRepG2 + kNumStates) -#define PosSlot (IsRep0Long + (kNumStates << kNumPosBitsMax)) -#define SpecPos (PosSlot + (kNumLenToPosStates << kNumPosSlotBits)) -#define Align (SpecPos + kNumFullDistances - kEndPosModelIndex) -#define LenCoder (Align + kAlignTableSize) -#define RepLenCoder (LenCoder + kNumLenProbs) -#define Literal (RepLenCoder + kNumLenProbs) - -#if Literal != LZMA_BASE_SIZE -StopCompilingDueBUG -#endif - -#ifdef _LZMA_OUT_READ - -typedef struct _LzmaVarState -{ - CRangeDecoder RangeDecoder; - Byte *Dictionary; - UInt32 DictionarySize; - UInt32 DictionaryPos; - UInt32 GlobalPos; - UInt32 Reps[4]; - int lc; - int lp; - int pb; - int State; - int PreviousIsMatch; - int RemainLen; -} LzmaVarState; - -int LzmaDecoderInit( - unsigned char *buffer, UInt32 bufferSize, - int lc, int lp, int pb, - unsigned char *dictionary, UInt32 dictionarySize, - #ifdef _LZMA_IN_CB - ILzmaInCallback *inCallback - #else - unsigned char *inStream, UInt32 inSize - #endif - ) -{ - LzmaVarState *vs = (LzmaVarState *)buffer; - CProb *p = (CProb *)(buffer + sizeof(LzmaVarState)); - UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + lp)); - UInt32 i; - if (bufferSize < numProbs * sizeof(CProb) + sizeof(LzmaVarState)) - return LZMA_RESULT_NOT_ENOUGH_MEM; - vs->Dictionary = dictionary; - vs->DictionarySize = dictionarySize; - vs->DictionaryPos = 0; - vs->GlobalPos = 0; - vs->Reps[0] = vs->Reps[1] = vs->Reps[2] = vs->Reps[3] = 1; - vs->lc = lc; - vs->lp = lp; - vs->pb = pb; - vs->State = 0; - vs->PreviousIsMatch = 0; - vs->RemainLen = 0; - dictionary[dictionarySize - 1] = 0; - for (i = 0; i < numProbs; i++) - p[i] = kBitModelTotal >> 1; - RangeDecoderInit(&vs->RangeDecoder, - #ifdef _LZMA_IN_CB - inCallback - #else - inStream, inSize - #endif - ); - return LZMA_RESULT_OK; -} - -int LzmaDecode(unsigned char *buffer, - unsigned char *outStream, UInt32 outSize, - UInt32 *outSizeProcessed) -{ - LzmaVarState *vs = (LzmaVarState *)buffer; - CProb *p = (CProb *)(buffer + sizeof(LzmaVarState)); - CRangeDecoder rd = vs->RangeDecoder; - int state = vs->State; - int previousIsMatch = vs->PreviousIsMatch; - Byte previousByte; - UInt32 rep0 = vs->Reps[0], rep1 = vs->Reps[1], rep2 = vs->Reps[2], rep3 = vs->Reps[3]; - UInt32 nowPos = 0; - UInt32 posStateMask = (1 << (vs->pb)) - 1; - UInt32 literalPosMask = (1 << (vs->lp)) - 1; - int lc = vs->lc; - int len = vs->RemainLen; - UInt32 globalPos = vs->GlobalPos; - - Byte *dictionary = vs->Dictionary; - UInt32 dictionarySize = vs->DictionarySize; - UInt32 dictionaryPos = vs->DictionaryPos; - - if (len == -1) - { - *outSizeProcessed = 0; - return LZMA_RESULT_OK; - } - - while(len > 0 && nowPos < outSize) - { - UInt32 pos = dictionaryPos - rep0; - if (pos >= dictionarySize) - pos += dictionarySize; - outStream[nowPos++] = dictionary[dictionaryPos] = dictionary[pos]; - if (++dictionaryPos == dictionarySize) - dictionaryPos = 0; - len--; - } - if (dictionaryPos == 0) - previousByte = dictionary[dictionarySize - 1]; - else - previousByte = dictionary[dictionaryPos - 1]; -#else - -int LzmaDecode( - Byte *buffer, UInt32 bufferSize, - int lc, int lp, int pb, - #ifdef _LZMA_IN_CB - ILzmaInCallback *inCallback, - #else - unsigned char *inStream, UInt32 inSize, - #endif - unsigned char *outStream, UInt32 outSize, - UInt32 *outSizeProcessed) -{ - UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + lp)); - CProb *p = (CProb *)buffer; - CRangeDecoder rd; - UInt32 i; - int state = 0; - int previousIsMatch = 0; - Byte previousByte = 0; - UInt32 rep0 = 1, rep1 = 1, rep2 = 1, rep3 = 1; - UInt32 nowPos = 0; - UInt32 posStateMask = (1 << pb) - 1; - UInt32 literalPosMask = (1 << lp) - 1; - int len = 0; - if (bufferSize < numProbs * sizeof(CProb)) - return LZMA_RESULT_NOT_ENOUGH_MEM; - for (i = 0; i < numProbs; i++) - p[i] = kBitModelTotal >> 1; - RangeDecoderInit(&rd, - #ifdef _LZMA_IN_CB - inCallback - #else - inStream, inSize - #endif - ); -#endif - - *outSizeProcessed = 0; - while(nowPos < outSize) - { - int posState = (int)( - (nowPos - #ifdef _LZMA_OUT_READ - + globalPos - #endif - ) - & posStateMask); - #ifdef _LZMA_IN_CB - if (rd.Result != LZMA_RESULT_OK) - return rd.Result; - #endif - if (rd.ExtraBytes != 0) - return LZMA_RESULT_DATA_ERROR; - if (RangeDecoderBitDecode(p + IsMatch + (state << kNumPosBitsMax) + posState, &rd) == 0) - { - CProb *probs = p + Literal + (LZMA_LIT_SIZE * - ((( - (nowPos - #ifdef _LZMA_OUT_READ - + globalPos - #endif - ) - & literalPosMask) << lc) + (previousByte >> (8 - lc)))); - - if (state < 4) state = 0; - else if (state < 10) state -= 3; - else state -= 6; - if (previousIsMatch) - { - Byte matchByte; - #ifdef _LZMA_OUT_READ - UInt32 pos = dictionaryPos - rep0; - if (pos >= dictionarySize) - pos += dictionarySize; - matchByte = dictionary[pos]; - #else - matchByte = outStream[nowPos - rep0]; - #endif - previousByte = LzmaLiteralDecodeMatch(probs, &rd, matchByte); - previousIsMatch = 0; - } - else - previousByte = LzmaLiteralDecode(probs, &rd); - outStream[nowPos++] = previousByte; - #ifdef _LZMA_OUT_READ - dictionary[dictionaryPos] = previousByte; - if (++dictionaryPos == dictionarySize) - dictionaryPos = 0; - #endif - } - else - { - previousIsMatch = 1; - if (RangeDecoderBitDecode(p + IsRep + state, &rd) == 1) - { - if (RangeDecoderBitDecode(p + IsRepG0 + state, &rd) == 0) - { - if (RangeDecoderBitDecode(p + IsRep0Long + (state << kNumPosBitsMax) + posState, &rd) == 0) - { - #ifdef _LZMA_OUT_READ - UInt32 pos; - #endif - if ( - (nowPos - #ifdef _LZMA_OUT_READ - + globalPos - #endif - ) - == 0) - return LZMA_RESULT_DATA_ERROR; - state = state < 7 ? 9 : 11; - #ifdef _LZMA_OUT_READ - pos = dictionaryPos - rep0; - if (pos >= dictionarySize) - pos += dictionarySize; - previousByte = dictionary[pos]; - dictionary[dictionaryPos] = previousByte; - if (++dictionaryPos == dictionarySize) - dictionaryPos = 0; - #else - previousByte = outStream[nowPos - rep0]; - #endif - outStream[nowPos++] = previousByte; - continue; - } - } - else - { - UInt32 distance; - if(RangeDecoderBitDecode(p + IsRepG1 + state, &rd) == 0) - distance = rep1; - else - { - if(RangeDecoderBitDecode(p + IsRepG2 + state, &rd) == 0) - distance = rep2; - else - { - distance = rep3; - rep3 = rep2; - } - rep2 = rep1; - } - rep1 = rep0; - rep0 = distance; - } - len = LzmaLenDecode(p + RepLenCoder, &rd, posState); - state = state < 7 ? 8 : 11; - } - else - { - int posSlot; - rep3 = rep2; - rep2 = rep1; - rep1 = rep0; - state = state < 7 ? 7 : 10; - len = LzmaLenDecode(p + LenCoder, &rd, posState); - posSlot = RangeDecoderBitTreeDecode(p + PosSlot + - ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) << - kNumPosSlotBits), kNumPosSlotBits, &rd); - if (posSlot >= kStartPosModelIndex) - { - int numDirectBits = ((posSlot >> 1) - 1); - rep0 = ((2 | ((UInt32)posSlot & 1)) << numDirectBits); - if (posSlot < kEndPosModelIndex) - { - rep0 += RangeDecoderReverseBitTreeDecode( - p + SpecPos + rep0 - posSlot - 1, numDirectBits, &rd); - } - else - { - rep0 += RangeDecoderDecodeDirectBits(&rd, - numDirectBits - kNumAlignBits) << kNumAlignBits; - rep0 += RangeDecoderReverseBitTreeDecode(p + Align, kNumAlignBits, &rd); - } - } - else - rep0 = posSlot; - rep0++; - } - if (rep0 == (UInt32)(0)) - { - /* it's for stream version */ - len = -1; - break; - } - if (rep0 > nowPos - #ifdef _LZMA_OUT_READ - + globalPos - #endif - ) - { - return LZMA_RESULT_DATA_ERROR; - } - len += kMatchMinLen; - do - { - #ifdef _LZMA_OUT_READ - UInt32 pos = dictionaryPos - rep0; - if (pos >= dictionarySize) - pos += dictionarySize; - previousByte = dictionary[pos]; - dictionary[dictionaryPos] = previousByte; - if (++dictionaryPos == dictionarySize) - dictionaryPos = 0; - #else - previousByte = outStream[nowPos - rep0]; - #endif - outStream[nowPos++] = previousByte; - len--; - } - while(len > 0 && nowPos < outSize); - } - } - - #ifdef _LZMA_OUT_READ - vs->RangeDecoder = rd; - vs->DictionaryPos = dictionaryPos; - vs->GlobalPos = globalPos + nowPos; - vs->Reps[0] = rep0; - vs->Reps[1] = rep1; - vs->Reps[2] = rep2; - vs->Reps[3] = rep3; - vs->State = state; - vs->PreviousIsMatch = previousIsMatch; - vs->RemainLen = len; - #endif - - *outSizeProcessed = nowPos; - return LZMA_RESULT_OK; -} diff --git a/target/linux/adm5120-2.6/image/lzma-loader/src/LzmaDecode.h b/target/linux/adm5120-2.6/image/lzma-loader/src/LzmaDecode.h deleted file mode 100644 index f58944e3c3..0000000000 --- a/target/linux/adm5120-2.6/image/lzma-loader/src/LzmaDecode.h +++ /dev/null @@ -1,100 +0,0 @@ -/* - LzmaDecode.h - LZMA Decoder interface - - LZMA SDK 4.05 Copyright (c) 1999-2004 Igor Pavlov (2004-08-25) - http://www.7-zip.org/ - - LZMA SDK is licensed under two licenses: - 1) GNU Lesser General Public License (GNU LGPL) - 2) Common Public License (CPL) - It means that you can select one of these two licenses and - follow rules of that license. - - SPECIAL EXCEPTION: - Igor Pavlov, as the author of this code, expressly permits you to - statically or dynamically link your code (or bind by name) to the - interfaces of this file without subjecting your linked code to the - terms of the CPL or GNU LGPL. Any modifications or additions - to this file, however, are subject to the LGPL or CPL terms. -*/ - -#ifndef __LZMADECODE_H -#define __LZMADECODE_H - -/* #define _LZMA_IN_CB */ -/* Use callback for input data */ - -/* #define _LZMA_OUT_READ */ -/* Use read function for output data */ - -/* #define _LZMA_PROB32 */ -/* It can increase speed on some 32-bit CPUs, - but memory usage will be doubled in that case */ - -/* #define _LZMA_LOC_OPT */ -/* Enable local speed optimizations inside code */ - -#ifndef UInt32 -#ifdef _LZMA_UINT32_IS_ULONG -#define UInt32 unsigned long -#else -#define UInt32 unsigned int -#endif -#endif - -#ifdef _LZMA_PROB32 -#define CProb UInt32 -#else -#define CProb unsigned short -#endif - -#define LZMA_RESULT_OK 0 -#define LZMA_RESULT_DATA_ERROR 1 -#define LZMA_RESULT_NOT_ENOUGH_MEM 2 - -#ifdef _LZMA_IN_CB -typedef struct _ILzmaInCallback -{ - int (*Read)(void *object, unsigned char **buffer, UInt32 *bufferSize); -} ILzmaInCallback; -#endif - -#define LZMA_BASE_SIZE 1846 -#define LZMA_LIT_SIZE 768 - -/* -bufferSize = (LZMA_BASE_SIZE + (LZMA_LIT_SIZE << (lc + lp)))* sizeof(CProb) -bufferSize += 100 in case of _LZMA_OUT_READ -by default CProb is unsigned short, -but if specify _LZMA_PROB_32, CProb will be UInt32(unsigned int) -*/ - -#ifdef _LZMA_OUT_READ -int LzmaDecoderInit( - unsigned char *buffer, UInt32 bufferSize, - int lc, int lp, int pb, - unsigned char *dictionary, UInt32 dictionarySize, - #ifdef _LZMA_IN_CB - ILzmaInCallback *inCallback - #else - unsigned char *inStream, UInt32 inSize - #endif -); -#endif - -int LzmaDecode( - unsigned char *buffer, - #ifndef _LZMA_OUT_READ - UInt32 bufferSize, - int lc, int lp, int pb, - #ifdef _LZMA_IN_CB - ILzmaInCallback *inCallback, - #else - unsigned char *inStream, UInt32 inSize, - #endif - #endif - unsigned char *outStream, UInt32 outSize, - UInt32 *outSizeProcessed); - -#endif diff --git a/target/linux/adm5120-2.6/image/lzma-loader/src/Makefile b/target/linux/adm5120-2.6/image/lzma-loader/src/Makefile deleted file mode 100644 index e94be307da..0000000000 --- a/target/linux/adm5120-2.6/image/lzma-loader/src/Makefile +++ /dev/null @@ -1,72 +0,0 @@ -# -# Makefile for Broadcom BCM947XX boards -# -# Copyright 2001-2003, Broadcom Corporation -# All Rights Reserved. -# -# THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY -# KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM -# SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS -# FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. -# -# Copyright 2004 Manuel Novoa III -# Modified to support bzip'd kernels. -# Of course, it would be better to integrate bunzip capability into CFE. -# -# Copyright 2005 Oleg I. Vdovikin -# Cleaned up, modified for lzma support, removed from kernel -# -# Copyright 2007 Gabor Juhos -# Modified to support user defined entry point address. -# Added support for make targets with different names -# - -LOADADDR := 0x80001000 -BZ_TEXT_START := 0x80300000 -BZ_STARTUP_ORG := 0 -LOADER := loader - -OBJCOPY := $(CROSS_COMPILE)objcopy -O binary -R .reginfo -R .note -R .comment -R .mdebug -S - -CFLAGS = -D__KERNEL__ -Wall -Wstrict-prototypes -Wno-trigraphs -Os \ - -fno-strict-aliasing -fno-common -fomit-frame-pointer -G 0 -mno-abicalls -fno-pic \ - -ffunction-sections -pipe -mlong-calls -fno-common \ - -mabi=32 -march=mips32 -Wa,-32 -Wa,-march=mips32 -Wa,-mips32 -Wa,--trap -CFLAGS += -DLOADADDR=$(LOADADDR) -D_LZMA_IN_CB - -ASFLAGS = $(CFLAGS) -D__ASSEMBLY__ -DBZ_STARTUP_ORG=$(BZ_STARTUP_ORG) - -LDFLAGS = -static --gc-sections -no-warn-mismatch -LDFLAGS += -e startup -Ttext $(BZ_TEXT_START) -T loader.lds.in - -OBJECTS := $(LOADER)-head.o decompress.o LzmaDecode.o - -all: $(LOADER).gz $(LOADER).elf - -# Don't build dependencies, this may die if $(CC) isn't gcc -dep: - -install: - -decompress.o: - $(CC) $(CFLAGS) -c decompress.c -o $@ - -$(LOADER)-head.o: - $(CC) $(ASFLAGS) -c head.S -o $@ - -$(LOADER).gz: $(LOADER).bin - gzip -nc9 $< > $@ - -$(LOADER).elf: $(LOADER).o - cp $< $@ - -$(LOADER).bin: $(LOADER).o - $(OBJCOPY) -O binary $< $@ - -$(LOADER).o: $(OBJECTS) - $(LD) $(LDFLAGS) -o $@ $(OBJECTS) - -mrproper: clean - -clean: - rm -f *.gz *.elf *.bin *.o diff --git a/target/linux/adm5120-2.6/image/lzma-loader/src/README b/target/linux/adm5120-2.6/image/lzma-loader/src/README deleted file mode 100644 index 16649e9500..0000000000 --- a/target/linux/adm5120-2.6/image/lzma-loader/src/README +++ /dev/null @@ -1,55 +0,0 @@ -/* - * LZMA compressed kernel decompressor for bcm947xx boards - * - * Copyright (C) 2005 by Oleg I. Vdovikin - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - -The code is intended to decompress kernel, being compressed using lzma utility -build using 7zip LZMA SDK. This utility is located in the LZMA_Alone directory - -decompressor code expects that your .trx file consist of three partitions: - -1) decompressor itself (this is gziped code which pmon/cfe will extract and run -on boot-up instead of real kernel) -2) LZMA compressed kernel (both streamed and regular modes are supported now) -3) Root filesystem - -Please be sure to apply the following patch for use this new trx layout (it will -allow using both new and old trx files for root filesystem lookup code) - ---- linuz/arch/mips/brcm-boards/bcm947xx/setup.c 2005-01-23 19:24:27.503322896 +0300 -+++ linux/arch/mips/brcm-boards/bcm947xx/setup.c 2005-01-23 19:29:05.237100944 +0300 -@@ -221,7 +221,9 @@ - /* Try looking at TRX header for rootfs offset */ - if (le32_to_cpu(trx->magic) == TRX_MAGIC) { - bcm947xx_parts[1].offset = off; -- if (le32_to_cpu(trx->offsets[1]) > off) -+ if (le32_to_cpu(trx->offsets[2]) > off) -+ off = le32_to_cpu(trx->offsets[2]); -+ else if (le32_to_cpu(trx->offsets[1]) > off) - off = le32_to_cpu(trx->offsets[1]); - continue; - } - - -Revision history: - 0.02 Initial release - 0.03 Added Mineharu Takahara patch to pass actual - output size to decoder (stream mode compressed input is not - a requirement anymore) - 0.04 Reordered functions using lds script diff --git a/target/linux/adm5120-2.6/image/lzma-loader/src/decompress.c b/target/linux/adm5120-2.6/image/lzma-loader/src/decompress.c deleted file mode 100644 index ec63ccb651..0000000000 --- a/target/linux/adm5120-2.6/image/lzma-loader/src/decompress.c +++ /dev/null @@ -1,241 +0,0 @@ -/* - * LZMA compressed kernel decompressor for bcm947xx boards - * - * Copyright (C) 2005 by Oleg I. Vdovikin - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - * - * Please note, this was code based on the bunzip2 decompressor code - * by Manuel Novoa III (mjn3@codepoet.org), although the only thing left - * is an idea and part of original vendor code - * - * - * 12-Mar-2005 Mineharu Takahara - * pass actual output size to decoder (stream mode - * compressed input is not a requirement anymore) - * - * 24-Apr-2005 Oleg I. Vdovikin - * reordered functions using lds script, removed forward decl - * - * 24-Mar-2007 Gabor Juhos - * pass original values of the a0,a1,a2,a3 registers to the kernel - * - */ - -#include "LzmaDecode.h" - -#define BCM4710_FLASH 0x1fc00000 /* Flash */ - -#define KSEG0 0x80000000 -#define KSEG1 0xa0000000 - -#define KSEG1ADDR(a) ((((unsigned)(a)) & 0x1fffffffU) | KSEG1) - -#define Index_Invalidate_I 0x00 -#define Index_Writeback_Inv_D 0x01 - -#define cache_unroll(base,op) \ - __asm__ __volatile__( \ - ".set noreorder;\n" \ - ".set mips3;\n" \ - "cache %1, (%0);\n" \ - ".set mips0;\n" \ - ".set reorder\n" \ - : \ - : "r" (base), \ - "i" (op)); - -static __inline__ void blast_icache(unsigned long size, unsigned long lsize) -{ - unsigned long start = KSEG0; - unsigned long end = (start + size); - - while(start < end) { - cache_unroll(start,Index_Invalidate_I); - start += lsize; - } -} - -static __inline__ void blast_dcache(unsigned long size, unsigned long lsize) -{ - unsigned long start = KSEG0; - unsigned long end = (start + size); - - while(start < end) { - cache_unroll(start,Index_Writeback_Inv_D); - start += lsize; - } -} - -#define TRX_MAGIC 0x30524448 /* "HDR0" */ - -struct trx_header { - unsigned int magic; /* "HDR0" */ - unsigned int len; /* Length of file including header */ - unsigned int crc32; /* 32-bit CRC from flag_version to end of file */ - unsigned int flag_version; /* 0:15 flags, 16:31 version */ - unsigned int offsets[3]; /* Offsets of partitions from start of header */ -}; - -/* beyound the image end, size not known in advance */ -extern unsigned char workspace[]; - -unsigned int offset; -unsigned char *data; - -typedef void (*kernel_entry)(unsigned long reg_a0, unsigned long reg_a1, - unsigned long reg_a2, unsigned long reg_a3); - -/* flash access should be aligned, so wrapper is used */ -/* read byte from the flash, all accesses are 32-bit aligned */ -static int read_byte(void *object, unsigned char **buffer, UInt32 *bufferSize) -{ - static unsigned int val; - - if (((unsigned int)offset % 4) == 0) { - val = *(unsigned int *)data; - data += 4; - } - - *bufferSize = 1; - *buffer = ((unsigned char *)&val) + (offset++ & 3); - - return LZMA_RESULT_OK; -} - -static __inline__ unsigned char get_byte(void) -{ - unsigned char *buffer; - UInt32 fake; - - return read_byte(0, &buffer, &fake), *buffer; -} - -int uart_write_str(char * str); - -/* should be the first function */ -void decompress_entry(unsigned long reg_a0, unsigned long reg_a1, - unsigned long reg_a2, unsigned long reg_a3, - unsigned long icache_size, unsigned long icache_lsize, - unsigned long dcache_size, unsigned long dcache_lsize) -{ - unsigned int i; /* temp value */ - unsigned int lc; /* literal context bits */ - unsigned int lp; /* literal pos state bits */ - unsigned int pb; /* pos state bits */ - unsigned int osize; /* uncompressed size */ - - ILzmaInCallback callback; - callback.Read = read_byte; - - uart_write_str("decompress kernel ... "); - - /* look for trx header, 32-bit data access */ - for (data = ((unsigned char *) KSEG1ADDR(BCM4710_FLASH)); - ((struct trx_header *)data)->magic != TRX_MAGIC; data += 65536); - - /* compressed kernel is in the partition 0 or 1 */ - if (((struct trx_header *)data)->offsets[1] > 65536) - data += ((struct trx_header *)data)->offsets[0]; - else - data += ((struct trx_header *)data)->offsets[1]; - - offset = 0; - - /* lzma args */ - i = get_byte(); - lc = i % 9, i = i / 9; - lp = i % 5, pb = i / 5; - - /* skip rest of the LZMA coder property */ - for (i = 0; i < 4; i++) - get_byte(); - - /* read the lower half of uncompressed size in the header */ - osize = ((unsigned int)get_byte()) + - ((unsigned int)get_byte() << 8) + - ((unsigned int)get_byte() << 16) + - ((unsigned int)get_byte() << 24); - - /* skip rest of the header (upper half of uncompressed size) */ - for (i = 0; i < 4; i++) - get_byte(); - - /* decompress kernel */ - if (LzmaDecode(workspace, ~0, lc, lp, pb, &callback, - (unsigned char*)LOADADDR, osize, &i) == LZMA_RESULT_OK) - { - blast_dcache(dcache_size, dcache_lsize); - blast_icache(icache_size, icache_lsize); - - /* Jump to load address */ - uart_write_str("ok\r\n"); - ((kernel_entry) LOADADDR)(reg_a0, reg_a1, reg_a2, reg_a3); - } - uart_write_str("failed\r\n"); - while (1 ); -} - -/* ********************************************************************* - * - * ADM5120 UART driver File: dev_adm_uart.c - * - * This is a console device driver for an ADM5120 UART - * - ********************************************************************* - * - * Copyright 2006 - * Compex Systems. All rights reserved. - * - ********************************************************************* */ - -#define READCSR(r) *(volatile UInt32 *)(0xB2600000+(r)) -#define WRITECSR(r,v) *(volatile UInt32 *)(0xB2600000+(r)) = v - -#define UART_DR_REG 0x00 -#define UART_FR_REG 0x18 -#define UART_TX_FIFO_FULL 0x20 - -int uart_write(int val) -{ - WRITECSR(UART_DR_REG, val); - while ( (READCSR(UART_FR_REG) & UART_TX_FIFO_FULL) ); - return 0; -} - -int uart_write_str(char * str) -{ - while ( *str != 0 ) { - uart_write ( *str++ ); - } - return 0; -} - -int uart_write_hex(int val) -{ - int i; - int tmp; - - uart_write_str("0x"); - for ( i=0 ; i<8 ; i++ ) { - tmp = (val >> ((7-i) * 4 )) & 0xf; - tmp = tmp < 10 ? (tmp + '0') : (tmp + 'A' - 10); - uart_write(tmp); - } - uart_write_str("\r\n"); - return 0; -} - diff --git a/target/linux/adm5120-2.6/image/lzma-loader/src/decompress.lds.in b/target/linux/adm5120-2.6/image/lzma-loader/src/decompress.lds.in deleted file mode 100644 index e69de29bb2..0000000000 diff --git a/target/linux/adm5120-2.6/image/lzma-loader/src/head.S b/target/linux/adm5120-2.6/image/lzma-loader/src/head.S deleted file mode 100644 index 3bfab9ff1b..0000000000 --- a/target/linux/adm5120-2.6/image/lzma-loader/src/head.S +++ /dev/null @@ -1,194 +0,0 @@ -/* Copyright 2007 Gabor Juhos */ -/* keep original values of the a0,a1,a2,a3 registers */ -/* modifed to support user defined entry point address */ -/* Copyright 2005 Oleg I. Vdovikin (oleg@cs.msu.su) */ -/* cache manipulation adapted from Broadcom code */ -/* idea taken from original bunzip2 decompressor code */ -/* Copyright 2004 Manuel Novoa III (mjn3@codepoet.org) */ -/* Licensed under the linux kernel's version of the GPL.*/ - -#include -#include - -#define KSEG0 0x80000000 - -#define C0_CONFIG $16 -#define C0_TAGLO $28 -#define C0_TAGHI $29 - -#define CONF1_DA_SHIFT 7 /* D$ associativity */ -#define CONF1_DA_MASK 0x00000380 -#define CONF1_DA_BASE 1 -#define CONF1_DL_SHIFT 10 /* D$ line size */ -#define CONF1_DL_MASK 0x00001c00 -#define CONF1_DL_BASE 2 -#define CONF1_DS_SHIFT 13 /* D$ sets/way */ -#define CONF1_DS_MASK 0x0000e000 -#define CONF1_DS_BASE 64 -#define CONF1_IA_SHIFT 16 /* I$ associativity */ -#define CONF1_IA_MASK 0x00070000 -#define CONF1_IA_BASE 1 -#define CONF1_IL_SHIFT 19 /* I$ line size */ -#define CONF1_IL_MASK 0x00380000 -#define CONF1_IL_BASE 2 -#define CONF1_IS_SHIFT 22 /* Instruction cache sets/way */ -#define CONF1_IS_MASK 0x01c00000 -#define CONF1_IS_BASE 64 - -#define Index_Invalidate_I 0x00 -#define Index_Writeback_Inv_D 0x01 - - .text - -#if (BZ_STARTUP_ORG) - .set noreorder - - b startup - nop - - .org BZ_STARTUP_ORG -#endif - -LEAF(startup) - .set noreorder - - move t1, ra # save return address - la t0, __reloc_label # get linked address of label - bal __reloc_label # branch and link to label to - nop # get actual address -__reloc_label: - subu t0, ra, t0 # get reloc_delta - move ra, t1 # restore return address - - beqz t0, __reloc_end # if delta is 0 we are in the right place - nop - - /* Copy our code to the right place */ - la t1, _code_start # get linked address of _code_start - la t2, _code_end # get linked address of _code_end - addu t0, t0, t1 # calculate actual address of _code_start - -__reloc_copy: - lw t3, 0(t0) - sw t3, 0(t1) - add t1, 4 - blt t1, t2, __reloc_copy - add t0, 4 - -__reloc_end: - - /* At this point we need to invalidate dcache and */ - /* icache before jumping to new code */ - -1: /* Get cache sizes */ - .set mips32 - mfc0 s0,C0_CONFIG,1 - .set mips0 - - li s1,CONF1_DL_MASK - and s1,s0 - beq s1,zero,nodc - nop - - srl s1,CONF1_DL_SHIFT - li t0,CONF1_DL_BASE - sll s1,t0,s1 /* s1 has D$ cache line size */ - - li s2,CONF1_DA_MASK - and s2,s0 - srl s2,CONF1_DA_SHIFT - addiu s2,CONF1_DA_BASE /* s2 now has D$ associativity */ - - li t0,CONF1_DS_MASK - and t0,s0 - srl t0,CONF1_DS_SHIFT - li s3,CONF1_DS_BASE - sll s3,s3,t0 /* s3 has D$ sets per way */ - - multu s2,s3 /* sets/way * associativity */ - mflo t0 /* total cache lines */ - - multu s1,t0 /* D$ linesize * lines */ - mflo s2 /* s2 is now D$ size in bytes */ - - /* Initilize the D$: */ - mtc0 zero,C0_TAGLO - mtc0 zero,C0_TAGHI - - li t0,KSEG0 /* Just an address for the first $ line */ - addu t1,t0,s2 /* + size of cache == end */ - - .set mips3 -1: cache Index_Writeback_Inv_D,0(t0) - .set mips0 - bne t0,t1,1b - addu t0,s1 - -nodc: - /* Now we get to do it all again for the I$ */ - - move s3,zero /* just in case there is no icache */ - move s4,zero - - li t0,CONF1_IL_MASK - and t0,s0 - beq t0,zero,noic - nop - - srl t0,CONF1_IL_SHIFT - li s3,CONF1_IL_BASE - sll s3,t0 /* s3 has I$ cache line size */ - - li t0,CONF1_IA_MASK - and t0,s0 - srl t0,CONF1_IA_SHIFT - addiu s4,t0,CONF1_IA_BASE /* s4 now has I$ associativity */ - - li t0,CONF1_IS_MASK - and t0,s0 - srl t0,CONF1_IS_SHIFT - li s5,CONF1_IS_BASE - sll s5,t0 /* s5 has I$ sets per way */ - - multu s4,s5 /* sets/way * associativity */ - mflo t0 /* s4 is now total cache lines */ - - multu s3,t0 /* I$ linesize * lines */ - mflo s4 /* s4 is cache size in bytes */ - - /* Initilize the I$: */ - mtc0 zero,C0_TAGLO - mtc0 zero,C0_TAGHI - - li t0,KSEG0 /* Just an address for the first $ line */ - addu t1,t0,s4 /* + size of cache == end */ - - .set mips3 -1: cache Index_Invalidate_I,0(t0) - .set mips0 - bne t0,t1,1b - addu t0,s3 - -noic: - /* Setup new "C" stack */ - la sp, _stack - - addiu sp, -32 /* reserve stack for parameters */ -#if 0 - sw a0, 0(sp) - sw a1, 4(sp) - sw a2, 8(sp) - sw a3, 12(sp) -#endif - sw s3, 16(sp) /* icache line size */ - sw s4, 20(sp) /* icache size */ - sw s1, 24(sp) /* dcache line size */ - sw s2, 28(sp) /* dcache size */ - - /* jump to the decompressor routine */ - la t0, decompress_entry - jr t0 - nop - - .set reorder -END(startup) diff --git a/target/linux/adm5120-2.6/image/lzma-loader/src/loader.lds.in b/target/linux/adm5120-2.6/image/lzma-loader/src/loader.lds.in deleted file mode 100644 index 8c1bb9bd6a..0000000000 --- a/target/linux/adm5120-2.6/image/lzma-loader/src/loader.lds.in +++ /dev/null @@ -1,27 +0,0 @@ -OUTPUT_ARCH(mips) -SECTIONS { - .text : { - _code_start = .; - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - _code_end = .; - } - - .data : { - *(.data) - *(.data.*) - } - - .bss : { - *(.bss) - *(.bss.*) - } - - . = ALIGN(16); - . = . + 8192; - _stack = .; - - workspace = .; -} diff --git a/target/linux/adm5120-2.6/patches/001-adm5120.patch b/target/linux/adm5120-2.6/patches/001-adm5120.patch deleted file mode 100644 index 925ef3c91c..0000000000 --- a/target/linux/adm5120-2.6/patches/001-adm5120.patch +++ /dev/null @@ -1,90 +0,0 @@ -diff -urN linux-2.6.19.2/arch/mips/Kconfig linux-2.6.19.2.new/arch/mips/Kconfig ---- linux-2.6.19.2/arch/mips/Kconfig 2007-01-10 20:10:37.000000000 +0100 -+++ linux-2.6.19.2.new/arch/mips/Kconfig 2007-01-23 14:49:38.000000000 +0100 -@@ -12,6 +12,19 @@ - prompt "System type" - default SGI_IP22 - -+config MIPS_ADM5120 -+ bool "Support for ADM5120 SoC" -+ select SYS_HAS_CPU_MIPS32_R1 -+ select DMA_NONCOHERENT -+ select HW_HAS_PCI -+ select SYS_SUPPORTS_LITTLE_ENDIAN -+ select SYS_SUPPORTS_BIG_ENDIAN -+ select SYS_SUPPORTS_32BIT_KERNEL -+ -+config PCI_ADM5120 -+ bool "Add PCI control support for ADM5120" -+ depends on MIPS_ADM5120 && PCI -+ - config MIPS_MTX1 - bool "4G Systems MTX-1 board" - select DMA_NONCOHERENT -diff -urN linux-2.6.19.2/arch/mips/Makefile linux-2.6.19.2.new/arch/mips/Makefile ---- linux-2.6.19.2/arch/mips/Makefile 2007-01-23 14:02:57.000000000 +0100 -+++ linux-2.6.19.2.new/arch/mips/Makefile 2007-01-23 14:49:39.000000000 +0100 -@@ -165,6 +165,14 @@ - load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000 - - # -+# ADMtek 5120 -+# -+ -+core-$(CONFIG_MIPS_ADM5120) += arch/mips/adm5120/ -+cflags-$(CONFIG_MIPS_ADM5120) += -Iinclude/asm-mips/mach-adm5120 -+load-$(CONFIG_MIPS_ADM5120) += 0xffffffff80001000 -+ -+# - # Common Alchemy Au1x00 stuff - # - core-$(CONFIG_SOC_AU1X00) += arch/mips/au1000/common/ -diff -urN linux-2.6.19.2/arch/mips/pci/Makefile linux-2.6.19.2.new/arch/mips/pci/Makefile ---- linux-2.6.19.2/arch/mips/pci/Makefile 2007-01-10 20:10:37.000000000 +0100 -+++ linux-2.6.19.2.new/arch/mips/pci/Makefile 2007-01-23 14:49:40.000000000 +0100 -@@ -53,3 +53,4 @@ - obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o - obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o - obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o -+obj-$(CONFIG_PCI_ADM5120) += ops-adm5120.o pci-adm5120.o -diff -urN linux-2.6.19.2/include/asm-mips/bootinfo.h linux-2.6.19.2.new/include/asm-mips/bootinfo.h ---- linux-2.6.19.2/include/asm-mips/bootinfo.h 2007-01-10 20:10:37.000000000 +0100 -+++ linux-2.6.19.2.new/include/asm-mips/bootinfo.h 2007-01-23 14:49:40.000000000 +0100 -@@ -212,6 +212,37 @@ - #define MACH_GROUP_NEC_EMMA2RH 25 /* NEC EMMA2RH (was 23) */ - #define MACH_NEC_MARKEINS 0 /* NEC EMMA2RH Mark-eins */ - -+/* -+ * Valid machtype for group ADMtek ADM5120 -+ */ -+#define MACH_GROUP_ADM5120 23 -+#define MACH_ADM5120_UNKNOWN 0 /* Unknown board */ -+#define MACH_ADM5120_WP54G_WRT 1 /* Compex WP54G-WRT */ -+#define MACH_ADM5120_WP54G 2 /* Compex WP54G */ -+#define MACH_ADM5120_WP54AG 3 /* Compex WP54AG */ -+#define MACH_ADM5120_WPP54G 4 /* Compex WPP54G */ -+#define MACH_ADM5120_WPP54AG 5 /* Compex WPP54AG */ -+#define MACH_ADM5120_NP28G 6 /* Compex NP28G */ -+#define MACH_ADM5120_NP28GHS 7 /* Compex NP28G HotSpot */ -+#define MACH_ADM5120_NP27G 8 /* Compex NP27G */ -+#define MACH_ADM5120_WP54Gv1C 9 /* Compex WP54G version 1C */ -+#define MACH_ADM5120_RB_111 10 /* Mikrotik RouterBOARD 111 */ -+#define MACH_ADM5120_RB_112 11 /* Mikrotik RouterBOARD 112 */ -+#define MACH_ADM5120_RB_133 12 /* Mikrotik RouterBOARD 133 */ -+#define MACH_ADM5120_RB_133C 13 /* Mikrotik RouterBOARD 133c */ -+#define MACH_ADM5120_RB_150 14 /* Mikrotik RouterBOARD 150 */ -+#define MACH_ADM5120_RB_153 15 /* Mikrotik RouterBOARD 153 */ -+#define MACH_ADM5120_HS100 16 /* ZyXEL HomeSafe 100/100W */ -+#define MACH_ADM5120_P334 17 /* ZyXEL Prestige 334 */ -+#define MACH_ADM5120_P334U 18 /* ZyXEL Prestige 334U */ -+#define MACH_ADM5120_P334W 18 /* ZyXEL Prestige 334W */ -+#define MACH_ADM5120_P334WH 19 /* ZyXEL Prestige 334WH */ -+#define MACH_ADM5120_P334WHD 20 /* ZyXEL Prestige 334WHD */ -+#define MACH_ADM5120_P334WT 21 /* ZyXEL Prestige 334WT */ -+#define MACH_ADM5120_P335 22 /* ZyXEL Prestige 335/335WT */ -+#define MACH_ADM5120_P335PLUS 23 /* ZyXEL Prestige 335Plus */ -+#define MACH_ADM5120_P335U 24 /* ZyXEL Prestige 335U */ -+ - #define CL_SIZE COMMAND_LINE_SIZE - - const char *get_system_type(void); diff --git a/target/linux/adm5120-2.6/patches/002-adm5120_flash.patch b/target/linux/adm5120-2.6/patches/002-adm5120_flash.patch deleted file mode 100644 index 503a49567c..0000000000 --- a/target/linux/adm5120-2.6/patches/002-adm5120_flash.patch +++ /dev/null @@ -1,25 +0,0 @@ -diff -urN linux-2.6.19.2/drivers/mtd/maps/Kconfig linux-2.6.19.2-adm5120/drivers/mtd/maps/Kconfig ---- linux-2.6.19.2/drivers/mtd/maps/Kconfig 2007-01-10 20:10:37.000000000 +0100 -+++ linux-2.6.19.2-adm5120/drivers/mtd/maps/Kconfig 2007-01-23 01:13:39.000000000 +0100 -@@ -622,5 +622,10 @@ - - This selection automatically selects the map_ram driver. - -+config MTD_ADM5120 -+ tristate "Map driver for ADMtek ADM5120 boards" -+ depends on MIPS_ADM5120 -+ select MTD_CFI_AMDSTD -+ - endmenu - -diff -urN linux-2.6.19.2/drivers/mtd/maps/Makefile linux-2.6.19.2-adm5120/drivers/mtd/maps/Makefile ---- linux-2.6.19.2/drivers/mtd/maps/Makefile 2007-01-10 20:10:37.000000000 +0100 -+++ linux-2.6.19.2-adm5120/drivers/mtd/maps/Makefile 2007-01-23 01:20:52.000000000 +0100 -@@ -43,6 +43,7 @@ - obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o - obj-$(CONFIG_MTD_PCI) += pci.o - obj-$(CONFIG_MTD_ALCHEMY) += alchemy-flash.o -+obj-$(CONFIG_MTD_ADM5120) += adm5120_mtd.o - obj-$(CONFIG_MTD_LASAT) += lasat.o - obj-$(CONFIG_MTD_AUTCPU12) += autcpu12-nvram.o - obj-$(CONFIG_MTD_EDB7312) += edb7312.o diff --git a/target/linux/adm5120-2.6/patches/003-adm5120_switch.patch b/target/linux/adm5120-2.6/patches/003-adm5120_switch.patch deleted file mode 100644 index f6fec30bca..0000000000 --- a/target/linux/adm5120-2.6/patches/003-adm5120_switch.patch +++ /dev/null @@ -1,25 +0,0 @@ -diff -urN linux-2.6.19.2/drivers/net/Kconfig linux-2.6.19.2-adm5120/drivers/net/Kconfig ---- linux-2.6.19.2/drivers/net/Kconfig 2007-01-10 20:10:37.000000000 +0100 -+++ linux-2.6.19.2-adm5120/drivers/net/Kconfig 2007-01-23 01:13:39.000000000 +0100 -@@ -450,6 +450,10 @@ - If you have an Alchemy Semi AU1X00 based system - say Y. Otherwise, say N. - -+config MIPS_ADM5120_ENET -+ tristate "MIPS ADM5120 Ethernet switch support" -+ depends on NET_ETHERNET && MIPS_ADM5120 -+ - config NET_SB1250_MAC - tristate "SB1250 Ethernet support" - depends on NET_ETHERNET && SIBYTE_SB1xxx_SOC -diff -urN linux-2.6.19.2/drivers/net/Makefile linux-2.6.19.2-adm5120/drivers/net/Makefile ---- linux-2.6.19.2/drivers/net/Makefile 2007-01-10 20:10:37.000000000 +0100 -+++ linux-2.6.19.2-adm5120/drivers/net/Makefile 2007-01-23 01:13:39.000000000 +0100 -@@ -164,6 +164,7 @@ - # This is also a 82596 and should probably be merged - obj-$(CONFIG_LP486E) += lp486e.o - -+obj-$(CONFIG_MIPS_ADM5120_ENET) += adm5120sw.o - obj-$(CONFIG_ETH16I) += eth16i.o - obj-$(CONFIG_ZORRO8390) += zorro8390.o 8390.o - obj-$(CONFIG_HPLANCE) += hplance.o 7990.o diff --git a/target/linux/adm5120-2.6/patches/004-adm5120_uart.patch b/target/linux/adm5120-2.6/patches/004-adm5120_uart.patch deleted file mode 100644 index 6f2ef7bb36..0000000000 --- a/target/linux/adm5120-2.6/patches/004-adm5120_uart.patch +++ /dev/null @@ -1,50 +0,0 @@ -diff -urN linux-2.6.19.2/drivers/serial/Kconfig linux-2.6.19.2-adm5120/drivers/serial/Kconfig ---- linux-2.6.19.2/drivers/serial/Kconfig 2007-01-10 20:10:37.000000000 +0100 -+++ linux-2.6.19.2-adm5120/drivers/serial/Kconfig 2007-01-23 01:13:39.000000000 +0100 -@@ -246,6 +246,22 @@ - - comment "Non-8250 serial port support" - -+config SERIAL_ADM5120 -+ bool "ADM5120 serial port support" -+ depends on MIPS_ADM5120 -+ select SERIAL_CORE -+ select SERIAL_CORE_CONSOLE -+ help -+ Driver for the on chip UARTs on the ADM5120 SoC -+ -+config ADM5120_NR_UARTS -+ int "Maximum number of ADM5120 serial ports" -+ depends on SERIAL_ADM5120 -+ default "2" -+ ---help--- -+ Set this to the number of serial ports you want the driver to -+ support. -+ - config SERIAL_AMBA_PL010 - tristate "ARM AMBA PL010 serial port support" - depends on ARM_AMBA && (BROKEN || !ARCH_VERSATILE) -diff -urN linux-2.6.19.2/drivers/serial/Makefile linux-2.6.19.2-adm5120/drivers/serial/Makefile ---- linux-2.6.19.2/drivers/serial/Makefile 2007-01-10 20:10:37.000000000 +0100 -+++ linux-2.6.19.2-adm5120/drivers/serial/Makefile 2007-01-23 01:21:45.000000000 +0100 -@@ -20,6 +20,7 @@ - obj-$(CONFIG_SERIAL_8250_HUB6) += 8250_hub6.o - obj-$(CONFIG_SERIAL_8250_MCA) += 8250_mca.o - obj-$(CONFIG_SERIAL_8250_AU1X00) += 8250_au1x00.o -+obj-$(CONFIG_SERIAL_ADM5120) += adm5120_uart.o - obj-$(CONFIG_SERIAL_AMBA_PL010) += amba-pl010.o - obj-$(CONFIG_SERIAL_AMBA_PL011) += amba-pl011.o - obj-$(CONFIG_SERIAL_CLPS711X) += clps711x.o -diff -urN linux-2.6.19.2/include/linux/serial_core.h linux-2.6.19.2-adm5120/include/linux/serial_core.h ---- linux-2.6.19.2/include/linux/serial_core.h 2007-01-10 20:10:37.000000000 +0100 -+++ linux-2.6.19.2-adm5120/include/linux/serial_core.h 2007-01-23 01:13:39.000000000 +0100 -@@ -133,6 +133,9 @@ - #define PORT_S3C2412 73 - - -+/* ADMtek ADM5120 SoC */ -+#define PORT_ADM5120 68 -+ - #ifdef __KERNEL__ - - #include diff --git a/target/linux/adm5120-2.6/patches/005-adm5120_usb.patch b/target/linux/adm5120-2.6/patches/005-adm5120_usb.patch deleted file mode 100644 index 40e4fbedf4..0000000000 --- a/target/linux/adm5120-2.6/patches/005-adm5120_usb.patch +++ /dev/null @@ -1,53 +0,0 @@ -diff -urN linux-2.6.19.2/drivers/usb/core/hub.c linux-2.6.19.2-adm5120/drivers/usb/core/hub.c ---- linux-2.6.19.2/drivers/usb/core/hub.c 2007-01-10 20:10:37.000000000 +0100 -+++ linux-2.6.19.2-adm5120/drivers/usb/core/hub.c 2007-01-23 01:13:39.000000000 +0100 -@@ -2156,6 +2156,8 @@ - USB_DT_DEVICE << 8, 0, - buf, GET_DESCRIPTOR_BUFSIZE, - (i ? USB_CTRL_GET_TIMEOUT : 1000)); -+printk(KERN_CRIT "usb_control_msg: %d %d %d (%d)\n", r, buf->bMaxPacketSize0, -+buf->bDescriptorType, USB_DT_DEVICE); - switch (buf->bMaxPacketSize0) { - case 8: case 16: case 32: case 64: case 255: - if (buf->bDescriptorType == -diff -urN linux-2.6.19.2/drivers/usb/host/Kconfig linux-2.6.19.2-adm5120/drivers/usb/host/Kconfig ---- linux-2.6.19.2/drivers/usb/host/Kconfig 2007-01-10 20:10:37.000000000 +0100 -+++ linux-2.6.19.2-adm5120/drivers/usb/host/Kconfig 2007-01-23 01:13:39.000000000 +0100 -@@ -192,3 +192,6 @@ - To compile this driver as a module, choose M here: the - module will be called "sl811_cs". - -+config USB_ADM5120_HCD -+ tristate "ADM5120 HCD support" -+ depends on USB && MIPS_ADM5120 -diff -urN linux-2.6.19.2/drivers/usb/host/Makefile linux-2.6.19.2-adm5120/drivers/usb/host/Makefile ---- linux-2.6.19.2/drivers/usb/host/Makefile 2007-01-10 20:10:37.000000000 +0100 -+++ linux-2.6.19.2-adm5120/drivers/usb/host/Makefile 2007-01-23 01:13:39.000000000 +0100 -@@ -16,3 +16,4 @@ - obj-$(CONFIG_USB_SL811_CS) += sl811_cs.o - obj-$(CONFIG_USB_U132_HCD) += u132-hcd.o - obj-$(CONFIG_ETRAX_ARCH_V10) += hc_crisv10.o -+obj-$(CONFIG_USB_ADM5120_HCD) += adm5120-hcd.o -diff -urN linux-2.6.19.2/drivers/usb/Kconfig linux-2.6.19.2-adm5120/drivers/usb/Kconfig ---- linux-2.6.19.2/drivers/usb/Kconfig 2007-01-10 20:10:37.000000000 +0100 -+++ linux-2.6.19.2-adm5120/drivers/usb/Kconfig 2007-01-23 01:13:39.000000000 +0100 -@@ -91,8 +91,6 @@ - - source "drivers/usb/net/Kconfig" - --source "drivers/usb/mon/Kconfig" -- - comment "USB port drivers" - depends on USB - -diff -urN linux-2.6.19.2/drivers/usb/Makefile linux-2.6.19.2-adm5120/drivers/usb/Makefile ---- linux-2.6.19.2/drivers/usb/Makefile 2007-01-10 20:10:37.000000000 +0100 -+++ linux-2.6.19.2-adm5120/drivers/usb/Makefile 2007-01-23 01:22:18.000000000 +0100 -@@ -17,6 +17,7 @@ - obj-$(CONFIG_USB_U132_HCD) += host/ - obj-$(CONFIG_ETRAX_USB_HOST) += host/ - obj-$(CONFIG_USB_OHCI_AT91) += host/ -+obj-$(CONFIG_USB_ADM5120_HCD) += host/ - - obj-$(CONFIG_USB_ACM) += class/ - obj-$(CONFIG_USB_PRINTER) += class/ diff --git a/target/linux/adm5120-2.6/patches/006-adm5120_gpio.patch b/target/linux/adm5120-2.6/patches/006-adm5120_gpio.patch deleted file mode 100644 index 593743d7ba..0000000000 --- a/target/linux/adm5120-2.6/patches/006-adm5120_gpio.patch +++ /dev/null @@ -1,25 +0,0 @@ -diff -urN linux-2.6.19.2/drivers/char/Kconfig linux-2.6.19.2-adm5120/drivers/char/Kconfig ---- linux-2.6.19.2/drivers/char/Kconfig 2007-01-10 20:10:37.000000000 +0100 -+++ linux-2.6.19.2-adm5120/drivers/char/Kconfig 2007-01-23 01:13:39.000000000 +0100 -@@ -1034,7 +1034,9 @@ - The mmtimer device allows direct userspace access to the - Altix system timer. - --source "drivers/char/tpm/Kconfig" -+config ADM5120_GPIO -+ tristate "ADM5120 GPIO" -+ depends on MIPS_ADM5120 - - config TELCLOCK - tristate "Telecom clock driver for MPBL0010 ATCA SBC" -diff -urN linux-2.6.19.2/drivers/char/Makefile linux-2.6.19.2-adm5120/drivers/char/Makefile ---- linux-2.6.19.2/drivers/char/Makefile 2007-01-10 20:10:37.000000000 +0100 -+++ linux-2.6.19.2-adm5120/drivers/char/Makefile 2007-01-23 01:20:01.000000000 +0100 -@@ -90,6 +90,7 @@ - obj-$(CONFIG_GPIO_VR41XX) += vr41xx_giu.o - obj-$(CONFIG_TANBAC_TB0219) += tb0219.o - obj-$(CONFIG_TELCLOCK) += tlclk.o -+obj-$(CONFIG_ADM5120_GPIO) += adm5120_gpio.o - - obj-$(CONFIG_WATCHDOG) += watchdog/ - obj-$(CONFIG_MWAVE) += mwave/ diff --git a/target/linux/adm5120-2.6/patches/100-mtd-myloder-partition-parser.patch b/target/linux/adm5120-2.6/patches/100-mtd-myloder-partition-parser.patch deleted file mode 100644 index 81ec37d05f..0000000000 --- a/target/linux/adm5120-2.6/patches/100-mtd-myloder-partition-parser.patch +++ /dev/null @@ -1,37 +0,0 @@ -diff -Nur linux-2.6.19.2/drivers/mtd/Kconfig.old linux-2.6.19.2/drivers/mtd/Kconfig ---- linux-2.6.19.2/drivers/mtd/Kconfig.old 2007-03-25 08:13:02.000000000 +0200 -+++ linux-2.6.19.2/drivers/mtd/Kconfig 2007-03-26 13:37:47.000000000 +0200 -@@ -157,6 +157,22 @@ - for your particular device. It won't happen automatically. The - 'armflash' map driver (CONFIG_MTD_ARMFLASH) does this, for example. - -+config MTD_MYLOADER_PARTS -+ tristate "MyLoader partition parsing" -+ depends on MIPS_ADM5120 && MTD_PARTITIONS -+ ---help--- -+ MyLoader is a bootloader which allows the user to define partitions -+ in flash devices, by putting a table in the second erase block -+ on the device, similar to a partition table. This table gives the -+ offsets and lengths of the user defined partitions. -+ -+ If you need code which can detect and parse these tables, and -+ register MTD 'partitions' corresponding to each image detected, -+ enable this option. -+ -+ You will still need the parsing functions to be called by the driver -+ for your particular device. It won't happen automatically. -+ - comment "User Modules And Translation Layers" - depends on MTD - -diff -Nur linux-2.6.19.2/drivers/mtd/Makefile.old linux-2.6.19.2/drivers/mtd/Makefile ---- linux-2.6.19.2/drivers/mtd/Makefile.old 2007-01-10 20:10:37.000000000 +0100 -+++ linux-2.6.19.2/drivers/mtd/Makefile 2007-03-26 13:28:23.000000000 +0200 -@@ -12,6 +12,7 @@ - obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o - obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o - obj-$(CONFIG_MTD_AFS_PARTS) += afs.o -+obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o - - # 'Users' - code which presents functionality to userspace. - obj-$(CONFIG_MTD_CHAR) += mtdchar.o diff --git a/target/linux/adm5120-2.6/patches/101-mtd-mxflash.patch b/target/linux/adm5120-2.6/patches/101-mtd-mxflash.patch deleted file mode 100755 index 754a91e09f..0000000000 --- a/target/linux/adm5120-2.6/patches/101-mtd-mxflash.patch +++ /dev/null @@ -1,31 +0,0 @@ ---- linux-2.6.19.2/drivers/mtd/chips/Kconfig.old 2007-01-11 03:10:36.000000000 +0800 -+++ linux-2.6.19.2/drivers/mtd/chips/Kconfig 2007-03-29 14:43:32.000000000 +0800 -@@ -199,6 +199,14 @@ - provides support for one of those command sets, used on chips - including the AMD Am29LV320. - -+config MTD_CFI_AMDSTD_FORCE_BOTTOM_BOOT -+ bool "Force bottom boot for Macronix flash chips" -+ depends on MTD_CFI_AMDSTD -+ help -+ Some Macronix flash chips have wrong CFI info, and the driver may -+ detect the type incorrectly. Select this if the chip part number -+ ends with BTC. -+ - config MTD_CFI_STAA - tristate "Support for ST (Advanced Architecture) flash chips" - depends on MTD_GEN_PROBE ---- linux-2.6.19.2/drivers/mtd/chips/cfi_cmdset_0002.c.old 2007-03-22 16:14:56.000000000 +0800 -+++ linux-2.6.19.2/drivers/mtd/chips/cfi_cmdset_0002.c 2007-03-29 14:07:28.000000000 +0800 -@@ -320,6 +320,11 @@ - cfi_tell_features(extp); - #endif - -+#ifdef CONFIG_MTD_CFI_AMDSTD_FORCE_BOTTOM_BOOT -+ extp->TopBottom = 2; -+ bootloc = extp->TopBottom; -+#endif -+ - bootloc = extp->TopBottom; - if ((bootloc != 2) && (bootloc != 3)) { - printk(KERN_WARNING "%s: CFI does not contain boot " diff --git a/target/linux/adm5120-2.6/patches/140-cmdline_hack.patch b/target/linux/adm5120-2.6/patches/140-cmdline_hack.patch deleted file mode 100644 index d72073dfbb..0000000000 --- a/target/linux/adm5120-2.6/patches/140-cmdline_hack.patch +++ /dev/null @@ -1,50 +0,0 @@ -diff -ur linux.old/arch/mips/kernel/head.S linux.dev/arch/mips/kernel/head.S ---- linux.old/arch/mips/kernel/head.S 2006-12-06 17:30:27.000000000 +0100 -+++ linux.dev/arch/mips/kernel/head.S 2006-12-06 18:34:43.000000000 +0100 -@@ -129,15 +129,20 @@ - #endif - .endm - -- - j kernel_entry - nop -- -+ nop -+ - /* - * Reserved space for exception handlers. - * Necessary for machines which link their kernels at KSEG0. -+ * Use as temporary storage for the kernel command line, so that it -+ * can be updated easily without having to relink the kernel. - */ -- .fill 0x400 -+ -+EXPORT(_image_cmdline) -+ .ascii "CMDLINE:" -+ .fill 0x3ec - - EXPORT(stext) # used for profiling - EXPORT(_stext) -diff -ur linux.old/arch/mips/adm5120/prom.c linux.dev/arch/mips/adm5120/prom.c ---- linux.old/arch/mips/adm5120/prom.c 2006-12-06 17:30:27.000000000 +0100 -+++ linux.dev/arch/mips/adm5120/prom.c 2006-12-06 17:41:40.000000000 +0100 -@@ -100,6 +100,7 @@ - } - - -+extern char _image_cmdline; - /* - * initialize the prom module. - */ -@@ -112,8 +112,10 @@ - mips_machtype = adm5120_board.mach_type; - - /* init command line, register a default kernel command line */ -- strcpy(&(arcs_cmdline[0]), CONFIG_CMDLINE); -+ char *cmd = &_image_cmdline + 8; -+ if( strlen(cmd) > 0) strcpy( &(arcs_cmdline[0]), cmd); -+ else strcpy(&(arcs_cmdline[0]), CONFIG_CMDLINE); - - /* init memory map */ - prom_meminit(); - } diff --git a/target/linux/adm5120-2.6/patches/500-Nand.patch b/target/linux/adm5120-2.6/patches/500-Nand.patch deleted file mode 100644 index 05beb20241..0000000000 --- a/target/linux/adm5120-2.6/patches/500-Nand.patch +++ /dev/null @@ -1,29 +0,0 @@ -diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig -index cfe288a..c528024 100644 ---- a/drivers/mtd/nand/Kconfig -+++ b/drivers/mtd/nand/Kconfig -@@ -55,6 +55,12 @@ config MTD_NAND_TOTO - help - Support for NAND flash on Texas Instruments Toto platform. - -+config MTD_NAND_RB100 -+ tristate "NAND Flash device on RB100 board" -+ depends on MTD_NAND -+ help -+ Support for NAND flash on RB100 platform. -+ - config MTD_NAND_IDS - tristate - -diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile -index 4174202..2be57c1 100644 ---- a/drivers/mtd/nand/Makefile -+++ b/drivers/mtd/nand/Makefile -@@ -8,6 +8,7 @@ obj-$(CONFIG_MTD_NAND_IDS) += nand_ids. - - obj-$(CONFIG_MTD_NAND_SPIA) += spia.o - obj-$(CONFIG_MTD_NAND_TOTO) += toto.o -+obj-$(CONFIG_MTD_NAND_RB100) += rbmipsnand.o - obj-$(CONFIG_MTD_NAND_AUTCPU12) += autcpu12.o - obj-$(CONFIG_MTD_NAND_EDB7312) += edb7312.o - obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o diff --git a/target/linux/adm5120-2.6/profiles/100-Atheros.mk b/target/linux/adm5120-2.6/profiles/100-Atheros.mk deleted file mode 100644 index 029586848f..0000000000 --- a/target/linux/adm5120-2.6/profiles/100-Atheros.mk +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (C) 2006 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# - -define Profile/Atheros - NAME:=Atheros WiFi (default) - PACKAGES:=kmod-madwifi -endef - -define Profile/Atheros/Description - Package set compatible with hardware using Atheros WiFi cards -endef -$(eval $(call Profile,Atheros)) - diff --git a/target/linux/adm5120-2.6/profiles/105-Texas.mk b/target/linux/adm5120-2.6/profiles/105-Texas.mk deleted file mode 100644 index 727a0c0648..0000000000 --- a/target/linux/adm5120-2.6/profiles/105-Texas.mk +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (C) 2006 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# - -define Profile/Texas - NAME:=Texas Instruments WiFi - PACKAGES:=kmod-acx -endef - -define Profile/Texas/Description - Package set compatible with hardware using Texas Instruments WiFi cards -endef -$(eval $(call Profile,Texas)) - diff --git a/target/linux/adm5120-2.6/profiles/110-None.mk b/target/linux/adm5120-2.6/profiles/110-None.mk deleted file mode 100644 index 2fcfacde9f..0000000000 --- a/target/linux/adm5120-2.6/profiles/110-None.mk +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (C) 2006 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# - -define Profile/None - NAME:=No WiFi - PACKAGES:= -endef - -define Profile/None/Description - Package set without WiFi support -endef -$(eval $(call Profile,None)) - diff --git a/target/linux/adm5120-2.6/profiles/RB1xx.mk b/target/linux/adm5120-2.6/profiles/RB1xx.mk deleted file mode 100644 index d832523a26..0000000000 --- a/target/linux/adm5120-2.6/profiles/RB1xx.mk +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (C) 2006 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# - -define Profile/RouterBoard - NAME:=RouterBoard RB1xx - PACKAGES:=kmod-madwifi patch-cmdline wget2nand -endef - -define Profile/RouterBoard/Description - Package set compatible with the RouterBoard RB1xx devices. Contains RouterOS to OpenWrt\\\ - installation scripts. -endef -$(eval $(call Profile,RouterBoard)) diff --git a/target/linux/adm5120eb-2.6/Makefile b/target/linux/adm5120eb-2.6/Makefile deleted file mode 100644 index 21359713d6..0000000000 --- a/target/linux/adm5120eb-2.6/Makefile +++ /dev/null @@ -1,25 +0,0 @@ -# -# Copyright (C) 2006 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# -include $(TOPDIR)/rules.mk - -ARCH:=mips -BOARD:=adm5120eb -BOARDNAME:=ADM5120 (Big Endian) -FEATURES:=squashfs broken pci usb - -define Target/Description - Build firmware images for Infineon/ADMTek ADM5120 based boards running in big-endian mode - (e.g : ZyXEL Prestige 335WT ...) -endef - -include $(INCLUDE_DIR)/kernel-build.mk -DEFAULT_PACKAGES += admswconfig - -# include the profiles --include profiles/*.mk - -$(eval $(call BuildKernel)) diff --git a/target/linux/adm5120eb-2.6/config/default b/target/linux/adm5120eb-2.6/config/default deleted file mode 100644 index ad2a222a78..0000000000 --- a/target/linux/adm5120eb-2.6/config/default +++ /dev/null @@ -1,278 +0,0 @@ -CONFIG_32BIT=y -# CONFIG_64BIT is not set -# CONFIG_64BIT_PHYS_ADDR is not set -CONFIG_ADM5120_GPIO=y -CONFIG_ADM5120_NR_UARTS=2 -CONFIG_BASE_SMALL=0 -CONFIG_BAYCOM_SER_FDX=m -CONFIG_BAYCOM_SER_HDX=m -CONFIG_BINFMT_MISC=m -CONFIG_CIFS_DEBUG2=y -CONFIG_CIFS_EXPERIMENTAL=y -CONFIG_CIFS_STATS2=y -CONFIG_CIFS_WEAK_PW_HASH=y -CONFIG_CIFS_XATTR=y -CONFIG_CMDLINE="console=ttyS0,115200 rootfs=jffs2,squashfs init=/etc/preinit" -CONFIG_CPU_BIG_ENDIAN=y -CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_SYNC=y -# CONFIG_CPU_LITTLE_ENDIAN is not set -CONFIG_CPU_MIPS32=y -CONFIG_CPU_MIPS32_R1=y -# CONFIG_CPU_MIPS32_R2 is not set -# CONFIG_CPU_MIPS64_R1 is not set -# CONFIG_CPU_MIPS64_R2 is not set -CONFIG_CPU_MIPSR1=y -# CONFIG_CPU_NEVADA is not set -# CONFIG_CPU_R10000 is not set -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R4300 is not set -# CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_R8000 is not set -# CONFIG_CPU_RM7000 is not set -# CONFIG_CPU_RM9000 is not set -# CONFIG_CPU_SB1 is not set -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_TX49XX is not set -# CONFIG_CPU_VR41XX is not set -CONFIG_CRYPTO_SHA1=y -# CONFIG_DDB5477 is not set -# CONFIG_DM9000 is not set -CONFIG_DMA_NEED_PCI_MAP_STATE=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_ELF_CORE=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -CONFIG_EXT3_FS_XATTR=y -CONFIG_FIRMWARE_EDID=y -CONFIG_FS_MBCACHE=m -CONFIG_FS_POSIX_ACL=y -CONFIG_GENERIC_ACL=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -# CONFIG_GEN_RTC is not set -CONFIG_HWMON=y -# CONFIG_HWMON_DEBUG_CHIP is not set -CONFIG_HW_HAS_PCI=y -CONFIG_HW_RANDOM=y -CONFIG_HZ=250 -# CONFIG_HZ_100 is not set -# CONFIG_HZ_1024 is not set -# CONFIG_HZ_128 is not set -CONFIG_HZ_250=y -# CONFIG_HZ_256 is not set -# CONFIG_HZ_48 is not set -# CONFIG_I2C is not set -# CONFIG_IDE is not set -CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m -CONFIG_INET_XFRM_MODE_BEET=m -CONFIG_INET_XFRM_MODE_TRANSPORT=m -CONFIG_INET_XFRM_MODE_TUNNEL=m -CONFIG_INITRAMFS_SOURCE="" -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_INPUT=y -# CONFIG_INPUT_EVDEV is not set -CONFIG_IPV6_MIP6=y -CONFIG_IPV6_PRIVACY=y -CONFIG_IPV6_ROUTE_INFO=y -CONFIG_IPV6_TUNNEL=m -CONFIG_IP_NF_NAT_SNMP_BASIC=m -CONFIG_IP_NF_NETBIOS_NS=m -CONFIG_IP_NF_TARGET_CLUSTERIP=m -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_POSIX_ACL=y -CONFIG_JFFS2_FS_SECURITY=y -CONFIG_JFFS2_FS_XATTR=y -CONFIG_JFFS2_SUMMARY=y -# CONFIG_JOLIET is not set -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MACH_JAZZ is not set -# CONFIG_MACH_VR41XX is not set -CONFIG_MII=m -# CONFIG_MINIX_FS is not set -CONFIG_MINI_FO=y -CONFIG_MIPS=y -CONFIG_MIPS_ADM5120=y -CONFIG_MIPS_ADM5120_ENET=y -# CONFIG_MIPS_ATLAS is not set -# CONFIG_MIPS_BOSPORUS is not set -# CONFIG_MIPS_COBALT is not set -# CONFIG_MIPS_DB1000 is not set -# CONFIG_MIPS_DB1100 is not set -# CONFIG_MIPS_DB1200 is not set -# CONFIG_MIPS_DB1500 is not set -# CONFIG_MIPS_DB1550 is not set -# CONFIG_MIPS_EV64120 is not set -CONFIG_MIPS_L1_CACHE_SHIFT=5 -# CONFIG_MIPS_MALTA is not set -# CONFIG_MIPS_MIRAGE is not set -# CONFIG_MIPS_MTX1 is not set -CONFIG_MIPS_MT_DISABLED=y -# CONFIG_MIPS_MT_SMP is not set -# CONFIG_MIPS_MT_SMTC is not set -# CONFIG_MIPS_PB1000 is not set -# CONFIG_MIPS_PB1100 is not set -# CONFIG_MIPS_PB1200 is not set -# CONFIG_MIPS_PB1500 is not set -# CONFIG_MIPS_PB1550 is not set -# CONFIG_MIPS_SEAD is not set -# CONFIG_MIPS_SIM is not set -# CONFIG_MIPS_VPE_LOADER is not set -# CONFIG_MIPS_XXS1500 is not set -CONFIG_MODULE_FORCE_UNLOAD=y -# CONFIG_MOMENCO_JAGUAR_ATX is not set -# CONFIG_MOMENCO_OCELOT is not set -# CONFIG_MOMENCO_OCELOT_3 is not set -# CONFIG_MOMENCO_OCELOT_C is not set -# CONFIG_MOMENCO_OCELOT_G is not set -CONFIG_MTD=y -# CONFIG_MTD_ABSENT is not set -CONFIG_MTD_ADM5120=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_BLOCK2MTD=y -CONFIG_MTD_CFI=y -# CONFIG_MTD_CFI_ADV_OPTIONS is not set -CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_CFI_AMDSTD_FORCE_BOTTOM_BOOT=y -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_CFI_INTELEXT is not set -# CONFIG_MTD_CFI_STAA is not set -CONFIG_MTD_CFI_UTIL=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_COMPLEX_MAPPINGS=y -# CONFIG_MTD_CONCAT is not set -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_GEN_PROBE=y -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -CONFIG_MTD_MAP_BANK_WIDTH_2=y -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MTDRAM is not set -CONFIG_MTD_MYLOADER_PARTS=y -CONFIG_MTD_NAND=y -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_ECC_SMC is not set -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_NANDSIM is not set -CONFIG_MTD_NAND_RB100=y -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_OBSOLETE_CHIPS is not set -# CONFIG_MTD_ONENAND is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_PCI is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_PHYSMAP is not set -# CONFIG_MTD_PLATRAM is not set -# CONFIG_MTD_PMC551 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_SLRAM is not set -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set -CONFIG_NET_ACT_SIMP=m -CONFIG_NET_KEY=y -# CONFIG_NET_PCI is not set -# CONFIG_NET_PKTGEN is not set -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_PAGE_SIZE_16KB is not set -CONFIG_PAGE_SIZE_4KB=y -# CONFIG_PAGE_SIZE_64KB is not set -# CONFIG_PAGE_SIZE_8KB is not set -# CONFIG_PARTITION_ADVANCED is not set -# CONFIG_PCIPCWATCHDOG is not set -CONFIG_PCI_ADM5120=y -# CONFIG_PMC_YOSEMITE is not set -# CONFIG_PNX8550_JBS is not set -# CONFIG_PNX8550_V2PCI is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_RTC is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y -# CONFIG_SENSORS_ABITUGURU is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SERIAL_8250 is not set -CONFIG_SERIAL_ADM5120=y -CONFIG_SERIO=y -# CONFIG_SERIO_I8042 is not set -# CONFIG_SERIO_LIBPS2 is not set -# CONFIG_SERIO_PCIPS2 is not set -# CONFIG_SERIO_RAW is not set -CONFIG_SERIO_SERPORT=y -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_PTSWARM is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_SWARM is not set -# CONFIG_SND_USB_AUDIO is not set -CONFIG_SOFT_WATCHDOG=m -# CONFIG_SPARSEMEM_STATIC is not set -CONFIG_SYN_COOKIES=y -CONFIG_SYS_HAS_CPU_MIPS32_R1=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y -CONFIG_TMPFS_POSIX_ACL=y -# CONFIG_TOSHIBA_JMR3927 is not set -# CONFIG_TOSHIBA_RBTX4927 is not set -# CONFIG_TOSHIBA_RBTX4938 is not set -CONFIG_TRAD_SIGNALS=y -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_USB=y -# CONFIG_USBPCWATCHDOG is not set -# CONFIG_USB_ACM is not set -CONFIG_USB_ADM5120_HCD=y -# CONFIG_USB_ATM is not set -# CONFIG_USB_CATC is not set -# CONFIG_USB_DEVICEFS is not set -# CONFIG_USB_EHCI_HCD is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_PRINTER is not set -# CONFIG_USB_RTL8150 is not set -# CONFIG_USB_SERIAL is not set -# CONFIG_USB_STORAGE is not set -# CONFIG_USB_UHCI_HCD is not set -# CONFIG_USB_USBNET is not set -# CONFIG_USB_USBNET_MII is not set -# CONFIG_USB_ZD1201 is not set -CONFIG_VM_EVENT_COUNTERS=y -# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set -CONFIG_YAFFS_AUTO_YAFFS2=y -# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set -# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set -# CONFIG_YAFFS_DOES_ECC is not set -CONFIG_YAFFS_FS=y -CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y -CONFIG_YAFFS_YAFFS1=y -CONFIG_YAFFS_YAFFS2=y -# CONFIG_ZD1211RW is not set diff --git a/target/linux/adm5120eb-2.6/files b/target/linux/adm5120eb-2.6/files deleted file mode 120000 index 300f20ce64..0000000000 --- a/target/linux/adm5120eb-2.6/files +++ /dev/null @@ -1 +0,0 @@ -../adm5120-2.6/files \ No newline at end of file diff --git a/target/linux/adm5120eb-2.6/image/Makefile b/target/linux/adm5120eb-2.6/image/Makefile deleted file mode 100644 index 82ecedc1d0..0000000000 --- a/target/linux/adm5120eb-2.6/image/Makefile +++ /dev/null @@ -1,48 +0,0 @@ -# -# Copyright (C) 2006 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# -include $(TOPDIR)/rules.mk -include $(INCLUDE_DIR)/image.mk - -define Build/Compile - rm -f $(KDIR)/loader-zynos.gz $(KDIR)/loader-zynos.bin - $(MAKE) -C lzma-loader \ - BUILD_DIR="$(KDIR)" \ - TARGET="$(KDIR)" \ - LOADER=loader-zynos \ - install -endef - -define Build/Clean - $(MAKE) -C lzma-loader clean -endef - -define Image/Prepare - cat $(KDIR)/vmlinux | $(STAGING_DIR)/bin/lzma e -si -so -eos -lc1 -lp2 -pb2 > $(KDIR)/vmlinux.lzma -endef - -define trxalign/jffs2-128k --a 0x20000 -endef -define trxalign/jffs2-64k --a 0x10000 -endef -define trxalign/squashfs --a 1024 -endef - -define Image/Build/ZyXEL - $(CP) $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1)-noloader.trx $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(3)-$(2).trx -endef - -define Image/Build - $(STAGING_DIR)/bin/trx -o $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1)-noloader.trx -f $(KDIR)/vmlinux.lzma $(call trxalign/$(1)) -f $(KDIR)/root.$(1) -ifneq ($(1),jffs2-128K) - #FIXME: no supported boards yet -endif -endef - -$(eval $(call BuildImage)) diff --git a/target/linux/adm5120eb-2.6/image/lzma-loader b/target/linux/adm5120eb-2.6/image/lzma-loader deleted file mode 120000 index d4f96d2d7c..0000000000 --- a/target/linux/adm5120eb-2.6/image/lzma-loader +++ /dev/null @@ -1 +0,0 @@ -../../adm5120-2.6/image/lzma-loader \ No newline at end of file diff --git a/target/linux/adm5120eb-2.6/patches b/target/linux/adm5120eb-2.6/patches deleted file mode 120000 index 0463621d5c..0000000000 --- a/target/linux/adm5120eb-2.6/patches +++ /dev/null @@ -1 +0,0 @@ -../adm5120-2.6/patches \ No newline at end of file diff --git a/target/linux/adm5120eb-2.6/profiles/100-Texas.mk b/target/linux/adm5120eb-2.6/profiles/100-Texas.mk deleted file mode 100644 index a9306ca702..0000000000 --- a/target/linux/adm5120eb-2.6/profiles/100-Texas.mk +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (C) 2006 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# - -define Profile/Texas - NAME:=Texas Instruments WiFi (default) - PACKAGES:=kmod-acx -endef - -define Profile/Texas/Description - Package set compatible with hardware using Texas Instruments WiFi cards -endef -$(eval $(call Profile,Texas)) - diff --git a/target/linux/adm5120eb-2.6/profiles/110-Atheros.mk b/target/linux/adm5120eb-2.6/profiles/110-Atheros.mk deleted file mode 100644 index cc4a704495..0000000000 --- a/target/linux/adm5120eb-2.6/profiles/110-Atheros.mk +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (C) 2006 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# - -define Profile/Atheros - NAME:=Atheros WiFi - PACKAGES:=kmod-madwifi -endef - -define Profile/Atheros/Description - Package set compatible with hardware using Atheros WiFi cards -endef -$(eval $(call Profile,Atheros)) - diff --git a/target/linux/adm5120eb-2.6/profiles/110-None.mk b/target/linux/adm5120eb-2.6/profiles/110-None.mk deleted file mode 100644 index 2fcfacde9f..0000000000 --- a/target/linux/adm5120eb-2.6/profiles/110-None.mk +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (C) 2006 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# - -define Profile/None - NAME:=No WiFi - PACKAGES:= -endef - -define Profile/None/Description - Package set without WiFi support -endef -$(eval $(call Profile,None)) - diff --git a/target/linux/ar7-2.6/Makefile b/target/linux/ar7-2.6/Makefile deleted file mode 100644 index b20cb11a45..0000000000 --- a/target/linux/ar7-2.6/Makefile +++ /dev/null @@ -1,22 +0,0 @@ -# -# Copyright (C) 2006 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# -include $(TOPDIR)/rules.mk - -ARCH:=mipsel -BOARD:=ar7 -BOARDNAME:=TI AR7 -FEATURES:=squashfs jffs2 - -define Target/Description - Build firmware images for TI AR7 based routers -endef - -include $(INCLUDE_DIR)/kernel-build.mk - --include profiles/*.mk - -$(eval $(call BuildKernel)) diff --git a/target/linux/ar7-2.6/base-files.mk b/target/linux/ar7-2.6/base-files.mk deleted file mode 100644 index f21a604b83..0000000000 --- a/target/linux/ar7-2.6/base-files.mk +++ /dev/null @@ -1,11 +0,0 @@ -define Build/Compile - $(call Build/Compile/Default) - $(TARGET_CC) -o $(PKG_BUILD_DIR)/adam2patcher $(PLATFORM_DIR)/src/adam2patcher.c -endef - -define Package/base-files/install-target - mkdir -p $(1)/sbin - $(CP) $(PKG_BUILD_DIR)/adam2patcher $(1)/sbin -endef - - diff --git a/target/linux/ar7-2.6/base-files/default/etc/config/network b/target/linux/ar7-2.6/base-files/default/etc/config/network deleted file mode 100644 index 5fa112cc6e..0000000000 --- a/target/linux/ar7-2.6/base-files/default/etc/config/network +++ /dev/null @@ -1,41 +0,0 @@ -# Copyright (C) 2006 OpenWrt.org - -config interface loopback - option ifname lo - option proto static - option ipaddr 127.0.0.1 - option netmask 255.0.0.0 - -config interface lan - option ifname eth0 - option proto static - option ipaddr 192.168.1.1 - option netmask 255.255.255.0 - - - -## Example for ATM bridging. -## Useful for PPPoE or IP over ATM. Will create 'nas${unit}' -# -# config atm-bridge -# option unit 0 -# option encaps llc -# option vpi 8 -# option vci 35 - - -# config interface wan -## PPPoE: -# option ifname nas0 -# option proto pppoe - -## PPPoA: -# option ifname atm0 -# option proto pppoa -# option encaps llc -# option vpi 8 -# option vci 35 - -## Both: -# option username "my_username" -# option password "my_password" diff --git a/target/linux/ar7-2.6/base-files/default/etc/diag.sh b/target/linux/ar7-2.6/base-files/default/etc/diag.sh deleted file mode 100644 index 22acc71abf..0000000000 --- a/target/linux/ar7-2.6/base-files/default/etc/diag.sh +++ /dev/null @@ -1,19 +0,0 @@ -#!/bin/sh -# Copyright (C) 2007 OpenWrt.org - -set_led() { - local led="$1" - local state="$2" - [ -d "/sys/class/leds/ar7:$led" ] && echo "$state" > "/sys/class/leds/ar7:$led/brightness" -} - -set_state() { - case "$1" in - preinit) - set_led status 1 - ;; - done) - set_led status 0 - ;; - esac -} diff --git a/target/linux/ar7-2.6/base-files/default/etc/init.d/adam2 b/target/linux/ar7-2.6/base-files/default/etc/init.d/adam2 deleted file mode 100755 index 6b786270ea..0000000000 --- a/target/linux/ar7-2.6/base-files/default/etc/init.d/adam2 +++ /dev/null @@ -1,13 +0,0 @@ -#!/bin/sh /etc/rc.common -# ADAM2 patcher for Netgear DG834 and compatible -# Copyright (C) 2006 OpenWrt.org - -START=00 -start() { - MD5="$(md5sum /dev/mtdblock0 | awk '{print $1}')" - [ "$MD5" = "0530bfdf00ec155f4182afd70da028c1" ] && { - mtd unlock adam2 - /sbin/adam2patcher /dev/mtdblock0 - } - rm -f /etc/rc.d/S${START}adam2 /etc/init.d/adam2 /sbin/adam2patcher >&- 2>&- -} diff --git a/target/linux/ar7-2.6/config/default b/target/linux/ar7-2.6/config/default deleted file mode 100644 index 6d0edccc2e..0000000000 --- a/target/linux/ar7-2.6/config/default +++ /dev/null @@ -1,205 +0,0 @@ -CONFIG_32BIT=y -# CONFIG_64BIT is not set -# CONFIG_64BIT_PHYS_ADDR is not set -CONFIG_AR7=y -CONFIG_AR7_GPIO=y -CONFIG_AR7_WDT=y -# CONFIG_ATMEL is not set -CONFIG_BASE_SMALL=0 -# CONFIG_BCM43XX is not set -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_BOOT_ELF32=y -# CONFIG_BT is not set -CONFIG_CMDLINE="init=/etc/preinit rootfstype=squashfs,jffs2," -CONFIG_CPMAC=y -# CONFIG_CPU_BIG_ENDIAN is not set -CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_CPU_MIPS32=y -CONFIG_CPU_MIPS32_R1=y -# CONFIG_CPU_MIPS32_R2 is not set -# CONFIG_CPU_MIPS64_R1 is not set -# CONFIG_CPU_MIPS64_R2 is not set -CONFIG_CPU_MIPSR1=y -# CONFIG_CPU_NEVADA is not set -# CONFIG_CPU_R10000 is not set -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R4300 is not set -# CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_R8000 is not set -# CONFIG_CPU_RM7000 is not set -# CONFIG_CPU_RM9000 is not set -# CONFIG_CPU_SB1 is not set -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_TX49XX is not set -# CONFIG_CPU_VR41XX is not set -# CONFIG_DDB5477 is not set -# CONFIG_DM9000 is not set -CONFIG_DMA_NEED_PCI_MAP_STATE=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_FIRMWARE_EDID=y -CONFIG_FIXED_MII_100_FDX=y -# CONFIG_FIXED_MII_10_FDX is not set -CONFIG_FIXED_PHY=y -CONFIG_FS_POSIX_ACL=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -# CONFIG_GEN_RTC is not set -# CONFIG_HERMES is not set -# CONFIG_HOSTAP_PCI is not set -# CONFIG_HOSTAP_PLX is not set -CONFIG_HW_HAS_PCI=y -CONFIG_HW_RANDOM=y -CONFIG_HZ=100 -CONFIG_HZ_100=y -# CONFIG_HZ_1024 is not set -# CONFIG_HZ_128 is not set -# CONFIG_HZ_250 is not set -# CONFIG_HZ_256 is not set -# CONFIG_HZ_48 is not set -# CONFIG_I2C is not set -# CONFIG_IDE is not set -CONFIG_INITRAMFS_SOURCE="" -# CONFIG_IPW2100 is not set -# CONFIG_IPW2200 is not set -CONFIG_IRQ_CPU=y -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_LEDS_AR7=y -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MACH_JAZZ is not set -# CONFIG_MACH_VR41XX is not set -CONFIG_MINI_FO=y -CONFIG_MIPS=y -# CONFIG_MIPS_ATLAS is not set -# CONFIG_MIPS_BOSPORUS is not set -# CONFIG_MIPS_COBALT is not set -# CONFIG_MIPS_DB1000 is not set -# CONFIG_MIPS_DB1100 is not set -# CONFIG_MIPS_DB1200 is not set -# CONFIG_MIPS_DB1500 is not set -# CONFIG_MIPS_DB1550 is not set -# CONFIG_MIPS_EV64120 is not set -CONFIG_MIPS_L1_CACHE_SHIFT=5 -# CONFIG_MIPS_MALTA is not set -# CONFIG_MIPS_MIRAGE is not set -# CONFIG_MIPS_MTX1 is not set -CONFIG_MIPS_MT_DISABLED=y -# CONFIG_MIPS_MT_SMP is not set -# CONFIG_MIPS_MT_SMTC is not set -# CONFIG_MIPS_PB1000 is not set -# CONFIG_MIPS_PB1100 is not set -# CONFIG_MIPS_PB1200 is not set -# CONFIG_MIPS_PB1500 is not set -# CONFIG_MIPS_PB1550 is not set -# CONFIG_MIPS_SEAD is not set -# CONFIG_MIPS_SIM is not set -# CONFIG_MIPS_VPE_LOADER is not set -# CONFIG_MIPS_XXS1500 is not set -# CONFIG_MOMENCO_JAGUAR_ATX is not set -# CONFIG_MOMENCO_OCELOT is not set -# CONFIG_MOMENCO_OCELOT_3 is not set -# CONFIG_MOMENCO_OCELOT_C is not set -# CONFIG_MOMENCO_OCELOT_G is not set -CONFIG_MTD=y -# CONFIG_MTD_ABSENT is not set -CONFIG_MTD_AR7_PARTS=y -CONFIG_MTD_BLOCK=y -# CONFIG_MTD_BLOCK2MTD is not set -CONFIG_MTD_CFI=y -# CONFIG_MTD_CFI_ADV_OPTIONS is not set -CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_CFI_STAA=y -CONFIG_MTD_CFI_UTIL=y -CONFIG_MTD_CHAR=y -# CONFIG_MTD_CMDLINE_PARTS is not set -CONFIG_MTD_COMPLEX_MAPPINGS=y -# CONFIG_MTD_CONCAT is not set -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_GEN_PROBE=y -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -CONFIG_MTD_MAP_BANK_WIDTH_2=y -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_OBSOLETE_CHIPS is not set -# CONFIG_MTD_ONENAND is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_PCI is not set -# CONFIG_MTD_PHRAM is not set -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_PHYSMAP_BANKWIDTH=2 -CONFIG_MTD_PHYSMAP_LEN=0 -CONFIG_MTD_PHYSMAP_START=0x10000000 -# CONFIG_MTD_PLATRAM is not set -# CONFIG_MTD_PMC551 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_SLRAM is not set -CONFIG_NEED_MULTIPLE_NODES=y -# CONFIG_NET_PCI is not set -# CONFIG_NET_VENDOR_3COM is not set -CONFIG_NODES_SHIFT=6 -# CONFIG_PAGE_SIZE_16KB is not set -CONFIG_PAGE_SIZE_4KB=y -# CONFIG_PAGE_SIZE_64KB is not set -# CONFIG_PAGE_SIZE_8KB is not set -# CONFIG_PCIPCWATCHDOG is not set -CONFIG_PHYLIB=y -# CONFIG_PMC_YOSEMITE is not set -# CONFIG_PNX8550_JBS is not set -# CONFIG_PNX8550_V2PCI is not set -# CONFIG_PRISM54 is not set -# CONFIG_QSEMI_PHY is not set -# CONFIG_RTC is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y -# CONFIG_SERIAL_8250_EXTENDED is not set -CONFIG_SERIAL_8250_PCI=y -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_PTSWARM is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_SWARM is not set -# CONFIG_SMSC_PHY is not set -# CONFIG_SOFT_WATCHDOG is not set -# CONFIG_SPARSEMEM_STATIC is not set -CONFIG_SWAP_IO_SPACE=y -CONFIG_SYS_HAS_CPU_MIPS32_R1=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y -# CONFIG_TOSHIBA_JMR3927 is not set -# CONFIG_TOSHIBA_RBTX4927 is not set -# CONFIG_TOSHIBA_RBTX4938 is not set -CONFIG_TRAD_SIGNALS=y -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_USB is not set -# CONFIG_YENTA is not set diff --git a/target/linux/ar7-2.6/files/arch/mips/ar7/Makefile b/target/linux/ar7-2.6/files/arch/mips/ar7/Makefile deleted file mode 100644 index 3ec49ee0d4..0000000000 --- a/target/linux/ar7-2.6/files/arch/mips/ar7/Makefile +++ /dev/null @@ -1,16 +0,0 @@ - -obj-y := \ - prom.o \ - setup.o \ - memory.o \ - irq.o \ - time.o \ - platform.o \ - gpio.o \ - clock.o \ - vlynq.o - -obj-$(CONFIG_PCI) += \ - vlynq-pci.o - -EXTRA_AFLAGS := $(CFLAGS) diff --git a/target/linux/ar7-2.6/files/arch/mips/ar7/clock.c b/target/linux/ar7-2.6/files/arch/mips/ar7/clock.c deleted file mode 100644 index 04b49cc106..0000000000 --- a/target/linux/ar7-2.6/files/arch/mips/ar7/clock.c +++ /dev/null @@ -1,362 +0,0 @@ -/* - * $Id$ - * - * Copyright (C) 2007 OpenWrt.org - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include -#include -#include -#include -#include -#include -#include - -#define BOOT_PLL_SOURCE_MASK 0x3 -#define CPU_PLL_SOURCE_SHIFT 16 -#define BUS_PLL_SOURCE_SHIFT 14 -#define USB_PLL_SOURCE_SHIFT 18 -#define DSP_PLL_SOURCE_SHIFT 22 -#define BOOT_PLL_SOURCE_AFE 0 -#define BOOT_PLL_SOURCE_BUS 0 -#define BOOT_PLL_SOURCE_REF 1 -#define BOOT_PLL_SOURCE_XTAL 2 -#define BOOT_PLL_SOURCE_CPU 3 -#define BOOT_PLL_BYPASS 0x00000020 -#define BOOT_PLL_ASYNC_MODE 0x02000000 -#define BOOT_PLL_2TO1_MODE 0x00008000 - -struct tnetd7300_clock { - volatile u32 ctrl; -#define PREDIV_MASK 0x001f0000 -#define PREDIV_SHIFT 16 -#define POSTDIV_MASK 0x0000001f - u32 unused1[3]; - volatile u32 pll; -#define MUL_MASK 0x0000f000 -#define MUL_SHIFT 12 -#define PLL_MODE_MASK 0x00000001 -#define PLL_NDIV 0x00000800 -#define PLL_DIV 0x00000002 -#define PLL_STATUS 0x00000001 - u32 unused2[3]; -} __attribute__ ((packed)); - -struct tnetd7300_clocks { - struct tnetd7300_clock bus; - struct tnetd7300_clock cpu; - struct tnetd7300_clock usb; - struct tnetd7300_clock dsp; -} __attribute__ ((packed)); - -struct tnetd7200_clock { - volatile u32 ctrl; - u32 unused1[3]; -#define DIVISOR_ENABLE_MASK 0x00008000 - volatile u32 mul; - volatile u32 prediv; - volatile u32 postdiv; - u32 unused2[7]; - volatile u32 cmd; - volatile u32 status; - volatile u32 cmden; - u32 padding[15]; -}; - -struct tnetd7200_clocks { - struct tnetd7200_clock cpu; - struct tnetd7200_clock dsp; - struct tnetd7200_clock usb; -}; - -int ar7_afe_clock = 35328000; -int ar7_ref_clock = 25000000; -int ar7_xtal_clock = 24000000; - -int ar7_cpu_clock = 150000000; -EXPORT_SYMBOL(ar7_cpu_clock); -int ar7_bus_clock = 125000000; -EXPORT_SYMBOL(ar7_bus_clock); -int ar7_dsp_clock = 0; -EXPORT_SYMBOL(ar7_dsp_clock); - -static int gcd(int x, int y) -{ - if (x > y) - return (x % y) ? gcd(y, x % y) : y; - return (y % x) ? gcd(x, y % x) : x; -} - -static inline int ABS(int x) -{ - return (x >= 0) ? x : -x; -} - -static void approximate(int base, int target, int *prediv, - int *postdiv, int *mul) -{ - int i, j, k, freq, res = target; - for (i = 1; i <= 16; i++) { - for (j = 1; j <= 32; j++) { - for (k = 1; k <= 32; k++) { - freq = ABS(base / j * i / k - target); - if (freq < res) { - res = freq; - *mul = i; - *prediv = j; - *postdiv = k; - } - } - } - } -} - -static void calculate(int base, int target, int *prediv, int *postdiv, - int *mul) -{ - int tmp_gcd, tmp_base, tmp_freq; - - for (*prediv = 1; *prediv <= 32; (*prediv)++) { - tmp_base = base / *prediv; - tmp_gcd = gcd(target, tmp_base); - *mul = target / tmp_gcd; - *postdiv = tmp_base / tmp_gcd; - if ((*mul < 1) || (*mul >= 16)) - continue; - if ((*postdiv > 0) & (*postdiv <= 32)) - break; - } - - if (base / (*prediv) * (*mul) / (*postdiv) != target) { - approximate(base, target, prediv, postdiv, mul); - tmp_freq = base / (*prediv) * (*mul) / (*postdiv); - printk(KERN_WARNING - "Adjusted requested frequency %d to %d\n", - target, tmp_freq); - } - - printk(KERN_DEBUG "Clocks: prediv: %d, postdiv: %d, mul: %d\n", - *prediv, *postdiv, *mul); -} - -static int tnetd7300_dsp_clock(void) -{ - u32 didr1, didr2; - u8 rev = ar7_chip_rev(); - didr1 = readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x18)); - didr2 = readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x1c)); - if (didr2 & (1 << 23)) - return 0; - if ((rev >= 0x23) && (rev != 0x57)) - return 250000000; - if ((((didr2 & 0x1fff) << 10) | ((didr1 & 0xffc00000) >> 22)) - > 4208000) - return 250000000; - return 0; -} - -static int tnetd7300_get_clock(u32 shift, struct tnetd7300_clock *clock, - u32 *bootcr, u32 bus_clock) -{ - int product; - int base_clock = ar7_ref_clock; - int prediv = ((clock->ctrl & PREDIV_MASK) >> PREDIV_SHIFT) + 1; - int postdiv = (clock->ctrl & POSTDIV_MASK) + 1; - int divisor = prediv * postdiv; - int mul = ((clock->pll & MUL_MASK) >> MUL_SHIFT) + 1; - - switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) { - case BOOT_PLL_SOURCE_BUS: - base_clock = bus_clock; - break; - case BOOT_PLL_SOURCE_REF: - base_clock = ar7_ref_clock; - break; - case BOOT_PLL_SOURCE_XTAL: - base_clock = ar7_xtal_clock; - break; - case BOOT_PLL_SOURCE_CPU: - base_clock = ar7_cpu_clock; - break; - } - - if (*bootcr & BOOT_PLL_BYPASS) - return base_clock / divisor; - - if ((clock->pll & PLL_MODE_MASK) == 0) - return (base_clock >> (mul / 16 + 1)) / divisor; - - if ((clock->pll & (PLL_NDIV | PLL_DIV)) == (PLL_NDIV | PLL_DIV)) { - product = (mul & 1) ? - (base_clock * mul) >> 1 : - (base_clock * (mul - 1)) >> 2; - return product / divisor; - } - - if (mul == 16) - return base_clock / divisor; - - return base_clock * mul / divisor; -} - -static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock, - u32 *bootcr, u32 frequency) -{ - u32 status; - int prediv, postdiv, mul; - int base_clock = ar7_bus_clock; - - switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) { - case BOOT_PLL_SOURCE_BUS: - base_clock = ar7_bus_clock; - break; - case BOOT_PLL_SOURCE_REF: - base_clock = ar7_ref_clock; - break; - case BOOT_PLL_SOURCE_XTAL: - base_clock = ar7_xtal_clock; - break; - case BOOT_PLL_SOURCE_CPU: - base_clock = ar7_cpu_clock; - break; - } - - calculate(base_clock, frequency, &prediv, &postdiv, &mul); - - clock->ctrl = ((prediv - 1) << PREDIV_SHIFT) | (postdiv - 1); - mdelay(1); - clock->pll = 4; - do { - status = clock->pll; - } while (status & PLL_STATUS); - clock->pll = ((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e; - mdelay(75); -} - -static void __init tnetd7300_init_clocks(void) -{ - u32 *bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4); - struct tnetd7300_clocks *clocks = (struct tnetd7300_clocks *)ioremap_nocache(AR7_REGS_POWER + 0x20, sizeof(struct tnetd7300_clocks)); - - ar7_bus_clock = tnetd7300_get_clock(BUS_PLL_SOURCE_SHIFT, - &clocks->bus, bootcr, - ar7_afe_clock); - - if (*bootcr & BOOT_PLL_ASYNC_MODE) { - ar7_cpu_clock = tnetd7300_get_clock(CPU_PLL_SOURCE_SHIFT, - &clocks->cpu, - bootcr, ar7_afe_clock); - } else { - ar7_cpu_clock = ar7_bus_clock; - } - - tnetd7300_set_clock(USB_PLL_SOURCE_SHIFT, &clocks->usb, - bootcr, 48000000); - - if (ar7_dsp_clock == 250000000) - tnetd7300_set_clock(DSP_PLL_SOURCE_SHIFT, &clocks->dsp, - bootcr, ar7_dsp_clock); - - iounmap(clocks); - iounmap(bootcr); -} - -static int tnetd7200_get_clock(int base, struct tnetd7200_clock *clock, - u32 *bootcr, u32 bus_clock) -{ - int divisor = ((clock->prediv & 0x1f) + 1) * - ((clock->postdiv & 0x1f) + 1); - - if (*bootcr & BOOT_PLL_BYPASS) - return base / divisor; - - return base * ((clock->mul & 0xf) + 1) / divisor; -} - -static void tnetd7200_set_clock(int base, struct tnetd7200_clock *clock, - u32 *bootcr, u32 frequency) -{ - u32 status; - int prediv, postdiv, mul; - - calculate(base, frequency, &prediv, &postdiv, &mul); - - clock->ctrl = 0; - clock->prediv = DIVISOR_ENABLE_MASK | prediv; - clock->mul = mul; - mdelay(1); - do { - status = clock->status; - } while (status & PLL_STATUS); - clock->postdiv = DIVISOR_ENABLE_MASK | postdiv; - clock->cmden = 1; - clock->cmd = 1; - do { - status = clock->status; - } while (status & PLL_STATUS); - clock->ctrl = 1; -} - -static void __init tnetd7200_init_clocks(void) -{ - u32 *bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4); - struct tnetd7200_clocks *clocks = (struct tnetd7200_clocks *)ioremap_nocache(AR7_REGS_POWER + 0x80, sizeof(struct tnetd7200_clocks)); - - ar7_cpu_clock = tnetd7200_get_clock(ar7_afe_clock, - &clocks->cpu, - bootcr, ar7_afe_clock); - - if (*bootcr & BOOT_PLL_ASYNC_MODE) { - ar7_bus_clock = 125000000; - } else { - if (*bootcr & BOOT_PLL_2TO1_MODE) { - ar7_bus_clock = ar7_cpu_clock / 2; - } else { - ar7_bus_clock = ar7_cpu_clock; - } - } - - tnetd7200_set_clock(ar7_ref_clock * 5, &clocks->usb, - bootcr, 48000000); - - if (ar7_dsp_clock == 250000000) - tnetd7200_set_clock(ar7_ref_clock, &clocks->dsp, - bootcr, ar7_dsp_clock); - - iounmap(clocks); - iounmap(bootcr); -} - -void __init ar7_init_clocks(void) -{ - switch (ar7_chip_id()) { - case AR7_CHIP_7100: - tnetd7200_init_clocks(); - break; - case AR7_CHIP_7200: -#warning FIXME: check revision - ar7_dsp_clock = 250000000; - tnetd7200_init_clocks(); - break; - case AR7_CHIP_7300: - ar7_dsp_clock = tnetd7300_dsp_clock(); - tnetd7300_init_clocks(); - break; - default: - break; - } -} diff --git a/target/linux/ar7-2.6/files/arch/mips/ar7/gpio.c b/target/linux/ar7-2.6/files/arch/mips/ar7/gpio.c deleted file mode 100644 index 8b3d3a958a..0000000000 --- a/target/linux/ar7-2.6/files/arch/mips/ar7/gpio.c +++ /dev/null @@ -1,56 +0,0 @@ -/* - * $Id$ - * - * Copyright (C) 2007 OpenWrt.org - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -static char *ar7_gpio_list[AR7_GPIO_MAX] = { 0, }; - -int gpio_request(unsigned gpio, char *label) -{ - if (gpio >= AR7_GPIO_MAX) - return -EINVAL; - - if (ar7_gpio_list[gpio]) - return -EBUSY; - - if (label) { - ar7_gpio_list[gpio] = label; - } else { - ar7_gpio_list[gpio] = "busy"; - } - - return 0; -} -EXPORT_SYMBOL(gpio_request); - -void gpio_free(unsigned gpio) -{ - BUG_ON(!ar7_gpio_list[gpio]); - ar7_gpio_list[gpio] = NULL; -} -EXPORT_SYMBOL(gpio_free); diff --git a/target/linux/ar7-2.6/files/arch/mips/ar7/irq.c b/target/linux/ar7-2.6/files/arch/mips/ar7/irq.c deleted file mode 100644 index 3019952273..0000000000 --- a/target/linux/ar7-2.6/files/arch/mips/ar7/irq.c +++ /dev/null @@ -1,204 +0,0 @@ -/* - * $Id$ - * - * Copyright (C) 2006, 2007 OpenWrt.org - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include -#include -#include - -#include -#include -#include -#include - -#define EXCEPT_OFFSET 0x80 -#define PACE_OFFSET 0xA0 -#define CHNLS_OFFSET 0x200 - -#define REG_OFFSET(irq, reg) ((irq) / 32 * 0x4 + reg * 0x10) -#define SEC_REG_OFFSET(reg) (EXCEPT_OFFSET + reg * 0x8) -#define SR_OFFSET (SEC_REG_OFFSET(0)) -#define CR_OFFSET(irq) (REG_OFFSET(irq, 1)) -#define SEC_CR_OFFSET (SEC_REG_OFFSET(1)) -#define ESR_OFFSET(irq) (REG_OFFSET(irq, 2)) -#define SEC_ESR_OFFSET (SEC_REG_OFFSET(2)) -#define ECR_OFFSET(irq) (REG_OFFSET(irq, 3)) -#define SEC_ECR_OFFSET (SEC_REG_OFFSET(3)) -#define PIR_OFFSET (0x40) -#define MSR_OFFSET (0x44) -#define PM_OFFSET(irq) (REG_OFFSET(irq, 5)) -#define TM_OFFSET(irq) (REG_OFFSET(irq, 6)) - -#define REG(addr) (*(volatile u32 *)(KSEG1ADDR(AR7_REGS_IRQ) + addr)) - -#define CHNL_OFFSET(chnl) (CHNLS_OFFSET + (chnl * 4)) - -static void ar7_unmask_irq(unsigned int irq_nr); -static void ar7_mask_irq(unsigned int irq_nr); -static void ar7_unmask_secondary_irq(unsigned int irq_nr); -static void ar7_mask_secondary_irq(unsigned int irq_nr); -static irqreturn_t ar7_cascade(int interrupt, void *dev); -static irqreturn_t ar7_secondary_cascade(int interrupt, void *dev); -static void ar7_irq_init(int base); -static int ar7_irq_base; - -static struct irq_chip ar7_irq_type = { - .name = "AR7", - .unmask = ar7_unmask_irq, - .mask = ar7_mask_irq, -}; - -static struct irq_chip ar7_secondary_irq_type = { - .name = "AR7", - .unmask = ar7_unmask_secondary_irq, - .mask = ar7_mask_secondary_irq, -}; - -static struct irqaction ar7_cascade_action = { - .handler = ar7_cascade, - .name = "AR7 cascade interrupt" -}; - -static struct irqaction ar7_secondary_cascade_action = { - .handler = ar7_secondary_cascade, - .name = "AR7 secondary cascade interrupt" -}; - -static void ar7_unmask_irq(unsigned int irq) -{ - unsigned long flags; - local_irq_save(flags); - /* enable the interrupt channel bit */ - REG(ESR_OFFSET(irq)) = 1 << ((irq - ar7_irq_base) % 32); - local_irq_restore(flags); -} - -static void ar7_mask_irq(unsigned int irq) -{ - unsigned long flags; - local_irq_save(flags); - /* disable the interrupt channel bit */ - REG(ECR_OFFSET(irq)) = 1 << ((irq - ar7_irq_base) % 32); - local_irq_restore(flags); -} - -static void ar7_unmask_secondary_irq(unsigned int irq) -{ - unsigned long flags; - local_irq_save(flags); - /* enable the interrupt channel bit */ - REG(SEC_ESR_OFFSET) = 1 << (irq - ar7_irq_base - 40); - local_irq_restore(flags); -} - -static void ar7_mask_secondary_irq(unsigned int irq) -{ - unsigned long flags; - local_irq_save(flags); - /* disable the interrupt channel bit */ - REG(SEC_ECR_OFFSET) = 1 << (irq - ar7_irq_base - 40); - local_irq_restore(flags); -} - -void __init arch_init_irq(void) { - mips_cpu_irq_init(0); - ar7_irq_init(8); -} - -static void __init ar7_irq_init(int base) -{ - int i; - /* - Disable interrupts and clear pending - */ - REG(ECR_OFFSET(0)) = 0xffffffff; - REG(ECR_OFFSET(32)) = 0xff; - REG(SEC_ECR_OFFSET) = 0xffffffff; - REG(CR_OFFSET(0)) = 0xffffffff; - REG(CR_OFFSET(32)) = 0xff; - REG(SEC_CR_OFFSET) = 0xffffffff; - - ar7_irq_base = base; - - for(i = 0; i < 40; i++) { - REG(CHNL_OFFSET(i)) = i; - /* Primary IRQ's */ - irq_desc[i + base].status = IRQ_DISABLED; - irq_desc[i + base].action = NULL; - irq_desc[i + base].depth = 1; - irq_desc[i + base].chip = &ar7_irq_type; - /* Secondary IRQ's */ - if (i < 32) { - irq_desc[i + base + 40].status = IRQ_DISABLED; - irq_desc[i + base + 40].action = NULL; - irq_desc[i + base + 40].depth = 1; - irq_desc[i + base + 40].chip = &ar7_secondary_irq_type; - } - } - - setup_irq(2, &ar7_cascade_action); - setup_irq(ar7_irq_base, &ar7_secondary_cascade_action); - set_c0_status(IE_IRQ0); -} - -static irqreturn_t ar7_cascade(int interrupt, void *dev) -{ - int irq; - - irq = (REG(PIR_OFFSET) & 0x3F); - REG(CR_OFFSET(irq)) = 1 << (irq % 32); - - do_IRQ(irq + ar7_irq_base); - - return IRQ_HANDLED; -} - -static irqreturn_t ar7_secondary_cascade(int interrupt, void *dev) -{ - int irq = 0, i; - unsigned long status; - - status = REG(SR_OFFSET); - if (unlikely(!status)) { - spurious_interrupt(); - return IRQ_NONE; - } - - for (i = 0; i < 32; i++) - if (status & (i << 1)) { - irq = i + 40; - REG(SEC_CR_OFFSET) = 1 << i; - break; - } - - do_IRQ(irq + ar7_irq_base); - - return IRQ_HANDLED; -} - -asmlinkage void plat_irq_dispatch(void) -{ - unsigned int pending = read_c0_status() & read_c0_cause(); - if (pending & STATUSF_IP7) /* cpu timer */ - do_IRQ(7); - else if (pending & STATUSF_IP2) /* int0 hardware line */ - do_IRQ(2); - else - spurious_interrupt(); -} diff --git a/target/linux/ar7-2.6/files/arch/mips/ar7/memory.c b/target/linux/ar7-2.6/files/arch/mips/ar7/memory.c deleted file mode 100644 index 10dc09da42..0000000000 --- a/target/linux/ar7-2.6/files/arch/mips/ar7/memory.c +++ /dev/null @@ -1,194 +0,0 @@ -/* - * $Id$ - * - * Copyright (C) 2007 OpenWrt.org - * - * Based on arch/mips/mm/init.c - * Copyright (C) 1994 - 2000 Ralf Baechle - * Copyright (C) 1999, 2000 Silicon Graphics, Inc. - * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com - * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include - -static int __init memsize(void) -{ - u32 size = (64 << 20); - volatile u32 *addr = (u32 *)KSEG1ADDR(0x14000000 + size - 4); - u32 *kernel_end = (u32 *)KSEG1ADDR(CPHYSADDR((u32)&_end)); - - while (addr > kernel_end) { - *addr = (u32)addr; - size >>= 1; - addr -= size >> 2; - } - - do { - addr += size >> 2; - if (*addr != (u32)addr) - break; - size <<= 1; - } while (size < (64 << 20)); - - return size; -} - -#ifdef CONFIG_NEED_MULTIPLE_NODES -static bootmem_data_t node_bootmem_data; -pg_data_t __node_data[1] = { - { - .bdata = &node_bootmem_data - }, -}; -EXPORT_SYMBOL(__node_data); - -unsigned long max_mapnr; -struct page *mem_map; -EXPORT_SYMBOL(max_mapnr); -EXPORT_SYMBOL(mem_map); - -static unsigned long setup_zero_pages(void) -{ - unsigned int order = 3; - unsigned long size; - struct page *page; - - empty_zero_page = __get_free_pages(GFP_KERNEL | __GFP_ZERO, order); - if (!empty_zero_page) - panic("Oh boy, that early out of memory?"); - - page = virt_to_page(empty_zero_page); - split_page(page, order); - while (page < virt_to_page(empty_zero_page + (PAGE_SIZE << order))) { - SetPageReserved(page); - page++; - } - - size = PAGE_SIZE << order; - zero_page_mask = (size - 1) & PAGE_MASK; - - return 1UL << order; -} - -extern void pagetable_init(void); - -void __init paging_init(void) -{ - unsigned long zones_size[MAX_NR_ZONES] = { 0, }; - - pagetable_init(); - - zones_size[ZONE_DMA] = max_low_pfn - min_low_pfn; - - free_area_init_node(0, NODE_DATA(0), zones_size, ARCH_PFN_OFFSET, NULL); -} - -static struct kcore_list kcore_mem, kcore_vmalloc; - -void __init mem_init(void) -{ - unsigned long codesize, reservedpages, datasize, initsize; - unsigned long tmp, ram; - unsigned long kernel_start, kernel_end; - - kernel_start = PFN_DOWN(CPHYSADDR((unsigned long)&_text)); - kernel_end = PFN_UP(CPHYSADDR((unsigned long)&_end)); - for (tmp = min_low_pfn + 1; tmp < kernel_start; tmp++) { - ClearPageReserved(pfn_to_page(tmp)); - init_page_count(pfn_to_page(tmp)); - free_page((unsigned long)__va(tmp << PAGE_SHIFT)); - } - - totalram_pages += free_all_bootmem(); - totalram_pages -= setup_zero_pages(); /* Setup zeroed pages. */ - - reservedpages = ram = 0; - for (tmp = min_low_pfn; tmp <= max_low_pfn; tmp++) { - ram++; - if (PageReserved(pfn_to_page(tmp))) - if ((tmp < kernel_start) || (tmp > kernel_end)) - reservedpages++; - } - num_physpages = ram; - - codesize = (unsigned long) &_etext - (unsigned long) &_text; - datasize = (unsigned long) &_edata - (unsigned long) &_etext; - initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin; - - kclist_add(&kcore_mem, __va(min_low_pfn), - (max_low_pfn - min_low_pfn) << PAGE_SHIFT); - kclist_add(&kcore_vmalloc, (void *)VMALLOC_START, - VMALLOC_END - VMALLOC_START); - - printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, " - "%ldk reserved, %ldk data, %ldk init)\n", - (unsigned long) nr_free_pages() << (PAGE_SHIFT-10), - ram << (PAGE_SHIFT-10), - codesize >> 10, - reservedpages << (PAGE_SHIFT-10), - datasize >> 10, - initsize >> 10); -} -#endif - -void __init prom_meminit(void) -{ - unsigned long pages; -#ifdef CONFIG_NEED_MULTIPLE_NODES - unsigned long kernel_start, kernel_end; - unsigned long free_pages; - unsigned long bootmap_size; -#endif - - pages = memsize() >> PAGE_SHIFT; - add_memory_region(ARCH_PFN_OFFSET << PAGE_SHIFT, pages << - PAGE_SHIFT, BOOT_MEM_RAM); - -#ifdef CONFIG_NEED_MULTIPLE_NODES - kernel_start = PFN_DOWN(CPHYSADDR((unsigned long)&_text)); - kernel_end = PFN_UP(CPHYSADDR((unsigned long)&_end)); - min_low_pfn = ARCH_PFN_OFFSET; - max_low_pfn = ARCH_PFN_OFFSET + pages; - max_mapnr = max_low_pfn; - free_pages = pages - (kernel_end - min_low_pfn); - bootmap_size = init_bootmem_node(NODE_DATA(0), kernel_end, - ARCH_PFN_OFFSET, max_low_pfn); - - free_bootmem(PFN_PHYS(kernel_end), free_pages << PAGE_SHIFT); - memory_present(0, min_low_pfn, max_low_pfn); - reserve_bootmem(PFN_PHYS(kernel_end), bootmap_size); - mem_map = NODE_DATA(0)->node_mem_map; -#endif -} - -unsigned long __init prom_free_prom_memory(void) -{ - return 0; -} diff --git a/target/linux/ar7-2.6/files/arch/mips/ar7/platform.c b/target/linux/ar7-2.6/files/arch/mips/ar7/platform.c deleted file mode 100644 index c61e20a6c1..0000000000 --- a/target/linux/ar7-2.6/files/arch/mips/ar7/platform.c +++ /dev/null @@ -1,386 +0,0 @@ -/* - * $Id$ - * - * Copyright (C) 2006, 2007 OpenWrt.org - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -struct plat_vlynq_data { - struct plat_vlynq_ops ops; - int gpio_bit; - int reset_bit; -}; - - -static int vlynq_on(struct vlynq_device *dev) -{ - int result; - struct plat_vlynq_data *pdata = dev->dev.platform_data; - - if ((result = gpio_request(pdata->gpio_bit, "vlynq"))) - goto out; - - ar7_device_reset(pdata->reset_bit); - - if ((result = ar7_gpio_disable(pdata->gpio_bit))) - goto out_enabled; - - if ((result = ar7_gpio_enable(pdata->gpio_bit))) - goto out_enabled; - - if ((result = gpio_direction_output(pdata->gpio_bit))) - goto out_gpio_enabled; - - gpio_set_value(pdata->gpio_bit, 0); - mdelay(50); - - gpio_set_value(pdata->gpio_bit, 1); - mdelay(50); - - return 0; - -out_gpio_enabled: - ar7_gpio_disable(pdata->gpio_bit); -out_enabled: - ar7_device_disable(pdata->reset_bit); - gpio_free(pdata->gpio_bit); -out: - return result; -} - -static void vlynq_off(struct vlynq_device *dev) -{ - struct plat_vlynq_data *pdata = dev->dev.platform_data; - ar7_gpio_disable(pdata->gpio_bit); - gpio_free(pdata->gpio_bit); - ar7_device_disable(pdata->reset_bit); -} - -static struct resource physmap_flash_resource = { - .name = "mem", - .flags = IORESOURCE_MEM, - .start = 0x10000000, - .end = 0x103fffff, -}; - -static struct resource cpmac_low_res[] = { - { - .name = "regs", - .flags = IORESOURCE_MEM, - .start = AR7_REGS_MAC0, - .end = AR7_REGS_MAC0 + 0x7FF, - }, - { - .name = "irq", - .flags = IORESOURCE_IRQ, - .start = 27, - .end = 27, - }, -}; - -static struct resource cpmac_high_res[] = { - { - .name = "regs", - .flags = IORESOURCE_MEM, - .start = AR7_REGS_MAC1, - .end = AR7_REGS_MAC1 + 0x7FF, - }, - { - .name = "irq", - .flags = IORESOURCE_IRQ, - .start = 41, - .end = 41, - }, -}; - -static struct resource vlynq_low_res[] = { - { - .name = "regs", - .flags = IORESOURCE_MEM, - .start = AR7_REGS_VLYNQ0, - .end = AR7_REGS_VLYNQ0 + 0xff, - }, - { - .name = "irq", - .flags = IORESOURCE_IRQ, - .start = 29, - .end = 29, - }, - { - .name = "mem", - .flags = IORESOURCE_MEM, - .start = 0x04000000, - .end = 0x04ffffff, - }, - { - .name = "devirq", - .flags = IORESOURCE_IRQ, - .start = 80, - .end = 111, - }, -}; - -static struct resource vlynq_high_res[] = { - { - .name = "regs", - .flags = IORESOURCE_MEM, - .start = AR7_REGS_VLYNQ1, - .end = AR7_REGS_VLYNQ1 + 0xFF, - }, - { - .name = "irq", - .flags = IORESOURCE_IRQ, - .start = 33, - .end = 33, - }, - { - .name = "mem", - .flags = IORESOURCE_MEM, - .start = 0x0c000000, - .end = 0x0cffffff, - }, - { - .name = "devirq", - .flags = IORESOURCE_IRQ, - .start = 112, - .end = 143, - }, -}; - -static struct physmap_flash_data physmap_flash_data = { - .width = 2, -}; - -static struct plat_cpmac_data cpmac_low_data = { - .reset_bit = 17, - .power_bit = 20, - .phy_mask = 0x80000000, -}; - -static struct plat_cpmac_data cpmac_high_data = { - .reset_bit = 21, - .power_bit = 22, - .phy_mask = 0x7fffffff, -}; - -static struct plat_vlynq_data vlynq_low_data = { - .ops.on = vlynq_on, - .ops.off = vlynq_off, - .reset_bit = 20, - .gpio_bit = 18, -}; - -static struct plat_vlynq_data vlynq_high_data = { - .ops.on = vlynq_on, - .ops.off = vlynq_off, - .reset_bit = 16, - .gpio_bit = 19, -}; - -static struct platform_device physmap_flash = { - .id = 0, - .name = "physmap-flash", - .dev.platform_data = &physmap_flash_data, - .resource = &physmap_flash_resource, - .num_resources = 1, -}; - -static struct platform_device cpmac_low = { - .id = 0, - .name = "cpmac", - .dev.platform_data = &cpmac_low_data, - .resource = cpmac_low_res, - .num_resources = ARRAY_SIZE(cpmac_low_res), -}; - -static struct platform_device cpmac_high = { - .id = 1, - .name = "cpmac", - .dev.platform_data = &cpmac_high_data, - .resource = cpmac_high_res, - .num_resources = ARRAY_SIZE(cpmac_high_res), -}; - -static struct platform_device vlynq_low = { - .id = 0, - .name = "vlynq", - .dev.platform_data = &vlynq_low_data, - .resource = vlynq_low_res, - .num_resources = ARRAY_SIZE(vlynq_low_res), -}; - -static struct platform_device vlynq_high = { - .id = 1, - .name = "vlynq", - .dev.platform_data = &vlynq_high_data, - .resource = vlynq_high_res, - .num_resources = ARRAY_SIZE(vlynq_high_res), -}; - - -/* This is proper way to define uart ports, but they are then detected - * as xscale and, obviously, don't work... - */ -#if !defined(CONFIG_SERIAL_8250) -static struct plat_serial8250_port uart_data[] = { - { - .mapbase = AR7_REGS_UART0, - .irq = AR7_IRQ_UART0, - .regshift = 2, - .iotype = UPIO_MEM, - .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, - }, - { - .mapbase = AR7_REGS_UART1, - .irq = AR7_IRQ_UART1, - .regshift = 2, - .iotype = UPIO_MEM, - .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, - }, - { - .flags = 0, - }, -}; - -static struct platform_device uart = { - .id = 0, - .name = "serial8250", - .dev.platform_data = uart_data, -}; -#endif - -static inline unsigned char char2hex(char h) -{ - switch (h) { - case '0': case '1': case '2': case '3': case '4': - case '5': case '6': case '7': case '8': case '9': - return h - '0'; - case 'A': case 'B': case 'C': case 'D': case 'E': case 'F': - return h - 'A' + 10; - case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': - return h - 'a' + 10; - default: - return 0; - } -} - -static void cpmac_get_mac(int instance, unsigned char *dev_addr) -{ - int i; - char name[5], default_mac[] = "00:00:00:12:34:56", *mac; - - mac = NULL; - sprintf(name, "mac%c", 'a' + instance); - mac = prom_getenv(name); - if (!mac) { - sprintf(name, "mac%c", 'a'); - mac = prom_getenv(name); - } - if (!mac) - mac = default_mac; - for (i = 0; i < 6; i++) - dev_addr[i] = (char2hex(mac[i * 3]) << 4) + - char2hex(mac[i * 3 + 1]); -} - -static int __init ar7_register_devices(void) -{ - int res; - -#if defined(CONFIG_SERIAL_8250) - static struct uart_port uart_port[2]; - - memset(uart_port, 0, sizeof(struct uart_port) * 2); - - uart_port[0].type = PORT_AR7; - uart_port[0].line = 0; - uart_port[0].irq = AR7_IRQ_UART0; - uart_port[0].uartclk = ar7_bus_freq() / 2; - uart_port[0].iotype = UPIO_MEM; - uart_port[0].mapbase = AR7_REGS_UART0; - uart_port[0].membase = ioremap(uart_port[0].mapbase, 256); - uart_port[0].regshift = 2; - res = early_serial_setup(&uart_port[0]); - if (res) - return res; - - uart_port[1].type = PORT_AR7; - uart_port[1].line = 1; - uart_port[1].irq = AR7_IRQ_UART1; - uart_port[1].uartclk = ar7_bus_freq() / 2; - uart_port[1].iotype = UPIO_MEM; - uart_port[1].mapbase = AR7_REGS_UART1; - uart_port[1].membase = ioremap(uart_port[1].mapbase, 256); - uart_port[1].regshift = 2; - res = early_serial_setup(&uart_port[1]); - if (res) - return res; -#else - uart_data[0].uartclk = ar7_bus_freq() / 2; - uart_data[1].uartclk = uart_data[0].uartclk; - res = platform_device_register(&uart); - if (res) - return res; -#endif - res = platform_device_register(&physmap_flash); - if (res) - return res; - - res = platform_device_register(&vlynq_low); - if (res) - return res; - - ar7_device_disable(vlynq_low_data.reset_bit); - if (ar7_has_high_vlynq()) { - ar7_device_disable(vlynq_high_data.reset_bit); - res = platform_device_register(&vlynq_high); - if (res) - return res; - } - - if (ar7_has_high_cpmac()) { - cpmac_get_mac(1, cpmac_high_data.dev_addr); - res = platform_device_register(&cpmac_high); - if (res) - return res; - } else { - cpmac_low_data.phy_mask = 0xffffffff; - } - - cpmac_get_mac(0, cpmac_low_data.dev_addr); - res = platform_device_register(&cpmac_low); - - return res; -} - - -arch_initcall(ar7_register_devices); diff --git a/target/linux/ar7-2.6/files/arch/mips/ar7/prom.c b/target/linux/ar7-2.6/files/arch/mips/ar7/prom.c deleted file mode 100644 index 00cb4a6de3..0000000000 --- a/target/linux/ar7-2.6/files/arch/mips/ar7/prom.c +++ /dev/null @@ -1,324 +0,0 @@ -/* - * $Id$ - * - * Copyright (C) 2006, 2007 OpenWrt.org - * - * Carsten Langgaard, carstenl@mips.com - * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. - * - * This program is free software; you can distribute it and/or modify it - * under the terms of the GNU General Public License (Version 2) as - * published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. - * - * Putting things on the screen/serial line using YAMONs facilities. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#define MAX_ENTRY 80 - -struct env_var { - char *name; - char *value; -}; - -struct psp_chip_map { - u16 chip; - char *names[50]; -}; - -/* I hate this. No. *I* *HATE* *THIS* */ -static __initdata struct psp_chip_map psp_chip_map[] = { - { - .chip = AR7_CHIP_7100, - .names = { - "dummy", "cpufrequency", "memsize", - "flashsize", "modetty0", "modetty1", "prompt", - "bootcfg", "maca", "macb", "usb_rndis_mac", - "macap", "my_ipaddress", "server_ipaddress", - "bline_maca", "bline_macb", "bline_rndis", - "bline_atm", "usb_pid", "usb_vid", - "usb_eppolli", "gateway_ipaddress", - "subnet_mask", "usb_serial", "usb_board_mac", - "remote_user", "remote_pass", "remote_dir", - "sysfrequency", "link_timeout", "mac_port", - "path", "hostname", "tftpcfg", "buildops", - "tftp_fo_fname", "tftp_fo_ports", - "console_state", "mipsfrequency", - }, - }, - { - .chip = AR7_CHIP_7200, - .names = { - "dummy", "cpufrequency", "memsize", - "flashsize", "modetty0", "modetty1", "prompt", - "bootcfg", "maca", "macb", "usb_rndis_mac", - "macap", "my_ipaddress", "server_ipaddress", - "bline_maca", "bline_macb", "bline_rndis", - "bline_atm", "usb_pid", "usb_vid", - "usb_eppolli", "gateway_ipaddress", - "subnet_mask", "usb_serial", "usb_board_mac", - "remote_user", "remote_pass", "remote_dir", - "sysfrequency", "link_timeout", "mac_port", - "path", "hostname", "tftpcfg", "buildops", - "tftp_fo_fname", "tftp_fo_ports", - "console_state", "mipsfrequency", - }, - }, - { - .chip = AR7_CHIP_7300, - .names = { - "dummy", "cpufrequency", "memsize", - "flashsize", "modetty0", "modetty1", "prompt", - "bootcfg", "maca", "macb", "usb_rndis_mac", - "macap", "my_ipaddress", "server_ipaddress", - "bline_maca", "bline_macb", "bline_rndis", - "bline_atm", "usb_pid", "usb_vid", - "usb_eppolli", "gateway_ipaddress", - "subnet_mask", "usb_serial", "usb_board_mac", - "remote_user", "remote_pass", "remote_dir", - "sysfrequency", "link_timeout", "mac_port", - "path", "hostname", "tftpcfg", "buildops", - "tftp_fo_fname", "tftp_fo_ports", - "console_state", "mipsfrequency", - }, - }, - { - .chip = 0x0, - }, -}; - -static struct env_var adam2_env[MAX_ENTRY] = { { 0, }, }; - -char * prom_getenv(char *name) -{ - int i; - for (i = 0; (i < MAX_ENTRY) && adam2_env[i].name; i++) - if (!strcmp(name, adam2_env[i].name)) - return adam2_env[i].value; - - return NULL; -} - -char * __init prom_getcmdline(void) -{ - return &(arcs_cmdline[0]); -} - -static void __init ar7_init_cmdline(int argc, char *argv[]) -{ - char *cp; - int actr; - - actr = 1; /* Always ignore argv[0] */ - - cp = &(arcs_cmdline[0]); - while(actr < argc) { - strcpy(cp, argv[actr]); - cp += strlen(argv[actr]); - *cp++ = ' '; - actr++; - } - if (cp != &(arcs_cmdline[0])) { - /* get rid of trailing space */ - --cp; - *cp = '\0'; - } -} - -struct psbl_rec { - u32 psbl_size; - u32 env_base; - u32 env_size; - u32 ffs_base; - u32 ffs_size; -}; - -static __initdata char psp_env_version[] = "TIENV0.8"; - -struct psp_env_var { - unsigned char num; - unsigned char ctrl; - unsigned short csum; - unsigned char len; - unsigned char data[11]; -}; - -static char psp_env_data[2048] = { 0, }; - -static void __init add_adam2_var(char *name, char *value) -{ - int i; - for (i = 0; i < MAX_ENTRY; i++) { - if (!adam2_env[i].name) { - adam2_env[i].name = name; - adam2_env[i].value = value; - return; - } else if (!strcmp(adam2_env[i].name, name)) { - adam2_env[i].value = value; - return; - } - } -} - -static int __init parse_psp_env(void *start) -{ - int i, j; - u16 chip; - struct psp_chip_map *map; - char *src, *dest, *name, *value; - struct psp_env_var *vars = start; - - chip = ar7_chip_id(); - for (map = psp_chip_map; map->chip; map++) - if (map->chip == chip) - break; - - if (!map->chip) - return -EINVAL; - - i = 1; - j = 0; - dest = psp_env_data; - while (vars[i].num < 0xff) { - src = vars[i].data; - if (vars[i].num) { - strcpy(dest, map->names[vars[i].num]); - name = dest; - } else { - strcpy(dest, src); - name = dest; - src += strlen(src) + 1; - } - dest += strlen(dest) + 1; - strcpy(dest, src); - value = dest; - dest += strlen(dest) + 1; - add_adam2_var(name, value); - i += vars[i].len; - } - return 0; -} - -static void __init ar7_init_env(struct env_var *env) -{ - int i; - struct psbl_rec *psbl = (struct psbl_rec *)(KSEG1ADDR(0x14000300)); - void *psp_env = (void *)KSEG1ADDR(psbl->env_base); - - if(strcmp(psp_env, psp_env_version) == 0) { - parse_psp_env(psp_env); - } else { - for (i = 0; i < MAX_ENTRY; i++, env++) - if (env->name) - add_adam2_var(env->name, env->value); - } -} - -static void __init console_config(void) -{ -#ifdef CONFIG_SERIAL_8250_CONSOLE - char console_string[40]; - int baud = 0; - char parity = '\0', bits = '\0', flow = '\0'; - char *s, *p; - - if (strstr(prom_getcmdline(), "console=")) - return; - -#ifdef CONFIG_KGDB - strcat(prom_getcmdline(), " console=kgdb"); - prom_printf("Please connect GDB to this port\n"); - kgdb_enabled = 1; - return; -#endif - - if ((s = prom_getenv("modetty0"))) { - baud = simple_strtoul(s, &p, 10); - s = p; - if (*s == ',') s++; - if (*s) parity = *s++; - if (*s == ',') s++; - if (*s) bits = *s++; - if (*s == ',') s++; - if (*s == 'h') flow = 'r'; - } - - if (baud == 0) - baud = 38400; - if (parity != 'n' && parity != 'o' && parity != 'e') - parity = 'n'; - if (bits != '7' && bits != '8') - bits = '8'; - if (flow == '\0') - flow = 'r'; - - sprintf(console_string, " console=ttyS0,%d%c%c%c", baud, - parity, bits, flow); - strcat(prom_getcmdline(), console_string); -#endif -} - -void __init prom_init(void) -{ - prom_printf("\nLINUX running...\n"); - ar7_init_cmdline(fw_arg0, (char **)fw_arg1); - ar7_init_env((struct env_var *)fw_arg2); - console_config(); -} - -#define PORT(offset) (KSEG1ADDR(AR7_REGS_UART0 + (offset * 4))) -static inline unsigned int serial_in(int offset) -{ - return readb((void *)PORT(offset)); -} - -static inline void serial_out(int offset, int value) -{ - writeb(value, (void *)PORT(offset)); -} - -char prom_getchar(void) -{ - while (!(serial_in(UART_LSR) & UART_LSR_DR)); - return serial_in(UART_RX); -} - -int prom_putchar(char c) -{ - while ((serial_in(UART_LSR) & UART_LSR_TEMT) == 0); - serial_out(UART_TX, c); - return 1; -} - -#ifdef CONFIG_KGDB -int putDebugChar(char c) -{ - return prom_putchar(c); -} - -char getDebugChar(void) -{ - return prom_getchar(); -} -#endif - -EXPORT_SYMBOL(prom_getenv); diff --git a/target/linux/ar7-2.6/files/arch/mips/ar7/setup.c b/target/linux/ar7-2.6/files/arch/mips/ar7/setup.c deleted file mode 100644 index fb3d20c183..0000000000 --- a/target/linux/ar7-2.6/files/arch/mips/ar7/setup.c +++ /dev/null @@ -1,123 +0,0 @@ -/* - * $Id$ - * - * Copyright (C) 2006, 2007 OpenWrt.org - * - * Carsten Langgaard, carstenl@mips.com - * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. - * - * This program is free software; you can distribute it and/or modify it - * under the terms of the GNU General Public License (Version 2) as - * published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -extern void ar7_time_init(void); -static void ar7_machine_restart(char *command); -static void ar7_machine_halt(void); -static void ar7_machine_power_off(void); - -static void ar7_machine_restart(char *command) -{ - volatile u32 *softres_reg = (u32 *)ioremap(AR7_REGS_RESET + - AR7_RESET_SOFTWARE, 1); - prom_printf("Reboot\n"); - *softres_reg = 1; -} - -static void ar7_machine_halt(void) -{ - prom_printf("Halt\n"); - while (1); -} - -static void ar7_machine_power_off(void) -{ - volatile u32 *power_reg = (u32 *)ioremap(AR7_REGS_POWER, 1); - u32 power_state = *power_reg | (3 << 30); - prom_printf("Power off\n"); - *power_reg = power_state; - ar7_machine_halt(); -} - -const char *get_system_type(void) -{ - u16 chip_id = ar7_chip_id(); - switch (chip_id) { - case AR7_CHIP_7300: - return "TI AR7 (TNETD7300)"; - case AR7_CHIP_7100: - return "TI AR7 (TNETD7100)"; - case AR7_CHIP_7200: - return "TI AR7 (TNETD7200)"; - default: - return "TI AR7 (Unknown)"; - } -} - -static int __init ar7_init_console(void) -{ - return 0; -} - -/* - * Initializes basic routines and structures pointers, memory size (as - * given by the bios and saves the command line. - */ - -extern void ar7_init_clocks(void); - -void __init plat_mem_setup(void) -{ - unsigned long io_base; - - _machine_restart = ar7_machine_restart; - _machine_halt = ar7_machine_halt; - pm_power_off = ar7_machine_power_off; - board_time_init = ar7_time_init; - panic_timeout = 3; - - io_base = (unsigned long)ioremap(AR7_REGS_BASE, 0x10000); - if (!io_base) panic("Can't remap IO base!\n"); - set_io_port_base(io_base); - - prom_meminit(); - ar7_init_clocks(); - - ioport_resource.start = 0; - ioport_resource.end = ~0; - iomem_resource.start = 0; - iomem_resource.end = ~0; -} - -console_initcall(ar7_init_console); diff --git a/target/linux/ar7-2.6/files/arch/mips/ar7/time.c b/target/linux/ar7-2.6/files/arch/mips/ar7/time.c deleted file mode 100644 index 6a1ee7a4df..0000000000 --- a/target/linux/ar7-2.6/files/arch/mips/ar7/time.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - * $Id$ - * - * Copyright (C) 2006, 2007 OpenWrt.org - * - * Carsten Langgaard, carstenl@mips.com - * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. - * - * This program is free software; you can distribute it and/or modify it - * under the terms of the GNU General Public License (Version 2) as - * published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. - * - * Setting up the clock on the MIPS boards. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -void __init ar7_time_init(void) -{ - mips_hpt_frequency = ar7_cpu_freq() / 2; -} - -void __init plat_timer_setup(struct irqaction *irq) -{ - setup_irq(7, irq); -} diff --git a/target/linux/ar7-2.6/files/arch/mips/ar7/vlynq-pci.c b/target/linux/ar7-2.6/files/arch/mips/ar7/vlynq-pci.c deleted file mode 100644 index a32ea8d44c..0000000000 --- a/target/linux/ar7-2.6/files/arch/mips/ar7/vlynq-pci.c +++ /dev/null @@ -1,400 +0,0 @@ -/* - * $Id$ - * - * Copyright (C) 2006, 2007 OpenWrt.org - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include -#include -#include -#include -#include -#include - -#define VLYNQ_PCI_SLOTS 2 - -struct vlynq_reg_config { - u32 offset; - u32 value; -}; - -struct vlynq_pci_config { - u32 chip_id; - char name[32]; - struct vlynq_mapping rx_mapping[4]; - int irq; - int irq_type; - u32 chip; - u32 class; - int num_regs; - struct vlynq_reg_config regs[10]; -}; - -struct vlynq_pci_private { - u32 latency; - u32 cache_line; - u32 command; - u32 sz_mask; - struct vlynq_pci_config *config; -}; - -static struct vlynq_pci_config known_devices[] = { - { - .chip_id = 0x00000009, .name = "TI ACX111", - .rx_mapping = { - { .size = 0x22000, .offset = 0xf0000000 }, - { .size = 0x40000, .offset = 0xc0000000 }, - { .size = 0x0, .offset = 0x0 }, - { .size = 0x0, .offset = 0x0 }, - }, - .irq = 0, .chip = 0x9066104c, - .irq_type = IRQ_TYPE_EDGE_RISING, - .class = PCI_CLASS_NETWORK_OTHER, - .num_regs = 5, - .regs = { - { .offset = 0x790, .value = (0xd0000000 - (ARCH_PFN_OFFSET << PAGE_SHIFT)) }, - { .offset = 0x794, .value = (0xd0000000 - (ARCH_PFN_OFFSET << PAGE_SHIFT)) }, - { .offset = 0x740, .value = 0 }, - { .offset = 0x744, .value = 0x00010000 }, - { .offset = 0x764, .value = 0x00010000 }, - }, - }, -}; - -static struct vlynq_device *slots[VLYNQ_PCI_SLOTS] = { NULL, }; - -static struct resource vlynq_io_resource = { - .start = 0x00000000, - .end = 0x00000000, - .name = "pci IO space", - .flags = IORESOURCE_IO -}; - -static struct resource vlynq_mem_resource = { - .start = 0x00000000, - .end = 0x00000000, - .name = "pci memory space", - .flags = IORESOURCE_MEM -}; - -static inline u32 vlynq_get_mapped(struct vlynq_device *dev, int res) -{ - int i; - struct vlynq_pci_private *priv = dev->priv; - u32 ret = dev->mem_start; - if (!priv->config->rx_mapping[res].size) return 0; - for (i = 0; i < res; i++) - ret += priv->config->rx_mapping[i].size; - - return ret; -} - -static inline u32 vlynq_read(u32 val, int size) { - switch (size) { - case 1: - return *(u8 *)&val; - case 2: - return *(u16 *)&val; - } - return val; -} - -static int vlynq_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) -{ - struct vlynq_device *dev; - struct vlynq_pci_private *priv; - int resno, slot = PCI_SLOT(devfn); - - if ((size == 2) && (where & 1)) - return PCIBIOS_BAD_REGISTER_NUMBER; - else if ((size == 4) && (where & 3)) - return PCIBIOS_BAD_REGISTER_NUMBER; - - if (slot >= VLYNQ_PCI_SLOTS) - return PCIBIOS_DEVICE_NOT_FOUND; - - dev = slots[slot]; - - if (!dev || (PCI_FUNC(devfn) > 0)) - return PCIBIOS_DEVICE_NOT_FOUND; - - priv = dev->priv; - - switch (where) { - case PCI_VENDOR_ID: - *val = vlynq_read(priv->config->chip, size); - break; - case PCI_DEVICE_ID: - *val = priv->config->chip & 0xffff; - case PCI_COMMAND: - *val = priv->command; - case PCI_STATUS: -/* *val = PCI_STATUS_CAP_LIST;*/ - *val = 0; - break; - case PCI_CLASS_REVISION: - *val = priv->config->class; - break; - case PCI_LATENCY_TIMER: - *val = priv->latency; - break; - case PCI_HEADER_TYPE: - *val = PCI_HEADER_TYPE_NORMAL; - break; - case PCI_CACHE_LINE_SIZE: - *val = priv->cache_line; - break; - case PCI_BASE_ADDRESS_0: - case PCI_BASE_ADDRESS_1: - case PCI_BASE_ADDRESS_2: - case PCI_BASE_ADDRESS_3: - resno = (where - PCI_BASE_ADDRESS_0) >> 2; - if (priv->sz_mask & (1 << resno)) { - priv->sz_mask &= ~(1 << resno); - *val = priv->config->rx_mapping[resno].size; - } else { - *val = vlynq_get_mapped(dev, resno); - } - break; - case PCI_BASE_ADDRESS_4: - case PCI_BASE_ADDRESS_5: - case PCI_SUBSYSTEM_VENDOR_ID: - case PCI_SUBSYSTEM_ID: - case PCI_ROM_ADDRESS: - case PCI_INTERRUPT_LINE: - case PCI_CARDBUS_CIS: - case PCI_CAPABILITY_LIST: - case PCI_INTERRUPT_PIN: - *val = 0; - break; - default: - printk("%s: Read of unknown register 0x%x (size %d)\n", - dev->dev.bus_id, where, size); - return PCIBIOS_BAD_REGISTER_NUMBER; - } - return PCIBIOS_SUCCESSFUL; -} - -static int vlynq_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) -{ - struct vlynq_device *dev; - struct vlynq_pci_private *priv; - int resno, slot = PCI_SLOT(devfn); - - if ((size == 2) && (where & 1)) - return PCIBIOS_BAD_REGISTER_NUMBER; - else if ((size == 4) && (where & 3)) - return PCIBIOS_BAD_REGISTER_NUMBER; - - if (slot >= VLYNQ_PCI_SLOTS) - return PCIBIOS_DEVICE_NOT_FOUND; - - dev = slots[slot]; - - if (!dev || (PCI_FUNC(devfn) > 0)) - return PCIBIOS_DEVICE_NOT_FOUND; - - priv = dev->priv; - - switch (where) { - case PCI_VENDOR_ID: - case PCI_DEVICE_ID: - case PCI_STATUS: - case PCI_CLASS_REVISION: - case PCI_HEADER_TYPE: - case PCI_CACHE_LINE_SIZE: - case PCI_SUBSYSTEM_VENDOR_ID: - case PCI_SUBSYSTEM_ID: - case PCI_INTERRUPT_LINE: - case PCI_INTERRUPT_PIN: - case PCI_CARDBUS_CIS: - case PCI_CAPABILITY_LIST: - return PCIBIOS_FUNC_NOT_SUPPORTED; - case PCI_COMMAND: - priv->command = val; - case PCI_LATENCY_TIMER: - priv->latency = val; - break; - case PCI_BASE_ADDRESS_0: - case PCI_BASE_ADDRESS_1: - case PCI_BASE_ADDRESS_2: - case PCI_BASE_ADDRESS_3: - if (val == 0xffffffff) { - resno = (where - PCI_BASE_ADDRESS_0) >> 2; - priv->sz_mask |= (1 << resno); - break; - } - case PCI_BASE_ADDRESS_4: - case PCI_BASE_ADDRESS_5: - case PCI_ROM_ADDRESS: - break; - default: - printk("%s: Write to unknown register 0x%x (size %d) value=0x%x\n", - dev->dev.bus_id, where, size, val); - return PCIBIOS_BAD_REGISTER_NUMBER; - } - return PCIBIOS_SUCCESSFUL; -} - -static struct pci_ops vlynq_pci_ops = { - vlynq_config_read, - vlynq_config_write -}; - -static struct pci_controller vlynq_controller = { - .pci_ops = &vlynq_pci_ops, - .io_resource = &vlynq_io_resource, - .mem_resource = &vlynq_mem_resource, -}; - -static int vlynq_pci_probe(struct vlynq_device *dev) -{ - int result, i; - u32 chip_id, addr; - struct vlynq_pci_private *priv; - struct vlynq_mapping mapping[4] = { { 0, }, }; - struct vlynq_pci_config *config = NULL; - - result = vlynq_set_local_irq(dev, 31); - if (result) - return result; - - result = vlynq_set_remote_irq(dev, 30); - if (result) - return result; - - result = vlynq_device_enable(dev); - if (result) - return result; - - chip_id = vlynq_remote_id(dev); - for (i = 0; i < ARRAY_SIZE(known_devices); i++) - if (chip_id == known_devices[i].chip_id) - config = &known_devices[i]; - - if (!config) { - printk("vlynq-pci: skipping unknown device " - "%04x:%04x at %s\n", chip_id >> 16, - chip_id & 0xffff, dev->dev.bus_id); - result = -ENODEV; - goto fail; - } - - printk("vlynq-pci: attaching device %s at %s\n", - config->name, dev->dev.bus_id); - - priv = kmalloc(sizeof(struct vlynq_pci_private), GFP_KERNEL); - if (!priv) { - printk(KERN_ERR "%s: failed to allocate private data\n", - dev->dev.bus_id); - result = -ENOMEM; - goto fail; - } - - memset(priv, 0, sizeof(struct vlynq_pci_private)); - priv->latency = 64; - priv->cache_line = 32; - priv->config = config; - - mapping[0].offset = ARCH_PFN_OFFSET << PAGE_SHIFT; - mapping[0].size = 0x02000000; - vlynq_set_local_mapping(dev, dev->mem_start, mapping); - vlynq_set_remote_mapping(dev, 0, config->rx_mapping); - - set_irq_type(vlynq_virq_to_irq(dev, config->irq), config->irq_type); - - addr = (u32)ioremap_nocache(dev->mem_start, 0x10000); - if (!addr) { - printk(KERN_ERR "%s: failed to remap io memory\n", - dev->dev.bus_id); - result = -ENXIO; - goto fail; - } - - for (i = 0; i < config->num_regs; i++) - *(volatile u32 *)(addr + config->regs[i].offset) = - config->regs[i].value; - - dev->priv = priv; - for (i = 0; i < VLYNQ_PCI_SLOTS; i++) { - if (!slots[i]) { - slots[i] = dev; - break; - } - } - - return 0; - -fail: - vlynq_device_disable(dev); - - return result; -} - -static int vlynq_pci_remove(struct vlynq_device *dev) -{ - int i; - struct vlynq_pci_private *priv = dev->priv; - - for (i = 0; i < VLYNQ_PCI_SLOTS; i++) - if (slots[i] == dev) - slots[i] = NULL; - - vlynq_device_disable(dev); - kfree(priv); - - return 0; -} - -static struct vlynq_driver vlynq_pci = { - .name = "PCI over VLYNQ emulation", - .probe = vlynq_pci_probe, - .remove = vlynq_pci_remove, -}; - -int vlynq_pci_init(void) -{ - int res; - res = vlynq_register_driver(&vlynq_pci); - if (res) - return res; - - register_pci_controller(&vlynq_controller); - - return 0; -} - -int pcibios_map_irq(struct pci_dev *pdev, u8 slot, u8 pin) -{ - struct vlynq_device *dev; - struct vlynq_pci_private *priv; - - dev = slots[slot]; - - if (!dev) - return 0; - - priv = dev->priv; - - return vlynq_virq_to_irq(dev, priv->config->irq); -} - -/* Do platform specific device initialization at pci_enable_device() time */ -int pcibios_plat_dev_init(struct pci_dev *dev) -{ - return 0; -} diff --git a/target/linux/ar7-2.6/files/arch/mips/ar7/vlynq.c b/target/linux/ar7-2.6/files/arch/mips/ar7/vlynq.c deleted file mode 100644 index c491020820..0000000000 --- a/target/linux/ar7-2.6/files/arch/mips/ar7/vlynq.c +++ /dev/null @@ -1,545 +0,0 @@ -/* - * $Id$ - * - * Copyright (C) 2006, 2007 OpenWrt.org - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define PER_DEVICE_IRQS 32 - -#define VLYNQ_CTRL_PM_ENABLE 0x80000000 -#define VLYNQ_CTRL_CLOCK_INT 0x00008000 -#define VLYNQ_CTRL_CLOCK_DIV(x) ((x & 7) << 16) -#define VLYNQ_CTRL_INT_LOCAL 0x00004000 -#define VLYNQ_CTRL_INT_ENABLE 0x00002000 -#define VLYNQ_CTRL_INT_VECTOR(x) ((x & 0x1f) << 8) -#define VLYNQ_CTRL_INT2CFG 0x00000080 -#define VLYNQ_CTRL_RESET 0x00000001 - -#define VLYNQ_STATUS_RERROR 0x00000100 -#define VLYNQ_STATUS_LERROR 0x00000080 -#define VLYNQ_STATUS_LINK 0x00000001 - -#define VINT_ENABLE 0x00000100 -#define VINT_TYPE_EDGE 0x00000080 -#define VINT_LEVEL_LOW 0x00000040 -#define VINT_VECTOR(x) (x & 0x1f) -#define VINT_OFFSET(irq) (8 * ((irq) % 4)) - -#define VLYNQ_AUTONEGO_V2 0x00010000 - -struct vlynq_regs { - volatile u32 revision; - volatile u32 control; - volatile u32 status; - volatile u32 int_prio; - volatile u32 int_status; - volatile u32 int_pending; - volatile u32 int_ptr; - volatile u32 tx_offset; - volatile struct vlynq_mapping rx_mapping[4]; - volatile u32 chip; - volatile u32 autonego; - volatile u32 unused[6]; - volatile u32 int_device[8]; -} __attribute__ ((packed)); - -#ifdef VLYNQ_DEBUG -static void vlynq_dump_regs(struct vlynq_device *dev) -{ - int i; - printk("VLYNQ local=%p remote=%p\n", dev->local, dev->remote); - for (i = 0; i < 32; i++) { - printk("VLYNQ: local %d: %08x\n", i + 1, ((u32 *)dev->local)[i]); - printk("VLYNQ: remote %d: %08x\n", i + 1, ((u32 *)dev->remote)[i]); - } -} - -static void vlynq_dump_mem(u32 *base, int count) -{ - int i; - for (i = 0; i < (count + 3) / 4; i++) { - if (i % 4 == 0) printk("\nMEM[0x%04x]:", i * 4); - printk(" 0x%08x", *(base + i)); - } - printk("\n"); -} -#endif - -int vlynq_linked(struct vlynq_device *dev) -{ - int i; - for (i = 0; i < 10; i++) - if (dev->local->status & VLYNQ_STATUS_LINK) { - printk("%s: linked\n", dev->dev.bus_id); - return 1; - } else { - mdelay(1); - } - return 0; -} - -static void vlynq_irq_unmask(unsigned int irq) -{ - volatile u32 val; - struct vlynq_device *dev = irq_desc[irq].chip_data; - int virq; - - BUG_ON(!dev); - virq = irq - dev->irq_start; - val = dev->remote->int_device[virq >> 2]; - val |= (VINT_ENABLE | virq) << VINT_OFFSET(virq); - dev->remote->int_device[virq >> 2] = val; -} - -static void vlynq_irq_mask(unsigned int irq) -{ - volatile u32 val; - struct vlynq_device *dev = irq_desc[irq].chip_data; - int virq; - - BUG_ON(!dev); - virq = irq - dev->irq_start; - val = dev->remote->int_device[virq >> 2]; - val &= ~(VINT_ENABLE << VINT_OFFSET(virq)); - dev->remote->int_device[virq >> 2] = val; -} - -static int vlynq_irq_type(unsigned int irq, unsigned int flow_type) -{ - volatile u32 val; - struct vlynq_device *dev = irq_desc[irq].chip_data; - int virq; - - BUG_ON(!dev); - virq = irq - dev->irq_start; - val = dev->remote->int_device[virq >> 2]; - switch (flow_type & IRQ_TYPE_SENSE_MASK) { - case IRQ_TYPE_EDGE_RISING: - case IRQ_TYPE_EDGE_FALLING: - case IRQ_TYPE_EDGE_BOTH: - val |= VINT_TYPE_EDGE << VINT_OFFSET(virq); - val &= ~(VINT_LEVEL_LOW << VINT_OFFSET(virq)); - break; - case IRQ_TYPE_LEVEL_HIGH: - val &= ~(VINT_TYPE_EDGE << VINT_OFFSET(virq)); - val &= ~(VINT_LEVEL_LOW << VINT_OFFSET(virq)); - break; - case IRQ_TYPE_LEVEL_LOW: - val &= ~(VINT_TYPE_EDGE << VINT_OFFSET(virq)); - val |= VINT_LEVEL_LOW << VINT_OFFSET(virq); - break; - default: - return -EINVAL; - } - dev->remote->int_device[virq >> 2] = val; - return 0; -} - -static irqreturn_t vlynq_irq(int irq, void *dev_id) -{ - struct vlynq_device *dev = dev_id; - u32 status, ack; - int virq = 0; - - status = dev->local->int_status; - dev->local->int_status = status; - - if (status & (1 << dev->local_irq)) { /* Local vlynq IRQ. Ack */ - ack = dev->local->status; - dev->local->status = ack; - } - - if (status & (1 << dev->remote_irq)) { /* Remote vlynq IRQ. Ack */ - ack = dev->remote->status; - dev->remote->status = ack; - } - - status &= ~((1 << dev->local_irq) | (1 << dev->remote_irq)); - while (status) { - if (status & 1) /* Remote device IRQ. Pass. */ - do_IRQ(dev->irq_start + virq); - status >>= 1; - virq++; - } - - return IRQ_HANDLED; -} - -static struct irq_chip vlynq_irq_chip = { - .name = "vlynq", - .unmask = vlynq_irq_unmask, - .mask = vlynq_irq_mask, - .set_type = vlynq_irq_type, -}; - -static int vlynq_setup_irq(struct vlynq_device *dev) -{ - u32 val; - int i; - - if (dev->local_irq == dev->remote_irq) { - printk("%s: local vlynq irq should be different from remote\n", - dev->dev.bus_id); - return -EINVAL; - } - - val = VLYNQ_CTRL_INT_VECTOR(dev->local_irq); - val |= VLYNQ_CTRL_INT_ENABLE | VLYNQ_CTRL_INT_LOCAL | - VLYNQ_CTRL_INT2CFG; - dev->local->int_ptr = 0x14; - dev->local->control |= val; - - val = VLYNQ_CTRL_INT_VECTOR(dev->remote_irq); - val |= VLYNQ_CTRL_INT_ENABLE; - dev->remote->int_ptr = 0x14; - dev->remote->control |= val; - - for (i = 0; i < PER_DEVICE_IRQS; i++) { - if ((i == dev->local_irq) || (i == dev->remote_irq)) - continue; - irq_desc[dev->irq_start + i].status = IRQ_DISABLED; - irq_desc[dev->irq_start + i].action = 0; - irq_desc[dev->irq_start + i].depth = 1; - irq_desc[dev->irq_start + i].chip = &vlynq_irq_chip; - irq_desc[dev->irq_start + i].chip_data = dev; - dev->remote->int_device[i >> 2] = 0; - } - - if (request_irq(dev->irq, vlynq_irq, SA_SHIRQ, "AR7 VLYNQ", dev)) { - printk("%s: request_irq failed\n", dev->dev.bus_id); - return -EAGAIN; - } - - return 0; -} - -static void vlynq_free_irq(struct vlynq_device *dev) -{ - free_irq(dev->irq, dev); -} - -static void vlynq_device_release(struct device *dev) -{ - struct vlynq_device *vdev = to_vlynq_device(dev); - kfree(vdev); -} - -static int vlynq_device_probe(struct device *dev) -{ - struct vlynq_driver *drv = to_vlynq_driver(dev->driver); - if (drv->probe) - return drv->probe(to_vlynq_device(dev)); - return 0; -} - -static int vlynq_device_remove(struct device *dev) -{ - struct vlynq_driver *drv = to_vlynq_driver(dev->driver); - if (drv->remove) - return drv->remove(to_vlynq_device(dev)); - return 0; -} - -int __vlynq_register_driver(struct vlynq_driver *driver, struct module *owner) -{ - driver->driver.name = driver->name; - driver->driver.bus = &vlynq_bus_type; -/* driver->driver.owner = owner;*/ - return driver_register(&driver->driver); -} -EXPORT_SYMBOL(__vlynq_register_driver); - -void vlynq_unregister_driver(struct vlynq_driver *driver) -{ - driver_unregister(&driver->driver); -} -EXPORT_SYMBOL(vlynq_unregister_driver); - -int vlynq_device_enable(struct vlynq_device *dev) -{ - u32 val; - int result; - struct plat_vlynq_ops *ops = dev->dev.platform_data; - - result = ops->on(dev); - if (result) - return result; - - dev->local->control = 0; - dev->remote->control = 0; - - if (vlynq_linked(dev)) - return vlynq_setup_irq(dev); - - for (val = 0; val < 8; val++) { - dev->local->control = VLYNQ_CTRL_CLOCK_DIV(val) | - VLYNQ_CTRL_CLOCK_INT; - if (vlynq_linked(dev)) - return vlynq_setup_irq(dev); - } - - return -ENODEV; -} - -void vlynq_device_disable(struct vlynq_device *dev) -{ - struct plat_vlynq_ops *ops = dev->dev.platform_data; - - vlynq_free_irq(dev); - ops->off(dev); -} - -u32 vlynq_local_id(struct vlynq_device *dev) -{ - return dev->local->chip; -} - -u32 vlynq_remote_id(struct vlynq_device *dev) -{ - return dev->remote->chip; -} - -void vlynq_set_local_mapping(struct vlynq_device *dev, u32 tx_offset, - struct vlynq_mapping *mapping) -{ - int i; - - dev->local->tx_offset = tx_offset; - for (i = 0; i < 4; i++) { - dev->local->rx_mapping[i].offset = mapping[i].offset; - dev->local->rx_mapping[i].size = mapping[i].size; - } -} - -void vlynq_set_remote_mapping(struct vlynq_device *dev, u32 tx_offset, - struct vlynq_mapping *mapping) -{ - int i; - - dev->remote->tx_offset = tx_offset; - for (i = 0; i < 4; i++) { - dev->remote->rx_mapping[i].offset = mapping[i].offset; - dev->remote->rx_mapping[i].size = mapping[i].size; - } -} - -int vlynq_virq_to_irq(struct vlynq_device *dev, int virq) -{ - if ((virq < 0) || (virq >= PER_DEVICE_IRQS)) - return -EINVAL; - - if ((virq == dev->local_irq) || (virq == dev->remote_irq)) - return -EINVAL; - - return dev->irq_start + virq; -} - -int vlynq_irq_to_virq(struct vlynq_device *dev, int irq) -{ - if ((irq < dev->irq_start) || (irq >= dev->irq_start + PER_DEVICE_IRQS)) - return -EINVAL; - - return irq - dev->irq_start; -} - -int vlynq_set_local_irq(struct vlynq_device *dev, int virq) -{ - if ((virq < 0) || (virq >= PER_DEVICE_IRQS)) - return -EINVAL; - - if (virq == dev->remote_irq) - return -EINVAL; - - dev->local_irq = virq; - - return 0; -} - -int vlynq_set_remote_irq(struct vlynq_device *dev, int virq) -{ - if ((virq < 0) || (virq >= PER_DEVICE_IRQS)) - return -EINVAL; - - if (virq == dev->local_irq) - return -EINVAL; - - dev->remote_irq = virq; - - return 0; -} - -static int vlynq_probe(struct platform_device *pdev) -{ - struct vlynq_device *dev; - struct resource *regs_res, *mem_res, *irq_res; - int len, result; - - if (strcmp(pdev->name, "vlynq")) - return -ENODEV; - - regs_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"); - if (!regs_res) - return -ENODEV; - - mem_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem"); - if (!mem_res) - return -ENODEV; - - irq_res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "devirq"); - if (!irq_res) - return -ENODEV; - - dev = kmalloc(sizeof(struct vlynq_device), GFP_KERNEL); - if (!dev) { - printk(KERN_ERR "vlynq: failed to allocate device structure\n"); - return -ENOMEM; - } - - memset(dev, 0, sizeof(struct vlynq_device)); - - dev->id = pdev->id; - dev->dev.bus = &vlynq_bus_type; - dev->dev.parent = &pdev->dev; - snprintf(dev->dev.bus_id, BUS_ID_SIZE, "vlynq%d", dev->id); - dev->dev.bus_id[BUS_ID_SIZE - 1] = 0; - dev->dev.platform_data = pdev->dev.platform_data; - dev->dev.release = vlynq_device_release; - - dev->regs_start = regs_res->start; - dev->regs_end = regs_res->end; - dev->mem_start = mem_res->start; - dev->mem_end = mem_res->end; - - len = regs_res->end - regs_res->start; - if (!request_mem_region(regs_res->start, len, dev->dev.bus_id)) { - printk("%s: Can't request vlynq registers\n", dev->dev.bus_id); - result = -ENXIO; - goto fail_request; - } - - dev->local = ioremap_nocache(regs_res->start, len); - if (!dev->local) { - printk("%s: Can't remap vlynq registers\n", dev->dev.bus_id); - result = -ENXIO; - goto fail_remap; - } - - dev->remote = (struct vlynq_regs *)((u32)dev->local + 128); - - dev->irq = platform_get_irq_byname(pdev, "irq"); - dev->irq_start = irq_res->start; - dev->irq_end = irq_res->end; - dev->local_irq = 31; - dev->remote_irq = 30; - - if (device_register(&dev->dev)) - goto fail_register; - platform_set_drvdata(pdev, dev); - - printk("%s: regs 0x%p, irq %d, mem 0x%p\n", - dev->dev.bus_id, (void *)dev->regs_start, dev->irq, - (void *)dev->mem_start); - - return 0; - -fail_register: -fail_remap: - iounmap(dev->local); -fail_request: - release_mem_region(regs_res->start, len); - kfree(dev); - return result; -} - -static int vlynq_remove(struct platform_device *pdev) -{ - struct vlynq_device *dev = platform_get_drvdata(pdev); - - device_unregister(&dev->dev); - release_mem_region(dev->regs_start, dev->regs_end - dev->regs_start); - - kfree(dev); - - return 0; -} - -static struct platform_driver vlynq_driver = { - .driver.name = "vlynq", - .probe = vlynq_probe, - .remove = vlynq_remove, -}; - -struct bus_type vlynq_bus_type = { - .name = "vlynq", - .probe = vlynq_device_probe, - .remove = vlynq_device_remove, -}; -EXPORT_SYMBOL(vlynq_bus_type); - -#ifdef CONFIG_PCI -extern void vlynq_pci_init(void); -#endif -int __init vlynq_init(void) -{ - int res = 0; - - res = bus_register(&vlynq_bus_type); - if (res) - goto fail_bus; - - res = platform_driver_register(&vlynq_driver); - if (res) - goto fail_platform; - -#ifdef CONFIG_PCI - vlynq_pci_init(); -#endif - - return 0; - -fail_platform: - bus_unregister(&vlynq_bus_type); -fail_bus: - return res; -} - -/* -void __devexit vlynq_exit(void) -{ - platform_driver_unregister(&vlynq_driver); - bus_unregister(&vlynq_bus_type); -} -*/ - - -subsys_initcall(vlynq_init); diff --git a/target/linux/ar7-2.6/files/drivers/char/ar7_gpio.c b/target/linux/ar7-2.6/files/drivers/char/ar7_gpio.c deleted file mode 100644 index d8dc2e1ff5..0000000000 --- a/target/linux/ar7-2.6/files/drivers/char/ar7_gpio.c +++ /dev/null @@ -1,160 +0,0 @@ -/* - * linux/drivers/char/ar7_gpio.c - * - * Copyright (C) 2007 OpenWrt.org - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#define DRVNAME "ar7_gpio" -#define LONGNAME "TI AR7 GPIOs Driver" - -MODULE_AUTHOR("Nicolas Thill "); -MODULE_DESCRIPTION(LONGNAME); -MODULE_LICENSE("GPL"); - -static int ar7_gpio_major = 0; - -static ssize_t ar7_gpio_write(struct file *file, const char __user *buf, - size_t len, loff_t *ppos) -{ - int pin = iminor(file->f_dentry->d_inode); - size_t i; - - for (i = 0; i < len; ++i) { - char c; - if (get_user(c, buf + i)) - return -EFAULT; - switch (c) { - case '0': - gpio_set_value(pin, 0); - break; - case '1': - gpio_set_value(pin, 1); - break; - case 'd': - case 'D': - ar7_gpio_disable(pin); - break; - case 'e': - case 'E': - ar7_gpio_enable(pin); - break; - case 'i': - case 'I': - case '<': - gpio_direction_input(pin); - break; - case 'o': - case 'O': - case '>': - gpio_direction_output(pin); - break; - default: - return -EINVAL; - } - } - - return len; -} - -static ssize_t ar7_gpio_read(struct file *file, char __user * buf, - size_t len, loff_t * ppos) -{ - int pin = iminor(file->f_dentry->d_inode); - int value; - - value = gpio_get_value(pin); - if (put_user(value ? '1' : '0', buf)) - return -EFAULT; - - return 1; -} - -static int ar7_gpio_open(struct inode *inode, struct file *file) -{ - int m = iminor(inode); - - if (m >= AR7_GPIO_MAX) - return -EINVAL; - - return nonseekable_open(inode, file); -} - -static int ar7_gpio_release(struct inode *inode, struct file *file) -{ - return 0; -} - -static const struct file_operations ar7_gpio_fops = { - .owner = THIS_MODULE, - .write = ar7_gpio_write, - .read = ar7_gpio_read, - .open = ar7_gpio_open, - .release = ar7_gpio_release, - .llseek = no_llseek, -}; - -static struct platform_device *ar7_gpio_device; - -static int __init ar7_gpio_init(void) -{ - int rc; - - ar7_gpio_device = platform_device_alloc(DRVNAME, -1); - if (!ar7_gpio_device) - return -ENOMEM; - - rc = platform_device_add(ar7_gpio_device); - if (rc < 0) - goto out_put; - - rc = register_chrdev(ar7_gpio_major, DRVNAME, &ar7_gpio_fops); - if (rc < 0) - goto out_put; - - ar7_gpio_major = rc; - - goto out; - -out_put: - platform_device_put(ar7_gpio_device); -out: - return rc; -} - -static void __exit ar7_gpio_exit(void) -{ - unregister_chrdev(ar7_gpio_major, DRVNAME); - platform_device_unregister(ar7_gpio_device); -} - -module_init(ar7_gpio_init); -module_exit(ar7_gpio_exit); diff --git a/target/linux/ar7-2.6/files/drivers/char/watchdog/ar7_wdt.c b/target/linux/ar7-2.6/files/drivers/char/watchdog/ar7_wdt.c deleted file mode 100644 index 59ac693d43..0000000000 --- a/target/linux/ar7-2.6/files/drivers/char/watchdog/ar7_wdt.c +++ /dev/null @@ -1,329 +0,0 @@ -/* - * linux/drivers/char/ar7_wdt.c - * - * Copyright (C) 2007 OpenWrt.org - * Copyright (c) 2005 Enrik Berkhan - * - * Some code taken from: - * National Semiconductor SCx200 Watchdog support - * Copyright (c) 2001,2002 Christer Weinigel - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include - -#define DRVNAME "ar7_wdt" -#define LONGNAME "TI AR7 Watchdog Timer" - -MODULE_AUTHOR("Nicolas Thill "); -MODULE_DESCRIPTION(LONGNAME); -MODULE_LICENSE("GPL"); -MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); - -static int margin = 60; -module_param(margin, int, 0); -MODULE_PARM_DESC(margin, "Watchdog margin in seconds"); - -static int nowayout = WATCHDOG_NOWAYOUT; -module_param(nowayout, int, 0); -MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close"); - -typedef struct { - u32 kick_lock; - u32 kick; - u32 change_lock; - u32 change ; - u32 disable_lock; - u32 disable; - u32 prescale_lock; - u32 prescale; -} ar7_wdt_t; - -static struct semaphore open_semaphore; -static unsigned expect_close; - -/* XXX currently fixed, allows max margin ~68.72 secs */ -#define prescale_value 0xFFFF - -static void ar7_wdt_kick(u32 value) -{ - volatile ar7_wdt_t *ar7_wdt = (ar7_wdt_t *)ioremap(AR7_REGS_WDT, sizeof(ar7_wdt_t)); - - ar7_wdt->kick_lock = 0x5555; - if ((ar7_wdt->kick_lock & 3) == 1) { - ar7_wdt->kick_lock = 0xAAAA; - if ((ar7_wdt->kick_lock & 3) == 3) { - ar7_wdt->kick = value; - return; - } - } - printk(KERN_ERR DRVNAME ": failed to unlock WDT kick reg\n"); -} - -static void ar7_wdt_prescale(u32 value) -{ - volatile ar7_wdt_t *ar7_wdt = (ar7_wdt_t *)ioremap(AR7_REGS_WDT, sizeof(ar7_wdt_t)); - - ar7_wdt->prescale_lock = 0x5A5A; - if ((ar7_wdt->prescale_lock & 3) == 1) { - ar7_wdt->prescale_lock = 0xA5A5; - if ((ar7_wdt->prescale_lock & 3) == 3) { - ar7_wdt->prescale = value; - return; - } - } - printk(KERN_ERR DRVNAME ": failed to unlock WDT prescale reg\n"); -} - -static void ar7_wdt_change(u32 value) -{ - volatile ar7_wdt_t *ar7_wdt = (ar7_wdt_t *)ioremap(AR7_REGS_WDT, sizeof(ar7_wdt_t)); - - ar7_wdt->change_lock = 0x6666; - if ((ar7_wdt->change_lock & 3) == 1) { - ar7_wdt->change_lock = 0xBBBB; - if ((ar7_wdt->change_lock & 3) == 3) { - ar7_wdt->change = value; - return; - } - } - printk(KERN_ERR DRVNAME ": failed to unlock WDT change reg\n"); -} - -static void ar7_wdt_disable(u32 value) -{ - volatile ar7_wdt_t *ar7_wdt = (ar7_wdt_t *)ioremap(AR7_REGS_WDT, sizeof(ar7_wdt_t)); - - ar7_wdt->disable_lock = 0x7777; - if ((ar7_wdt->disable_lock & 3) == 1) { - ar7_wdt->disable_lock = 0xCCCC; - if ((ar7_wdt->disable_lock & 3) == 2) { - ar7_wdt->disable_lock = 0xDDDD; - if ((ar7_wdt->disable_lock & 3) == 3) { - ar7_wdt->disable = value; - return; - } - } - } - printk(KERN_ERR DRVNAME ": failed to unlock WDT disable reg\n"); -} - -static void ar7_wdt_update_margin(int new_margin) -{ - u32 change; - - change = new_margin * (ar7_vbus_freq() / prescale_value); - if (change < 1) change = 1; - if (change > 0xFFFF) change = 0xFFFF; - ar7_wdt_change(change); - margin = change * prescale_value / ar7_vbus_freq(); - printk(KERN_INFO DRVNAME - ": timer margin %d seconds (prescale %d, change %d, freq %d)\n", - margin, prescale_value, change, ar7_vbus_freq()); -} - -static void ar7_wdt_enable_wdt(void) -{ - printk(KERN_DEBUG DRVNAME ": enabling watchdog timer\n"); - ar7_wdt_disable(1); - ar7_wdt_kick(1); -} - -static void ar7_wdt_disable_wdt(void) -{ - printk(KERN_DEBUG DRVNAME ": disabling watchdog timer\n"); - ar7_wdt_disable(0); -} - -static int ar7_wdt_open(struct inode *inode, struct file *file) -{ - /* only allow one at a time */ - if (down_trylock(&open_semaphore)) - return -EBUSY; - ar7_wdt_enable_wdt(); - expect_close = 0; - - return 0; -} - -static int ar7_wdt_release(struct inode *inode, struct file *file) -{ - if (!expect_close) { - printk(KERN_WARNING DRVNAME ": watchdog device closed unexpectedly, will not disable the watchdog timer\n"); - } else if (!nowayout) { - ar7_wdt_disable_wdt(); - } - up(&open_semaphore); - - return 0; -} - -static int ar7_wdt_notify_sys(struct notifier_block *this, - unsigned long code, void *unused) -{ - if (code == SYS_HALT || code == SYS_POWER_OFF) - if (!nowayout) - ar7_wdt_disable_wdt(); - - return NOTIFY_DONE; -} - -static struct notifier_block ar7_wdt_notifier = -{ - .notifier_call = ar7_wdt_notify_sys -}; - -static ssize_t ar7_wdt_write(struct file *file, const char *data, - size_t len, loff_t *ppos) -{ - if (ppos != &file->f_pos) - return -ESPIPE; - - /* check for a magic close character */ - if (len) { - size_t i; - - ar7_wdt_kick(1); - - expect_close = 0; - for (i = 0; i < len; ++i) { - char c; - if (get_user(c, data+i)) - return -EFAULT; - if (c == 'V') - expect_close = 1; - } - - } - return len; -} - -static int ar7_wdt_ioctl(struct inode *inode, struct file *file, - unsigned int cmd, unsigned long arg) -{ - static struct watchdog_info ident = { - .identity = LONGNAME, - .firmware_version = 1, - .options = (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING), - }; - int new_margin; - - switch (cmd) { - default: - return -ENOTTY; - case WDIOC_GETSUPPORT: - if(copy_to_user((struct watchdog_info *)arg, &ident, - sizeof(ident))) - return -EFAULT; - return 0; - case WDIOC_GETSTATUS: - case WDIOC_GETBOOTSTATUS: - if (put_user(0, (int *)arg)) - return -EFAULT; - return 0; - case WDIOC_KEEPALIVE: - ar7_wdt_kick(1); - return 0; - case WDIOC_SETTIMEOUT: - if (get_user(new_margin, (int *)arg)) - return -EFAULT; - if (new_margin < 1) - return -EINVAL; - - ar7_wdt_update_margin(new_margin); - ar7_wdt_kick(1); - - case WDIOC_GETTIMEOUT: - if (put_user(margin, (int *)arg)) - return -EFAULT; - return 0; - } -} - -static struct file_operations ar7_wdt_fops = { - .owner = THIS_MODULE, - .write = ar7_wdt_write, - .ioctl = ar7_wdt_ioctl, - .open = ar7_wdt_open, - .release = ar7_wdt_release, -}; - -static struct miscdevice ar7_wdt_miscdev = { - .minor = WATCHDOG_MINOR, - .name = "watchdog", - .fops = &ar7_wdt_fops, -}; - -static int __init ar7_wdt_init(void) -{ - int rc; - - if (!request_mem_region(AR7_REGS_WDT, sizeof(ar7_wdt_t), LONGNAME)) { - printk(KERN_WARNING DRVNAME ": watchdog I/O region busy\n"); - return -EBUSY; - } - - ar7_wdt_disable_wdt(); - ar7_wdt_prescale(prescale_value); - ar7_wdt_update_margin(margin); - - sema_init(&open_semaphore, 1); - - rc = misc_register(&ar7_wdt_miscdev); - if (rc) { - printk(KERN_ERR DRVNAME ": unable to register misc device\n"); - goto out_alloc; - } - - rc = register_reboot_notifier(&ar7_wdt_notifier); - if (rc) { - printk(KERN_ERR DRVNAME ": unable to register reboot notifier\n"); - goto out_register; - } - goto out; - -out_register: - misc_deregister(&ar7_wdt_miscdev); -out_alloc: - release_mem_region(AR7_REGS_WDT, sizeof(ar7_wdt_t)); -out: - return rc; -} - -static void __exit ar7_wdt_cleanup(void) -{ - unregister_reboot_notifier(&ar7_wdt_notifier); - misc_deregister(&ar7_wdt_miscdev); - release_mem_region(AR7_REGS_WDT, sizeof(ar7_wdt_t)); -} - -module_init(ar7_wdt_init); -module_exit(ar7_wdt_cleanup); diff --git a/target/linux/ar7-2.6/files/drivers/leds/leds-ar7.c b/target/linux/ar7-2.6/files/drivers/leds/leds-ar7.c deleted file mode 100644 index fbef7d3bbf..0000000000 --- a/target/linux/ar7-2.6/files/drivers/leds/leds-ar7.c +++ /dev/null @@ -1,132 +0,0 @@ -/* - * linux/drivers/leds/leds-ar7.c - * - * Copyright (C) 2007 OpenWrt.org - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - - -#include -#include -#include -#include -#include -#include - -#include - -#define DRVNAME "ar7-leds" -#define LONGNAME "TI AR7 LEDs driver" - -MODULE_AUTHOR("Nicolas Thill "); -MODULE_DESCRIPTION(LONGNAME); -MODULE_LICENSE("GPL"); - -static void ar7_status_led_set(struct led_classdev *pled, - enum led_brightness value) -{ - gpio_set_value(AR7_GPIO_BIT_STATUS_LED, value ? 0 : 1); -} - -static struct led_classdev ar7_status_led = { - .name = "ar7:status", - .brightness_set = ar7_status_led_set, -}; - -#ifdef CONFIG_PM -static int ar7_leds_suspend(struct platform_device *dev, - pm_message_t state) -{ - led_classdev_suspend(&ar7_status_led); - return 0; -} - -static int ar7_leds_resume(struct platform_device *dev) -{ - led_classdev_resume(&ar7_status_led); - return 0; -} -#else /* CONFIG_PM */ -#define ar7_leds_suspend NULL -#define ar7_leds_resume NULL -#endif /* CONFIG_PM */ - -static int ar7_leds_probe(struct platform_device *pdev) -{ - int rc; - - rc = led_classdev_register(&pdev->dev, &ar7_status_led); - if (rc < 0 ) - goto out; - - ar7_gpio_enable(AR7_GPIO_BIT_STATUS_LED); - gpio_direction_output(AR7_GPIO_BIT_STATUS_LED); - -out: - return rc; -} - -static int ar7_leds_remove(struct platform_device *pdev) -{ - led_classdev_unregister(&ar7_status_led); - - return 0; -} - -static struct platform_device *ar7_leds_device; - -static struct platform_driver ar7_leds_driver = { - .probe = ar7_leds_probe, - .remove = ar7_leds_remove, - .suspend = ar7_leds_suspend, - .resume = ar7_leds_resume, - .driver = { - .name = DRVNAME, - }, -}; - -static int __init ar7_leds_init(void) -{ - int rc; - - ar7_leds_device = platform_device_alloc(DRVNAME, -1); - if (!ar7_leds_device) - return -ENOMEM; - - rc = platform_device_add(ar7_leds_device); - if (rc < 0) - goto out_put; - - rc = platform_driver_register(&ar7_leds_driver); - if (rc < 0) - goto out_put; - - goto out; - -out_put: - platform_device_put(ar7_leds_device); -out: - return rc; -} - -static void __exit ar7_leds_exit(void) -{ - platform_driver_unregister(&ar7_leds_driver); - platform_device_unregister(ar7_leds_device); -} - -module_init(ar7_leds_init); -module_exit(ar7_leds_exit); diff --git a/target/linux/ar7-2.6/files/drivers/mtd/ar7part.c b/target/linux/ar7-2.6/files/drivers/mtd/ar7part.c deleted file mode 100644 index 587bb31bb2..0000000000 --- a/target/linux/ar7-2.6/files/drivers/mtd/ar7part.c +++ /dev/null @@ -1,140 +0,0 @@ -/* - * $Id$ - * - * Copyright (C) 2007 OpenWrt.org - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * TI AR7 flash partition table. - * Based on ar7 map by Felix Fietkau. - * - */ - -#include -#include - -#include -#include -#include -#include - -struct ar7_bin_rec { - unsigned int checksum; - unsigned int length; - unsigned int address; -}; - -static struct mtd_partition ar7_parts[5]; - -static int create_mtd_partitions(struct mtd_info *master, - struct mtd_partition **pparts, - unsigned long origin) -{ - struct ar7_bin_rec header; - unsigned int offset, len; - unsigned int pre_size = master->erasesize, post_size = 0, - root_offset = 0xe0000; - int retries = 10; - - printk("Parsing AR7 partition map...\n"); - - ar7_parts[0].name = "loader"; - ar7_parts[0].offset = 0; - ar7_parts[0].size = master->erasesize; - ar7_parts[0].mask_flags = MTD_WRITEABLE; - - ar7_parts[1].name = "config"; - ar7_parts[1].offset = 0; - ar7_parts[1].size = master->erasesize; - ar7_parts[1].mask_flags = 0; - - do { - offset = pre_size; - master->read(master, offset, sizeof(header), &len, (u_char *)&header); - if (!strncmp((char *)&header, "TIENV0.8", 8)) - ar7_parts[1].offset = pre_size; - if (header.checksum == 0xfeedfa42) - break; - if (header.checksum == 0xfeed1281) - break; - pre_size += master->erasesize; - } while (retries--); - - pre_size = offset; - - if (!ar7_parts[1].offset) { - ar7_parts[1].offset = master->size - master->erasesize; - post_size = master->erasesize; - } - - switch (header.checksum) { - case 0xfeedfa42: - while (header.length) { - offset += sizeof(header) + header.length; - master->read(master, offset, sizeof(header), - &len, (u_char *)&header); - } - root_offset = offset + sizeof(header) + 4; - break; - case 0xfeed1281: - while (header.length) { - offset += sizeof(header) + header.length; - master->read(master, offset, sizeof(header), - &len, (u_char *)&header); - } - root_offset = offset + sizeof(header) + 4 + 0xff; - root_offset &= ~(u32)0xff; - break; - default: - printk("Unknown magic: %08x\n", header.checksum); - break; - } - - master->read(master, root_offset, sizeof(header), &len, (u_char *)&header); - if (header.checksum != SQUASHFS_MAGIC) { - root_offset += master->erasesize - 1; - root_offset &= ~(master->erasesize - 1); - } - - ar7_parts[2].name = "linux"; - ar7_parts[2].offset = pre_size; - ar7_parts[2].size = master->size - pre_size - post_size; - ar7_parts[2].mask_flags = 0; - - ar7_parts[3].name = "rootfs"; - ar7_parts[3].offset = root_offset; - ar7_parts[3].size = master->size - root_offset - post_size; - ar7_parts[3].mask_flags = 0; - - *pparts = ar7_parts; - return 4; -} - -static struct mtd_part_parser ar7_parser = { - .owner = THIS_MODULE, - .parse_fn = create_mtd_partitions, - .name = "ar7part", -}; - -static int __init ar7_parser_init(void) -{ - return register_mtd_parser(&ar7_parser); -} - -module_init(ar7_parser_init); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Felix Fietkau, Eugene Konev"); -MODULE_DESCRIPTION("MTD partitioning for TI AR7"); diff --git a/target/linux/ar7-2.6/files/drivers/net/cpmac.c b/target/linux/ar7-2.6/files/drivers/net/cpmac.c deleted file mode 100644 index 4d957f0113..0000000000 --- a/target/linux/ar7-2.6/files/drivers/net/cpmac.c +++ /dev/null @@ -1,1200 +0,0 @@ -/* - * $Id$ - * - * Copyright (C) 2006, 2007 OpenWrt.org - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include -#include -#include - -#include -#include /* printk() */ -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -MODULE_AUTHOR("Eugene Konev"); -MODULE_DESCRIPTION("TI AR7 ethernet driver (CPMAC)"); -MODULE_LICENSE("GPL"); - -static int rx_ring_size = 64; -static int disable_napi = 0; -module_param(rx_ring_size, int, 64); -module_param(disable_napi, int, 0); -MODULE_PARM_DESC(rx_ring_size, "Size of rx ring (in skbs)"); -MODULE_PARM_DESC(disable_napi, "Disable NAPI polling"); - -/* Register definitions */ -struct cpmac_control_regs { - volatile u32 revision; - volatile u32 control; - volatile u32 teardown; - volatile u32 unused; -} __attribute__ ((packed)); - -struct cpmac_int_regs { - volatile u32 stat_raw; - volatile u32 stat_masked; - volatile u32 enable; - volatile u32 clear; -} __attribute__ ((packed)); - -struct cpmac_stats { - volatile u32 good; - volatile u32 bcast; - volatile u32 mcast; - volatile u32 pause; - volatile u32 crc_error; - volatile u32 align_error; - volatile u32 oversized; - volatile u32 jabber; - volatile u32 undersized; - volatile u32 fragment; - volatile u32 filtered; - volatile u32 qos_filtered; - volatile u32 octets; -} __attribute__ ((packed)); - -struct cpmac_regs { - struct cpmac_control_regs tx_ctrl; - struct cpmac_control_regs rx_ctrl; - volatile u32 unused1[56]; - volatile u32 mbp; -/* MBP bits */ -#define MBP_RXPASSCRC 0x40000000 -#define MBP_RXQOS 0x20000000 -#define MBP_RXNOCHAIN 0x10000000 -#define MBP_RXCMF 0x01000000 -#define MBP_RXSHORT 0x00800000 -#define MBP_RXCEF 0x00400000 -#define MBP_RXPROMISC 0x00200000 -#define MBP_PROMISCCHAN(chan) (((chan) & 0x7) << 16) -#define MBP_RXBCAST 0x00002000 -#define MBP_BCASTCHAN(chan) (((chan) & 0x7) << 8) -#define MBP_RXMCAST 0x00000020 -#define MBP_MCASTCHAN(chan) ((chan) & 0x7) - volatile u32 unicast_enable; - volatile u32 unicast_clear; - volatile u32 max_len; - volatile u32 buffer_offset; - volatile u32 filter_flow_threshold; - volatile u32 unused2[2]; - volatile u32 flow_thre[8]; - volatile u32 free_buffer[8]; - volatile u32 mac_control; -#define MAC_TXPTYPE 0x00000200 -#define MAC_TXPACE 0x00000040 -#define MAC_MII 0x00000020 -#define MAC_TXFLOW 0x00000010 -#define MAC_RXFLOW 0x00000008 -#define MAC_MTEST 0x00000004 -#define MAC_LOOPBACK 0x00000002 -#define MAC_FDX 0x00000001 - volatile u32 mac_status; -#define MACST_QOS 0x4 -#define MACST_RXFLOW 0x2 -#define MACST_TXFLOW 0x1 - volatile u32 emc_control; - volatile u32 unused3; - struct cpmac_int_regs tx_int; - volatile u32 mac_int_vector; -/* Int Status bits */ -#define INTST_STATUS 0x80000 -#define INTST_HOST 0x40000 -#define INTST_RX 0x20000 -#define INTST_TX 0x10000 - volatile u32 mac_eoi_vector; - volatile u32 unused4[2]; - struct cpmac_int_regs rx_int; - volatile u32 mac_int_stat_raw; - volatile u32 mac_int_stat_masked; - volatile u32 mac_int_enable; - volatile u32 mac_int_clear; - volatile u32 mac_addr_low[8]; - volatile u32 mac_addr_mid; - volatile u32 mac_addr_high; - volatile u32 mac_hash_low; - volatile u32 mac_hash_high; - volatile u32 boff_test; - volatile u32 pac_test; - volatile u32 rx_pause; - volatile u32 tx_pause; - volatile u32 unused5[2]; - struct cpmac_stats rx_stats; - struct cpmac_stats tx_stats; - volatile u32 unused6[232]; - volatile u32 tx_ptr[8]; - volatile u32 rx_ptr[8]; - volatile u32 tx_ack[8]; - volatile u32 rx_ack[8]; - -} __attribute__ ((packed)); - -struct cpmac_mdio_regs { - volatile u32 version; - volatile u32 control; -#define MDIOC_IDLE 0x80000000 -#define MDIOC_ENABLE 0x40000000 -#define MDIOC_PREAMBLE 0x00100000 -#define MDIOC_FAULT 0x00080000 -#define MDIOC_FAULTDETECT 0x00040000 -#define MDIOC_INTTEST 0x00020000 -#define MDIOC_CLKDIV(div) ((div) & 0xff) - volatile u32 alive; - volatile u32 link; - struct cpmac_int_regs link_int; - struct cpmac_int_regs user_int; - u32 unused[20]; - volatile u32 access; -#define MDIO_BUSY 0x80000000 -#define MDIO_WRITE 0x40000000 -#define MDIO_REG(reg) (((reg) & 0x1f) << 21) -#define MDIO_PHY(phy) (((phy) & 0x1f) << 16) -#define MDIO_DATA(data) ((data) & 0xffff) - volatile u32 physel; -} __attribute__ ((packed)); - -/* Descriptor */ -struct cpmac_desc { - u32 hw_next; - u32 hw_data; - u16 buflen; - u16 bufflags; - u16 datalen; - u16 dataflags; -/* Flags bits */ -#define CPMAC_SOP 0x8000 -#define CPMAC_EOP 0x4000 -#define CPMAC_OWN 0x2000 -#define CPMAC_EOQ 0x1000 - struct sk_buff *skb; - struct cpmac_desc *next; -} __attribute__ ((packed)); - -struct cpmac_priv { - struct net_device_stats stats; - spinlock_t lock; - struct sk_buff *skb_pool; - int free_skbs; - struct cpmac_desc *rx_head; - int tx_head, tx_tail; - struct cpmac_desc *desc_ring; - struct cpmac_regs *regs; - struct mii_bus *mii_bus; - struct phy_device *phy; - char phy_name[BUS_ID_SIZE]; - struct plat_cpmac_data *config; - int oldlink, oldspeed, oldduplex; - u32 msg_enable; - struct net_device *dev; - struct work_struct alloc_work; -}; - -static irqreturn_t cpmac_irq(int, void *); -static void cpmac_reset(struct net_device *dev); -static void cpmac_hw_init(struct net_device *dev); -static int cpmac_stop(struct net_device *dev); -static int cpmac_open(struct net_device *dev); - -#define CPMAC_LOW_THRESH 32 -#define CPMAC_ALLOC_SIZE 64 -#define CPMAC_SKB_SIZE 1518 -#define CPMAC_TX_RING_SIZE 8 - -#ifdef CPMAC_DEBUG -static void cpmac_dump_regs(u32 *base, int count) -{ - int i; - for (i = 0; i < (count + 3) / 4; i++) { - if (i % 4 == 0) printk("\nCPMAC[0x%04x]:", i * 4); - printk(" 0x%08x", *(base + i)); - } - printk("\n"); -} -#endif - -static int cpmac_mdio_read(struct mii_bus *bus, int phy_id, int regnum) -{ - struct cpmac_mdio_regs *regs = (struct cpmac_mdio_regs *)bus->priv; - volatile u32 val; - - while ((val = regs->access) & MDIO_BUSY); - regs->access = MDIO_BUSY | MDIO_REG(regnum & 0x1f) | - MDIO_PHY(phy_id & 0x1f); - while ((val = regs->access) & MDIO_BUSY); - - return val & 0xffff; -} - -static int cpmac_mdio_write(struct mii_bus *bus, int phy_id, int regnum, u16 val) -{ - struct cpmac_mdio_regs *regs = (struct cpmac_mdio_regs *)bus->priv; - volatile u32 tmp; - - while ((tmp = regs->access) & MDIO_BUSY); - regs->access = MDIO_BUSY | MDIO_WRITE | - MDIO_REG(regnum & 0x1f) | MDIO_PHY(phy_id & 0x1f) | - val; - - return 0; -} - -static int cpmac_mdio_reset(struct mii_bus *bus) -{ - struct cpmac_mdio_regs *regs = (struct cpmac_mdio_regs *)bus->priv; - - ar7_device_reset(AR7_RESET_BIT_MDIO); - regs->control = MDIOC_ENABLE | - MDIOC_CLKDIV(ar7_cpmac_freq() / 2200000 - 1); - - return 0; -} - -static int mii_irqs[PHY_MAX_ADDR] = { PHY_POLL, }; - -static struct mii_bus cpmac_mii = { - .name = "cpmac-mii", - .read = cpmac_mdio_read, - .write = cpmac_mdio_write, - .reset = cpmac_mdio_reset, - .irq = mii_irqs, -}; - -static int cpmac_config(struct net_device *dev, struct ifmap *map) -{ - if (dev->flags & IFF_UP) - return -EBUSY; - - /* Don't allow changing the I/O address */ - if (map->base_addr != dev->base_addr) - return -EOPNOTSUPP; - - /* ignore other fields */ - return 0; -} - -static int cpmac_set_mac_address(struct net_device *dev, void *addr) -{ - struct sockaddr *sa = addr; - - if (dev->flags & IFF_UP) - return -EBUSY; - - memcpy(dev->dev_addr, sa->sa_data, dev->addr_len); - - return 0; -} - -static void cpmac_set_multicast_list(struct net_device *dev) -{ - struct dev_mc_list *iter; - int i; - int hash, tmp; - int hashlo = 0, hashhi = 0; - struct cpmac_priv *priv = netdev_priv(dev); - - if(dev->flags & IFF_PROMISC) { - priv->regs->mbp &= ~MBP_PROMISCCHAN(0); /* promisc channel 0 */ - priv->regs->mbp |= MBP_RXPROMISC; - } else { - priv->regs->mbp &= ~MBP_RXPROMISC; - if(dev->flags & IFF_ALLMULTI) { - /* enable all multicast mode */ - priv->regs->mac_hash_low = 0xffffffff; - priv->regs->mac_hash_high = 0xffffffff; - } else { - for(i = 0, iter = dev->mc_list; i < dev->mc_count; - i++, iter = iter->next) { - hash = 0; - tmp = iter->dmi_addr[0]; - hash ^= (tmp >> 2) ^ (tmp << 4); - tmp = iter->dmi_addr[1]; - hash ^= (tmp >> 4) ^ (tmp << 2); - tmp = iter->dmi_addr[2]; - hash ^= (tmp >> 6) ^ tmp; - tmp = iter->dmi_addr[4]; - hash ^= (tmp >> 2) ^ (tmp << 4); - tmp = iter->dmi_addr[5]; - hash ^= (tmp >> 4) ^ (tmp << 2); - tmp = iter->dmi_addr[6]; - hash ^= (tmp >> 6) ^ tmp; - hash &= 0x3f; - if(hash < 32) { - hashlo |= 1<regs->mac_hash_low = hashlo; - priv->regs->mac_hash_high = hashhi; - } - } -} - -static struct sk_buff *cpmac_get_skb(struct net_device *dev) -{ - struct sk_buff *skb; - struct cpmac_priv *priv = netdev_priv(dev); - - skb = priv->skb_pool; - if (likely(skb)) { - priv->skb_pool = skb->next; - } else { - skb = dev_alloc_skb(CPMAC_SKB_SIZE + 2); - if (skb) { - skb->next = NULL; - skb_reserve(skb, 2); - skb->dev = priv->dev; - } - } - - if (likely(priv->free_skbs)) - priv->free_skbs--; - - if (priv->free_skbs < CPMAC_LOW_THRESH) - schedule_work(&priv->alloc_work); - - return skb; -} - -static inline struct sk_buff *cpmac_rx_one(struct net_device *dev, - struct cpmac_priv *priv, - struct cpmac_desc *desc) -{ - unsigned long flags; - char *data; - struct sk_buff *skb, *result = NULL; - - priv->regs->rx_ack[0] = virt_to_phys(desc); - if (unlikely(!desc->datalen)) { - if (printk_ratelimit()) - printk(KERN_WARNING "%s: rx: spurious interrupt\n", - dev->name); - priv->stats.rx_errors++; - return NULL; - } - - spin_lock_irqsave(&priv->lock, flags); - skb = cpmac_get_skb(dev); - if (likely(skb)) { - data = (char *)phys_to_virt(desc->hw_data); - dma_cache_inv((u32)data, desc->datalen); - skb_put(desc->skb, desc->datalen); - desc->skb->protocol = eth_type_trans(desc->skb, dev); - desc->skb->ip_summed = CHECKSUM_NONE; - priv->stats.rx_packets++; - priv->stats.rx_bytes += desc->datalen; - result = desc->skb; - desc->skb = skb; - } else { -#ifdef CPMAC_DEBUG - if (printk_ratelimit()) - printk("%s: low on skbs, dropping packet\n", - dev->name); -#endif - priv->stats.rx_dropped++; - } - spin_unlock_irqrestore(&priv->lock, flags); - - desc->hw_data = virt_to_phys(desc->skb->data); - desc->buflen = CPMAC_SKB_SIZE; - desc->dataflags = CPMAC_OWN; - dma_cache_wback((u32)desc, 16); - - return result; -} - -static void cpmac_rx(struct net_device *dev) -{ - struct sk_buff *skb; - struct cpmac_desc *desc; - struct cpmac_priv *priv = netdev_priv(dev); - - spin_lock(&priv->lock); - if (unlikely(!priv->rx_head)) { - spin_unlock(&priv->lock); - return; - } - - desc = priv->rx_head; - dma_cache_inv((u32)desc, 16); - - while ((desc->dataflags & CPMAC_OWN) == 0) { - skb = cpmac_rx_one(dev, priv, desc); - if (likely(skb)) { - netif_rx(skb); - } - desc = desc->next; - dma_cache_inv((u32)desc, 16); - } - - priv->rx_head = desc; - priv->regs->rx_ptr[0] = virt_to_phys(desc); - spin_unlock(&priv->lock); -} - -static int cpmac_poll(struct net_device *dev, int *budget) -{ - struct sk_buff *skb; - struct cpmac_desc *desc; - int received = 0, quota = min(dev->quota, *budget); - struct cpmac_priv *priv = netdev_priv(dev); - - if (unlikely(!priv->rx_head)) { - if (printk_ratelimit()) - printk(KERN_WARNING "%s: rx: polling, but no queue\n", - dev->name); - netif_rx_complete(dev); - return 0; - } - - desc = priv->rx_head; - dma_cache_inv((u32)desc, 16); - - while ((received < quota) && ((desc->dataflags & CPMAC_OWN) == 0)) { - skb = cpmac_rx_one(dev, priv, desc); - if (likely(skb)) { - netif_receive_skb(skb); - received++; - } - desc = desc->next; - priv->rx_head = desc; - dma_cache_inv((u32)desc, 16); - } - - *budget -= received; - dev->quota -= received; -#ifdef CPMAC_DEBUG - printk("%s: processed %d packets\n", dev->name, received); -#endif - if (desc->dataflags & CPMAC_OWN) { - priv->regs->rx_ptr[0] = virt_to_phys(desc); - netif_rx_complete(dev); - priv->regs->rx_int.enable = 0x1; - priv->regs->rx_int.clear = 0xfe; - return 0; - } - - return 1; -} - -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20) -static void -cpmac_alloc_skbs(struct work_struct *work) -{ - struct cpmac_priv *priv = container_of(work, struct cpmac_priv, - alloc_work); -#else -static void -cpmac_alloc_skbs(void *data) -{ - struct net_device *dev = (struct net_device*)data; - struct cpmac_priv *priv = netdev_priv(dev); -#endif - unsigned long flags; - int i, num_skbs = 0; - struct sk_buff *skb, *skbs = NULL; - - for (i = 0; i < CPMAC_ALLOC_SIZE; i++) { - skb = alloc_skb(CPMAC_SKB_SIZE + 2, GFP_KERNEL); - if (!skb) - break; - skb->next = skbs; - skb_reserve(skb, 2); - skb->dev = priv->dev; - num_skbs++; - skbs = skb; - } - - if (skbs) { - spin_lock_irqsave(&priv->lock, flags); - for (skb = priv->skb_pool; skb && skb->next; skb = skb->next); - if (!skb) { - priv->skb_pool = skbs; - } else { - skb->next = skbs; - } - priv->free_skbs += num_skbs; - spin_unlock_irqrestore(&priv->lock, flags); -#ifdef CPMAC_DEBUG - printk("%s: allocated %d skbs\n", priv->dev->name, num_skbs); -#endif - } -} - -static int cpmac_start_xmit(struct sk_buff *skb, struct net_device *dev) -{ - unsigned long flags; - int len, chan; - struct cpmac_desc *desc; - struct cpmac_priv *priv = netdev_priv(dev); - - len = skb->len; - if (unlikely(len < ETH_ZLEN)) { - if (unlikely(skb_padto(skb, ETH_ZLEN))) { - if (printk_ratelimit()) - printk(KERN_NOTICE "%s: padding failed, dropping\n", - dev->name); - spin_lock_irqsave(&priv->lock, flags); - priv->stats.tx_dropped++; - spin_unlock_irqrestore(&priv->lock, flags); - return -ENOMEM; - } - len = ETH_ZLEN; - } - spin_lock_irqsave(&priv->lock, flags); - chan = priv->tx_tail++; - priv->tx_tail %= 8; - if (priv->tx_tail == priv->tx_head) - netif_stop_queue(dev); - - desc = &priv->desc_ring[chan]; - dma_cache_inv((u32)desc, 16); - if (desc->dataflags & CPMAC_OWN) { - printk(KERN_NOTICE "%s: tx dma ring full, dropping\n", dev->name); - priv->stats.tx_dropped++; - spin_unlock_irqrestore(&priv->lock, flags); - return -ENOMEM; - } - - dev->trans_start = jiffies; - desc->dataflags = CPMAC_SOP | CPMAC_EOP | CPMAC_OWN; - desc->skb = skb; - desc->hw_data = virt_to_phys(skb->data); - dma_cache_wback((u32)skb->data, len); - desc->buflen = len; - desc->datalen = len; - desc->hw_next = 0; - dma_cache_wback((u32)desc, 16); - priv->regs->tx_ptr[chan] = virt_to_phys(desc); - spin_unlock_irqrestore(&priv->lock, flags); - - return 0; -} - -static void cpmac_end_xmit(struct net_device *dev, int channel) -{ - struct cpmac_desc *desc; - struct cpmac_priv *priv = netdev_priv(dev); - - spin_lock(&priv->lock); - desc = &priv->desc_ring[channel]; - priv->regs->tx_ack[channel] = virt_to_phys(desc); - if (likely(desc->skb)) { - priv->stats.tx_packets++; - priv->stats.tx_bytes += desc->skb->len; - dev_kfree_skb_irq(desc->skb); - if (netif_queue_stopped(dev)) - netif_wake_queue(dev); - } else { - if (printk_ratelimit()) - printk(KERN_NOTICE "%s: end_xmit: spurious interrupt\n", - dev->name); - } - spin_unlock(&priv->lock); -} - -static void cpmac_reset(struct net_device *dev) -{ - int i; - struct cpmac_priv *priv = netdev_priv(dev); - - ar7_device_reset(priv->config->reset_bit); - priv->regs->rx_ctrl.control &= ~1; - priv->regs->tx_ctrl.control &= ~1; - for (i = 0; i < 8; i++) { - priv->regs->tx_ptr[i] = 0; - priv->regs->rx_ptr[i] = 0; - } - priv->regs->mac_control &= ~MAC_MII; /* disable mii */ -} - -static inline void cpmac_free_rx_ring(struct net_device *dev) -{ - struct cpmac_desc *desc; - int i; - struct cpmac_priv *priv = netdev_priv(dev); - - if (unlikely(!priv->rx_head)) - return; - - desc = priv->rx_head; - dma_cache_inv((u32)desc, 16); - - for (i = 0; i < rx_ring_size; i++) { - desc->buflen = CPMAC_SKB_SIZE; - if ((desc->dataflags & CPMAC_OWN) == 0) { - desc->dataflags = CPMAC_OWN; - priv->stats.rx_dropped++; - } - dma_cache_wback((u32)desc, 16); - desc = desc->next; - dma_cache_inv((u32)desc, 16); - } -} - -static irqreturn_t cpmac_irq(int irq, void *dev_id) -{ - struct net_device *dev = (struct net_device *)dev_id; - struct cpmac_priv *priv = netdev_priv(dev); - u32 status; - - if (!dev) - return IRQ_NONE; - - status = priv->regs->mac_int_vector; - - if (status & INTST_TX) { - cpmac_end_xmit(dev, (status & 7)); - } - - if (status & INTST_RX) { - if (disable_napi) { - cpmac_rx(dev); - } else { - priv->regs->rx_int.enable = 0; - priv->regs->rx_int.clear = 0xff; - netif_rx_schedule(dev); - } - } - - priv->regs->mac_eoi_vector = 0; - - if (unlikely(status & (INTST_HOST | INTST_STATUS))) { - printk(KERN_ERR "%s: hw error, resetting...\n", dev->name); - spin_lock(&priv->lock); - phy_stop(priv->phy); - cpmac_reset(dev); - cpmac_free_rx_ring(dev); - cpmac_hw_init(dev); - spin_unlock(&priv->lock); - } - - return IRQ_HANDLED; -} - -static void cpmac_tx_timeout(struct net_device *dev) -{ - struct cpmac_priv *priv = netdev_priv(dev); - struct cpmac_desc *desc; - - priv->stats.tx_errors++; - desc = &priv->desc_ring[priv->tx_head++]; - priv->tx_head %= 8; - printk("%s: transmit timeout\n", dev->name); - if (desc->skb) - dev_kfree_skb(desc->skb); - netif_wake_queue(dev); -} - -static int cpmac_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) -{ - struct cpmac_priv *priv = netdev_priv(dev); - if (!(netif_running(dev))) - return -EINVAL; - if (!priv->phy) - return -EINVAL; - if ((cmd == SIOCGMIIPHY) || (cmd == SIOCGMIIREG) || - (cmd == SIOCSMIIREG)) - return phy_mii_ioctl(priv->phy, if_mii(ifr), cmd); - - return -EINVAL; -} - -static int cpmac_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) -{ - struct cpmac_priv *priv = netdev_priv(dev); - - if (priv->phy) - return phy_ethtool_gset(priv->phy, cmd); - - return -EINVAL; -} - -static int cpmac_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) -{ - struct cpmac_priv *priv = netdev_priv(dev); - - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - - if (priv->phy) - return phy_ethtool_sset(priv->phy, cmd); - - return -EINVAL; -} - -static void cpmac_get_drvinfo(struct net_device *dev, - struct ethtool_drvinfo *info) -{ - strcpy(info->driver, "cpmac"); - strcpy(info->version, "0.0.3"); - info->fw_version[0] = '\0'; - sprintf(info->bus_info, "%s", "cpmac"); - info->regdump_len = 0; -} - -static const struct ethtool_ops cpmac_ethtool_ops = { - .get_settings = cpmac_get_settings, - .set_settings = cpmac_set_settings, - .get_drvinfo = cpmac_get_drvinfo, - .get_link = ethtool_op_get_link, -}; - -static struct net_device_stats *cpmac_stats(struct net_device *dev) -{ - struct cpmac_priv *priv = netdev_priv(dev); - - if (netif_device_present(dev)) - return &priv->stats; - - return NULL; -} - -static int cpmac_change_mtu(struct net_device *dev, int mtu) -{ - unsigned long flags; - struct cpmac_priv *priv = netdev_priv(dev); - spinlock_t *lock = &priv->lock; - - if ((mtu < 68) || (mtu > 1500)) - return -EINVAL; - - spin_lock_irqsave(lock, flags); - dev->mtu = mtu; - spin_unlock_irqrestore(lock, flags); - - return 0; -} - -static void cpmac_adjust_link(struct net_device *dev) -{ - struct cpmac_priv *priv = netdev_priv(dev); - unsigned long flags; - int new_state = 0; - - spin_lock_irqsave(&priv->lock, flags); - if (priv->phy->link) { - if (priv->phy->duplex != priv->oldduplex) { - new_state = 1; - priv->oldduplex = priv->phy->duplex; - } - - if (priv->phy->speed != priv->oldspeed) { - new_state = 1; - priv->oldspeed = priv->phy->speed; - } - - if (!priv->oldlink) { - new_state = 1; - priv->oldlink = 1; - netif_schedule(dev); - } - } else if (priv->oldlink) { - new_state = 1; - priv->oldlink = 0; - priv->oldspeed = 0; - priv->oldduplex = -1; - } - - if (new_state) - phy_print_status(priv->phy); - - spin_unlock_irqrestore(&priv->lock, flags); -} - -static void cpmac_hw_init(struct net_device *dev) -{ - int i; - struct cpmac_priv *priv = netdev_priv(dev); - - for (i = 0; i < 8; i++) - priv->regs->tx_ptr[i] = 0; - priv->regs->rx_ptr[0] = virt_to_phys(priv->rx_head); - - priv->regs->mbp = MBP_RXSHORT | MBP_RXBCAST | MBP_RXMCAST; - priv->regs->unicast_enable = 0x1; - priv->regs->unicast_clear = 0xfe; - priv->regs->buffer_offset = 0; - for (i = 0; i < 8; i++) - priv->regs->mac_addr_low[i] = dev->dev_addr[5]; - priv->regs->mac_addr_mid = dev->dev_addr[4]; - priv->regs->mac_addr_high = dev->dev_addr[0] | (dev->dev_addr[1] << 8) - | (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24); - priv->regs->max_len = CPMAC_SKB_SIZE; - priv->regs->rx_int.enable = 0x1; - priv->regs->rx_int.clear = 0xfe; - priv->regs->tx_int.enable = 0xff; - priv->regs->tx_int.clear = 0; - priv->regs->mac_int_enable = 3; - priv->regs->mac_int_clear = 0xfc; - - priv->regs->rx_ctrl.control |= 1; - priv->regs->tx_ctrl.control |= 1; - priv->regs->mac_control |= MAC_MII | MAC_FDX; - - priv->phy->state = PHY_CHANGELINK; - phy_start(priv->phy); -} - -static int cpmac_open(struct net_device *dev) -{ - int i, size, res; - struct cpmac_priv *priv = netdev_priv(dev); - struct cpmac_desc *desc; - struct sk_buff *skb; - -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20) - priv->phy = phy_connect(dev, priv->phy_name, &cpmac_adjust_link, - 0, PHY_INTERFACE_MODE_MII); -#else - priv->phy = phy_connect(dev, priv->phy_name, &cpmac_adjust_link, 0); -#endif - if (IS_ERR(priv->phy)) { - printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name); - return PTR_ERR(priv->phy); - } - - if (!request_mem_region(dev->mem_start, dev->mem_end - - dev->mem_start, dev->name)) { - printk("%s: failed to request registers\n", - dev->name); - res = -ENXIO; - goto fail_reserve; - } - - priv->regs = ioremap_nocache(dev->mem_start, dev->mem_end - - dev->mem_start); - if (!priv->regs) { - printk("%s: failed to remap registers\n", dev->name); - res = -ENXIO; - goto fail_remap; - } - - priv->rx_head = NULL; - size = sizeof(struct cpmac_desc) * (rx_ring_size + - CPMAC_TX_RING_SIZE); - priv->desc_ring = (struct cpmac_desc *)kmalloc(size, GFP_KERNEL); - if (!priv->desc_ring) { - res = -ENOMEM; - goto fail_alloc; - } - - memset((char *)priv->desc_ring, 0, size); - - priv->skb_pool = NULL; - priv->free_skbs = 0; - priv->rx_head = &priv->desc_ring[CPMAC_TX_RING_SIZE]; - -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20) - INIT_WORK(&priv->alloc_work, cpmac_alloc_skbs); -#else - INIT_WORK(&priv->alloc_work, cpmac_alloc_skbs, dev); -#endif - schedule_work(&priv->alloc_work); - flush_scheduled_work(); - - for (i = 0; i < rx_ring_size; i++) { - desc = &priv->rx_head[i]; - skb = cpmac_get_skb(dev); - if (!skb) { - res = -ENOMEM; - goto fail_desc; - } - desc->skb = skb; - desc->hw_data = virt_to_phys(skb->data); - desc->buflen = CPMAC_SKB_SIZE; - desc->dataflags = CPMAC_OWN; - desc->next = &priv->rx_head[(i + 1) % rx_ring_size]; - desc->hw_next = virt_to_phys(desc->next); - dma_cache_wback((u32)desc, 16); - } - - if((res = request_irq(dev->irq, cpmac_irq, SA_INTERRUPT, - dev->name, dev))) { - printk("%s: failed to obtain irq\n", dev->name); - goto fail_irq; - } - - cpmac_reset(dev); - cpmac_hw_init(dev); - - netif_start_queue(dev); - return 0; - -fail_irq: -fail_desc: - for (i = 0; i < rx_ring_size; i++) - if (priv->rx_head[i].skb) - kfree_skb(priv->rx_head[i].skb); -fail_alloc: - kfree(priv->desc_ring); - - for (skb = priv->skb_pool; skb; skb = priv->skb_pool) { - priv->skb_pool = skb->next; - kfree_skb(skb); - } - - iounmap(priv->regs); - -fail_remap: - release_mem_region(dev->mem_start, dev->mem_end - - dev->mem_start); - -fail_reserve: - phy_disconnect(priv->phy); - - return res; -} - -static int cpmac_stop(struct net_device *dev) -{ - int i; - struct sk_buff *skb; - struct cpmac_priv *priv = netdev_priv(dev); - - netif_stop_queue(dev); - - phy_stop(priv->phy); - phy_disconnect(priv->phy); - priv->phy = NULL; - - cpmac_reset(dev); - - for (i = 0; i < 8; i++) { - priv->regs->rx_ptr[i] = 0; - priv->regs->tx_ptr[i] = 0; - priv->regs->mbp = 0; - } - - free_irq(dev->irq, dev); - release_mem_region(dev->mem_start, dev->mem_end - - dev->mem_start); - - cancel_delayed_work(&priv->alloc_work); - flush_scheduled_work(); - - priv->rx_head = &priv->desc_ring[CPMAC_TX_RING_SIZE]; - for (i = 0; i < rx_ring_size; i++) - if (priv->rx_head[i].skb) - kfree_skb(priv->rx_head[i].skb); - - kfree(priv->desc_ring); - - for (skb = priv->skb_pool; skb; skb = priv->skb_pool) { - priv->skb_pool = skb->next; - kfree_skb(skb); - } - - return 0; -} - -static int external_switch = 0; - -static int __devinit cpmac_probe(struct platform_device *pdev) -{ - int i, rc, phy_id; - struct resource *res; - struct cpmac_priv *priv; - struct net_device *dev; - struct plat_cpmac_data *pdata; - - if (strcmp(pdev->name, "cpmac") != 0) - return -ENODEV; - - pdata = pdev->dev.platform_data; - - for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) { - if (!(pdata->phy_mask & (1 << phy_id))) - continue; - if (!cpmac_mii.phy_map[phy_id]) - continue; - break; - } - - if (phy_id == PHY_MAX_ADDR) { - if (external_switch) { - phy_id = 0; - } else { - printk("cpmac: no PHY present\n"); - return -ENODEV; - } - } - - dev = alloc_etherdev(sizeof(struct cpmac_priv)); - - if (!dev) { - printk(KERN_ERR "cpmac: Unable to allocate net_device structure!\n"); - return -ENOMEM; - } - - SET_MODULE_OWNER(dev); - platform_set_drvdata(pdev, dev); - priv = netdev_priv(dev); - - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"); - if (!res) { - rc = -ENODEV; - goto fail; - } - - dev->mem_start = res->start; - dev->mem_end = res->end; - dev->irq = platform_get_irq_byname(pdev, "irq"); - - dev->mtu = 1500; - dev->open = cpmac_open; - dev->stop = cpmac_stop; - dev->set_config = cpmac_config; - dev->hard_start_xmit = cpmac_start_xmit; - dev->do_ioctl = cpmac_ioctl; - dev->get_stats = cpmac_stats; - dev->change_mtu = cpmac_change_mtu; - dev->set_mac_address = cpmac_set_mac_address; - dev->set_multicast_list = cpmac_set_multicast_list; - dev->tx_timeout = cpmac_tx_timeout; - dev->ethtool_ops = &cpmac_ethtool_ops; - if (!disable_napi) { - dev->poll = cpmac_poll; - dev->weight = min(rx_ring_size, 64); - } - - memset(priv, 0, sizeof(struct cpmac_priv)); - spin_lock_init(&priv->lock); - priv->msg_enable = netif_msg_init(NETIF_MSG_WOL, 0x3fff); - priv->config = pdata; - priv->dev = dev; - memcpy(dev->dev_addr, priv->config->dev_addr, sizeof(dev->dev_addr)); - if (phy_id == 31) { - snprintf(priv->phy_name, BUS_ID_SIZE, PHY_ID_FMT, - cpmac_mii.id, phy_id); - } else { - snprintf(priv->phy_name, BUS_ID_SIZE, "fixed@%d:%d", 100, 1); - } - - if ((rc = register_netdev(dev))) { - printk("cpmac: error %i registering device %s\n", - rc, dev->name); - goto fail; - } - - printk("cpmac: device %s (regs: %p, irq: %d, phy: %s, mac: ", - dev->name, (u32 *)dev->mem_start, dev->irq, - priv->phy_name); - for (i = 0; i < 6; i++) { - printk("%02x", dev->dev_addr[i]); - if (i < 5) printk(":"); - else printk(")\n"); - } - - return 0; - -fail: - free_netdev(dev); - return rc; -} - -static int __devexit cpmac_remove(struct platform_device *pdev) -{ - struct net_device *dev = platform_get_drvdata(pdev); - unregister_netdev(dev); - free_netdev(dev); - return 0; -} - -static struct platform_driver cpmac_driver = { - .driver.name = "cpmac", - .probe = cpmac_probe, - .remove = cpmac_remove, -}; - -int __devinit cpmac_init(void) -{ - volatile u32 mask; - int i, res; - cpmac_mii.priv = (struct cpmac_mdio_regs *) - ioremap_nocache(AR7_REGS_MDIO, sizeof(struct cpmac_mdio_regs)); - - if (!cpmac_mii.priv) { - printk("Can't ioremap mdio registers\n"); - return -ENXIO; - } - -#warning FIXME: unhardcode gpio&reset bits - ar7_gpio_disable(26); - ar7_gpio_disable(27); - ar7_device_reset(17); - ar7_device_reset(21); - ar7_device_reset(26); - - cpmac_mii.reset(&cpmac_mii); - - for (i = 0; i < 300000; i++) { - mask = ((struct cpmac_mdio_regs *)cpmac_mii.priv)->alive; - if (mask) - break; - } - - mask &= 0x7fffffff; - if (mask & (mask - 1)) { - external_switch = 1; - mask = 0; - } - - cpmac_mii.phy_mask = ~(mask | 0x80000000); - - res = mdiobus_register(&cpmac_mii); - if (res) - goto fail_mii; - - res = platform_driver_register(&cpmac_driver); - if (res) - goto fail_cpmac; - - return 0; - -fail_cpmac: - mdiobus_unregister(&cpmac_mii); - -fail_mii: - iounmap(cpmac_mii.priv); - - return res; -} - -void __devexit cpmac_exit(void) -{ - platform_driver_unregister(&cpmac_driver); - mdiobus_unregister(&cpmac_mii); -} - -module_init(cpmac_init); -module_exit(cpmac_exit); diff --git a/target/linux/ar7-2.6/files/include/asm-generic/gpio.h b/target/linux/ar7-2.6/files/include/asm-generic/gpio.h deleted file mode 100644 index 2d0aab1d86..0000000000 --- a/target/linux/ar7-2.6/files/include/asm-generic/gpio.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifndef _ASM_GENERIC_GPIO_H -#define _ASM_GENERIC_GPIO_H - -/* platforms that don't directly support access to GPIOs through I2C, SPI, - * or other blocking infrastructure can use these wrappers. - */ - -static inline int gpio_cansleep(unsigned gpio) -{ - return 0; -} - -static inline int gpio_get_value_cansleep(unsigned gpio) -{ - might_sleep(); - return gpio_get_value(gpio); -} - -static inline void gpio_set_value_cansleep(unsigned gpio, int value) -{ - might_sleep(); - gpio_set_value(gpio, value); -} - -#endif /* _ASM_GENERIC_GPIO_H */ diff --git a/target/linux/ar7-2.6/files/include/asm-mips/ar7/ar7.h b/target/linux/ar7-2.6/files/include/asm-mips/ar7/ar7.h deleted file mode 100644 index 3e6a50c324..0000000000 --- a/target/linux/ar7-2.6/files/include/asm-mips/ar7/ar7.h +++ /dev/null @@ -1,168 +0,0 @@ -/* - * $Id$ - * - * Copyright (C) 2006, 2007 OpenWrt.org - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef __AR7_H__ -#define __AR7_H__ - -#include -#include -#include - -#define AR7_REGS_BASE 0x08610000 - -#define AR7_REGS_MAC0 (AR7_REGS_BASE + 0x0000) -#define AR7_REGS_EMIF (AR7_REGS_BASE + 0x0800) -#define AR7_REGS_GPIO (AR7_REGS_BASE + 0x0900) -#define AR7_REGS_POWER (AR7_REGS_BASE + 0x0a00) -#define AR7_REGS_WDT (AR7_REGS_BASE + 0x0b00) -#define AR7_REGS_TIMER0 (AR7_REGS_BASE + 0x0c00) -#define AR7_REGS_TIMER1 (AR7_REGS_BASE + 0x0d00) -#define AR7_REGS_UART0 (AR7_REGS_BASE + 0x0e00) -#define AR7_REGS_UART1 (AR7_REGS_BASE + 0x0f00) -#define AR7_REGS_I2C (AR7_REGS_BASE + 0x1000) -#define AR7_REGS_USB (AR7_REGS_BASE + 0x1200) -#define AR7_REGS_DMA (AR7_REGS_BASE + 0x1400) -#define AR7_REGS_RESET (AR7_REGS_BASE + 0x1600) -#define AR7_REGS_BIST (AR7_REGS_BASE + 0x1700) -#define AR7_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1800) -#define AR7_REGS_DCL (AR7_REGS_BASE + 0x1A00) -#define AR7_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1C00) -#define AR7_REGS_MDIO (AR7_REGS_BASE + 0x1E00) -#define AR7_REGS_FSER (AR7_REGS_BASE + 0x2000) -#define AR7_REGS_IRQ (AR7_REGS_BASE + 0x2400) -#define AR7_REGS_MAC1 (AR7_REGS_BASE + 0x2800) - -#define AR7_RESET_PEREPHERIAL 0x0 -#define AR7_RESET_SOFTWARE 0x4 -#define AR7_RESET_STATUS 0x8 - -#define AR7_RESET_BIT_MDIO 22 - -/* GPIO control registers */ -#define AR7_GPIO_INPUT 0x0 -#define AR7_GPIO_OUTPUT 0x4 -#define AR7_GPIO_DIR 0x8 -#define AR7_GPIO_ENABLE 0xC - -#define AR7_GPIO_BIT_STATUS_LED 8 - -#define AR7_CHIP_7100 0x18 -#define AR7_CHIP_7200 0x2b -#define AR7_CHIP_7300 0x05 - -/* Interrupts */ -#define AR7_IRQ_UART0 15 -#define AR7_IRQ_UART1 16 - -struct plat_cpmac_data { - int reset_bit; - int power_bit; - u32 phy_mask; - char dev_addr[6]; -}; - -struct plat_dsl_data { - int reset_bit_dsl; - int reset_bit_sar; -}; - -extern char *prom_getenv(char *envname); - -extern int ar7_cpu_clock, ar7_bus_clock, ar7_dsp_clock; - -static inline u16 ar7_chip_id(void) -{ - return readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x14)) & 0xffff; -} - -static inline u8 ar7_chip_rev(void) -{ - return (readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x14)) >> 16) & 0xff; -} - -static inline int ar7_cpu_freq(void) -{ - return ar7_cpu_clock; -} - -static inline int ar7_bus_freq(void) -{ - return ar7_bus_clock; -} - -static inline int ar7_vbus_freq(void) -{ - return ar7_bus_clock / 2; -} -#define ar7_cpmac_freq ar7_vbus_freq - -static inline int ar7_dsp_freq(void) -{ - return ar7_dsp_clock; -} - -static inline int ar7_has_high_cpmac(void) -{ - u16 chip_id = ar7_chip_id(); - switch (chip_id) { - case AR7_CHIP_7100: - case AR7_CHIP_7200: - return 0; - default: - return 1; - } -} -#define ar7_has_high_vlynq ar7_has_high_cpmac - -static inline void ar7_device_enable(u32 bit) -{ - void *reset_reg = (void *)KSEG1ADDR(AR7_REGS_RESET + AR7_RESET_PEREPHERIAL); - writel(readl(reset_reg) | (1 << bit), reset_reg); - mdelay(20); -} - -static inline void ar7_device_disable(u32 bit) -{ - void *reset_reg = (void *)KSEG1ADDR(AR7_REGS_RESET + AR7_RESET_PEREPHERIAL); - writel(readl(reset_reg) & ~(1 << bit), reset_reg); - mdelay(20); -} - -static inline void ar7_device_reset(u32 bit) -{ - ar7_device_disable(bit); - ar7_device_enable(bit); -} - -static inline void ar7_device_on(u32 bit) -{ - void *power_reg = (void *)KSEG1ADDR(AR7_REGS_POWER); - writel(readl(power_reg) | (1 << bit), power_reg); - mdelay(20); -} - -static inline void ar7_device_off(u32 bit) -{ - void *power_reg = (void *)KSEG1ADDR(AR7_REGS_POWER); - writel(readl(power_reg) & ~(1 << bit), power_reg); - mdelay(20); -} - -#endif diff --git a/target/linux/ar7-2.6/files/include/asm-mips/ar7/gpio.h b/target/linux/ar7-2.6/files/include/asm-mips/ar7/gpio.h deleted file mode 100644 index 97638077fd..0000000000 --- a/target/linux/ar7-2.6/files/include/asm-mips/ar7/gpio.h +++ /dev/null @@ -1,116 +0,0 @@ -/* - * $Id$ - * - * Copyright (C) 2007 OpenWrt.org - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef __AR7_GPIO_H__ -#define __AR7_GPIO_H__ -#include - -#define AR7_GPIO_MAX 32 - -extern int gpio_request(unsigned gpio, char *label); -extern void gpio_free(unsigned gpio); - -/* Common GPIO layer */ -static inline int gpio_direction_input(unsigned gpio) -{ - void __iomem *gpio_dir = (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_DIR); - - if (gpio >= AR7_GPIO_MAX) - return -EINVAL; - - writel(readl(gpio_dir) | (1 << gpio), gpio_dir); - - return 0; -} - -static inline int gpio_direction_output(unsigned gpio) -{ - void __iomem *gpio_dir = (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_DIR); - - if (gpio >= AR7_GPIO_MAX) - return -EINVAL; - - writel(readl(gpio_dir) & ~(1 << gpio), gpio_dir); - - return 0; -} - -static inline int gpio_get_value(unsigned gpio) -{ - void __iomem *gpio_in = (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_INPUT); - - if (gpio >= AR7_GPIO_MAX) - return -EINVAL; - - return ((readl(gpio_in) & (1 << gpio)) != 0); -} - -static inline void gpio_set_value(unsigned gpio, int value) -{ - void __iomem *gpio_out = (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_OUTPUT); - volatile unsigned tmp; - - if (gpio >= AR7_GPIO_MAX) - return; - - tmp = readl(gpio_out) & ~(1 << gpio); - if (value) - tmp |= 1 << gpio; - writel(tmp, gpio_out); -} - -static inline int gpio_to_irq(unsigned gpio) -{ - return -EINVAL; -} - -static inline int irq_to_gpio(unsigned irq) -{ - return -EINVAL; -} - -/* Board specific GPIO functions */ -static inline int ar7_gpio_enable(unsigned gpio) -{ - void __iomem *gpio_en = (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_ENABLE); - - if (gpio >= AR7_GPIO_MAX) - return -EINVAL; - - writel(readl(gpio_en) | (1 << gpio), gpio_en); - - return 0; -} - -static inline int ar7_gpio_disable(unsigned gpio) -{ - void __iomem *gpio_en = (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_ENABLE); - - if (gpio >= AR7_GPIO_MAX) - return -EINVAL; - - writel(readl(gpio_en) & ~(1 << gpio), gpio_en); - - return 0; -} - -#include - -#endif diff --git a/target/linux/ar7-2.6/files/include/asm-mips/ar7/mmzone.h b/target/linux/ar7-2.6/files/include/asm-mips/ar7/mmzone.h deleted file mode 100644 index 885fdb0cb0..0000000000 --- a/target/linux/ar7-2.6/files/include/asm-mips/ar7/mmzone.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * $Id$ - * - * Copyright (C) 2007 OpenWrt.org - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef _ASM_MACH_MMZONE_H -#define _ASM_MACH_MMZONE_H - -extern pg_data_t __node_data[]; -#define NODE_DATA(nid) (&__node_data[nid]) -#define NODE_MEM_MAP(nid) (NODE_DATA(nid)->node_mem_map) -#define pa_to_nid(addr) (((addr) >= ARCH_PFN_OFFSET << PAGE_SHIFT) ? 0 : -1) - -#endif /* _ASM_MACH_MMZONE_H */ diff --git a/target/linux/ar7-2.6/files/include/asm-mips/ar7/spaces.h b/target/linux/ar7-2.6/files/include/asm-mips/ar7/spaces.h deleted file mode 100644 index 367fe2d344..0000000000 --- a/target/linux/ar7-2.6/files/include/asm-mips/ar7/spaces.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle - * Copyright (C) 2000, 2002 Maciej W. Rozycki - * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc. - */ -#ifndef _ASM_AR7_SPACES_H -#define _ASM_AR7_SPACES_H - - -#define CAC_BASE 0x80000000 -#define IO_BASE 0xa0000000 -#define UNCAC_BASE 0xa0000000 -#define MAP_BASE 0xc0000000 - -/* - * This handles the memory map. - * We handle pages at KSEG0 for kernels with 32 bit address space. - */ -#define PAGE_OFFSET 0x80000000UL -#define ARCH_PFN_OFFSET (0x14000000 >> PAGE_SHIFT) - -/* - * Memory above this physical address will be considered highmem. - */ -#ifndef HIGHMEM_START -#define HIGHMEM_START 0x40000000UL -#endif - -#endif /* __ASM_AR7_SPACES_H */ diff --git a/target/linux/ar7-2.6/files/include/asm-mips/ar7/vlynq.h b/target/linux/ar7-2.6/files/include/asm-mips/ar7/vlynq.h deleted file mode 100644 index 63894159ef..0000000000 --- a/target/linux/ar7-2.6/files/include/asm-mips/ar7/vlynq.h +++ /dev/null @@ -1,92 +0,0 @@ -/* - * $Id$ - * - * Copyright (C) 2006, 2007 OpenWrt.org - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - - -#ifndef __VLYNQ_H__ -#define __VLYNQ_H__ - -struct vlynq_mapping { - u32 size; - u32 offset; -} __attribute__ ((packed)); - -struct vlynq_device_id { - u32 id; -}; - -struct vlynq_regs; -struct vlynq_device { - u32 id; - int irq; - int local_irq; - int remote_irq; - int clock_div; - u32 regs_start, regs_end; - u32 mem_start, mem_end; - u32 irq_start, irq_end; - void *priv; - struct vlynq_regs *local; - struct vlynq_regs *remote; - struct device dev; -}; - -struct vlynq_driver { - char *name; - int (*probe)(struct vlynq_device *dev); - int (*remove)(struct vlynq_device *dev); - struct device_driver driver; -}; - -#define to_vlynq_driver(drv) container_of(drv, struct vlynq_driver, driver) - -struct plat_vlynq_ops { - int (*on)(struct vlynq_device *dev); - void (*off)(struct vlynq_device *dev); -}; - -#define to_vlynq_device(device) container_of(device, struct vlynq_device, dev) - -extern struct bus_type vlynq_bus_type; - -extern int __vlynq_register_driver(struct vlynq_driver *driver, - struct module *owner); - -static inline int vlynq_register_driver(struct vlynq_driver *driver) -{ - return __vlynq_register_driver(driver, THIS_MODULE); -} - -extern void vlynq_unregister_driver(struct vlynq_driver *driver); -extern int vlynq_device_enable(struct vlynq_device *dev); -extern void vlynq_device_disable(struct vlynq_device *dev); -extern u32 vlynq_local_id(struct vlynq_device *dev); -extern u32 vlynq_remote_id(struct vlynq_device *dev); -extern void vlynq_set_local_mapping(struct vlynq_device *dev, - u32 tx_offset, - struct vlynq_mapping *mapping); -extern void vlynq_set_remote_mapping(struct vlynq_device *dev, - u32 tx_offset, - struct vlynq_mapping *mapping); -extern int vlynq_virq_to_irq(struct vlynq_device *dev, int virq); -extern int vlynq_irq_to_virq(struct vlynq_device *dev, int irq); -extern int vlynq_set_local_irq(struct vlynq_device *dev, int virq); -extern int vlynq_set_remote_irq(struct vlynq_device *dev, int virq); - -#endif diff --git a/target/linux/ar7-2.6/files/include/asm-mips/gpio.h b/target/linux/ar7-2.6/files/include/asm-mips/gpio.h deleted file mode 100644 index 38a411ab62..0000000000 --- a/target/linux/ar7-2.6/files/include/asm-mips/gpio.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_MIPS_GPIO_H -#define _ASM_MIPS_GPIO_H - -#include - -#endif /* _ASM_MIPS_GPIO_H */ diff --git a/target/linux/ar7-2.6/image/Makefile b/target/linux/ar7-2.6/image/Makefile deleted file mode 100644 index 3d0e54c77e..0000000000 --- a/target/linux/ar7-2.6/image/Makefile +++ /dev/null @@ -1,79 +0,0 @@ -# -# Copyright (C) 2006 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# -include $(TOPDIR)/rules.mk -include $(INCLUDE_DIR)/image.mk - -DROP_SECTIONS := .reginfo .mdebug .comment .note .pdr .options .MIPS.options -OBJCOPY_SREC := $(TARGET_CROSS)objcopy -S -O srec $(addprefix --remove-section=,$(DROP_SECTIONS)) - -LOADADDR := 0x94600000 -KERNEL_ENTRY := 0x94100000 -RAMSTART := 0x94000000 -RAMSIZE := 0x00100000 - -LOADER_MAKEOPTS= \ - KDIR=$(KDIR) \ - LOADADDR=$(LOADADDR) \ - KERNEL_ENTRY=$(KERNEL_ENTRY) \ - RAMSTART=$(RAMSTART) \ - RAMSIZE=$(RAMSIZE) - -CFLAGS := -D__KERNEL__ -Wall -Wstrict-prototypes -Wno-trigraphs -Os \ - -fno-strict-aliasing -fno-common -fomit-frame-pointer -G 0 -mno-abicalls -fno-pic \ - -pipe -mlong-calls -fno-common \ - -mabi=32 -march=mips32 -Wa,-32 -Wa,-march=mips32 -Wa,-mips32 -Wa,--trap \ - -DLOADADDR=$(LOADADDR) - -define Build/Clean - $(MAKE) -C $(GENERIC_PLATFORM_DIR)/image/lzma-loader $(LOADER_MAKEOPTS) clean -endef - -define Image/Prepare - cat $(KDIR)/vmlinux | $(STAGING_DIR)/bin/lzma e -si -so -eos -lc1 -lp2 -pb2 > $(KDIR)/vmlinux.lzma - - $(MAKE) -C $(GENERIC_PLATFORM_DIR)/image/lzma-loader \ - $(LOADER_MAKEOPTS) \ - clean compile - $(OBJCOPY_SREC) $(KDIR)/loader.elf $(KDIR)/loader.srec - srec2bin $(KDIR)/loader.srec $(KDIR)/loader.bin -endef - -define align/jffs2-64k -bs=65536 conv=sync -endef - -define align/jffs2-128k -bs=131072 conv=sync -endef - -define Image/Build/CyberTAN - (dd if=/dev/zero bs=16 count=1; cat $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1).bin) | \ - $(STAGING_DIR)/bin/addpattern -p $(3) -o $(BIN_DIR)/openwrt-$(2)-$(KERNEL)-$(4).bin -endef - -#define Image/Build/sErCoMm -# cat sercomm/adam2.bin "$(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1).bin" > "$(KDIR)/dgfw.tmp" -# dd if=sercomm/$(2) of="$(KDIR)/dgfw.tmp" bs=$$$$((0x3e0000 - 80)) seek=1 conv=notrunc -# $(STAGING_DIR)/bin/dgfirmware -f -w "$(BIN_DIR)/openwrt-$(2)-$(KERNEL)-$(3).img" "$(KDIR)/dgfw.tmp" -# rm -f "$(KDIR)/dgfw.tmp" -#endef - -define Image/Build - dd if=$(KDIR)/loader.bin $(call align/$(1)) > $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1).bin - cat $(BUILD_DIR)/linux-$(KERNEL)-$(BOARD)/root.$(1) >> $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1).bin - $(call prepare_generic_squashfs,$(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1).bin) - $(call Image/Build/CyberTAN,$(1),AG1B,AG1B,$(1)) - $(call Image/Build/CyberTAN,$(1),WA21,WA21,$(1)) - $(call Image/Build/CyberTAN,$(1),WA22,WA22,$(1)) - $(call Image/Build/CyberTAN,$(1),WAG2,WAG2,$(1)) - $(call Image/Build/CyberTAN,$(1),WA31,WA31 -b,$(1)) - $(call Image/Build/CyberTAN,$(1),WA32,WA32 -b,$(1)) -# $(call Image/Build/sErCoMm,$(1),dg834,$(1)) -# $(call Image/Build/sErCoMm,$(1),jdr454wb,$(1)) -endef - -$(eval $(call BuildImage)) diff --git a/target/linux/ar7-2.6/patches/100-board_support.patch b/target/linux/ar7-2.6/patches/100-board_support.patch deleted file mode 100644 index 50970e224e..0000000000 --- a/target/linux/ar7-2.6/patches/100-board_support.patch +++ /dev/null @@ -1,103 +0,0 @@ -diff -Nru linux-2.6.19.2/arch/mips/Kconfig linux-ar7/arch/mips/Kconfig ---- linux-2.6.19.2/arch/mips/Kconfig 2006-12-12 02:32:53.000000000 +0700 -+++ linux-ar7/arch/mips/Kconfig 2007-01-29 21:52:21.000000000 +0700 -@@ -12,6 +12,18 @@ - prompt "System type" - default SGI_IP22 - -+config AR7 -+ bool "Texas Instruments AR7" -+ select BOOT_ELF32 -+ select DMA_NONCOHERENT -+ select HW_HAS_PCI -+ select IRQ_CPU -+ select SWAP_IO_SPACE -+ select SYS_HAS_CPU_MIPS32_R1 -+ select SYS_SUPPORTS_32BIT_KERNEL -+ select SYS_SUPPORTS_LITTLE_ENDIAN -+ select NEED_MULTIPLE_NODES -+ - config MIPS_MTX1 - bool "4G Systems MTX-1 board" - select DMA_NONCOHERENT -diff -Nru linux-2.6.19.2/arch/mips/Makefile linux-ar7/arch/mips/Makefile ---- linux-2.6.19.2/arch/mips/Makefile 2006-12-12 02:32:53.000000000 +0700 -+++ linux-ar7/arch/mips/Makefile 2007-01-29 21:52:21.000000000 +0700 -@@ -158,6 +158,13 @@ - # - - # -+# Texas Instruments AR7 -+# -+core-$(CONFIG_AR7) += arch/mips/ar7/ -+cflags-$(CONFIG_AR7) += -Iinclude/asm-mips/ar7 -+load-$(CONFIG_AR7) += 0xffffffff94100000 -+ -+# - # Acer PICA 61, Mips Magnum 4000 and Olivetti M700. - # - core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/ -diff -Nru linux-2.6.19.2/arch/mips/kernel/setup.c linux-ar7/arch/mips/kernel/setup.c ---- linux-2.6.19.2orig/arch/mips/kernel/setup.c 2006-12-12 02:32:53.000000000 +0700 -+++ linux-ar7/arch/mips/kernel/setup.c 2007-03-04 22:32:13.000000000 +0700 -@@ -236,7 +236,7 @@ - * Initialize the bootmem allocator. It also setup initrd related data - * if needed. - */ --#ifdef CONFIG_SGI_IP27 -+#ifdef CONFIG_NEED_MULTIPLE_NODES - - static void __init bootmem_init(void) - { -@@ -244,7 +244,7 @@ - finalize_initrd(); - } - --#else /* !CONFIG_SGI_IP27 */ -+#else /* !CONFIG_NEED_MULTIPLE_NODES */ - - static void __init bootmem_init(void) - { -@@ -349,7 +349,7 @@ - finalize_initrd(); - } - --#endif /* CONFIG_SGI_IP27 */ -+#endif /* CONFIG_NEED_MULTIPLE_NODES */ - - /* - * arch_mem_init - initialize memory managment subsystem -diff -Nru linux-2.6.19.2/arch/mips/kernel/traps.c linux-ar7/arch/mips/kernel/traps.c ---- linux-2.6.19.2/arch/mips/kernel/traps.c 2007-01-11 02:10:37.000000000 +0700 -+++ linux-ar7/arch/mips/kernel/traps.c 2007-03-15 13:19:19.000000000 +0700 -@@ -1072,11 +1072,6 @@ - unsigned long exception_handlers[32]; - unsigned long vi_handlers[64]; - --/* -- * As a side effect of the way this is implemented we're limited -- * to interrupt handlers in the address range from -- * KSEG0 <= x < KSEG0 + 256mb on the Nevada. Oh well ... -- */ - void *set_except_vector(int n, void *addr) - { - unsigned long handler = (unsigned long) addr; -@@ -1084,9 +1079,15 @@ - - exception_handlers[n] = handler; - if (n == 0 && cpu_has_divec) { -- *(volatile u32 *)(ebase + 0x200) = 0x08000000 | -- (0x03ffffff & (handler >> 2)); -- flush_icache_range(ebase + 0x200, ebase + 0x204); -+ /* lui k0, 0x0000 */ -+ *(volatile u32 *)(CAC_BASE+0x200) = 0x3c1a0000 | (handler >> 16); -+ /* ori k0, 0x0000 */ -+ *(volatile u32 *)(CAC_BASE+0x204) = 0x375a0000 | (handler & 0xffff); -+ /* jr k0 */ -+ *(volatile u32 *)(CAC_BASE+0x208) = 0x03400008; -+ /* nop */ -+ *(volatile u32 *)(CAC_BASE+0x20C) = 0x00000000; -+ flush_icache_range(CAC_BASE+0x200, CAC_BASE+0x210); - } - return (void *)old_handler; - } diff --git a/target/linux/ar7-2.6/patches/110-flash.patch b/target/linux/ar7-2.6/patches/110-flash.patch deleted file mode 100644 index b104067540..0000000000 --- a/target/linux/ar7-2.6/patches/110-flash.patch +++ /dev/null @@ -1,39 +0,0 @@ -diff -Nru linux-2.6.19.2/drivers/mtd/Kconfig linux-ar7/drivers/mtd/Kconfig ---- linux-2.6.19.2/drivers/mtd/Kconfig 2006-12-12 02:32:53.000000000 +0700 -+++ linux-ar7/drivers/mtd/Kconfig 2007-02-03 22:47:10.000000000 +0700 -@@ -152,6 +152,12 @@ - for your particular device. It won't happen automatically. The - 'armflash' map driver (CONFIG_MTD_ARMFLASH) does this, for example. - -+config MTD_AR7_PARTS -+ tristate "TI AR7 partitioning support" -+ depends on MTD_PARTITIONS -+ ---help--- -+ TI AR7 partitioning support -+ - comment "User Modules And Translation Layers" - depends on MTD - -diff -Nru linux-2.6.19.2/drivers/mtd/Makefile linux-ar7/drivers/mtd/Makefile ---- linux-2.6.19.2/drivers/mtd/Makefile 2006-12-12 02:32:53.000000000 +0700 -+++ linux-ar7/drivers/mtd/Makefile 2007-02-03 22:02:27.000000000 +0700 -@@ -12,6 +12,7 @@ - obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o - obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o - obj-$(CONFIG_MTD_AFS_PARTS) += afs.o -+obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o - - # 'Users' - code which presents functionality to userspace. - obj-$(CONFIG_MTD_CHAR) += mtdchar.o -diff -Nru linux-2.6.19.2/drivers/mtd/maps/physmap.c linux-ar7/drivers/mtd/maps/physmap.c ---- linux-2.6.19.2/drivers/mtd/maps/physmap.c 2006-12-12 02:32:53.000000000 +0700 -+++ linux-ar7/drivers/mtd/maps/physmap.c 2007-02-03 21:57:11.000000000 +0700 -@@ -74,7 +74,7 @@ - - static const char *rom_probe_types[] = { "cfi_probe", "jedec_probe", "map_rom", NULL }; - #ifdef CONFIG_MTD_PARTITIONS --static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", NULL }; -+static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", "ar7part", NULL }; - #endif - - static int physmap_flash_probe(struct platform_device *dev) diff --git a/target/linux/ar7-2.6/patches/120-gpio_chrdev.patch b/target/linux/ar7-2.6/patches/120-gpio_chrdev.patch deleted file mode 100644 index 41a8b8e02f..0000000000 --- a/target/linux/ar7-2.6/patches/120-gpio_chrdev.patch +++ /dev/null @@ -1,30 +0,0 @@ -diff -ruN linux-2.6.19.2-orig/drivers/char/Kconfig linux-2.6.19.2-ar7/drivers/char/Kconfig ---- linux-2.6.19.2-orig/drivers/char/Kconfig 2007-01-10 20:10:37.000000000 +0100 -+++ linux-2.6.19.2-ar7/drivers/char/Kconfig 2007-02-19 01:22:23.000000000 +0100 -@@ -920,6 +920,15 @@ - To compile this driver as a module, choose M here: the - module will be called mwave. - -+config AR7_GPIO -+ tristate "TI AR7 GPIO Support" -+ depends on AR7 -+ help -+ Give userspace access to the GPIO pins on the Texas Instruments AR7 -+ processors. -+ -+ If compiled as a module, it will be called ar7_gpio. -+ - config SCx200_GPIO - tristate "NatSemi SCx200 GPIO Support" - depends on SCx200 -diff -ruN linux-2.6.19.2-orig/drivers/char/Makefile linux-2.6.19.2-ar7/drivers/char/Makefile ---- linux-2.6.19.2-orig/drivers/char/Makefile 2007-01-10 20:10:37.000000000 +0100 -+++ linux-2.6.19.2-ar7/drivers/char/Makefile 2007-02-19 01:22:23.000000000 +0100 -@@ -83,6 +83,7 @@ - obj-$(CONFIG_PPDEV) += ppdev.o - obj-$(CONFIG_NWBUTTON) += nwbutton.o - obj-$(CONFIG_NWFLASH) += nwflash.o -+obj-$(CONFIG_AR7_GPIO) += ar7_gpio.o - obj-$(CONFIG_SCx200_GPIO) += scx200_gpio.o - obj-$(CONFIG_PC8736x_GPIO) += pc8736x_gpio.o - obj-$(CONFIG_NSC_GPIO) += nsc_gpio.o diff --git a/target/linux/ar7-2.6/patches/130-leds.patch b/target/linux/ar7-2.6/patches/130-leds.patch deleted file mode 100644 index 261b712196..0000000000 --- a/target/linux/ar7-2.6/patches/130-leds.patch +++ /dev/null @@ -1,27 +0,0 @@ -diff -ruN linux-2.6.19.2-orig/drivers/leds/Kconfig linux-2.6.19.2-ar7/drivers/leds/Kconfig ---- linux-2.6.19.2-orig/drivers/leds/Kconfig 2007-01-10 20:10:37.000000000 +0100 -+++ linux-2.6.19.2-ar7/drivers/leds/Kconfig 2007-02-24 02:30:48.000000000 +0100 -@@ -19,6 +19,12 @@ - - comment "LED drivers" - -+config LEDS_AR7 -+ tristate "LED Support for the TI AR7" -+ depends LEDS_CLASS && AR7 -+ help -+ This option enables support for the LEDs on TI AR7. -+ - config LEDS_CORGI - tristate "LED Support for the Sharp SL-C7x0 series" - depends LEDS_CLASS && PXA_SHARP_C7xx -diff -ruN linux-2.6.19.2-orig/drivers/leds/Makefile linux-2.6.19.2-ar7/drivers/leds/Makefile ---- linux-2.6.19.2-orig/drivers/leds/Makefile 2007-01-10 20:10:37.000000000 +0100 -+++ linux-2.6.19.2-ar7/drivers/leds/Makefile 2007-02-24 02:29:44.000000000 +0100 -@@ -5,6 +5,7 @@ - obj-$(CONFIG_LEDS_TRIGGERS) += led-triggers.o - - # LED Platform Drivers -+obj-$(CONFIG_LEDS_AR7) += leds-ar7.o - obj-$(CONFIG_LEDS_CORGI) += leds-corgi.o - obj-$(CONFIG_LEDS_LOCOMO) += leds-locomo.o - obj-$(CONFIG_LEDS_SPITZ) += leds-spitz.o diff --git a/target/linux/ar7-2.6/patches/140-watchdog.patch b/target/linux/ar7-2.6/patches/140-watchdog.patch deleted file mode 100644 index 163df40ba6..0000000000 --- a/target/linux/ar7-2.6/patches/140-watchdog.patch +++ /dev/null @@ -1,27 +0,0 @@ -diff -ruN linux-2.6.19.2-orig/drivers/char/watchdog/Kconfig linux-2.6.19.2-ar7/drivers/char/watchdog/Kconfig ---- linux-2.6.19.2-orig/drivers/char/watchdog/Kconfig 2007-01-10 20:10:37.000000000 +0100 -+++ linux-2.6.19.2-ar7/drivers/char/watchdog/Kconfig 2007-02-26 12:49:29.000000000 +0100 -@@ -544,6 +544,12 @@ - - # MIPS Architecture - -+config AR7_WDT -+ tristate "TI AR7 Watchdog Timer" -+ depends on WATCHDOG && AR7 -+ help -+ Hardware driver for the TI AR7 Watchdog Timer. -+ - config INDYDOG - tristate "Indy/I2 Hardware Watchdog" - depends on WATCHDOG && SGI_IP22 -diff -ruN linux-2.6.19.2-orig/drivers/char/watchdog/Makefile linux-2.6.19.2-ar7/drivers/char/watchdog/Makefile ---- linux-2.6.19.2-orig/drivers/char/watchdog/Makefile 2007-01-10 20:10:37.000000000 +0100 -+++ linux-2.6.19.2-ar7/drivers/char/watchdog/Makefile 2007-02-26 12:46:36.000000000 +0100 -@@ -71,6 +71,7 @@ - obj-$(CONFIG_WATCHDOG_RTAS) += wdrtas.o - - # MIPS Architecture -+obj-$(CONFIG_AR7_WDT) += ar7_wdt.o - obj-$(CONFIG_INDYDOG) += indydog.o - - # S390 Architecture diff --git a/target/linux/ar7-2.6/patches/200-ethernet_driver.patch b/target/linux/ar7-2.6/patches/200-ethernet_driver.patch deleted file mode 100644 index ca603ad610..0000000000 --- a/target/linux/ar7-2.6/patches/200-ethernet_driver.patch +++ /dev/null @@ -1,30 +0,0 @@ -diff -Nru linux-2.6.19.2/drivers/net/Kconfig linux-ar7/drivers/net/Kconfig ---- linux-2.6.19.2/drivers/net/Kconfig 2006-12-12 02:32:53.000000000 +0700 -+++ linux-ar7/drivers/net/Kconfig 2007-01-29 21:52:22.000000000 +0700 -@@ -1777,6 +1777,15 @@ - workstations. - See . - -+config CPMAC -+ tristate "TI AR7 CPMAC Ethernet support (EXPERIMENTAL)" -+ depends on NET_ETHERNET && EXPERIMENTAL && AR7 -+ select PHYLIB -+ select FIXED_PHY -+ select FIXED_MII_100_FDX -+ help -+ TI AR7 CPMAC Ethernet support -+ - config NET_POCKET - bool "Pocket and portable adapters" - depends on NET_ETHERNET && PARPORT -diff -Nru linux-2.6.19.2/drivers/net/Makefile linux-ar7/drivers/net/Makefile ---- linux-2.6.19.2/drivers/net/Makefile 2006-12-12 02:32:53.000000000 +0700 -+++ linux-ar7/drivers/net/Makefile 2007-01-29 21:52:22.000000000 +0700 -@@ -148,6 +148,7 @@ - obj-$(CONFIG_8139TOO) += 8139too.o - obj-$(CONFIG_ZNET) += znet.o - obj-$(CONFIG_LAN_SAA9730) += saa9730.o -+obj-$(CONFIG_CPMAC) += cpmac.o - obj-$(CONFIG_DEPCA) += depca.o - obj-$(CONFIG_EWRK3) += ewrk3.o - obj-$(CONFIG_ATP) += atp.o diff --git a/target/linux/ar7-2.6/patches/500-serial_kludge.patch b/target/linux/ar7-2.6/patches/500-serial_kludge.patch deleted file mode 100644 index 959c5cfe4c..0000000000 --- a/target/linux/ar7-2.6/patches/500-serial_kludge.patch +++ /dev/null @@ -1,52 +0,0 @@ -diff -Nru linux-2.6.19.2/include/linux/serialP.h linux-ar7/include/linux/serialP.h ---- linux-2.6.19.2/include/linux/serialP.h 2007-01-17 01:24:01.000000000 +0700 -+++ linux-ar7/include/linux/serialP.h 2007-03-22 22:36:48.000000000 +0700 -@@ -135,6 +135,9 @@ - * the interrupt line _up_ instead of down, so if we register the IRQ - * while the UART is in that state, we die in an IRQ storm. */ - #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2) -+#elif defined(CONFIG_AR7) -+/* This is how it is set up by bootloader... */ -+#define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1 | UART_MCR_RTS | UART_MCR_DTR) - #else - #define ALPHA_KLUDGE_MCR 0 - #endif -diff -Nru linux-2.6.19.2/include/linux/serial_core.h linux-ar7/include/linux/serial_core.h ---- linux-2.6.19.2/include/linux/serial_core.h 2007-01-11 02:10:37.000000000 +0700 -+++ linux-ar7/include/linux/serial_core.h 2007-03-22 22:50:13.000000000 +0700 -@@ -39,7 +39,8 @@ - #define PORT_RSA 13 - #define PORT_NS16550A 14 - #define PORT_XSCALE 15 --#define PORT_MAX_8250 15 /* max port ID */ -+#define PORT_AR7 16 -+#define PORT_MAX_8250 16 /* max port ID */ - - /* - * ARM specific type numbers. These are not currently guaranteed -diff -Nru linux-2.6.19.2/drivers/serial/8250.c linux-ar7/drivers/serial/8250.c ---- linux-2.6.19.2/drivers/serial/8250.c 2007-01-11 02:10:37.000000000 +0700 -+++ linux-ar7/drivers/serial/8250.c 2007-03-22 22:45:17.000000000 +0700 -@@ -251,6 +251,13 @@ - .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, - .flags = UART_CAP_FIFO | UART_CAP_UUE, - }, -+ [PORT_AR7] = { -+ .name = "TI-AR7", -+ .fifo_size = 16, -+ .tx_loadsz = 16, -+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00, -+ .flags = UART_CAP_FIFO | UART_CAP_AFE, -+ }, - }; - - #ifdef CONFIG_SERIAL_8250_AU1X00 -@@ -2243,7 +2250,7 @@ - { - struct uart_8250_port *up = (struct uart_8250_port *)port; - -- wait_for_xmitr(up, UART_LSR_THRE); -+ wait_for_xmitr(up, BOTH_EMPTY); - serial_out(up, UART_TX, ch); - } - diff --git a/target/linux/ar7-2.6/patches/900-git-fix.diff b/target/linux/ar7-2.6/patches/900-git-fix.diff deleted file mode 100644 index 2c5323a9d5..0000000000 --- a/target/linux/ar7-2.6/patches/900-git-fix.diff +++ /dev/null @@ -1,11 +0,0 @@ ---- linux-2.6.19.orig/scripts/setlocalversion 2006-11-30 04:57:37.000000000 +0700 -+++ linux-2.6.19/scripts/setlocalversion 2006-12-25 12:50:53.000000000 +0700 -@@ -1,6 +1,8 @@ - #!/bin/sh - # Print additional version information for non-release trees. - -+exit 0 -+ - usage() { - echo "Usage: $0 [srctree]" >&2 - exit 1 diff --git a/target/linux/ar7-2.6/profiles/100-Texas.mk b/target/linux/ar7-2.6/profiles/100-Texas.mk deleted file mode 100644 index a9306ca702..0000000000 --- a/target/linux/ar7-2.6/profiles/100-Texas.mk +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (C) 2006 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# - -define Profile/Texas - NAME:=Texas Instruments WiFi (default) - PACKAGES:=kmod-acx -endef - -define Profile/Texas/Description - Package set compatible with hardware using Texas Instruments WiFi cards -endef -$(eval $(call Profile,Texas)) - diff --git a/target/linux/ar7-2.6/profiles/110-None.mk b/target/linux/ar7-2.6/profiles/110-None.mk deleted file mode 100644 index 2fcfacde9f..0000000000 --- a/target/linux/ar7-2.6/profiles/110-None.mk +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (C) 2006 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# - -define Profile/None - NAME:=No WiFi - PACKAGES:= -endef - -define Profile/None/Description - Package set without WiFi support -endef -$(eval $(call Profile,None)) - diff --git a/target/linux/ar7-2.6/src/adam2patcher.c b/target/linux/ar7-2.6/src/adam2patcher.c deleted file mode 100644 index 25a78074a6..0000000000 --- a/target/linux/ar7-2.6/src/adam2patcher.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - * patcher.c - ADAM2 patcher for Netgear DG834 (and compatible) - * - * Copyright (C) 2006 Felix Fietkau - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -int main(int argc, char **argv) -{ - int fd; - char *ptr; - uint32_t *i; - - if (argc != 2) { - fprintf(stderr, "Usage: %s \n", argv[0]); - exit(1); - } - - if (((fd = open(argv[1], O_RDWR)) < 0) - || ((ptr = mmap(0, 128 * 1024, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0)) == (void *) (-1))) { - fprintf(stderr, "Can't open file\n"); - exit(1); - } - - i = (uint32_t *) &ptr[0x3944]; - if (*i == 0x0c000944) { - fprintf(stderr, "Unpatched ADAM2 detected. Patching... "); - *i = 0x00000000; - msync(i, sizeof(*i), MS_SYNC|MS_INVALIDATE); - fprintf(stderr, "done!\n"); - } else if (*i == 0x00000000) { - fprintf(stderr, "Patched ADAM2 detected.\n"); - } else { - fprintf(stderr, "Unknown ADAM2 detected. Can't patch!\n"); - } - - close(fd); -} diff --git a/target/linux/aruba-2.6/Makefile b/target/linux/aruba-2.6/Makefile deleted file mode 100644 index c53964da8a..0000000000 --- a/target/linux/aruba-2.6/Makefile +++ /dev/null @@ -1,24 +0,0 @@ -# -# Copyright (C) 2006 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# -include $(TOPDIR)/rules.mk - -ARCH:=mips -BOARD:=aruba -BOARDNAME:=Aruba -FEATURES:=jffs2 - -define Target/Description - Build firmware images for Aruba boards -endef - -include $(INCLUDE_DIR)/kernel-build.mk -DEFAULT_PACKAGES += kmod-madwifi - -# include the profiles --include profiles/*.mk - -$(eval $(call BuildKernel)) diff --git a/target/linux/aruba-2.6/base-files/default/etc/config/network b/target/linux/aruba-2.6/base-files/default/etc/config/network deleted file mode 100644 index 1d9b55b2d3..0000000000 --- a/target/linux/aruba-2.6/base-files/default/etc/config/network +++ /dev/null @@ -1,11 +0,0 @@ -# Network configuration file - -config interface loopback - option ifname lo - option proto static - option ipaddr 127.0.0.1 - option netmask 255.0.0.0 - -config interface lan - option ifname eth0 - option proto dhcp diff --git a/target/linux/aruba-2.6/config/default b/target/linux/aruba-2.6/config/default deleted file mode 100644 index 9c5ec0750d..0000000000 --- a/target/linux/aruba-2.6/config/default +++ /dev/null @@ -1,204 +0,0 @@ -CONFIG_32BIT=y -# CONFIG_64BIT is not set -# CONFIG_64BIT_PHYS_ADDR is not set -# CONFIG_8139TOO is not set -CONFIG_AR2313=y -# CONFIG_B44 is not set -CONFIG_BASE_SMALL=0 -CONFIG_CPU_BIG_ENDIAN=y -CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_SYNC=y -# CONFIG_CPU_LITTLE_ENDIAN is not set -CONFIG_CPU_MIPS32=y -CONFIG_CPU_MIPS32_R1=y -# CONFIG_CPU_MIPS32_R2 is not set -# CONFIG_CPU_MIPS64_R1 is not set -# CONFIG_CPU_MIPS64_R2 is not set -CONFIG_CPU_MIPSR1=y -# CONFIG_CPU_NEVADA is not set -# CONFIG_CPU_R10000 is not set -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R4300 is not set -# CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_R8000 is not set -# CONFIG_CPU_RM7000 is not set -# CONFIG_CPU_RM9000 is not set -# CONFIG_CPU_SB1 is not set -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_TX49XX is not set -# CONFIG_CPU_VR41XX is not set -# CONFIG_DDB5477 is not set -# CONFIG_DM9000 is not set -CONFIG_DMA_NEED_PCI_MAP_STATE=y -CONFIG_DMA_NONCOHERENT=y -# CONFIG_E100 is not set -# CONFIG_FIRMWARE_EDID is not set -CONFIG_FS_POSIX_ACL=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -# CONFIG_GEN_RTC is not set -# CONFIG_HERMES is not set -# CONFIG_HOSTAP is not set -CONFIG_HW_HAS_PCI=y -CONFIG_HW_RANDOM=y -CONFIG_HZ=100 -CONFIG_HZ_100=y -# CONFIG_HZ_1024 is not set -# CONFIG_HZ_128 is not set -# CONFIG_HZ_250 is not set -# CONFIG_HZ_256 is not set -# CONFIG_HZ_48 is not set -# CONFIG_I2C is not set -# CONFIG_IDE is not set -CONFIG_IDT_RC32434_ETH=y -# CONFIG_IEEE80211 is not set -# CONFIG_IEEE80211_SOFTMAC is not set -CONFIG_INITRAMFS_SOURCE="" -# CONFIG_IPW2100 is not set -# CONFIG_IPW2200 is not set -CONFIG_JFFS2_FS_DEBUG=0 -# CONFIG_LAN_SAA9730 is not set -CONFIG_MACH_ARUBA=y -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MACH_JAZZ is not set -# CONFIG_MACH_VR41XX is not set -CONFIG_MINI_FO=m -CONFIG_MIPS=y -# CONFIG_MIPS_ATLAS is not set -# CONFIG_MIPS_BOSPORUS is not set -# CONFIG_MIPS_COBALT is not set -# CONFIG_MIPS_DB1000 is not set -# CONFIG_MIPS_DB1100 is not set -# CONFIG_MIPS_DB1200 is not set -# CONFIG_MIPS_DB1500 is not set -# CONFIG_MIPS_DB1550 is not set -# CONFIG_MIPS_EV64120 is not set -CONFIG_MIPS_L1_CACHE_SHIFT=5 -# CONFIG_MIPS_MALTA is not set -# CONFIG_MIPS_MIRAGE is not set -# CONFIG_MIPS_MTX1 is not set -CONFIG_MIPS_MT_DISABLED=y -# CONFIG_MIPS_MT_SMP is not set -# CONFIG_MIPS_MT_SMTC is not set -# CONFIG_MIPS_PB1000 is not set -# CONFIG_MIPS_PB1100 is not set -# CONFIG_MIPS_PB1200 is not set -# CONFIG_MIPS_PB1500 is not set -# CONFIG_MIPS_PB1550 is not set -# CONFIG_MIPS_SEAD is not set -# CONFIG_MIPS_SIM is not set -# CONFIG_MIPS_VPE_LOADER is not set -# CONFIG_MIPS_XXS1500 is not set -# CONFIG_MOMENCO_JAGUAR_ATX is not set -# CONFIG_MOMENCO_OCELOT is not set -# CONFIG_MOMENCO_OCELOT_3 is not set -# CONFIG_MOMENCO_OCELOT_C is not set -# CONFIG_MOMENCO_OCELOT_G is not set -CONFIG_MTD=y -# CONFIG_MTD_ABSENT is not set -CONFIG_MTD_BLOCK=y -# CONFIG_MTD_BLOCK2MTD is not set -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_AMDSTD=y -# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set -# CONFIG_MTD_CFI_GEOMETRY is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_CFI_INTELEXT is not set -# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set -CONFIG_MTD_CFI_NOSWAP=y -# CONFIG_MTD_CFI_STAA is not set -CONFIG_MTD_CFI_UTIL=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_COMPLEX_MAPPINGS=y -# CONFIG_MTD_CONCAT is not set -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_GEN_PROBE=y -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -CONFIG_MTD_MAP_BANK_WIDTH_2=y -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_NAND is not set -# CONFIG_MTD_OBSOLETE_CHIPS is not set -# CONFIG_MTD_ONENAND is not set -# CONFIG_MTD_OTP is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_PCI is not set -# CONFIG_MTD_PHRAM is not set -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_PHYSMAP_BANKWIDTH=1 -CONFIG_MTD_PHYSMAP_LEN=0x400000 -CONFIG_MTD_PHYSMAP_START=0x1fc00000 -# CONFIG_MTD_PLATRAM is not set -# CONFIG_MTD_PMC551 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_SLRAM is not set -CONFIG_NATSEMI=y -# CONFIG_NE2K_PCI is not set -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_PAGE_SIZE_16KB is not set -CONFIG_PAGE_SIZE_4KB=y -# CONFIG_PAGE_SIZE_64KB is not set -# CONFIG_PAGE_SIZE_8KB is not set -# CONFIG_PCCARD is not set -# CONFIG_PCIPCWATCHDOG is not set -# CONFIG_PCI_ATMEL is not set -# CONFIG_PCI_HERMES is not set -# CONFIG_PCMCIA is not set -# CONFIG_PCMCIA_ATMEL is not set -# CONFIG_PMC_YOSEMITE is not set -# CONFIG_PNX8550_JBS is not set -# CONFIG_PNX8550_V2PCI is not set -# CONFIG_RTC is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y -# CONFIG_SERIAL_8250_EXTENDED is not set -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_PTSWARM is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_SWARM is not set -# CONFIG_SOFT_WATCHDOG is not set -# CONFIG_SPARSEMEM_STATIC is not set -CONFIG_SWAP_IO_SPACE=y -CONFIG_SYS_HAS_CPU_MIPS32_R1=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -# CONFIG_TOSHIBA_JMR3927 is not set -# CONFIG_TOSHIBA_RBTX4927 is not set -# CONFIG_TOSHIBA_RBTX4938 is not set -CONFIG_TRAD_SIGNALS=y -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_USBPCWATCHDOG is not set -CONFIG_USB_EHCI_HCD=m -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set -# CONFIG_USB_EHCI_SPLIT_ISO is not set -# CONFIG_USB_EHCI_TT_NEWSCHED is not set -CONFIG_USB_UHCI_HCD=m -# CONFIG_VIA_RHINE is not set diff --git a/target/linux/aruba-2.6/image/Makefile b/target/linux/aruba-2.6/image/Makefile deleted file mode 100644 index e486b30ef2..0000000000 --- a/target/linux/aruba-2.6/image/Makefile +++ /dev/null @@ -1,43 +0,0 @@ -# -# Copyright (C) 2006 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# -include $(TOPDIR)/rules.mk -include $(INCLUDE_DIR)/image.mk - -LOADADDR = 0x81000000 # RAM start + 16M -KERNEL_ENTRY = 0x80100000 -RAMSIZE = 0x00100000 # 1MB - -LOADER_MAKEOPTS= \ - KDIR=$(KDIR) \ - LOADADDR=$(LOADADDR) \ - KERNEL_ENTRY=$(KERNEL_ENTRY) \ - RAMSIZE=$(RAMSIZE) - -define Build/Clean - $(MAKE) -C $(GENERIC_PLATFORM_DIR)/image/lzma-loader $(LOADER_MAKEOPTS) clean -endef - -define Image/Prepare - cat $(KDIR)/vmlinux | $(STAGING_DIR)/bin/lzma e -si -so -eos -lc1 -lp2 -pb2 > $(KDIR)/vmlinux.lzma - $(MAKE) -C $(GENERIC_PLATFORM_DIR)/image/lzma-loader $(LOADER_MAKEOPTS) clean compile -endef - -define Image/BuildKernel - ./addVersion -n ArubaOS $(KDIR)/loader.elf $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL).ari version -endef - -define Image/Build/jffs2-64k - @dd if=$(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL).ari of=$(KDIR)/image.tmp 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-+nvram_getbyte(int offs) -+{ -+ return(*((unsigned char*)(NVRAM_BASE + offs))); -+} -+ -+static void -+nvram_setbyte(int offs, unsigned char val) -+{ -+ unsigned char* nvramDataPointer = (unsigned char*)(NVRAM_BASE + offs); -+ -+ *nvramDataPointer = val; -+} -+ -+/* -+ * BigEndian! -+ */ -+static unsigned short -+nvram_getshort(int offs) -+{ -+ return((nvram_getbyte(offs) << 8) | nvram_getbyte(offs + 1)); -+} -+ -+static void -+nvram_setshort(int offs, unsigned short val) -+{ -+ nvram_setbyte(offs, (unsigned char)((val >> 8) & 0xff)); -+ nvram_setbyte(offs + 1, (unsigned char)(val & 0xff)); -+} -+#if 0 -+static unsigned int -+nvram_getint(int offs) -+{ -+ unsigned int val; -+ val = nvram_getbyte(offs) << 24; -+ val |= nvram_getbyte(offs + 1) << 16; -+ val |= nvram_getbyte(offs + 2) << 8; -+ val |= nvram_getbyte(offs + 3); -+ return(val); -+} -+ -+static void -+nvram_setint(int offs, unsigned int val) -+{ -+ nvram_setbyte(offs, val >> 24); -+ nvram_setbyte(offs + 1, val >> 16); -+ nvram_setbyte(offs + 2, val >> 8); -+ nvram_setbyte(offs + 3, val); -+} -+#endif -+/* -+ * calculate NVRAM checksum -+ */ -+static unsigned short -+nvram_calcsum(void) -+{ -+ unsigned short sum = NV_MAGIC; -+ int i; -+ -+ for (i = ENV_BASE; i < ENV_TOP; i += 2) -+ sum += nvram_getshort(i); -+ return(sum); -+} -+ -+/* -+ * update the nvram checksum -+ */ -+static void -+nvram_updatesum (void) -+{ -+ nvram_setshort(NVOFF_CSUM, nvram_calcsum()); -+} -+ -+/* -+ * test validity of nvram by checksumming it -+ */ -+static int -+nvram_isvalid(void) -+{ -+ static int is_valid; -+ -+ if (is_valid) -+ return(1); -+ -+ if (nvram_getshort(NVOFF_MAGIC) != NV_MAGIC) { -+ printk("nvram_isvalid FAILED\n"); -+ //nvram_initenv(); -+ } -+ is_valid = 1; -+ return(1); -+} -+ -+/* return nvram address of environment string */ -+static int -+nvram_matchenv(char *s) -+{ -+ int envsize, envp, n, i, varsize; -+ char *var; -+ -+ envsize = nvram_getshort(NVOFF_ENVSIZE); -+ -+ if (envsize > ENV_AVAIL) -+ return(0); /* sanity */ -+ -+ envp = ENV_BASE; -+ -+ if ((n = strlen (s)) > 255) -+ return(0); -+ -+ while (envsize > 0) { -+ varsize = nvram_getbyte(envp); -+ if (varsize == 0 || (envp + varsize) > ENV_TOP) -+ return(0); /* sanity */ -+ for (i = envp + 1, var = s; i <= envp + n; i++, var++) { -+ char c1 = nvram_getbyte(i); -+ char c2 = *var; -+ if (islower(c1)) -+ c1 = toupper(c1); -+ if (islower(c2)) -+ c2 = toupper(c2); -+ if (c1 != c2) -+ break; -+ } -+ if (i > envp + n) { /* match so far */ -+ if (n == varsize - 1) /* match on boolean */ -+ return(envp); -+ if (nvram_getbyte(i) == '=') /* exact match on variable */ -+ return(envp); -+ } -+ envsize -= varsize; -+ envp += varsize; -+ } -+ return(0); -+} -+ -+static void nvram_initenv(void) -+{ -+ nvram_setshort(NVOFF_MAGIC, NV_MAGIC); -+ nvram_setshort(NVOFF_ENVSIZE, 0); -+ -+ nvram_updatesum(); -+} -+ -+static void -+nvram_delenv(char *s) -+{ -+ int nenvp, envp, envsize, nbytes; -+ -+ envp = nvram_matchenv(s); -+ if (envp == 0) -+ return; -+ -+ nenvp = envp + nvram_getbyte(envp); -+ envsize = nvram_getshort(NVOFF_ENVSIZE); -+ nbytes = envsize - (nenvp - ENV_BASE); -+ nvram_setshort(NVOFF_ENVSIZE, envsize - (nenvp - envp)); -+ while (nbytes--) { -+ nvram_setbyte(envp, nvram_getbyte(nenvp)); -+ envp++; -+ nenvp++; -+ } -+ nvram_updatesum(); -+} -+ -+static int -+nvram_setenv(char *s, char *v) -+{ -+ int ns, nv, total; -+ int envp; -+ -+ if (!nvram_isvalid()) -+ return(-1); -+ -+ nvram_delenv(s); -+ ns = strlen(s); -+ if (ns == 0) -+ return (-1); -+ if (v && *v) { -+ nv = strlen(v); -+ total = ns + nv + 2; -+ } -+ else { -+ nv = 0; -+ total = ns + 1; -+ } -+ if (total > 255 || total > ENV_AVAIL - nvram_getshort(NVOFF_ENVSIZE)) -+ return(-1); -+ -+ envp = ENV_BASE + nvram_getshort(NVOFF_ENVSIZE); -+ -+ nvram_setbyte(envp, (unsigned char) total); -+ envp++; -+ -+ while (ns--) { -+ nvram_setbyte(envp, *s); -+ envp++; -+ s++; -+ } -+ -+ if (nv) { -+ nvram_setbyte(envp, '='); -+ envp++; -+ while (nv--) { -+ nvram_setbyte(envp, *v); -+ envp++; -+ v++; -+ } -+ } -+ nvram_setshort(NVOFF_ENVSIZE, envp-ENV_BASE); -+ nvram_updatesum(); -+ return 0; -+} -+ -+static char * -+nvram_getenv(char *s) -+{ -+ static char buf[256]; /* FIXME: this cannot be static */ -+ int envp, ns, nbytes, i; -+ -+ if (!nvram_isvalid()) -+ return "INVALID NVRAM"; //((char *)0); -+ -+ envp = nvram_matchenv(s); -+ if (envp == 0) -+ return "NOT FOUND"; //((char *)0); -+ ns = strlen(s); -+ if (nvram_getbyte(envp) == ns + 1) /* boolean */ -+ buf[0] = '\0'; -+ else { -+ nbytes = nvram_getbyte(envp) - (ns + 2); -+ envp += ns + 2; -+ for (i = 0; i < nbytes; i++) -+ buf[i] = nvram_getbyte(envp++); -+ buf[i] = '\0'; -+ } -+ return(buf); -+} -+ -+static void -+nvram_unsetenv(char *s) -+{ -+ if (!nvram_isvalid()) -+ return; -+ -+ nvram_delenv(s); -+} -+ -+/* -+ * apply func to each string in environment -+ */ -+static void -+nvram_mapenv(int (*func)(char *, char *)) -+{ -+ int envsize, envp, n, i, seeneql; -+ char name[256], value[256]; -+ char c, *s; -+ -+ if (!nvram_isvalid()) -+ return; -+ -+ envsize = nvram_getshort(NVOFF_ENVSIZE); -+ envp = ENV_BASE; -+ -+ while (envsize > 0) { -+ value[0] = '\0'; -+ seeneql = 0; -+ s = name; -+ n = nvram_getbyte(envp); -+ for (i = envp + 1; i < envp + n; i++) { -+ c = nvram_getbyte(i); -+ if ((c == '=') && !seeneql) { -+ *s = '\0'; -+ s = value; -+ seeneql = 1; -+ continue; -+ } -+ *s++ = c; -+ } -+ *s = '\0'; -+ (*func)(name, value); -+ envsize -= n; -+ envp += n; -+ } -+} -+#if 0 -+static unsigned int -+digit(char c) -+{ -+ if ('0' <= c && c <= '9') -+ return (c - '0'); -+ if ('A' <= c && c <= 'Z') -+ return (10 + c - 'A'); -+ if ('a' <= c && c <= 'z') -+ return (10 + c - 'a'); -+ return (~0); -+} -+#endif -+/* -+ * Wrappers to allow 'special' environment variables to get processed -+ */ -+void -+setenv(char *e, char *v, int rewrite) -+{ -+ if (nvram_getenv(e) && !rewrite) -+ return; -+ -+ nvram_setenv(e, v); -+} -+ -+char * -+getenv(char *e) -+{ -+ return(nvram_getenv(e)); -+} -+ -+void -+unsetenv(char *e) -+{ -+ nvram_unsetenv(e); -+} -+ -+void -+purgeenv() -+{ -+ int i; -+ unsigned char* nvramDataPointer = (unsigned char*)(NVRAM_BASE); -+ -+ for (i = ENV_BASE; i < ENV_TOP; i++) -+ *nvramDataPointer++ = 0; -+ nvram_setshort(NVOFF_MAGIC, NV_MAGIC); -+ nvram_setshort(NVOFF_ENVSIZE, 0); -+ nvram_setshort(NVOFF_CSUM, NV_MAGIC); -+} -+ -+void -+mapenv(int (*func)(char *, char *)) -+{ -+ nvram_mapenv(func); -+} -diff -Nur linux-2.6.17/arch/mips/aruba/nvram/nvram434.h linux-2.6.17-owrt/arch/mips/aruba/nvram/nvram434.h ---- linux-2.6.17/arch/mips/aruba/nvram/nvram434.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/arch/mips/aruba/nvram/nvram434.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,66 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * nvram definitions. -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 rkt, neb -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+ -+#ifndef _NVRAM_ -+#define _NVRAM_ -+#define NVOFFSET 0 /* use all of NVRAM */ -+ -+/* Offsets to reserved locations */ -+ /* size description */ -+#define NVOFF_MAGIC (NVOFFSET + 0) /* 2 magic value */ -+#define NVOFF_CSUM (NVOFFSET + 2) /* 2 NVRAM environment checksum */ -+#define NVOFF_ENVSIZE (NVOFFSET + 4) /* 2 size of 'environment' */ -+#define NVOFF_TEST (NVOFFSET + 5) /* 1 cold start test byte */ -+#define NVOFF_ETHADDR (NVOFFSET + 6) /* 6 decoded ethernet address */ -+#define NVOFF_UNUSED (NVOFFSET + 12) /* 0 current end of table */ -+ -+#define NV_MAGIC 0xdeaf /* nvram magic number */ -+#define NV_RESERVED 6 /* number of reserved bytes */ -+ -+#undef NVOFF_ETHADDR -+#define NVOFF_ETHADDR (NVOFFSET + NV_RESERVED - 6) -+ -+/* number of bytes available for environment */ -+#define ENV_BASE (NVOFFSET + NV_RESERVED) -+#define ENV_TOP 0x2000 -+#define ENV_AVAIL (ENV_TOP - ENV_BASE) -+ -+#endif /* _NVRAM_ */ -+ -+ -diff -Nur linux-2.6.17/arch/mips/aruba/prom.c linux-2.6.17-owrt/arch/mips/aruba/prom.c ---- linux-2.6.17/arch/mips/aruba/prom.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/arch/mips/aruba/prom.c 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,114 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * prom interface routines -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 rkt, neb -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+unsigned int idt_cpu_freq; -+EXPORT_SYMBOL(idt_cpu_freq); -+ -+unsigned int arch_has_pci=0; -+ -+/* Kernel Boot parameters */ -+static unsigned char bootparm[] = -+ "init=/etc/preinit " -+ "mtdparts=physmap-flash.0:3520k@0x080000(zImage),2752k@0x140000(JFFS2),8k@0x3f8000(NVRAM) " -+ "console=ttyS0,9600 root=/dev/mtdblock1 rootfstype=jffs2 "; -+ -+extern unsigned long mips_machgroup; -+extern unsigned long mips_machtype; -+ -+extern void setup_serial_port(void); -+extern char * getenv(char *e); -+ -+/* IDT 79EB434 memory map -- we really should be auto sizing it */ -+#define RAM_SIZE 32*1024*1024 -+ -+char *__init prom_getcmdline(void) -+{ -+ return &(arcs_cmdline[0]); -+} -+ -+void __init prom_init(void) -+{ -+ char *boardname; -+ sprintf(arcs_cmdline, "%s", bootparm); -+ -+ /* set our arch type */ -+ mips_machgroup = MACH_GROUP_ARUBA; -+ mips_machtype = MACH_ARUBA_UNKNOWN; -+ -+ boardname=getenv("boardname"); -+ -+ if (!strcmp(boardname,"Muscat")) { -+ mips_machtype = MACH_ARUBA_AP70; -+ idt_cpu_freq = 133000000; -+ arch_has_pci=1; -+ } else if (!strcmp(boardname,"Mataro")) { -+ mips_machtype = MACH_ARUBA_AP65; -+ idt_cpu_freq = 110000000; -+ } else if (!strcmp(boardname,"Merlot")) { -+ mips_machtype = MACH_ARUBA_AP60; -+ idt_cpu_freq = 90000000; -+ } -+ -+ /* turn on the console */ -+ setup_serial_port(); -+ -+ /* -+ * give all RAM to boot allocator, -+ * except where the kernel was loaded -+ */ -+ add_memory_region(0,RAM_SIZE,BOOT_MEM_RAM); -+} -+ -+void prom_free_prom_memory(void) -+{ -+ printk("stubbed prom_free_prom_memory()\n"); -+} -diff -Nur linux-2.6.17/arch/mips/aruba/serial.c linux-2.6.17-owrt/arch/mips/aruba/serial.c ---- linux-2.6.17/arch/mips/aruba/serial.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/arch/mips/aruba/serial.c 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,94 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * Serial port initialisation. -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 rkt, neb -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+extern int __init early_serial_setup(struct uart_port *port); -+ -+#define BASE_BAUD (1843200 / 16) -+ -+extern unsigned int idt_cpu_freq; -+ -+extern int __init setup_serial_port(void) -+{ -+ static struct uart_port serial_req[2]; -+ -+ memset(serial_req, 0, sizeof(serial_req)); -+ serial_req[0].type = PORT_16550A; -+ serial_req[0].line = 0; -+ serial_req[0].flags = STD_COM_FLAGS; -+ serial_req[0].iotype = SERIAL_IO_MEM; -+ serial_req[0].regshift = 2; -+ -+ switch (mips_machtype) { -+ case MACH_ARUBA_AP70: -+ serial_req[0].irq = 104; -+ serial_req[0].mapbase = KSEG1ADDR(0x18058003); -+ serial_req[0].membase = (char *) KSEG1ADDR(0x18058003); -+ serial_req[0].uartclk = idt_cpu_freq; -+ break; -+ case MACH_ARUBA_AP65: -+ case MACH_ARUBA_AP60: -+ default: -+ serial_req[0].irq = 12; -+ serial_req[0].mapbase = KSEG1ADDR(0xbc000003); -+ serial_req[0].membase = (char *) KSEG1ADDR(0xbc000003); -+ serial_req[0].uartclk = idt_cpu_freq / 2; -+ break; -+ } -+ -+ early_serial_setup(&serial_req[0]); -+ -+ return(0); -+} -diff -Nur linux-2.6.17/arch/mips/aruba/setup.c linux-2.6.17-owrt/arch/mips/aruba/setup.c ---- linux-2.6.17/arch/mips/aruba/setup.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/arch/mips/aruba/setup.c 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,128 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * setup routines for IDT EB434 boards -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 rkt, neb -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include /* for KSEG1ADDR() */ -+#include -+#include -+ -+extern char *__init prom_getcmdline(void); -+ -+extern void (*board_time_init) (void); -+extern void aruba_time_init(void); -+extern void aruba_reset(void); -+ -+#define epldMask ((volatile unsigned char *)0xB900000d) -+ -+static void aruba_machine_restart(char *command) -+{ -+ switch (mips_machtype) { -+ case MACH_ARUBA_AP70: -+ *(volatile u32 *)KSEG1ADDR(0x18008000) = 0x80000001; -+ break; -+ case MACH_ARUBA_AP65: -+ case MACH_ARUBA_AP60: -+ default: -+ /* Reset*/ -+ *((volatile u32 *)KSEG1ADDR(0x1c003020)) = 0x00080350; // reset everything in sight -+ udelay(100); -+ *((volatile u32 *)KSEG1ADDR(0x1c003020)) = 0; // reset everything in sight -+ udelay(100); -+ *((volatile u32 *)KSEG1ADDR(0x1c003020)) = 0x3; // cold reset the cpu & system -+ break; -+ } -+} -+ -+static void aruba_machine_halt(void) -+{ -+ for (;;) continue; -+} -+ -+extern char * getenv(char *e); -+extern void unlock_ap60_70_flash(void); -+ -+void __init plat_mem_setup(void) -+{ -+ board_time_init = aruba_time_init; -+ -+ _machine_restart = aruba_machine_restart; -+ _machine_halt = aruba_machine_halt; -+ pm_power_off = aruba_machine_halt; -+ -+ set_io_port_base(KSEG1); -+ -+ /* Enable PCI interrupts in EPLD Mask register */ -+ *epldMask = 0x0; -+ *(epldMask + 1) = 0x0; -+ -+ write_c0_wired(0); -+ unlock_ap60_70_flash(); -+ -+ printk("BOARD - %s\n",getenv("boardname")); -+} -+ -+int page_is_ram(unsigned long pagenr) -+{ -+ return 1; -+} -+ -+const char *get_system_type(void) -+{ -+ switch (mips_machtype) { -+ case MACH_ARUBA_AP70: -+ return "Aruba AP70"; -+ case MACH_ARUBA_AP65: -+ return "Aruba AP65"; -+ case MACH_ARUBA_AP60: -+ return "Aruba AP60/AP61"; -+ default: -+ return "Aruba UNKNOWN"; -+ } -+} -+ -+EXPORT_SYMBOL(get_system_type); -diff -Nur linux-2.6.17/arch/mips/aruba/time.c linux-2.6.17-owrt/arch/mips/aruba/time.c ---- linux-2.6.17/arch/mips/aruba/time.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/arch/mips/aruba/time.c 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,110 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * timer routines for IDT EB434 boards -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 rkt, neb -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+ -+#include -+ -+static unsigned long r4k_offset; /* Amount to incr compare reg each time */ -+static unsigned long r4k_cur; /* What counter should be at next timer irq */ -+ -+extern unsigned int idt_cpu_freq; -+ -+static unsigned long __init cal_r4koff(void) -+{ -+ mips_hpt_frequency = idt_cpu_freq * IDT_CLOCK_MULT / 2; -+ return (mips_hpt_frequency / HZ); -+} -+ -+void __init aruba_time_init(void) -+{ -+ unsigned int est_freq, flags; -+ local_irq_save(flags); -+ -+ printk("calculating r4koff... "); -+ r4k_offset = cal_r4koff(); -+ printk("%08lx(%d)\n", r4k_offset, (int)r4k_offset); -+ -+ est_freq = 2 * r4k_offset * HZ; -+ est_freq += 5000; /* round */ -+ est_freq -= est_freq % 10000; -+ printk("CPU frequency %d.%02d MHz\n", est_freq / 1000000, -+ (est_freq % 1000000) * 100 / 1000000); -+ local_irq_restore(flags); -+ -+} -+ -+void __init plat_timer_setup(struct irqaction *irq) -+{ -+ /* we are using the cpu counter for timer interrupts */ -+ setup_irq(MIPS_CPU_TIMER_IRQ, irq); -+ -+ /* to generate the first timer interrupt */ -+ r4k_cur = (read_c0_count() + r4k_offset); -+ write_c0_compare(r4k_cur); -+ -+} -+ -+asmlinkage void aruba_timer_interrupt(struct pt_regs *regs) -+{ -+ int irq = MIPS_CPU_TIMER_IRQ; -+ -+ irq_enter(); -+ kstat_this_cpu.irqs[irq]++; -+ -+ timer_interrupt(irq, NULL); -+ irq_exit(); -+} -diff -Nur linux-2.6.17/arch/mips/Kconfig linux-2.6.17-owrt/arch/mips/Kconfig ---- linux-2.6.17/arch/mips/Kconfig 2006-06-18 03:49:35.000000000 +0200 -+++ linux-2.6.17-owrt/arch/mips/Kconfig 2006-06-18 12:44:28.000000000 +0200 -@@ -227,6 +227,17 @@ - either a NEC Vr5432 or QED RM5231. Say Y here if you wish to build - a kernel for this platform. - -+config MACH_ARUBA -+ bool "Support for the ARUBA product line" -+ select DMA_NONCOHERENT -+ select CPU_HAS_PREFETCH -+ select HW_HAS_PCI -+ select SWAP_IO_SPACE -+ select SYS_SUPPORTS_32BIT_KERNEL -+ select SYS_HAS_CPU_MIPS32_R1 -+ select SYS_SUPPORTS_BIG_ENDIAN -+ -+ - config MACH_JAZZ - bool "Jazz family of machines" - select ARC -diff -Nur linux-2.6.17/arch/mips/Makefile linux-2.6.17-owrt/arch/mips/Makefile ---- linux-2.6.17/arch/mips/Makefile 2006-06-18 03:49:35.000000000 +0200 -+++ linux-2.6.17-owrt/arch/mips/Makefile 2006-06-18 12:44:28.000000000 +0200 -@@ -145,6 +145,14 @@ - # - - # -+# Aruba -+# -+ -+core-$(CONFIG_MACH_ARUBA) += arch/mips/aruba/ -+cflags-$(CONFIG_MACH_ARUBA) += -Iinclude/asm-mips/aruba -+load-$(CONFIG_MACH_ARUBA) += 0x80100000 -+ -+# - # Acer PICA 61, Mips Magnum 4000 and Olivetti M700. - # - core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/ -diff -Nur linux-2.6.17/drivers/net/Kconfig linux-2.6.17-owrt/drivers/net/Kconfig ---- linux-2.6.17/drivers/net/Kconfig 2006-06-18 03:49:35.000000000 +0200 -+++ linux-2.6.17-owrt/drivers/net/Kconfig 2006-06-18 12:44:28.000000000 +0200 -@@ -187,6 +187,13 @@ - - source "drivers/net/arm/Kconfig" - -+config IDT_RC32434_ETH -+ tristate "IDT RC32434 Local Ethernet support" -+ depends on NET_ETHERNET -+ help -+ IDT RC32434 has one local ethernet port. Say Y here to enable it. -+ To compile this driver as a module, choose M here. -+ - config MACE - tristate "MACE (Power Mac ethernet) support" - depends on NET_ETHERNET && PPC_PMAC && PPC32 -diff -Nur linux-2.6.17/drivers/net/Makefile linux-2.6.17-owrt/drivers/net/Makefile ---- linux-2.6.17/drivers/net/Makefile 2006-06-18 03:49:35.000000000 +0200 -+++ linux-2.6.17-owrt/drivers/net/Makefile 2006-06-18 12:44:28.000000000 +0200 -@@ -38,6 +38,7 @@ - - obj-$(CONFIG_OAKNET) += oaknet.o 8390.o - -+obj-$(CONFIG_IDT_RC32434_ETH) += rc32434_eth.o - obj-$(CONFIG_DGRS) += dgrs.o - obj-$(CONFIG_VORTEX) += 3c59x.o - obj-$(CONFIG_TYPHOON) += typhoon.o -diff -Nur linux-2.6.17/drivers/net/natsemi.c linux-2.6.17-owrt/drivers/net/natsemi.c ---- linux-2.6.17/drivers/net/natsemi.c 2006-06-18 03:49:35.000000000 +0200 -+++ linux-2.6.17-owrt/drivers/net/natsemi.c 2006-06-18 12:44:28.000000000 +0200 -@@ -771,6 +771,49 @@ - static int netdev_get_eeprom(struct net_device *dev, u8 *buf); - static struct ethtool_ops ethtool_ops; - -+#ifdef CONFIG_MACH_ARUBA -+ -+#include -+ -+#ifndef ERR -+#define ERR(fmt, args...) printk("%s: " fmt, __func__, ##args) -+#endif -+ -+static int parse_mac_addr(struct net_device *dev, char* macstr) -+{ -+ int i, j; -+ unsigned char result, value; -+ -+ for (i=0; i<6; i++) { -+ result = 0; -+ if (i != 5 && *(macstr+2) != ':') { -+ ERR("invalid mac address format: %d %c\n", -+ i, *(macstr+2)); -+ return -EINVAL; -+ } -+ for (j=0; j<2; j++) { -+ if (isxdigit(*macstr) && (value = isdigit(*macstr) ? *macstr-'0' : -+ toupper(*macstr)-'A'+10) < 16) { -+ result = result*16 + value; -+ macstr++; -+ } -+ else { -+ ERR("invalid mac address " -+ "character: %c\n", *macstr); -+ return -EINVAL; -+ } -+ } -+ -+ macstr++; -+ dev->dev_addr[i] = result; -+ } -+ -+ dev->dev_addr[5]++; -+ return 0; -+} -+ -+#endif -+ - static inline void __iomem *ns_ioaddr(struct net_device *dev) - { - return (void __iomem *) dev->base_addr; -@@ -871,6 +914,7 @@ - goto err_ioremap; - } - -+#ifndef CONFIG_MACH_ARUBA - /* Work around the dropped serial bit. */ - prev_eedata = eeprom_read(ioaddr, 6); - for (i = 0; i < 3; i++) { -@@ -879,6 +923,19 @@ - dev->dev_addr[i*2+1] = eedata >> 7; - prev_eedata = eedata; - } -+#else -+ { -+ char mac[32]; -+ unsigned char def_mac[6] = {00, 0x0b, 0x86, 0xba, 0xdb, 0xad}; -+ extern char *getenv(char *e); -+ memset(mac, 0, 32); -+ memcpy(mac, getenv("ethaddr"), 17); -+ if (parse_mac_addr(dev, mac)){ -+ printk("%s: MAC address not found\n", __func__); -+ memcpy(dev->dev_addr, def_mac, 6); -+ } -+ } -+#endif - - dev->base_addr = (unsigned long __force) ioaddr; - dev->irq = irq; -diff -Nur linux-2.6.17/drivers/net/rc32434_eth.c linux-2.6.17-owrt/drivers/net/rc32434_eth.c ---- linux-2.6.17/drivers/net/rc32434_eth.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/drivers/net/rc32434_eth.c 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,1273 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * Driver for the IDT RC32434 on-chip ethernet controller. -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 rkt, neb -+ * -+ * Based on the driver developed by B. Maruthanayakam, H. Kou and others. -+ * -+ * Aug 2004 Sadik -+ * -+ * Added NAPI -+ * -+ ************************************************************************** -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "rc32434_eth.h" -+ -+#define DRIVER_VERSION "(mar2904)" -+ -+#define DRIVER_NAME "rc32434 Ethernet driver. " DRIVER_VERSION -+ -+ -+#define STATION_ADDRESS_HIGH(dev) (((dev)->dev_addr[0] << 8) | \ -+ ((dev)->dev_addr[1])) -+#define STATION_ADDRESS_LOW(dev) (((dev)->dev_addr[2] << 24) | \ -+ ((dev)->dev_addr[3] << 16) | \ -+ ((dev)->dev_addr[4] << 8) | \ -+ ((dev)->dev_addr[5])) -+ -+#define MII_CLOCK 1250000 /* no more than 2.5MHz */ -+static char mac0[18] = "08:00:06:05:40:01"; -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,52) -+module_param_string(mac0, mac0, 18, 0); -+#else -+MODULE_PARM(mac0, "c18"); -+#endif -+MODULE_PARM_DESC(mac0, "MAC address for RC32434 ethernet0"); -+ -+static struct rc32434_if_t { -+ char *name; -+ struct net_device *dev; -+ char* mac_str; -+ int weight; -+ u32 iobase; -+ u32 rxdmabase; -+ u32 txdmabase; -+ int rx_dma_irq; -+ int tx_dma_irq; -+ int rx_ovr_irq; -+ int tx_und_irq; -+} rc32434_iflist[] = -+{ -+ { -+ "rc32434_eth0", NULL, mac0, -+ 64, -+ ETH0_PhysicalAddress, -+ ETH0_RX_DMA_ADDR, -+ ETH0_TX_DMA_ADDR, -+ ETH0_DMA_RX_IRQ, -+ ETH0_DMA_TX_IRQ, -+ ETH0_RX_OVR_IRQ, -+ ETH0_TX_UND_IRQ -+ } -+}; -+ -+ -+static int parse_mac_addr(struct net_device *dev, char* macstr) -+{ -+ int i, j; -+ unsigned char result, value; -+ -+ for (i=0; i<6; i++) { -+ result = 0; -+ if (i != 5 && *(macstr+2) != ':') { -+ ERR("invalid mac address format: %d %c\n", -+ i, *(macstr+2)); -+ return -EINVAL; -+ } -+ for (j=0; j<2; j++) { -+ if (isxdigit(*macstr) && (value = isdigit(*macstr) ? *macstr-'0' : -+ toupper(*macstr)-'A'+10) < 16) { -+ result = result*16 + value; -+ macstr++; -+ } -+ else { -+ ERR("invalid mac address " -+ "character: %c\n", *macstr); -+ return -EINVAL; -+ } -+ } -+ -+ macstr++; -+ dev->dev_addr[i] = result; -+ } -+ -+ return 0; -+} -+ -+ -+ -+static inline void rc32434_abort_tx(struct net_device *dev) -+{ -+ struct rc32434_local *lp = (struct rc32434_local *)dev->priv; -+ rc32434_abort_dma(dev, lp->tx_dma_regs); -+ -+} -+ -+static inline void rc32434_abort_rx(struct net_device *dev) -+{ -+ struct rc32434_local *lp = (struct rc32434_local *)dev->priv; -+ rc32434_abort_dma(dev, lp->rx_dma_regs); -+ -+} -+ -+static inline void rc32434_start_tx(struct rc32434_local *lp, volatile DMAD_t td) -+{ -+ rc32434_start_dma(lp->tx_dma_regs, CPHYSADDR(td)); -+} -+ -+static inline void rc32434_start_rx(struct rc32434_local *lp, volatile DMAD_t rd) -+{ -+ rc32434_start_dma(lp->rx_dma_regs, CPHYSADDR(rd)); -+} -+ -+static inline void rc32434_chain_tx(struct rc32434_local *lp, volatile DMAD_t td) -+{ -+ rc32434_chain_dma(lp->tx_dma_regs, CPHYSADDR(td)); -+} -+ -+static inline void rc32434_chain_rx(struct rc32434_local *lp, volatile DMAD_t rd) -+{ -+ rc32434_chain_dma(lp->rx_dma_regs, CPHYSADDR(rd)); -+} -+ -+#ifdef RC32434_PROC_DEBUG -+static int rc32434_read_proc(char *buf, char **start, off_t fpos, -+ int length, int *eof, void *data) -+{ -+ struct net_device *dev = (struct net_device *)data; -+ struct rc32434_local *lp = (struct rc32434_local *)dev->priv; -+ int len = 0; -+ -+ /* print out header */ -+ len += sprintf(buf + len, "\n\tRC32434 Ethernet Debug\n\n"); -+ len += sprintf (buf + len, -+ "DMA halt count = %10d, DMA run count = %10d\n", -+ lp->dma_halt_cnt, lp->dma_run_cnt); -+ -+ if (fpos >= len) { -+ *start = buf; -+ *eof = 1; -+ return 0; -+ } -+ *start = buf + fpos; -+ -+ if ((len -= fpos) > length) -+ return length; -+ *eof = 1; -+ -+ return len; -+ -+} -+#endif -+ -+ -+/* -+ * Restart the RC32434 ethernet controller. -+ */ -+static int rc32434_restart(struct net_device *dev) -+{ -+ struct rc32434_local *lp = (struct rc32434_local *)dev->priv; -+ -+ /* -+ * Disable interrupts -+ */ -+ disable_irq(lp->rx_irq); -+ disable_irq(lp->tx_irq); -+#ifdef RC32434_REVISION -+ disable_irq(lp->ovr_irq); -+#endif -+ disable_irq(lp->und_irq); -+ -+ /* Mask F E bit in Tx DMA */ -+ rc32434_writel(rc32434_readl(&lp->tx_dma_regs->dmasm) | DMASM_f_m | DMASM_e_m, &lp->tx_dma_regs->dmasm); -+ /* Mask D H E bit in Rx DMA */ -+ rc32434_writel(rc32434_readl(&lp->rx_dma_regs->dmasm) | DMASM_d_m | DMASM_h_m | DMASM_e_m, &lp->rx_dma_regs->dmasm); -+ -+ rc32434_init(dev); -+ rc32434_multicast_list(dev); -+ -+ enable_irq(lp->und_irq); -+#ifdef RC32434_REVISION -+ enable_irq(lp->ovr_irq); -+#endif -+ enable_irq(lp->tx_irq); -+ enable_irq(lp->rx_irq); -+ -+ return 0; -+} -+ -+int rc32434_init_module(void) -+{ -+#ifdef CONFIG_MACH_ARUBA -+ if (mips_machtype != MACH_ARUBA_AP70) -+ return 1; -+#endif -+ -+ printk(KERN_INFO DRIVER_NAME " \n"); -+ return rc32434_probe(0); -+} -+ -+static int rc32434_probe(int port_num) -+{ -+ struct rc32434_if_t *bif = &rc32434_iflist[port_num]; -+ struct rc32434_local *lp = NULL; -+ struct net_device *dev = NULL; -+ int i, retval,err; -+ -+ dev = alloc_etherdev(sizeof(struct rc32434_local)); -+ if(!dev) { -+ ERR("rc32434_eth: alloc_etherdev failed\n"); -+ return -1; -+ } -+ -+ SET_MODULE_OWNER(dev); -+ bif->dev = dev; -+ -+#ifdef CONFIG_MACH_ARUBA -+ { -+ extern char * getenv(char *e); -+ memcpy(bif->mac_str, getenv("ethaddr"), 17); -+ } -+#endif -+ -+ printk("mac: %s\n", bif->mac_str); -+ if ((retval = parse_mac_addr(dev, bif->mac_str))) { -+ ERR("MAC address parse failed\n"); -+ free_netdev(dev); -+ return -1; -+ } -+ -+ -+ /* Initialize the device structure. */ -+ if (dev->priv == NULL) { -+ lp = (struct rc32434_local *)kmalloc(sizeof(*lp), GFP_KERNEL); -+ memset(lp, 0, sizeof(struct rc32434_local)); -+ } -+ else { -+ lp = (struct rc32434_local *)dev->priv; -+ } -+ -+ lp->rx_irq = bif->rx_dma_irq; -+ lp->tx_irq = bif->tx_dma_irq; -+ lp->ovr_irq = bif->rx_ovr_irq; -+ lp->und_irq = bif->tx_und_irq; -+ -+ lp->eth_regs = ioremap_nocache(bif->iobase, sizeof(*lp->eth_regs)); -+ -+ if (!lp->eth_regs) { -+ ERR("Can't remap eth registers\n"); -+ retval = -ENXIO; -+ goto probe_err_out; -+ } -+ -+ lp->rx_dma_regs = ioremap_nocache(bif->rxdmabase, sizeof(struct DMA_Chan_s)); -+ -+ if (!lp->rx_dma_regs) { -+ ERR("Can't remap Rx DMA registers\n"); -+ retval = -ENXIO; -+ goto probe_err_out; -+ } -+ lp->tx_dma_regs = ioremap_nocache(bif->txdmabase,sizeof(struct DMA_Chan_s)); -+ -+ if (!lp->tx_dma_regs) { -+ ERR("Can't remap Tx DMA registers\n"); -+ retval = -ENXIO; -+ goto probe_err_out; -+ } -+ -+#ifdef RC32434_PROC_DEBUG -+ lp->ps = create_proc_read_entry (bif->name, 0, proc_net, -+ rc32434_read_proc, dev); -+#endif -+ -+ lp->td_ring = (DMAD_t)kmalloc(TD_RING_SIZE + RD_RING_SIZE, GFP_KERNEL); -+ if (!lp->td_ring) { -+ ERR("Can't allocate descriptors\n"); -+ retval = -ENOMEM; -+ goto probe_err_out; -+ } -+ -+ dma_cache_inv((unsigned long)(lp->td_ring), TD_RING_SIZE + RD_RING_SIZE); -+ -+ /* now convert TD_RING pointer to KSEG1 */ -+ lp->td_ring = (DMAD_t )KSEG1ADDR(lp->td_ring); -+ lp->rd_ring = &lp->td_ring[RC32434_NUM_TDS]; -+ -+ -+ spin_lock_init(&lp->lock); -+ -+ dev->base_addr = bif->iobase; -+ /* just use the rx dma irq */ -+ dev->irq = bif->rx_dma_irq; -+ -+ dev->priv = lp; -+ -+ dev->open = rc32434_open; -+ dev->stop = rc32434_close; -+ dev->hard_start_xmit = rc32434_send_packet; -+ dev->get_stats = rc32434_get_stats; -+ dev->set_multicast_list = &rc32434_multicast_list; -+ dev->tx_timeout = rc32434_tx_timeout; -+ dev->watchdog_timeo = RC32434_TX_TIMEOUT; -+ -+#ifdef CONFIG_IDT_USE_NAPI -+ dev->poll = rc32434_poll; -+ dev->weight = bif->weight; -+ printk("Using NAPI with weight %d\n",dev->weight); -+#else -+ lp->rx_tasklet = kmalloc(sizeof(struct tasklet_struct), GFP_KERNEL); -+ tasklet_init(lp->rx_tasklet, rc32434_rx_tasklet, (unsigned long)dev); -+#endif -+ lp->tx_tasklet = kmalloc(sizeof(struct tasklet_struct), GFP_KERNEL); -+ tasklet_init(lp->tx_tasklet, rc32434_tx_tasklet, (unsigned long)dev); -+ -+ if ((err = register_netdev(dev))) { -+ printk(KERN_ERR "rc32434 ethernet. Cannot register net device %d\n", err); -+ free_netdev(dev); -+ retval = -EINVAL; -+ goto probe_err_out; -+ } -+ -+ INFO("Rx IRQ %d, Tx IRQ %d, ", bif->rx_dma_irq, bif->tx_dma_irq); -+ for (i = 0; i < 6; i++) { -+ printk("%2.2x", dev->dev_addr[i]); -+ if (i<5) -+ printk(":"); -+ } -+ printk("\n"); -+ -+ return 0; -+ -+ probe_err_out: -+ rc32434_cleanup_module(); -+ ERR(" failed. Returns %d\n", retval); -+ return retval; -+ -+} -+ -+ -+static void rc32434_cleanup_module(void) -+{ -+ int i; -+ -+ for (i = 0; rc32434_iflist[i].iobase; i++) { -+ struct rc32434_if_t * bif = &rc32434_iflist[i]; -+ if (bif->dev != NULL) { -+ struct rc32434_local *lp = (struct rc32434_local *)bif->dev->priv; -+ if (lp != NULL) { -+ if (lp->eth_regs) -+ iounmap((void*)lp->eth_regs); -+ if (lp->rx_dma_regs) -+ iounmap((void*)lp->rx_dma_regs); -+ if (lp->tx_dma_regs) -+ iounmap((void*)lp->tx_dma_regs); -+ if (lp->td_ring) -+ kfree((void*)KSEG0ADDR(lp->td_ring)); -+ -+#ifdef RC32434_PROC_DEBUG -+ if (lp->ps) { -+ remove_proc_entry(bif->name, proc_net); -+ } -+#endif -+ kfree(lp); -+ } -+ -+ unregister_netdev(bif->dev); -+ free_netdev(bif->dev); -+ kfree(bif->dev); -+ } -+ } -+} -+ -+ -+ -+static int rc32434_open(struct net_device *dev) -+{ -+ struct rc32434_local *lp = (struct rc32434_local *)dev->priv; -+ -+ /* Initialize */ -+ if (rc32434_init(dev)) { -+ ERR("Error: cannot open the Ethernet device\n"); -+ return -EAGAIN; -+ } -+ -+ /* Install the interrupt handler that handles the Done Finished Ovr and Und Events */ -+ if (request_irq(lp->rx_irq, &rc32434_rx_dma_interrupt, -+ SA_SHIRQ | SA_INTERRUPT, -+ "rc32434 ethernet Rx", dev)) { -+ ERR(": unable to get Rx DMA IRQ %d\n", -+ lp->rx_irq); -+ return -EAGAIN; -+ } -+ if (request_irq(lp->tx_irq, &rc32434_tx_dma_interrupt, -+ SA_SHIRQ | SA_INTERRUPT, -+ "rc32434 ethernet Tx", dev)) { -+ ERR(": unable to get Tx DMA IRQ %d\n", -+ lp->tx_irq); -+ free_irq(lp->rx_irq, dev); -+ return -EAGAIN; -+ } -+ -+#ifdef RC32434_REVISION -+ /* Install handler for overrun error. */ -+ if (request_irq(lp->ovr_irq, &rc32434_ovr_interrupt, -+ SA_SHIRQ | SA_INTERRUPT, -+ "Ethernet Overflow", dev)) { -+ ERR(": unable to get OVR IRQ %d\n", -+ lp->ovr_irq); -+ free_irq(lp->rx_irq, dev); -+ free_irq(lp->tx_irq, dev); -+ return -EAGAIN; -+ } -+#endif -+ -+ /* Install handler for underflow error. */ -+ if (request_irq(lp->und_irq, &rc32434_und_interrupt, -+ SA_SHIRQ | SA_INTERRUPT, -+ "Ethernet Underflow", dev)) { -+ ERR(": unable to get UND IRQ %d\n", -+ lp->und_irq); -+ free_irq(lp->rx_irq, dev); -+ free_irq(lp->tx_irq, dev); -+#ifdef RC32434_REVISION -+ free_irq(lp->ovr_irq, dev); -+#endif -+ return -EAGAIN; -+ } -+ -+ -+ return 0; -+} -+ -+ -+ -+ -+static int rc32434_close(struct net_device *dev) -+{ -+ struct rc32434_local *lp = (struct rc32434_local *)dev->priv; -+ u32 tmp; -+ -+ /* Disable interrupts */ -+ disable_irq(lp->rx_irq); -+ disable_irq(lp->tx_irq); -+#ifdef RC32434_REVISION -+ disable_irq(lp->ovr_irq); -+#endif -+ disable_irq(lp->und_irq); -+ -+ tmp = rc32434_readl(&lp->tx_dma_regs->dmasm); -+ tmp = tmp | DMASM_f_m | DMASM_e_m; -+ rc32434_writel(tmp, &lp->tx_dma_regs->dmasm); -+ -+ tmp = rc32434_readl(&lp->rx_dma_regs->dmasm); -+ tmp = tmp | DMASM_d_m | DMASM_h_m | DMASM_e_m; -+ rc32434_writel(tmp, &lp->rx_dma_regs->dmasm); -+ -+ free_irq(lp->rx_irq, dev); -+ free_irq(lp->tx_irq, dev); -+#ifdef RC32434_REVISION -+ free_irq(lp->ovr_irq, dev); -+#endif -+ free_irq(lp->und_irq, dev); -+ return 0; -+} -+ -+ -+/* transmit packet */ -+static int rc32434_send_packet(struct sk_buff *skb, struct net_device *dev) -+{ -+ struct rc32434_local *lp = (struct rc32434_local *)dev->priv; -+ unsigned long flags; -+ u32 length; -+ DMAD_t td; -+ -+ -+ spin_lock_irqsave(&lp->lock, flags); -+ -+ td = &lp->td_ring[lp->tx_chain_tail]; -+ -+ /* stop queue when full, drop pkts if queue already full */ -+ if(lp->tx_count >= (RC32434_NUM_TDS - 2)) { -+ lp->tx_full = 1; -+ -+ if(lp->tx_count == (RC32434_NUM_TDS - 2)) { -+ netif_stop_queue(dev); -+ } -+ else { -+ lp->stats.tx_dropped++; -+ dev_kfree_skb_any(skb); -+ spin_unlock_irqrestore(&lp->lock, flags); -+ return 1; -+ } -+ } -+ -+ lp->tx_count ++; -+ -+ lp->tx_skb[lp->tx_chain_tail] = skb; -+ -+ length = skb->len; -+ -+ /* Setup the transmit descriptor. */ -+ td->ca = CPHYSADDR(skb->data); -+ -+ if(rc32434_readl(&(lp->tx_dma_regs->dmandptr)) == 0) { -+ if( lp->tx_chain_status == empty ) { -+ td->control = DMA_COUNT(length) |DMAD_cof_m |DMAD_iof_m; /* Update tail */ -+ lp->tx_chain_tail = (lp->tx_chain_tail + 1) & RC32434_TDS_MASK; /* Move tail */ -+ rc32434_writel(CPHYSADDR(&lp->td_ring[lp->tx_chain_head]), &(lp->tx_dma_regs->dmandptr)); /* Write to NDPTR */ -+ lp->tx_chain_head = lp->tx_chain_tail; /* Move head to tail */ -+ } -+ else { -+ td->control = DMA_COUNT(length) |DMAD_cof_m|DMAD_iof_m; /* Update tail */ -+ lp->td_ring[(lp->tx_chain_tail-1)& RC32434_TDS_MASK].control &= ~(DMAD_cof_m); /* Link to prev */ -+ lp->td_ring[(lp->tx_chain_tail-1)& RC32434_TDS_MASK].link = CPHYSADDR(td); /* Link to prev */ -+ lp->tx_chain_tail = (lp->tx_chain_tail + 1) & RC32434_TDS_MASK; /* Move tail */ -+ rc32434_writel(CPHYSADDR(&lp->td_ring[lp->tx_chain_head]), &(lp->tx_dma_regs->dmandptr)); /* Write to NDPTR */ -+ lp->tx_chain_head = lp->tx_chain_tail; /* Move head to tail */ -+ lp->tx_chain_status = empty; -+ } -+ } -+ else { -+ if( lp->tx_chain_status == empty ) { -+ td->control = DMA_COUNT(length) |DMAD_cof_m |DMAD_iof_m; /* Update tail */ -+ lp->tx_chain_tail = (lp->tx_chain_tail + 1) & RC32434_TDS_MASK; /* Move tail */ -+ lp->tx_chain_status = filled; -+ } -+ else { -+ td->control = DMA_COUNT(length) |DMAD_cof_m |DMAD_iof_m; /* Update tail */ -+ lp->td_ring[(lp->tx_chain_tail-1)& RC32434_TDS_MASK].control &= ~(DMAD_cof_m); /* Link to prev */ -+ lp->td_ring[(lp->tx_chain_tail-1)& RC32434_TDS_MASK].link = CPHYSADDR(td); /* Link to prev */ -+ lp->tx_chain_tail = (lp->tx_chain_tail + 1) & RC32434_TDS_MASK; /* Move tail */ -+ } -+ } -+ -+ dev->trans_start = jiffies; -+ -+ spin_unlock_irqrestore(&lp->lock, flags); -+ -+ return 0; -+} -+ -+ -+/* Ethernet MII-PHY Handler */ -+static void rc32434_mii_handler(unsigned long data) -+{ -+ struct net_device *dev = (struct net_device *)data; -+ struct rc32434_local *lp = (struct rc32434_local *)dev->priv; -+ unsigned long flags; -+ unsigned long duplex_status; -+ int port_addr = (lp->rx_irq == 0x2c? 1:0) << 8; -+ -+ spin_lock_irqsave(&lp->lock, flags); -+ -+ /* Two ports are using the same MII, the difference is the PHY address */ -+ rc32434_writel(0, &rc32434_eth0_regs->miimcfg); -+ rc32434_writel(0, &rc32434_eth0_regs->miimcmd); -+ rc32434_writel(port_addr |0x05, &rc32434_eth0_regs->miimaddr); -+ rc32434_writel(MIIMCMD_scn_m, &rc32434_eth0_regs->miimcmd); -+ while(rc32434_readl(&rc32434_eth0_regs->miimind) & MIIMIND_nv_m); -+ -+ ERR("irq:%x port_addr:%x RDD:%x\n", -+ lp->rx_irq, port_addr, rc32434_readl(&rc32434_eth0_regs->miimrdd)); -+ duplex_status = (rc32434_readl(&rc32434_eth0_regs->miimrdd) & 0x140)? ETHMAC2_fd_m: 0; -+ if(duplex_status != lp->duplex_mode) { -+ ERR("The MII-PHY is Auto-negotiated to %s-Duplex mode for Eth-%x\n", duplex_status? "Full":"Half", lp->rx_irq == 0x2c? 1:0); -+ lp->duplex_mode = duplex_status; -+ rc32434_restart(dev); -+ } -+ -+ lp->mii_phy_timer.expires = jiffies + 10 * HZ; -+ add_timer(&lp->mii_phy_timer); -+ -+ spin_unlock_irqrestore(&lp->lock, flags); -+ -+} -+ -+#ifdef RC32434_REVISION -+/* Ethernet Rx Overflow interrupt */ -+static irqreturn_t -+rc32434_ovr_interrupt(int irq, void *dev_id) -+{ -+ struct net_device *dev = (struct net_device *)dev_id; -+ struct rc32434_local *lp; -+ unsigned int ovr; -+ irqreturn_t retval = IRQ_NONE; -+ -+ ASSERT(dev != NULL); -+ -+ lp = (struct rc32434_local *)dev->priv; -+ spin_lock(&lp->lock); -+ ovr = rc32434_readl(&lp->eth_regs->ethintfc); -+ -+ if(ovr & ETHINTFC_ovr_m) { -+ netif_stop_queue(dev); -+ -+ /* clear OVR bit */ -+ rc32434_writel((ovr & ~ETHINTFC_ovr_m), &lp->eth_regs->ethintfc); -+ -+ /* Restart interface */ -+ rc32434_restart(dev); -+ retval = IRQ_HANDLED; -+ } -+ spin_unlock(&lp->lock); -+ -+ return retval; -+} -+ -+#endif -+ -+ -+/* Ethernet Tx Underflow interrupt */ -+static irqreturn_t -+rc32434_und_interrupt(int irq, void *dev_id) -+{ -+ struct net_device *dev = (struct net_device *)dev_id; -+ struct rc32434_local *lp; -+ unsigned int und; -+ irqreturn_t retval = IRQ_NONE; -+ -+ ASSERT(dev != NULL); -+ -+ lp = (struct rc32434_local *)dev->priv; -+ -+ spin_lock(&lp->lock); -+ -+ und = rc32434_readl(&lp->eth_regs->ethintfc); -+ -+ if(und & ETHINTFC_und_m) { -+ netif_stop_queue(dev); -+ -+ rc32434_writel((und & ~ETHINTFC_und_m), &lp->eth_regs->ethintfc); -+ -+ /* Restart interface */ -+ rc32434_restart(dev); -+ retval = IRQ_HANDLED; -+ } -+ -+ spin_unlock(&lp->lock); -+ -+ return retval; -+} -+ -+ -+/* Ethernet Rx DMA interrupt */ -+static irqreturn_t -+rc32434_rx_dma_interrupt(int irq, void *dev_id) -+{ -+ struct net_device *dev = (struct net_device *)dev_id; -+ struct rc32434_local* lp; -+ volatile u32 dmas,dmasm; -+ irqreturn_t retval; -+ -+ ASSERT(dev != NULL); -+ -+ lp = (struct rc32434_local *)dev->priv; -+ -+ spin_lock(&lp->lock); -+ dmas = rc32434_readl(&lp->rx_dma_regs->dmas); -+ if(dmas & (DMAS_d_m|DMAS_h_m|DMAS_e_m)) { -+ /* Mask D H E bit in Rx DMA */ -+ dmasm = rc32434_readl(&lp->rx_dma_regs->dmasm); -+ rc32434_writel(dmasm | (DMASM_d_m | DMASM_h_m | DMASM_e_m), &lp->rx_dma_regs->dmasm); -+#ifdef CONFIG_IDT_USE_NAPI -+ if(netif_rx_schedule_prep(dev)) -+ __netif_rx_schedule(dev); -+#else -+ tasklet_hi_schedule(lp->rx_tasklet); -+#endif -+ -+ if (dmas & DMAS_e_m) -+ ERR(": DMA error\n"); -+ -+ retval = IRQ_HANDLED; -+ } -+ else -+ retval = IRQ_NONE; -+ -+ spin_unlock(&lp->lock); -+ return retval; -+} -+ -+#ifdef CONFIG_IDT_USE_NAPI -+static int rc32434_poll(struct net_device *rx_data_dev, int *budget) -+#else -+static void rc32434_rx_tasklet(unsigned long rx_data_dev) -+#endif -+{ -+ struct net_device *dev = (struct net_device *)rx_data_dev; -+ struct rc32434_local* lp = netdev_priv(dev); -+ volatile DMAD_t rd = &lp->rd_ring[lp->rx_next_done]; -+ struct sk_buff *skb, *skb_new; -+ u8* pkt_buf; -+ u32 devcs, count, pkt_len, pktuncrc_len; -+ volatile u32 dmas; -+#ifdef CONFIG_IDT_USE_NAPI -+ u32 received = 0; -+ int rx_work_limit = min(*budget,dev->quota); -+#else -+ unsigned long flags; -+ spin_lock_irqsave(&lp->lock, flags); -+#endif -+ -+ while ( (count = RC32434_RBSIZE - (u32)DMA_COUNT(rd->control)) != 0) { -+#ifdef CONFIG_IDT_USE_NAPI -+ if(--rx_work_limit <0) -+ { -+ break; -+ } -+#endif -+ /* init the var. used for the later operations within the while loop */ -+ skb_new = NULL; -+ devcs = rd->devcs; -+ pkt_len = RCVPKT_LENGTH(devcs); -+ skb = lp->rx_skb[lp->rx_next_done]; -+ -+ if (count < 64) { -+ lp->stats.rx_errors++; -+ lp->stats.rx_dropped++; -+ } -+ else if ((devcs & ( ETHRX_ld_m)) != ETHRX_ld_m) { -+ /* check that this is a whole packet */ -+ /* WARNING: DMA_FD bit incorrectly set in Rc32434 (errata ref #077) */ -+ lp->stats.rx_errors++; -+ lp->stats.rx_dropped++; -+ } -+ else if ( (devcs & ETHRX_rok_m) ) { -+ -+ { -+ /* must be the (first and) last descriptor then */ -+ pkt_buf = (u8*)lp->rx_skb[lp->rx_next_done]->data; -+ -+ pktuncrc_len = pkt_len - 4; -+ /* invalidate the cache */ -+ dma_cache_inv((unsigned long)pkt_buf, pktuncrc_len); -+ -+ /* Malloc up new buffer. */ -+ skb_new = dev_alloc_skb(RC32434_RBSIZE + 2); -+ -+ if (skb_new != NULL){ -+ /* Make room */ -+ skb_put(skb, pktuncrc_len); -+ -+ skb->protocol = eth_type_trans(skb, dev); -+ -+ /* pass the packet to upper layers */ -+#ifdef CONFIG_IDT_USE_NAPI -+ netif_receive_skb(skb); -+#else -+ netif_rx(skb); -+#endif -+ -+ dev->last_rx = jiffies; -+ lp->stats.rx_packets++; -+ lp->stats.rx_bytes += pktuncrc_len; -+ -+ if (IS_RCV_MP(devcs)) -+ lp->stats.multicast++; -+ -+ /* 16 bit align */ -+ skb_reserve(skb_new, 2); -+ -+ skb_new->dev = dev; -+ lp->rx_skb[lp->rx_next_done] = skb_new; -+ } -+ else { -+ ERR("no memory, dropping rx packet.\n"); -+ lp->stats.rx_errors++; -+ lp->stats.rx_dropped++; -+ } -+ } -+ -+ } -+ else { -+ /* This should only happen if we enable accepting broken packets */ -+ lp->stats.rx_errors++; -+ lp->stats.rx_dropped++; -+ -+ /* add statistics counters */ -+ if (IS_RCV_CRC_ERR(devcs)) { -+ DBG(2, "RX CRC error\n"); -+ lp->stats.rx_crc_errors++; -+ } -+ else if (IS_RCV_LOR_ERR(devcs)) { -+ DBG(2, "RX LOR error\n"); -+ lp->stats.rx_length_errors++; -+ } -+ else if (IS_RCV_LE_ERR(devcs)) { -+ DBG(2, "RX LE error\n"); -+ lp->stats.rx_length_errors++; -+ } -+ else if (IS_RCV_OVR_ERR(devcs)) { -+ lp->stats.rx_over_errors++; -+ } -+ else if (IS_RCV_CV_ERR(devcs)) { -+ /* code violation */ -+ DBG(2, "RX CV error\n"); -+ lp->stats.rx_frame_errors++; -+ } -+ else if (IS_RCV_CES_ERR(devcs)) { -+ DBG(2, "RX Preamble error\n"); -+ } -+ } -+ -+ rd->devcs = 0; -+ -+ /* restore descriptor's curr_addr */ -+ if(skb_new) -+ rd->ca = CPHYSADDR(skb_new->data); -+ else -+ rd->ca = CPHYSADDR(skb->data); -+ -+ rd->control = DMA_COUNT(RC32434_RBSIZE) |DMAD_cod_m |DMAD_iod_m; -+ lp->rd_ring[(lp->rx_next_done-1)& RC32434_RDS_MASK].control &= ~(DMAD_cod_m); -+ -+ lp->rx_next_done = (lp->rx_next_done + 1) & RC32434_RDS_MASK; -+ rd = &lp->rd_ring[lp->rx_next_done]; -+ rc32434_writel( ~DMAS_d_m, &lp->rx_dma_regs->dmas); -+ } -+#ifdef CONFIG_IDT_USE_NAPI -+ dev->quota -= received; -+ *budget =- received; -+ if(rx_work_limit < 0) -+ goto not_done; -+#endif -+ -+ dmas = rc32434_readl(&lp->rx_dma_regs->dmas); -+ -+ if(dmas & DMAS_h_m) { -+ rc32434_writel( ~(DMAS_h_m | DMAS_e_m), &lp->rx_dma_regs->dmas); -+#ifdef RC32434_PROC_DEBUG -+ lp->dma_halt_cnt++; -+#endif -+ rd->devcs = 0; -+ skb = lp->rx_skb[lp->rx_next_done]; -+ rd->ca = CPHYSADDR(skb->data); -+ rc32434_chain_rx(lp,rd); -+ } -+ -+#ifdef CONFIG_IDT_USE_NAPI -+ netif_rx_complete(dev); -+#endif -+ /* Enable D H E bit in Rx DMA */ -+ rc32434_writel(rc32434_readl(&lp->rx_dma_regs->dmasm) & ~(DMASM_d_m | DMASM_h_m |DMASM_e_m), &lp->rx_dma_regs->dmasm); -+#ifdef CONFIG_IDT_USE_NAPI -+ return 0; -+ not_done: -+ return 1; -+#else -+ spin_unlock_irqrestore(&lp->lock, flags); -+ return; -+#endif -+ -+ -+} -+ -+ -+ -+/* Ethernet Tx DMA interrupt */ -+static irqreturn_t -+rc32434_tx_dma_interrupt(int irq, void *dev_id) -+{ -+ struct net_device *dev = (struct net_device *)dev_id; -+ struct rc32434_local *lp; -+ volatile u32 dmas,dmasm; -+ irqreturn_t retval; -+ -+ ASSERT(dev != NULL); -+ -+ lp = (struct rc32434_local *)dev->priv; -+ -+ spin_lock(&lp->lock); -+ -+ dmas = rc32434_readl(&lp->tx_dma_regs->dmas); -+ -+ if (dmas & (DMAS_f_m | DMAS_e_m)) { -+ dmasm = rc32434_readl(&lp->tx_dma_regs->dmasm); -+ /* Mask F E bit in Tx DMA */ -+ rc32434_writel(dmasm | (DMASM_f_m | DMASM_e_m), &lp->tx_dma_regs->dmasm); -+ -+ tasklet_hi_schedule(lp->tx_tasklet); -+ -+ if(lp->tx_chain_status == filled && (rc32434_readl(&(lp->tx_dma_regs->dmandptr)) == 0)) { -+ rc32434_writel(CPHYSADDR(&lp->td_ring[lp->tx_chain_head]), &(lp->tx_dma_regs->dmandptr)); -+ lp->tx_chain_status = empty; -+ lp->tx_chain_head = lp->tx_chain_tail; -+ dev->trans_start = jiffies; -+ } -+ -+ if (dmas & DMAS_e_m) -+ ERR(": DMA error\n"); -+ -+ retval = IRQ_HANDLED; -+ } -+ else -+ retval = IRQ_NONE; -+ -+ spin_unlock(&lp->lock); -+ -+ return retval; -+} -+ -+ -+static void rc32434_tx_tasklet(unsigned long tx_data_dev) -+{ -+ struct net_device *dev = (struct net_device *)tx_data_dev; -+ struct rc32434_local* lp = (struct rc32434_local *)dev->priv; -+ volatile DMAD_t td = &lp->td_ring[lp->tx_next_done]; -+ u32 devcs; -+ unsigned long flags; -+ volatile u32 dmas; -+ -+ spin_lock_irqsave(&lp->lock, flags); -+ -+ /* process all desc that are done */ -+ while(IS_DMA_FINISHED(td->control)) { -+ if(lp->tx_full == 1) { -+ netif_wake_queue(dev); -+ lp->tx_full = 0; -+ } -+ -+ devcs = lp->td_ring[lp->tx_next_done].devcs; -+ if ((devcs & (ETHTX_fd_m | ETHTX_ld_m)) != (ETHTX_fd_m | ETHTX_ld_m)) { -+ lp->stats.tx_errors++; -+ lp->stats.tx_dropped++; -+ -+ /* should never happen */ -+ DBG(1, __FUNCTION__ ": split tx ignored\n"); -+ } -+ else if (IS_TX_TOK(devcs)) { -+ lp->stats.tx_packets++; -+ } -+ else { -+ lp->stats.tx_errors++; -+ lp->stats.tx_dropped++; -+ -+ /* underflow */ -+ if (IS_TX_UND_ERR(devcs)) -+ lp->stats.tx_fifo_errors++; -+ -+ /* oversized frame */ -+ if (IS_TX_OF_ERR(devcs)) -+ lp->stats.tx_aborted_errors++; -+ -+ /* excessive deferrals */ -+ if (IS_TX_ED_ERR(devcs)) -+ lp->stats.tx_carrier_errors++; -+ -+ /* collisions: medium busy */ -+ if (IS_TX_EC_ERR(devcs)) -+ lp->stats.collisions++; -+ -+ /* late collision */ -+ if (IS_TX_LC_ERR(devcs)) -+ lp->stats.tx_window_errors++; -+ -+ } -+ -+ /* We must always free the original skb */ -+ if (lp->tx_skb[lp->tx_next_done] != NULL) { -+ dev_kfree_skb_any(lp->tx_skb[lp->tx_next_done]); -+ lp->tx_skb[lp->tx_next_done] = NULL; -+ } -+ -+ lp->td_ring[lp->tx_next_done].control = DMAD_iof_m; -+ lp->td_ring[lp->tx_next_done].devcs = ETHTX_fd_m | ETHTX_ld_m; -+ lp->td_ring[lp->tx_next_done].link = 0; -+ lp->td_ring[lp->tx_next_done].ca = 0; -+ lp->tx_count --; -+ -+ /* go on to next transmission */ -+ lp->tx_next_done = (lp->tx_next_done + 1) & RC32434_TDS_MASK; -+ td = &lp->td_ring[lp->tx_next_done]; -+ -+ } -+ -+ dmas = rc32434_readl(&lp->tx_dma_regs->dmas); -+ rc32434_writel( ~dmas, &lp->tx_dma_regs->dmas); -+ -+ /* Enable F E bit in Tx DMA */ -+ rc32434_writel(rc32434_readl(&lp->tx_dma_regs->dmasm) & ~(DMASM_f_m | DMASM_e_m), &lp->tx_dma_regs->dmasm); -+ spin_unlock_irqrestore(&lp->lock, flags); -+ -+} -+ -+ -+static struct net_device_stats * rc32434_get_stats(struct net_device *dev) -+{ -+ struct rc32434_local *lp = (struct rc32434_local *)dev->priv; -+ return &lp->stats; -+} -+ -+ -+/* -+ * Set or clear the multicast filter for this adaptor. -+ */ -+static void rc32434_multicast_list(struct net_device *dev) -+{ -+ /* listen to broadcasts always and to treat */ -+ /* IFF bits independantly */ -+ struct rc32434_local *lp = (struct rc32434_local *)dev->priv; -+ unsigned long flags; -+ u32 recognise = ETHARC_ab_m; /* always accept broadcasts */ -+ -+ if (dev->flags & IFF_PROMISC) /* set promiscuous mode */ -+ recognise |= ETHARC_pro_m; -+ -+ if ((dev->flags & IFF_ALLMULTI) || (dev->mc_count > 15)) -+ recognise |= ETHARC_am_m; /* all multicast & bcast */ -+ else if (dev->mc_count > 0) { -+ DBG(2, __FUNCTION__ ": mc_count %d\n", dev->mc_count); -+ recognise |= ETHARC_am_m; /* for the time being */ -+ } -+ -+ spin_lock_irqsave(&lp->lock, flags); -+ rc32434_writel(recognise, &lp->eth_regs->etharc); -+ spin_unlock_irqrestore(&lp->lock, flags); -+} -+ -+ -+static void rc32434_tx_timeout(struct net_device *dev) -+{ -+ struct rc32434_local *lp = (struct rc32434_local *)dev->priv; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&lp->lock, flags); -+ rc32434_restart(dev); -+ spin_unlock_irqrestore(&lp->lock, flags); -+ -+} -+ -+ -+/* -+ * Initialize the RC32434 ethernet controller. -+ */ -+static int rc32434_init(struct net_device *dev) -+{ -+ struct rc32434_local *lp = (struct rc32434_local *)dev->priv; -+ int i, j; -+ -+ /* Disable DMA */ -+ rc32434_abort_tx(dev); -+ rc32434_abort_rx(dev); -+ -+ /* reset ethernet logic */ -+ rc32434_writel(0, &lp->eth_regs->ethintfc); -+ while((rc32434_readl(&lp->eth_regs->ethintfc) & ETHINTFC_rip_m)) -+ dev->trans_start = jiffies; -+ -+ /* Enable Ethernet Interface */ -+ rc32434_writel(ETHINTFC_en_m, &lp->eth_regs->ethintfc); -+ -+#ifndef CONFIG_IDT_USE_NAPI -+ tasklet_disable(lp->rx_tasklet); -+#endif -+ tasklet_disable(lp->tx_tasklet); -+ -+ /* Initialize the transmit Descriptors */ -+ for (i = 0; i < RC32434_NUM_TDS; i++) { -+ lp->td_ring[i].control = DMAD_iof_m; -+ lp->td_ring[i].devcs = ETHTX_fd_m | ETHTX_ld_m; -+ lp->td_ring[i].ca = 0; -+ lp->td_ring[i].link = 0; -+ if (lp->tx_skb[i] != NULL) { -+ dev_kfree_skb_any(lp->tx_skb[i]); -+ lp->tx_skb[i] = NULL; -+ } -+ } -+ lp->tx_next_done = lp->tx_chain_head = lp->tx_chain_tail = lp->tx_full = lp->tx_count = 0; -+ lp-> tx_chain_status = empty; -+ -+ /* -+ * Initialize the receive descriptors so that they -+ * become a circular linked list, ie. let the last -+ * descriptor point to the first again. -+ */ -+ for (i=0; irx_skb[i]; -+ -+ if (lp->rx_skb[i] == NULL) { -+ skb = dev_alloc_skb(RC32434_RBSIZE + 2); -+ if (skb == NULL) { -+ ERR("No memory in the system\n"); -+ for (j = 0; j < RC32434_NUM_RDS; j ++) -+ if (lp->rx_skb[j] != NULL) -+ dev_kfree_skb_any(lp->rx_skb[j]); -+ -+ return 1; -+ } -+ else { -+ skb->dev = dev; -+ skb_reserve(skb, 2); -+ lp->rx_skb[i] = skb; -+ lp->rd_ring[i].ca = CPHYSADDR(skb->data); -+ -+ } -+ } -+ lp->rd_ring[i].control = DMAD_iod_m | DMA_COUNT(RC32434_RBSIZE); -+ lp->rd_ring[i].devcs = 0; -+ lp->rd_ring[i].ca = CPHYSADDR(skb->data); -+ lp->rd_ring[i].link = CPHYSADDR(&lp->rd_ring[i+1]); -+ -+ } -+ /* loop back */ -+ lp->rd_ring[RC32434_NUM_RDS-1].link = CPHYSADDR(&lp->rd_ring[0]); -+ lp->rx_next_done = 0; -+ -+ lp->rd_ring[RC32434_NUM_RDS-1].control |= DMAD_cod_m; -+ lp->rx_chain_head = 0; -+ lp->rx_chain_tail = 0; -+ lp->rx_chain_status = empty; -+ -+ rc32434_writel(0, &lp->rx_dma_regs->dmas); -+ /* Start Rx DMA */ -+ rc32434_start_rx(lp, &lp->rd_ring[0]); -+ -+ /* Enable F E bit in Tx DMA */ -+ rc32434_writel(rc32434_readl(&lp->tx_dma_regs->dmasm) & ~(DMASM_f_m | DMASM_e_m), &lp->tx_dma_regs->dmasm); -+ /* Enable D H E bit in Rx DMA */ -+ rc32434_writel(rc32434_readl(&lp->rx_dma_regs->dmasm) & ~(DMASM_d_m | DMASM_h_m | DMASM_e_m), &lp->rx_dma_regs->dmasm); -+ -+ /* Accept only packets destined for this Ethernet device address */ -+ rc32434_writel(ETHARC_ab_m, &lp->eth_regs->etharc); -+ -+ /* Set all Ether station address registers to their initial values */ -+ rc32434_writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal0); -+ rc32434_writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah0); -+ -+ rc32434_writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal1); -+ rc32434_writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah1); -+ -+ rc32434_writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal2); -+ rc32434_writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah2); -+ -+ rc32434_writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal3); -+ rc32434_writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah3); -+ -+ -+ /* Frame Length Checking, Pad Enable, CRC Enable, Full Duplex set */ -+ rc32434_writel(ETHMAC2_pe_m | ETHMAC2_cen_m | ETHMAC2_fd_m, &lp->eth_regs->ethmac2); -+ //ETHMAC2_flc_m ETHMAC2_fd_m lp->duplex_mode -+ -+ /* Back to back inter-packet-gap */ -+ rc32434_writel(0x15, &lp->eth_regs->ethipgt); -+ /* Non - Back to back inter-packet-gap */ -+ rc32434_writel(0x12, &lp->eth_regs->ethipgr); -+ -+ /* Management Clock Prescaler Divisor */ -+ /* Clock independent setting */ -+ rc32434_writel(((idt_cpu_freq)/MII_CLOCK+1) & ~1, -+ &lp->eth_regs->ethmcp); -+ -+ /* don't transmit until fifo contains 48b */ -+ rc32434_writel(48, &lp->eth_regs->ethfifott); -+ -+ rc32434_writel(ETHMAC1_re_m, &lp->eth_regs->ethmac1); -+ -+#ifndef CONFIG_IDT_USE_NAPI -+ tasklet_enable(lp->rx_tasklet); -+#endif -+ tasklet_enable(lp->tx_tasklet); -+ -+ netif_start_queue(dev); -+ -+ -+ return 0; -+ -+} -+ -+ -+#ifndef MODULE -+ -+static int __init rc32434_setup(char *options) -+{ -+ /* no options yet */ -+ return 1; -+} -+ -+static int __init rc32434_setup_ethaddr0(char *options) -+{ -+ memcpy(mac0, options, 17); -+ mac0[17]= '\0'; -+ return 1; -+} -+ -+__setup("rc32434eth=", rc32434_setup); -+__setup("ethaddr0=", rc32434_setup_ethaddr0); -+ -+ -+#endif /* MODULE */ -+ -+module_init(rc32434_init_module); -+module_exit(rc32434_cleanup_module); -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -diff -Nur linux-2.6.17/drivers/net/rc32434_eth.h linux-2.6.17-owrt/drivers/net/rc32434_eth.h ---- linux-2.6.17/drivers/net/rc32434_eth.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/drivers/net/rc32434_eth.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,187 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * Definitions for IDT RC32434 on-chip ethernet controller. -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 rkt, neb -+ * -+ * Initial Release -+ * -+ * Aug 2004 -+ * -+ * Added NAPI -+ * -+ ************************************************************************** -+ */ -+ -+ -+#include -+#include -+#include -+ -+#define RC32434_DEBUG 2 -+//#define RC32434_PROC_DEBUG -+#undef RC32434_DEBUG -+ -+#ifdef RC32434_DEBUG -+ -+/* use 0 for production, 1 for verification, >2 for debug */ -+static int rc32434_debug = RC32434_DEBUG; -+#define ASSERT(expr) \ -+ if(!(expr)) { \ -+ printk( "Assertion failed! %s,%s,%s,line=%d\n", \ -+ #expr,__FILE__,__FUNCTION__,__LINE__); } -+#define DBG(lvl, format, arg...) if (rc32434_debug > lvl) printk(KERN_INFO "%s: " format, dev->name , ## arg) -+#else -+#define ASSERT(expr) do {} while (0) -+#define DBG(lvl, format, arg...) do {} while (0) -+#endif -+ -+#define INFO(format, arg...) printk(KERN_INFO "%s: " format, dev->name , ## arg) -+#define ERR(format, arg...) printk(KERN_ERR "%s: " format, dev->name , ## arg) -+#define WARN(format, arg...) printk(KERN_WARNING "%s: " format, dev->name , ## arg) -+ -+#define ETH0_DMA_RX_IRQ GROUP1_IRQ_BASE + 0 -+#define ETH0_DMA_TX_IRQ GROUP1_IRQ_BASE + 1 -+#define ETH0_RX_OVR_IRQ GROUP3_IRQ_BASE + 9 -+#define ETH0_TX_UND_IRQ GROUP3_IRQ_BASE + 10 -+ -+#define ETH0_RX_DMA_ADDR (DMA0_PhysicalAddress + 0*DMA_CHAN_OFFSET) -+#define ETH0_TX_DMA_ADDR (DMA0_PhysicalAddress + 1*DMA_CHAN_OFFSET) -+ -+/* the following must be powers of two */ -+#ifdef CONFIG_IDT_USE_NAPI -+#define RC32434_NUM_RDS 64 /* number of receive descriptors */ -+#define RC32434_NUM_TDS 64 /* number of transmit descriptors */ -+#else -+#define RC32434_NUM_RDS 128 /* number of receive descriptors */ -+#define RC32434_NUM_TDS 128 /* number of transmit descriptors */ -+#endif -+ -+#define RC32434_RBSIZE 1536 /* size of one resource buffer = Ether MTU */ -+#define RC32434_RDS_MASK (RC32434_NUM_RDS-1) -+#define RC32434_TDS_MASK (RC32434_NUM_TDS-1) -+#define RD_RING_SIZE (RC32434_NUM_RDS * sizeof(struct DMAD_s)) -+#define TD_RING_SIZE (RC32434_NUM_TDS * sizeof(struct DMAD_s)) -+ -+#define RC32434_TX_TIMEOUT HZ * 100 -+ -+#define rc32434_eth0_regs ((ETH_t)(ETH0_VirtualAddress)) -+#define rc32434_eth1_regs ((ETH_t)(ETH1_VirtualAddress)) -+ -+enum status { filled, empty}; -+#define IS_DMA_FINISHED(X) (((X) & (DMAD_f_m)) != 0) -+#define IS_DMA_DONE(X) (((X) & (DMAD_d_m)) != 0) -+ -+ -+/* Information that need to be kept for each board. */ -+struct rc32434_local { -+ ETH_t eth_regs; -+ DMA_Chan_t rx_dma_regs; -+ DMA_Chan_t tx_dma_regs; -+ volatile DMAD_t td_ring; /* transmit descriptor ring */ -+ volatile DMAD_t rd_ring; /* receive descriptor ring */ -+ -+ struct sk_buff* tx_skb[RC32434_NUM_TDS]; /* skbuffs for pkt to trans */ -+ struct sk_buff* rx_skb[RC32434_NUM_RDS]; /* skbuffs for pkt to trans */ -+ -+#ifndef CONFIG_IDT_USE_NAPI -+ struct tasklet_struct * rx_tasklet; -+#endif -+ struct tasklet_struct * tx_tasklet; -+ -+ int rx_next_done; -+ int rx_chain_head; -+ int rx_chain_tail; -+ enum status rx_chain_status; -+ -+ int tx_next_done; -+ int tx_chain_head; -+ int tx_chain_tail; -+ enum status tx_chain_status; -+ int tx_count; -+ int tx_full; -+ -+ struct timer_list mii_phy_timer; -+ unsigned long duplex_mode; -+ -+ int rx_irq; -+ int tx_irq; -+ int ovr_irq; -+ int und_irq; -+ -+ struct net_device_stats stats; -+ spinlock_t lock; -+ -+ /* debug /proc entry */ -+ struct proc_dir_entry *ps; -+ int dma_halt_cnt; int dma_run_cnt; -+}; -+ -+extern unsigned int idt_cpu_freq; -+ -+/* Index to functions, as function prototypes. */ -+static int rc32434_open(struct net_device *dev); -+static int rc32434_send_packet(struct sk_buff *skb, struct net_device *dev); -+static void rc32434_mii_handler(unsigned long data); -+static irqreturn_t rc32434_und_interrupt(int irq, void *dev_id); -+static irqreturn_t rc32434_rx_dma_interrupt(int irq, void *dev_id); -+static irqreturn_t rc32434_tx_dma_interrupt(int irq, void *dev_id); -+#ifdef RC32434_REVISION -+static irqreturn_t rc32434_ovr_interrupt(int irq, void *dev_id); -+#endif -+static int rc32434_close(struct net_device *dev); -+static struct net_device_stats *rc32434_get_stats(struct net_device *dev); -+static void rc32434_multicast_list(struct net_device *dev); -+static int rc32434_init(struct net_device *dev); -+static void rc32434_tx_timeout(struct net_device *dev); -+ -+static void rc32434_tx_tasklet(unsigned long tx_data_dev); -+#ifdef CONFIG_IDT_USE_NAPI -+static int rc32434_poll(struct net_device *rx_data_dev, int *budget); -+#else -+static void rc32434_rx_tasklet(unsigned long rx_data_dev); -+#endif -+static void rc32434_cleanup_module(void); -+static int rc32434_probe(int port_num); -+int rc32434_init_module(void); -+ -+ -+static inline void rc32434_abort_dma(struct net_device *dev, DMA_Chan_t ch) -+{ -+ if (rc32434_readl(&ch->dmac) & DMAC_run_m) { -+ rc32434_writel(0x10, &ch->dmac); -+ -+ while (!(rc32434_readl(&ch->dmas) & DMAS_h_m)) -+ dev->trans_start = jiffies; -+ -+ rc32434_writel(0, &ch->dmas); -+ } -+ -+ rc32434_writel(0, &ch->dmadptr); -+ rc32434_writel(0, &ch->dmandptr); -+} -diff -Nur linux-2.6.17/include/asm-mips/bootinfo.h linux-2.6.17-owrt/include/asm-mips/bootinfo.h ---- linux-2.6.17/include/asm-mips/bootinfo.h 2006-06-18 03:49:35.000000000 +0200 -+++ linux-2.6.17-owrt/include/asm-mips/bootinfo.h 2006-06-18 12:44:28.000000000 +0200 -@@ -218,6 +218,17 @@ - #define MACH_GROUP_TITAN 22 /* PMC-Sierra Titan */ - #define MACH_TITAN_YOSEMITE 1 /* PMC-Sierra Yosemite */ - -+ -+/* -+ * Valid machtype for group ARUBA -+ */ -+#define MACH_GROUP_ARUBA 23 -+#define MACH_ARUBA_UNKNOWN 0 -+#define MACH_ARUBA_AP60 1 -+#define MACH_ARUBA_AP65 2 -+#define MACH_ARUBA_AP70 3 -+#define MACH_ARUBA_AP40 4 -+ - #define CL_SIZE COMMAND_LINE_SIZE - - const char *get_system_type(void); -diff -Nur linux-2.6.17/include/asm-mips/cpu.h linux-2.6.17-owrt/include/asm-mips/cpu.h ---- linux-2.6.17/include/asm-mips/cpu.h 2006-06-18 03:49:35.000000000 +0200 -+++ linux-2.6.17-owrt/include/asm-mips/cpu.h 2006-06-18 12:45:56.000000000 +0200 -@@ -54,6 +54,9 @@ - #define PRID_IMP_R14000 0x0f00 - #define PRID_IMP_R8000 0x1000 - #define PRID_IMP_PR4450 0x1200 -+#define PRID_IMP_RC32334 0x1800 -+#define PRID_IMP_RC32355 0x1900 -+#define PRID_IMP_RC32365 0x1900 - #define PRID_IMP_R4600 0x2000 - #define PRID_IMP_R4700 0x2100 - #define PRID_IMP_TX39 0x2200 -@@ -200,7 +203,8 @@ - #define CPU_SB1A 62 - #define CPU_74K 63 - #define CPU_R14000 64 --#define CPU_LAST 64 -+#define CPU_RC32300 65 -+#define CPU_LAST 65 - - /* - * ISA Level encodings -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32300.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32300.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32300.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32300.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,142 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * RC32300 helper routines -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 P. Sadik. -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#ifndef __IDT_RC32300_H__ -+#define __IDT_RC32300_H__ -+ -+#include -+#include -+ -+ -+/* cpu pipeline flush */ -+static inline void rc32300_sync(void) -+{ -+ __asm__ volatile ("sync"); -+} -+ -+static inline void rc32300_sync_udelay(int us) -+{ -+ __asm__ volatile ("sync"); -+ udelay(us); -+} -+ -+static inline void rc32300_sync_delay(int ms) -+{ -+ __asm__ volatile ("sync"); -+ mdelay(ms); -+} -+ -+/* -+ * Macros to access internal RC32300 registers. No byte -+ * swapping should be done when accessing the internal -+ * registers. -+ */ -+ -+static inline u8 rc32300_readb(unsigned long pa) -+{ -+ return *((volatile u8 *)KSEG1ADDR(pa)); -+} -+static inline u16 rc32300_readw(unsigned long pa) -+{ -+ return *((volatile u16 *)KSEG1ADDR(pa)); -+} -+static inline u32 rc32300_readl(unsigned long pa) -+{ -+ return *((volatile u32 *)KSEG1ADDR(pa)); -+} -+static inline void rc32300_writeb(u8 val, unsigned long pa) -+{ -+ *((volatile u8 *)KSEG1ADDR(pa)) = val; -+} -+static inline void rc32300_writew(u16 val, unsigned long pa) -+{ -+ *((volatile u16 *)KSEG1ADDR(pa)) = val; -+} -+static inline void rc32300_writel(u32 val, unsigned long pa) -+{ -+ *((volatile u32 *)KSEG1ADDR(pa)) = val; -+} -+ -+ -+#define local_readb __raw_readb -+#define local_readw __raw_readw -+#define local_readl __raw_readl -+ -+#define local_writeb __raw_writeb -+#define local_writew __raw_writew -+#define local_writel __raw_writel -+ -+ -+/* -+ * C access to CLZ and CLO instructions -+ * (count leading zeroes/ones). -+ */ -+static inline int rc32300_clz(unsigned long val) -+{ -+ int ret; -+ __asm__ volatile ( -+ ".set\tnoreorder\n\t" -+ ".set\tnoat\n\t" -+ ".set\tmips32\n\t" -+ "clz\t%0,%1\n\t" -+ ".set\tmips0\n\t" -+ ".set\tat\n\t" -+ ".set\treorder" -+ : "=r" (ret) -+ : "r" (val)); -+ -+ return ret; -+} -+static inline int rc32300_clo(unsigned long val) -+{ -+ int ret; -+ __asm__ volatile ( -+ ".set\tnoreorder\n\t" -+ ".set\tnoat\n\t" -+ ".set\tmips32\n\t" -+ "clo\t%0,%1\n\t" -+ ".set\tmips0\n\t" -+ ".set\tat\n\t" -+ ".set\treorder" -+ : "=r" (ret) -+ : "r" (val)); -+ -+ return ret; -+} -+ -+#endif // __IDT_RC32300_H__ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32334.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32334.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32334.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32334.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,207 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * Definitions for IDT RC32334 CPU. -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 P. Sadik. -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+ -+#ifndef __IDT_RC32334_H__ -+#define __IDT_RC32334_H__ -+ -+#include -+#include -+ -+/* Base address of internal registers */ -+#define RC32334_REG_BASE 0x18000000 -+ -+/* CPU and IP Bus Control */ -+#define CPU_PORT_WIDTH 0xffffe200 // virtual! -+#define CPU_BTA 0xffffe204 // virtual! -+#define CPU_BUSERR_ADDR 0xffffe208 // virtual! -+#define CPU_IP_BTA (RC32334_REG_BASE + 0x0000) -+#define CPU_IP_ADDR_LATCH (RC32334_REG_BASE + 0x0004) -+#define CPU_IP_ARBITRATION (RC32334_REG_BASE + 0x0008) -+#define CPU_IP_BUSERR_CNTL (RC32334_REG_BASE + 0x0010) -+#define CPU_IP_BUSERR_ADDR (RC32334_REG_BASE + 0x0014) -+#define CPU_IP_SYSID (RC32334_REG_BASE + 0x0018) -+ -+/* Memory Controller */ -+#define MEM_BASE_BANK0 (RC32334_REG_BASE + 0x0080) -+#define MEM_MASK_BANK0 (RC32334_REG_BASE + 0x0084) -+#define MEM_CNTL_BANK0 (RC32334_REG_BASE + 0x0200) -+#define MEM_BASE_BANK1 (RC32334_REG_BASE + 0x0088) -+#define MEM_MASK_BANK1 (RC32334_REG_BASE + 0x008c) -+#define MEM_CNTL_BANK1 (RC32334_REG_BASE + 0x0204) -+#define MEM_CNTL_BANK2 (RC32334_REG_BASE + 0x0208) -+#define MEM_CNTL_BANK3 (RC32334_REG_BASE + 0x020c) -+#define MEM_CNTL_BANK4 (RC32334_REG_BASE + 0x0210) -+#define MEM_CNTL_BANK5 (RC32334_REG_BASE + 0x0214) -+ -+/* PCI Controller */ -+#define PCI_INTR_PEND (RC32334_REG_BASE + 0x05b0) -+#define PCI_INTR_MASK (RC32334_REG_BASE + 0x05b4) -+#define PCI_INTR_CLEAR (RC32334_REG_BASE + 0x05b8) -+#define CPU2PCI_INTR_PEND (RC32334_REG_BASE + 0x05c0) -+#define CPU2PCI_INTR_MASK (RC32334_REG_BASE + 0x05c4) -+#define CPU2PCI_INTR_CLEAR (RC32334_REG_BASE + 0x05c8) -+#define PCI2CPU_INTR_PEND (RC32334_REG_BASE + 0x05d0) -+#define PCI2CPU_INTR_MASK (RC32334_REG_BASE + 0x05d4) -+#define PCI2CPU_INTR_CLEAR (RC32334_REG_BASE + 0x05d8) -+#define PCI_MEM1_BASE (RC32334_REG_BASE + 0x20b0) -+#define PCI_MEM2_BASE (RC32334_REG_BASE + 0x20b8) -+#define PCI_MEM3_BASE (RC32334_REG_BASE + 0x20c0) -+#define PCI_IO1_BASE (RC32334_REG_BASE + 0x20c8) -+#define PCI_ARBITRATION (RC32334_REG_BASE + 0x20e0) -+#define PCI_CPU_MEM1_BASE (RC32334_REG_BASE + 0x20e8) -+#define PCI_CPU_IO_BASE (RC32334_REG_BASE + 0x2100) -+#define PCI_CFG_CNTL (RC32334_REG_BASE + 0x2cf8) -+#define PCI_CFG_DATA (RC32334_REG_BASE + 0x2cfc) -+ -+/* Timers */ -+#define TIMER0_CNTL (RC32334_REG_BASE + 0x0700) -+#define TIMER0_COUNT (RC32334_REG_BASE + 0x0704) -+#define TIMER0_COMPARE (RC32334_REG_BASE + 0x0708) -+#define TIMER_REG_OFFSET 0x10 -+ -+/* Programmable I/O */ -+#define PIO_DATA0 (RC32334_REG_BASE + 0x0600) -+#define PIO_DATA1 (RC32334_REG_BASE + 0x0610) -+ -+/* -+ * DMA -+ * -+ * NOTE: DMA_IO is a trick for non linear RC32300_IO_DMA stuff -+ * -+ * DMA0: 18001400 -+ * DMA1: 18001440 -+ * DMA2: 18001900 -+ * DMA3: 18001940 -+ * NB: dma number must be immediate value or variable. -+ * It MUST NOT be a function since it would get called twice! -+ */ -+#define DMA_IO(n) (((n)>1?0x500:0)+((n)&1?0x40:0)) -+ -+#define RC32300_IO_DMA(n) (RC32334_REG_BASE + 0x1400 + DMA_IO(n)) -+#define RC32300_DMA_CONFREG(n) RC32300_IO_DMA(n) -+#define RC32300_DMA_BASEREG(n) (RC32300_IO_DMA(n)+0x4) -+ -+#define RC32300_DMA_CURRREG(n) (RC32300_IO_DMA(n)+0x8) -+#define RC32300_DMA_STATREG(n) (RC32300_IO_DMA(n)+0x10) -+#define RC32300_DMA_SRCREG(n) (RC32300_IO_DMA(n)+0x14) -+#define RC32300_DMA_DSTREG(n) (RC32300_IO_DMA(n)+0x18) -+#define RC32300_DMA_NEXTREG(n) (RC32300_IO_DMA(n)+0x1c) -+ -+#define RC32300_DMA_IRQ(n) (GROUP7_IRQ_BASE+5*(n)) -+ -+/* Expansion Interrupt Controller */ -+#define IC_GROUP0_PEND (RC32334_REG_BASE + 0x0500) -+#define IC_GROUP0_MASK (RC32334_REG_BASE + 0x0504) -+#define IC_GROUP0_CLEAR (RC32334_REG_BASE + 0x0508) -+#define IC_GROUP_OFFSET 0x10 -+ -+#define NUM_INTR_GROUPS 15 -+/* -+ * The IRQ mapping is as follows: -+ * -+ * IRQ Mapped To -+ * --- ------------------- -+ * 0 SW0 (IP0) SW0 intr -+ * 1 SW1 (IP1) SW1 intr -+ * 2 Int0 (IP2) board-specific -+ * 3 Int1 (IP3) board-specific -+ * 4 Int2 (IP4) board-specific -+ * - Int3 (IP5) not used, mapped to IRQ's 8 and up -+ * 6 Int4 (IP6) board-specific -+ * 7 Int5 (IP7) CP0 Timer -+ * -+ * IRQ's 8 and up are all mapped to Int3 (IP5), which -+ * internally on the RC32334 is routed to the Expansion -+ * Interrupt Controller. -+ */ -+#define MIPS_CPU_TIMER_IRQ 7 -+ -+#define GROUP1_IRQ_BASE 8 // bus error -+#define GROUP2_IRQ_BASE (GROUP1_IRQ_BASE + 1) // PIO active low -+#define GROUP3_IRQ_BASE (GROUP2_IRQ_BASE + 12) // PIO active high -+#define GROUP4_IRQ_BASE (GROUP3_IRQ_BASE + 8) // Timer Rollovers -+#define GROUP5_IRQ_BASE (GROUP4_IRQ_BASE + 8) // UART0 -+#define GROUP6_IRQ_BASE (GROUP5_IRQ_BASE + 3) // UART1 -+#define GROUP7_IRQ_BASE (GROUP6_IRQ_BASE + 3) // DMA Ch0 -+#define GROUP8_IRQ_BASE (GROUP7_IRQ_BASE + 5) // DMA Ch1 -+#define GROUP9_IRQ_BASE (GROUP8_IRQ_BASE + 5) // DMA Ch2 -+#define GROUP10_IRQ_BASE (GROUP9_IRQ_BASE + 5) // DMA Ch3 -+#define GROUP11_IRQ_BASE (GROUP10_IRQ_BASE + 5) // PCI Ctlr errors -+#define GROUP12_IRQ_BASE (GROUP11_IRQ_BASE + 4) // PCI Satellite Mode -+#define GROUP13_IRQ_BASE (GROUP12_IRQ_BASE + 16) // PCI to CPU Mailbox -+#define GROUP14_IRQ_BASE (GROUP13_IRQ_BASE + 4) // SPI -+ -+#define RC32334_NR_IRQS (GROUP14_IRQ_BASE + 1) -+ -+/* 16550 UARTs */ -+#ifdef __MIPSEB__ -+#define RC32300_UART0_BASE (RC32334_REG_BASE + 0x0803) -+#define RC32300_UART1_BASE (RC32334_REG_BASE + 0x0823) -+#else -+#define RC32300_UART0_BASE (RC32334_REG_BASE + 0x0800) -+#define RC32300_UART1_BASE (RC32334_REG_BASE + 0x0820) -+#endif -+ -+#define RC32300_UART0_IRQ GROUP5_IRQ_BASE -+#define RC32300_UART1_IRQ GROUP6_IRQ_BASE -+ -+#define IDT_CLOCK_MULT 2 -+ -+/* NVRAM */ -+#define NVRAM_BASE 0x12000000 -+#define NVRAM_ENVSIZE_OFF 4 -+#define NVRAM_ENVSTART_OFF 0x40 -+ -+/* LCD 4-digit display */ -+#define LCD_CLEAR 0x14000400 -+#define LCD_DIGIT0 0x1400000f -+#define LCD_DIGIT1 0x14000008 -+#define LCD_DIGIT2 0x14000007 -+#define LCD_DIGIT3 0x14000003 -+ -+/* Interrupts routed on 79S334A board (see rc32334.h) */ -+#define RC32334_SCC8530_IRQ 2 -+#define RC32334_PCI_INTA_IRQ 3 -+#define RC32334_PCI_INTB_IRQ 4 -+#define RC32334_PCI_INTC_IRQ 6 -+#define RC32334_PCI_INTD_IRQ 7 -+ -+#define RAM_SIZE (32*1024*1024) -+ -+#endif // __IDT_RC32334_H__ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32355_dma.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32355_dma.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32355_dma.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32355_dma.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,206 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * DMA controller defines on IDT RC32355 -+ * -+ * Copyright 2004 IDT Inc. -+ * Author: Integrated Device Technology Inc. rischelp@idt.com -+ * -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ * May 2004 rkt -+ * Initial Release -+ * -+ ************************************************************************** -+ */ -+ -+#ifndef BANYAN_DMA_H -+#define BANYAN_DMA_H -+#include -+ -+/* -+ * An image of one RC32355 dma channel registers -+ */ -+typedef struct { -+ u32 dmac; -+ u32 dmas; -+ u32 dmasm; -+ u32 dmadptr; -+ u32 dmandptr; -+} rc32355_dma_ch_t; -+ -+/* -+ * An image of all RC32355 dma channel registers -+ */ -+typedef struct { -+ rc32355_dma_ch_t ch[16]; -+} rc32355_dma_regs_t; -+ -+ -+#define rc32355_dma_regs ((rc32355_dma_regs_t*)KSEG1ADDR(RC32355_DMA_BASE)) -+ -+ -+/* DMAC register layout */ -+ -+#define DMAC_RUN 0x1 /* Halts processing when cleared */ -+#define DMAC_DM 0x2 /* Done Mask, ignore DMA events */ -+#define DMAC_MODE_MASK 0xC /* DMA operating mode */ -+ -+#define DMAC_MODE_AUTO 0x0 /* DMA Auto Request Mode */ -+#define DMAC_MODE_BURST 0x4 /* DMA Burst Request Mode */ -+#define DMAC_MODE_TFER 0x8 /* DMA Transfer Request Mode */ -+ -+/* DMAS and DMASM register layout */ -+ -+#define DMAS_F 0x01 /* Finished */ -+#define DMAS_D 0x02 /* Done */ -+#define DMAS_C 0x04 /* Chain */ -+#define DMAS_E 0x08 /* Error */ -+#define DMAS_H 0x10 /* Halt */ -+ -+/* Polling count for DMAS_H bit in DMAS register after halting DMA */ -+#define DMA_HALT_TIMEOUT 500 -+ -+ -+static inline int rc32355_halt_dma(rc32355_dma_ch_t* ch) -+{ -+ int timeout=1; -+ -+ if (local_readl(&ch->dmac) & DMAC_RUN) { -+ local_writel(0, &ch->dmac); -+ for (timeout = DMA_HALT_TIMEOUT; timeout > 0; timeout--) { -+ if (local_readl(&ch->dmas) & DMAS_H) { -+ local_writel(0, &ch->dmas); -+ break; -+ } -+ } -+ } -+ -+ return timeout ? 0 : 1; -+} -+ -+static inline void rc32355_start_dma(rc32355_dma_ch_t* ch, u32 dma_addr) -+{ -+ local_writel(0, &ch->dmandptr); -+ local_writel(dma_addr, &ch->dmadptr); -+} -+ -+static inline void rc32355_chain_dma(rc32355_dma_ch_t* ch, u32 dma_addr) -+{ -+ local_writel(dma_addr, &ch->dmandptr); -+} -+ -+ -+/* The following can be used to describe DMA channels 0 to 15, and the */ -+/* sub device's needed to select them in the DMADESC_DS_MASK field */ -+ -+#define DMA_CHAN_ATM01 0 /* ATM interface 0,1 chan */ -+ -+#define DMA_CHAN_ATM0IN 0 /* ATM interface 0 input */ -+#define DMA_DEV_ATM0IN 0 /* ATM interface 0 input */ -+ -+#define DMA_CHAN_ATM1IN 0 /* ATM interface 1 input */ -+#define DMA_DEV_ATM1IN 1 /* ATM interface 1 input */ -+ -+#define DMA_CHAN_ATM0OUT 0 /* ATM interface 0 output */ -+#define DMA_DEV_ATM0OUT 2 /* ATM interface 0 output */ -+ -+#define DMA_CHAN_ATM1OUT 0 /* ATM interface 1 output */ -+#define DMA_DEV_ATM1OUT 3 /* ATM interface 1 output */ -+ -+/* for entry in {0,1,2,3,4,5,6,7} - note 5,6,7 share with those below */ -+#define DMA_CHAN_ATMVCC(entry) ((entry)+1) /* ATM VC cache entry */ -+#define DMA_DEV_ATMVCC(entry) 0 -+ -+#define DMA_CHAN_MEMTOMEM 6 /* Memory to memory DMA */ -+#define DMA_DEV_MEMTOMEM 1 /* Memory to memory DMA */ -+ -+#define DMA_CHAN_ATMFMB0 7 /* ATM Frame Mode Buffer 0 */ -+#define DMA_DEV_ATMFMB0 1 /* ATM Frame Mode Buffer 0 */ -+ -+#define DMA_CHAN_ATMFMB1 8 /* ATM Frame Mode Buffer 1 */ -+#define DMA_DEV_ATMFMB1 1 /* ATM Frame Mode Buffer 1 */ -+ -+#define DMA_CHAN_ETHERIN 9 /* Ethernet input */ -+#define DMA_DEV_ETHERIN 0 /* Ethernet input */ -+ -+#define DMA_CHAN_ETHEROUT 10 /* Ethernet output */ -+#define DMA_DEV_ETHEROUT 0 /* Ethernet output */ -+ -+#define DMA_CHAN_TDMIN 11 /* TDM Bus input */ -+#define DMA_DEV_TDMIN 0 /* TDM Bus input */ -+ -+#define DMA_CHAN_TDMOUT 12 /* TDM Bus output */ -+#define DMA_DEV_TDMOUT 0 /* TDM Bus output */ -+ -+#define DMA_CHAN_USBIN 13 /* USB input */ -+#define DMA_DEV_USBIN 0 /* USB input */ -+ -+#define DMA_CHAN_USBOUT 14 /* USB output */ -+#define DMA_DEV_USBOUT 0 /* USB output */ -+ -+#define DMA_CHAN_EXTERN 15 /* External DMA */ -+#define DMA_DEV_EXTERN 0 /* External DMA */ -+ -+/* -+ * An RC32355 dma descriptor in system memory -+ */ -+typedef struct { -+ u32 cmdstat; /* control and status */ -+ u32 curr_addr; /* current address of data */ -+ u32 devcs; /* peripheral-specific control and status */ -+ u32 link; /* link to next descriptor */ -+} rc32355_dma_desc_t; -+ -+/* Values for the descriptor cmdstat word */ -+ -+#define DMADESC_F 0x80000000u /* Finished bit */ -+#define DMADESC_D 0x40000000u /* Done bit */ -+#define DMADESC_T 0x20000000u /* Terminated bit */ -+#define DMADESC_IOD 0x10000000u /* Interrupt On Done */ -+#define DMADESC_IOF 0x08000000u /* Interrupt On Finished */ -+#define DMADESC_COD 0x04000000u /* Chain On Done */ -+#define DMADESC_COF 0x02000000u /* Chain On Finished */ -+ -+#define DMADESC_DEVCMD_MASK 0x01C00000u /* Device Command mask */ -+#define DMADESC_DEVCMD_SHIFT 22 /* Device Command shift */ -+ -+#define DMADESC_DS_MASK 0x00300000u /* Device Select mask */ -+#define DMADESC_DS_SHIFT 20 /* Device Select shift */ -+ -+#define DMADESC_COUNT_MASK 0x0003FFFFu /* Byte Count mask */ -+#define DMADESC_COUNT_SHIFT 0 /* Byte Count shift */ -+ -+#define IS_DMA_FINISHED(X) ( ( (X) & DMADESC_F ) >> 31) /* F Bit */ -+#define IS_DMA_DONE(X) ( ( (X) & DMADESC_D ) >> 30) /* D Bit */ -+#define IS_DMA_TERMINATED(X) ( ( (X) & DMADESC_T ) >> 29) /* T Bit */ -+#define IS_DMA_USED(X) (((X) & (DMADESC_F | DMADESC_D | DMADESC_T)) != 0) -+ -+#define DMA_DEVCMD(devcmd) \ -+ (((devcmd) << DMADESC_DEVCMD_SHIFT) & DMADESC_DS_MASK) -+#define DMA_DS(ds) \ -+ (((ds) << DMADESC_DS_SHIFT) & DMADESC_DS_MASK) -+#define DMA_COUNT(count) \ -+ ((count) & DMADESC_COUNT_MASK) -+ -+#endif /* RC32355_DMA_H */ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32355_eth.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32355_eth.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32355_eth.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32355_eth.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,442 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * Ethernet registers on IDT RC32355 -+ * -+ * Copyright 2004 IDT Inc. -+ * Author: Integrated Device Technology Inc. rischelp@idt.com -+ * -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ * May 2004 rkt -+ * Initial Release -+ * -+ ************************************************************************** -+ */ -+ -+ -+#ifndef RC32355_ETHER_H -+#define RC32355_ETHER_H -+ -+#include -+ -+/* -+ * A partial image of the RC32355 ethernet registers -+ */ -+typedef struct { -+ u32 ethintfc; -+ u32 ethfifott; -+ u32 etharc; -+ u32 ethhash0; -+ u32 ethhash1; -+ u32 ethfifost; -+ u32 ethfifos; -+ u32 ethodeops; -+ u32 ethis; -+ u32 ethos; -+ u32 ethmcp; -+ u32 _u1; -+ u32 ethid; -+ u32 _u2; -+ u32 _u3; -+ u32 _u4; -+ u32 ethod; -+ u32 _u5; -+ u32 _u6; -+ u32 _u7; -+ u32 ethodeop; -+ u32 _u8[43]; -+ u32 ethsal0; -+ u32 ethsah0; -+ u32 ethsal1; -+ u32 ethsah1; -+ u32 ethsal2; -+ u32 ethsah2; -+ u32 ethsal3; -+ u32 ethsah3; -+ u32 ethrbc; -+ u32 ethrpc; -+ u32 ethrupc; -+ u32 ethrfc; -+ u32 ethtbc; -+ u32 ethgpf; -+ u32 _u9[50]; -+ u32 ethmac1; -+ u32 ethmac2; -+ u32 ethipgt; -+ u32 ethipgr; -+ u32 ethclrt; -+ u32 ethmaxf; -+ u32 _u10; -+ u32 ethmtest; -+ u32 miimcfg; -+ u32 miimcmd; -+ u32 miimaddr; -+ u32 miimwtd; -+ u32 miimrdd; -+ u32 miimind; -+ u32 _u11; -+ u32 _u12; -+ u32 ethcfsa0; -+ u32 ethcfsa1; -+ u32 ethcfsa2; -+} rc32355_eth_regs_t; -+ -+#define rc32355_eth_regs ((rc32355_eth_regs_t*)KSEG1ADDR(RC32355_ETH_BASE)) -+ -+#define ETH_INTFC (RC32355_ETH_BASE + 0x000) /* INTerFace Control */ -+#define ETH_FIFOTT (RC32355_ETH_BASE + 0x004) /* FIFO Transmit Threshold */ -+#define ETH_ARC (RC32355_ETH_BASE + 0x008) /* Address Recognition Ctrl */ -+#define ETH_HASH0 (RC32355_ETH_BASE + 0x00C) /* 32 multicast Hash bits */ -+#define ETH_HASH1 (RC32355_ETH_BASE + 0x010) /* another 32 Hash bits */ -+#define ETH_FIFOST (RC32355_ETH_BASE + 0x014) /* FIFO Status Threshold */ -+#define ETH_FIFOS (RC32355_ETH_BASE + 0x018) /* FIFO Status Register */ -+#define ETH_ODEOPS (RC32355_ETH_BASE + 0x01C) /* Out Data End-Of-Pkt Size */ -+#define ETH_IS (RC32355_ETH_BASE + 0x020) /* Input Status */ -+#define ETH_OS (RC32355_ETH_BASE + 0x024) /* Output Status */ -+#define ETH_MCP (RC32355_ETH_BASE + 0x028) /* Managemt Clock Prescaler */ -+#define ETH_ID (RC32355_ETH_BASE + 0x030) /* Input Data register */ -+#define ETH_OD (RC32355_ETH_BASE + 0x040) /* Output Data register */ -+#define ETH_ODEOP (RC32355_ETH_BASE + 0x050) /* OD End-Of-Packet Size */ -+ -+/* for n in { 0, 1, 2, 3 } */ -+#define ETH_SAL(n) (RC32355_ETH_BASE + 0x100 + (n * 8)) /* Stn Address 2-5 */ -+#define ETH_SAH(n) (RC32355_ETH_BASE + 0x104 + (n * 8)) /* Stn Address 0-1 */ -+ -+#define ETH_RBC (RC32355_ETH_BASE + 0x120) /* Receive Byte Count */ -+#define ETH_RPC (RC32355_ETH_BASE + 0x124) /* Receive Packet Count */ -+#define ETH_RUPC (RC32355_ETH_BASE + 0x128) /* Rx Undersized Pkt count */ -+#define ETH_RFC (RC32355_ETH_BASE + 0x12C) /* Receive Fragment Count */ -+#define ETH_TBC (RC32355_ETH_BASE + 0x130) /* Transmit Byte Count */ -+#define ETH_GPF (RC32355_ETH_BASE + 0x134) /* Generate Pause Frame */ -+#define ETH_MAC1 (RC32355_ETH_BASE + 0x200) /* Medium Access Control 1 */ -+#define ETH_MAC2 (RC32355_ETH_BASE + 0x204) /* Medium Access Control 2 */ -+#define ETH_IPGT (RC32355_ETH_BASE + 0x208) /* Back-to-back InterPkt Gap */ -+#define ETH_IPGR (RC32355_ETH_BASE + 0x20C) /* Non " InterPkt Gap */ -+#define ETH_CLRT (RC32355_ETH_BASE + 0x210) /* Collis'n Window and Retry */ -+#define ETH_MAXF (RC32355_ETH_BASE + 0x214) /* Maximum Frame Length */ -+#define ETH_MTEST (RC32355_ETH_BASE + 0x21C) /* MAC Test */ -+ -+#define ETHMIIM_CFG (RC32355_ETH_BASE + 0x220) /* MII Mgmt Configuration */ -+#define ETHMIIM_CMD (RC32355_ETH_BASE + 0x224) /* MII Mgmt Command */ -+#define ETHMIIM_ADDR (RC32355_ETH_BASE + 0x228) /* MII Mgmt Address */ -+#define ETHMIIM_WTD (RC32355_ETH_BASE + 0x22C) /* MII Mgmt Write Data */ -+#define ETHMIIM_RDD (RC32355_ETH_BASE + 0x230) /* MII Mgmt Read Data */ -+#define ETHMIIM_IND (RC32355_ETH_BASE + 0x234) /* MII Mgmt Indicators */ -+ -+/* for n in { 0, 1, 2 } */ -+#define ETH_CFSA(n) (RC32355_ETH_BASE + 0x240 + ((n) * 4)) /* Station Addr */ -+ -+ -+/* -+ * Register Interpretations follow -+ */ -+ -+/****************************************************************************** -+ * ETHINTFC register -+ *****************************************************************************/ -+ -+#define ETHERINTFC_EN (1<<0) -+#define ETHERINTFC_ITS (1<<1) -+#define ETHERINTFC_RES (1<<2) -+#define ETHERINTFC_RIP (1<<2) -+#define ETHERINTFC_JAM (1<<3) -+ -+/****************************************************************************** -+ * ETHFIFOTT register -+ *****************************************************************************/ -+ -+#define ETHERFIFOTT_TTH(v) (((v)&0x3f)<<0) -+ -+/****************************************************************************** -+ * ETHARC register -+ *****************************************************************************/ -+ -+#define ETHERARC_PRO (1<<0) -+#define ETHERARC_AM (1<<1) -+#define ETHERARC_AFM (1<<2) -+#define ETHERARC_AB (1<<3) -+ -+/****************************************************************************** -+ * ETHHASH registers -+ *****************************************************************************/ -+ -+#define ETHERHASH0(v) (((v)&0xffff)<<0) -+#define ETHERHASH1(v) (((v)&0xffff)<<0) -+ -+/****************************************************************************** -+ * ETHSA registers -+ *****************************************************************************/ -+ -+#define ETHERSAL0(v) (((v)&0xffff)<<0) -+#define ETHERSAL1(v) (((v)&0xffff)<<0) -+#define ETHERSAL2(v) (((v)&0xffff)<<0) -+#define ETHERSAL3(v) (((v)&0xffff)<<0) -+#define ETHERSAH0(v) (((v)&0xff)<<0) -+#define ETHERSAH1(v) (((v)&0xff)<<0) -+#define ETHERSAH2(v) (((v)&0xff)<<0) -+#define ETHERSAH3(v) (((v)&0xff)<<0) -+ -+/****************************************************************************** -+ * ETHFIFOST register -+ *****************************************************************************/ -+ -+#define ETHERFIFOST_IRTH(v) (((v)&0x3f)<<0) -+#define ETHERFIFOST_ORTH(v) (((v)&0x3f)<<16) -+ -+/****************************************************************************** -+ * ETHFIFOS register -+ *****************************************************************************/ -+ -+#define ETHERFIFOS_IR (1<<0) -+#define ETHERFIFOS_OR (1<<1) -+#define ETHERFIFOS_OVR (1<<2) -+#define ETHERFIFOS_UND (1<<3) -+ -+/****************************************************************************** -+ * DATA registers -+ *****************************************************************************/ -+ -+#define ETHERID(v) (((v)&0xffff)<<0) -+#define ETHEROD(v) (((v)&0xffff)<<0) -+ -+/****************************************************************************** -+ * ETHODEOPS register -+ *****************************************************************************/ -+ -+#define ETHERODEOPS_SIZE(v) (((v)&0x3)<<0) -+ -+/****************************************************************************** -+ * ETHODEOP register -+ *****************************************************************************/ -+ -+#define ETHERODEOP(v) (((v)&0xffff)<<0) -+ -+/****************************************************************************** -+ * ETHIS register -+ *****************************************************************************/ -+ -+#define ETHERIS_EOP (1<<0) -+#define ETHERIS_ROK (1<<2) -+#define ETHERIS_FM (1<<3) -+#define ETHERIS_MP (1<<4) -+#define ETHERIS_BP (1<<5) -+#define ETHERIS_VLT (1<<6) -+#define ETHERIS_CF (1<<7) -+#define ETHERIS_OVR (1<<8) -+#define ETHERIS_CRC (1<<9) -+#define ETHERIS_CV (1<<10) -+#define ETHERIS_DB (1<<11) -+#define ETHERIS_LE (1<<12) -+#define ETHERIS_LOR (1<<13) -+#define ETHERIS_SIZE(v) (((v)&0x3)<<14) -+#define ETHERIS_LENGTH(v) (((v)&0xff)<<16) -+ -+/****************************************************************************** -+ * ETHOS register -+ *****************************************************************************/ -+ -+#define ETHEROS_T (1<<0) -+#define ETHEROS_TOK (1<<6) -+#define ETHEROS_MP (1<<7) -+#define ETHEROS_BP (1<<8) -+#define ETHEROS_UND (1<<9) -+#define ETHEROS_OF (1<<10) -+#define ETHEROS_ED (1<<11) -+#define ETHEROS_EC (1<<12) -+#define ETHEROS_LC (1<<13) -+#define ETHEROS_TD (1<<14) -+#define ETHEROS_CRC (1<<15) -+#define ETHEROS_LE (1<<16) -+#define ETHEROS_CC(v) (((v)&0xf)<<17) -+#define ETHEROS_PFD (1<<21) -+ -+/****************************************************************************** -+ * Statistics registers -+ *****************************************************************************/ -+ -+#define ETHERRBC(v) (((v)&0xffff)<<0) -+#define ETHERRPC(v) (((v)&0xffff)<<0) -+#define ETHERRUPC(v) (((v)&0xffff)<<0) -+#define ETHERRFC(v) (((v)&0xffff)<<0) -+#define ETHERTBC(v) (((v)&0xffff)<<0) -+ -+/****************************************************************************** -+ * ETHGPF register -+ *****************************************************************************/ -+ -+#define ETHERGPF_PTV(v) (((v)&0xff)<<0) -+ -+/****************************************************************************** -+ * MAC registers -+ *****************************************************************************/ -+//ETHMAC1 -+#define ETHERMAC1_RE (1<<0) -+#define ETHERMAC1_PAF (1<<1) -+#define ETHERMAC1_RFC (1<<2) -+#define ETHERMAC1_TFC (1<<3) -+#define ETHERMAC1_LB (1<<4) -+#define ETHERMAC1_MR (1<<15) -+ -+//ETHMAC2 -+#define ETHERMAC2_FD (1<<0) -+#define ETHERMAC2_FLC (1<<1) -+#define ETHERMAC2_HFE (1<<2) -+#define ETHERMAC2_DC (1<<3) -+#define ETHERMAC2_CEN (1<<4) -+#define ETHERMAC2_PE (1<<5) -+#define ETHERMAC2_VPE (1<<6) -+#define ETHERMAC2_APE (1<<7) -+#define ETHERMAC2_PPE (1<<8) -+#define ETHERMAC2_LPE (1<<9) -+#define ETHERMAC2_NB (1<<12) -+#define ETHERMAC2_BP (1<<13) -+#define ETHERMAC2_ED (1<<14) -+ -+//ETHIPGT -+#define ETHERIPGT(v) (((v)&0x3f)<<0) -+ -+//ETHIPGR -+#define ETHERIPGR_IPGR1(v) (((v)&0x3f)<<0) -+#define ETHERIPGR_IPGR2(v) (((v)&0x3f)<<8) -+ -+//ETHCLRT -+#define ETHERCLRT_MAXRET(v) (((v)&0x3f)<<0) -+#define ETHERCLRT_COLWIN(v) (((v)&0x3f)<<8) -+ -+//ETHMAXF -+#define ETHERMAXF(v) (((v)&0x3f)<<0) -+ -+//ETHMTEST -+#define ETHERMTEST_TB (1<<2) -+ -+//ETHMCP -+#define ETHERMCP_DIV(v) (((v)&0xff)<<0) -+ -+//MIIMCFG -+#define ETHERMIIMCFG_CS(v) (((v)&0x3)<<2) -+#define ETHERMIIMCFG_R (1<<15) -+ -+//MIIMCMD -+#define ETHERMIIMCMD_RD (1<<0) -+#define ETHERMIIMCMD_SCN (1<<1) -+ -+//MIIMADDR -+#define ETHERMIIMADDR_REGADDR(v) (((v)&0x1f)<<0) -+#define ETHERMIIMADDR_PHYADDR(v) (((v)&0x1f)<<8) -+ -+//MIIMWTD -+#define ETHERMIIMWTD(v) (((v)&0xff)<<0) -+ -+//MIIMRDD -+#define ETHERMIIMRDD(v) (((v)&0xff)<<0) -+ -+//MIIMIND -+#define ETHERMIIMIND_BSY (1<<0) -+#define ETHERMIIMIND_SCN (1<<1) -+#define ETHERMIIMIND_NV (1<<2) -+ -+//DMA DEVCS IN -+#define ETHERDMA_IN_LENGTH(v) (((v)&0xffff)<<16) -+#define ETHERDMA_IN_CES (1<<14) -+#define ETHERDMA_IN_LOR (1<<13) -+#define ETHERDMA_IN_LE (1<<12) -+#define ETHERDMA_IN_DB (1<<11) -+#define ETHERDMA_IN_CV (1<<10) -+#define ETHERDMA_IN_CRC (1<<9) -+#define ETHERDMA_IN_OVR (1<<8) -+#define ETHERDMA_IN_CF (1<<7) -+#define ETHERDMA_IN_VLT (1<<6) -+#define ETHERDMA_IN_BP (1<<5) -+#define ETHERDMA_IN_MP (1<<4) -+#define ETHERDMA_IN_FM (1<<3) -+#define ETHERDMA_IN_ROK (1<<2) -+#define ETHERDMA_IN_LD (1<<1) -+#define ETHERDMA_IN_FD (1<<0) -+ -+//DMA DEVCS OUT -+#define ETHERDMA_OUT_CC(v) (((v)&0xf)<<17) -+#define ETHERDMA_OUT_CNT 0x001e0000 -+#define ETHERDMA_OUT_SHFT 17 -+#define ETHERDMA_OUT_LE (1<<16) -+ -+#define ETHERDMA_OUT_CRC (1<<15) -+#define ETHERDMA_OUT_TD (1<<14) -+#define ETHERDMA_OUT_LC (1<<13) -+#define ETHERDMA_OUT_EC (1<<12) -+#define ETHERDMA_OUT_ED (1<<11) -+#define ETHERDMA_OUT_OF (1<<10) -+#define ETHERDMA_OUT_UND (1<<9) -+#define ETHERDMA_OUT_BP (1<<8) -+#define ETHERDMA_OUT_MP (1<<7) -+#define ETHERDMA_OUT_TOK (1<<6) -+#define ETHERDMA_OUT_HEN (1<<5) -+#define ETHERDMA_OUT_CEN (1<<4) -+#define ETHERDMA_OUT_PEN (1<<3) -+#define ETHERDMA_OUT_OEN (1<<2) -+#define ETHERDMA_OUT_LD (1<<1) -+#define ETHERDMA_OUT_FD (1<<0) -+ -+#define RCV_ERRS \ -+ (ETHERDMA_IN_OVR | ETHERDMA_IN_CRC | ETHERDMA_IN_CV | ETHERDMA_IN_LE) -+#define TX_ERRS \ -+ (ETHERDMA_OUT_LC | ETHERDMA_OUT_EC | ETHERDMA_OUT_ED | \ -+ ETHERDMA_OUT_OF | ETHERDMA_OUT_UND) -+ -+#define IS_RCV_ROK(X) (((X) & (1<<2)) >> 2) /* Receive Okay */ -+#define IS_RCV_FM(X) (((X) & (1<<3)) >> 3) /* Is Filter Match */ -+#define IS_RCV_MP(X) (((X) & (1<<4)) >> 4) /* Is it MP */ -+#define IS_RCV_BP(X) (((X) & (1<<5)) >> 5) /* Is it BP */ -+#define IS_RCV_VLT(X) (((X) & (1<<6)) >> 6) /* VLAN Tag Detect */ -+#define IS_RCV_CF(X) (((X) & (1<<7)) >> 7) /* Control Frame */ -+#define IS_RCV_OVR_ERR(X) (((X) & (1<<8)) >> 8) /* Receive Overflow */ -+#define IS_RCV_CRC_ERR(X) (((X) & (1<<9)) >> 9) /* CRC Error */ -+#define IS_RCV_CV_ERR(X) (((X) & (1<<10))>>10) /* Code Violation */ -+#define IS_RCV_DB_ERR(X) (((X) & (1<<11))>>11) /* Dribble Bits */ -+#define IS_RCV_LE_ERR(X) (((X) & (1<<12))>>12) /* Length error */ -+#define IS_RCV_LOR_ERR(X) (((X) & (1<<13))>>13) /* Length Out of -+ Range */ -+#define IS_RCV_CES_ERR(X) (((X) & (1<<14))>>14) /* Preamble error */ -+#define RCVPKT_LENGTH(X) (((X) & 0xFFFF0000)>>16) /* Length of the -+ received packet */ -+ -+#define IS_TX_TOK(X) (((X) & (1<<6) ) >> 6 ) /* Transmit Okay */ -+#define IS_TX_MP(X) (((X) & (1<<7) ) >> 7 ) /* Multicast */ -+ -+#define IS_TX_BP(X) (((X) & (1<<8) ) >> 8 ) /* Broadcast */ -+#define IS_TX_UND_ERR(X) (((X) & (1<<9) ) >> 9 ) /* Transmit FIFO -+ Underflow */ -+#define IS_TX_OF_ERR(X) (((X) & (1<<10)) >>10 ) /* Oversized frame */ -+#define IS_TX_ED_ERR(X) (((X) & (1<<11)) >>11 ) /* Excessive -+ deferral */ -+#define IS_TX_EC_ERR(X) (((X) & (1<<12)) >>12 ) /* Excessive -+ collisions */ -+#define IS_TX_LC_ERR(X) (((X) & (1<<13)) >>13 ) /* Late Collision */ -+#define IS_TX_TD_ERR(X) (((X) & (1<<14)) >>14 ) /* Transmit deferred*/ -+#define IS_TX_CRC_ERR(X) (((X) & (1<<15)) >>15 ) /* CRC Error */ -+#define IS_TX_LE_ERR(X) (((X) & (1<<16)) >>16 ) /* Length Error */ -+ -+#define TX_COLLISION_COUNT(X) (((X) & 0x001E0000u)>>17) /* Collision Count */ -+ -+#endif /* RC32355_ETHER_H */ -+ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32355.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32355.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32355.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32355.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,177 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * Definitions for IDT RC32355 CPU. -+ * -+ * Copyright 2004 IDT Inc. -+ * Author: Integrated Device Technology Inc. rischelp@idt.com -+ * -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ * May 2004 rkt -+ * Initial Release -+ * -+ ************************************************************************** -+ */ -+ -+ -+#ifndef _RC32355_H_ -+#define _RC32355_H_ -+ -+#include -+#include -+ -+/* Base address of internal registers */ -+#define RC32355_REG_BASE 0x18000000 -+ -+/* System ID Registers */ -+#define CPU_SYSID (RC32355_REG_BASE + 0x00018) -+#define CPU_BTADDR (RC32355_REG_BASE + 0x0001c) -+#define CPU_REV (RC32355_REG_BASE + 0x0002c) -+ -+/* Reset Controller */ -+#define RESET_CNTL (RC32355_REG_BASE + 0x08000) -+ -+/* Device Controller */ -+#define DEV0_BASE (RC32355_REG_BASE + 0x10000) -+#define DEV0_MASK (RC32355_REG_BASE + 0x10004) -+#define DEV0_CNTL (RC32355_REG_BASE + 0x10008) -+#define DEV0_TIMING (RC32355_REG_BASE + 0x1000c) -+#define DEV_REG_OFFSET 0x10 -+ -+/* SDRAM Controller */ -+#define SDRAM0_BASE (RC32355_REG_BASE + 0x18000) -+#define SDRAM0_MASK (RC32355_REG_BASE + 0x18004) -+#define SDRAM1_BASE (RC32355_REG_BASE + 0x18008) -+#define SDRAM1_MASK (RC32355_REG_BASE + 0x1800c) -+#define SDRAM_CNTL (RC32355_REG_BASE + 0x18010) -+ -+/* Bus Arbiter */ -+#define BUS_ARB_CNTL0 (RC32355_REG_BASE + 0x20000) -+#define BUS_ARB_CNTL1 (RC32355_REG_BASE + 0x20004) -+ -+/* Counters/Timers */ -+#define TIMER0_COUNT (RC32355_REG_BASE + 0x28000) -+#define TIMER0_COMPARE (RC32355_REG_BASE + 0x28004) -+#define TIMER0_CNTL (RC32355_REG_BASE + 0x28008) -+#define TIMER_REG_OFFSET 0x0C -+ -+/* System Integrity */ -+ -+/* Interrupt Controller */ -+#define IC_GROUP0_PEND (RC32355_REG_BASE + 0x30000) -+#define IC_GROUP0_MASK (RC32355_REG_BASE + 0x30004) -+#define IC_GROUP_OFFSET 0x08 -+ -+#define NUM_INTR_GROUPS 5 -+/* -+ * The IRQ mapping is as follows: -+ * -+ * IRQ Mapped To -+ * --- ------------------- -+ * 0 SW0 (IP0) SW0 intr -+ * 1 SW1 (IP1) SW1 intr -+ * - Int0 (IP2) mapped to GROUP0_IRQ_BASE -+ * - Int1 (IP3) mapped to GROUP1_IRQ_BASE -+ * - Int2 (IP4) mapped to GROUP2_IRQ_BASE -+ * - Int3 (IP5) mapped to GROUP3_IRQ_BASE -+ * - Int4 (IP6) mapped to GROUP4_IRQ_BASE -+ * 7 Int5 (IP7) CP0 Timer -+ * -+ * IRQ's 8 and up are all mapped to Int0-4 (IP2-IP6), which -+ * internally on the RC32355 is routed to the Expansion -+ * Interrupt Controller. -+ */ -+#define MIPS_CPU_TIMER_IRQ 7 -+ -+#define GROUP0_IRQ_BASE 8 // Counter/Timers, UCW -+#define GROUP1_IRQ_BASE (GROUP0_IRQ_BASE + 32) // DMA -+#define GROUP2_IRQ_BASE (GROUP1_IRQ_BASE + 32) // ATM -+#define GROUP3_IRQ_BASE (GROUP2_IRQ_BASE + 32) // TDM, Eth, USB, UARTs, I2C -+#define GROUP4_IRQ_BASE (GROUP3_IRQ_BASE + 32) // GPIO -+ -+#define RC32355_NR_IRQS (GROUP4_IRQ_BASE + 32) -+ -+/* DMA - see rc32355_dma.h for full list of registers */ -+ -+#define RC32355_DMA_BASE (RC32355_REG_BASE + 0x38000) -+#define DMA_CHAN_OFFSET 0x14 -+ -+/* GPIO Controller */ -+ -+/* TDM Bus */ -+ -+/* 16550 UARTs */ -+#ifdef __MIPSEB__ -+#define RC32300_UART0_BASE (RC32355_REG_BASE + 0x50003) -+#define RC32300_UART1_BASE (RC32355_REG_BASE + 0x50023) -+#else -+#define RC32300_UART0_BASE (RC32355_REG_BASE + 0x50000) -+#define RC32300_UART1_BASE (RC32355_REG_BASE + 0x50020) -+#endif -+ -+#define RC32300_UART0_IRQ (GROUP3_IRQ_BASE + 14) -+#define RC32300_UART1_IRQ (GROUP3_IRQ_BASE + 17) -+ -+/* ATM */ -+ -+/* Ethernet - see rc32355_eth.h for full list of registers */ -+ -+#define RC32355_ETH_BASE (RC32355_REG_BASE + 0x60000) -+ -+ -+#define IDT_CLOCK_MULT 2 -+ -+/* Memory map of 79EB355 board */ -+ -+/* DRAM */ -+#define RAM_BASE 0x00000000 -+#define RAM_SIZE (32*1024*1024) -+ -+/* SRAM (device 1) */ -+#define SRAM_BASE 0x02000000 -+#define SRAM_SIZE 0x00100000 -+ -+/* FLASH (device 2) */ -+#define FLASH_BASE 0x0C000000 -+#define FLASH_SIZE 0x00C00000 -+ -+/* ATM PHY (device 4) */ -+#define ATM_PHY_BASE 0x14000000 -+ -+/* TDM switch (device 3) */ -+#define TDM_BASE 0x1A000000 -+ -+/* LCD panel (device 3) */ -+#define LCD_BASE 0x1A002000 -+ -+/* RTC (DS1511W) (device 3) */ -+#define RTC_BASE 0x1A004000 -+ -+/* NVRAM (256 bytes internal to the DS1511 RTC) */ -+#define NVRAM_ADDR RTC_BASE + 0x10 -+#define NVRAM_DATA RTC_BASE + 0x13 -+#define NVRAM_ENVSIZE_OFF 4 -+#define NVRAM_ENVSTART_OFF 32 -+ -+#endif /* _RC32355_H_ */ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32365_dma.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32365_dma.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32365_dma.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32365_dma.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,226 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * RC32365/336 DMA hardware abstraction. -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 P. Sadik. -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#ifndef __IDT_RC32365_DMA_H__ -+#define __IDT_RC32365_DMA_H__ -+ -+enum -+{ -+ DMA0_PhysicalAddress = 0x18038000, -+ DMA_PhysicalAddress = DMA0_PhysicalAddress, // Default -+ -+ DMA0_VirtualAddress = 0xb8038000, -+ DMA_VirtualAddress = DMA0_VirtualAddress, // Default -+} ; -+ -+/* -+ * DMA descriptor (in physical memory). -+ */ -+ -+typedef struct DMAD_s -+{ -+ u32 control ; // Control. use DMAD_* -+ u32 ca ; // Current Address. -+ u32 devcs ; // Device control and status. -+ u32 link ; // Next descriptor in chain. -+} volatile *DMAD_t ; -+ -+enum -+{ -+ DMAD_size = sizeof (struct DMAD_s), -+ DMAD_count_b = 0, // in DMAD_t -> control -+ DMAD_count_m = 0x0003ffff, // in DMAD_t -> control -+ DMAD_ds_b = 20, // in DMAD_t -> control -+ DMAD_ds_m = 0x00300000, // in DMAD_t -> control -+ DMAD_ds_extToMem0_v = 0, -+ DMAD_ds_memToExt0_v = 1, -+ DMAD_ds_extToMem1_v = 0, -+ DMAD_ds_memToExt1_v = 1, -+ DMAD_ds_ethRcv0_v = 0, -+ DMAD_ds_ethXmt0_v = 0, -+ DMAD_ds_ethRcv1_v = 0, -+ DMAD_ds_ethXmt2_v = 0, -+ DMAD_ds_memToFifo_v = 0, -+ DMAD_ds_fifoToMem_v = 0, -+ DMAD_ds_rng_de_v = 1,//randomNumberGenerator on LC/DE -+ DMAD_ds_pciToMem_v = 0, -+ DMAD_ds_memToPci_v = 0, -+ DMAD_ds_securityInput_v = 0, -+ DMAD_ds_securityOutput_v = 0, -+ DMAD_ds_rng_se_v = 0,//randomNumberGenerator on SE -+ -+ DMAD_devcmd_b = 22, // in DMAD_t -> control -+ DMAD_devcmd_m = 0x01c00000, // in DMAD_t -> control -+ DMAD_devcmd_byte_v = 0, //memory-to-memory -+ DMAD_devcmd_halfword_v = 1, //memory-to-memory -+ DMAD_devcmd_word_v = 2, //memory-to-memory -+ DMAD_devcmd_2words_v = 3, //memory-to-memory -+ DMAD_devcmd_4words_v = 4, //memory-to-memory -+ DMAD_devcmd_6words_v = 5, //memory-to-memory -+ DMAD_devcmd_8words_v = 6, //memory-to-memory -+ DMAD_devcmd_16words_v = 7, //memory-to-memory -+ DMAD_cof_b = 25, // chain on finished -+ DMAD_cof_m = 0x02000000, // -+ DMAD_cod_b = 26, // chain on done -+ DMAD_cod_m = 0x04000000, // -+ DMAD_iof_b = 27, // interrupt on finished -+ DMAD_iof_m = 0x08000000, // -+ DMAD_iod_b = 28, // interrupt on done -+ DMAD_iod_m = 0x10000000, // -+ DMAD_t_b = 29, // terminated -+ DMAD_t_m = 0x20000000, // -+ DMAD_d_b = 30, // done -+ DMAD_d_m = 0x40000000, // -+ DMAD_f_b = 31, // finished -+ DMAD_f_m = 0x80000000, // -+} ; -+ -+/* -+ * DMA register (within Internal Register Map). -+ */ -+ -+struct DMA_Chan_s -+{ -+ u32 dmac ; // Control. -+ u32 dmas ; // Status. -+ u32 dmasm ; // Mask. -+ u32 dmadptr ; // Descriptor pointer. -+ u32 dmandptr ; // Next descriptor pointer. -+}; -+ -+typedef struct DMA_Chan_s volatile *DMA_Chan_t ; -+ -+//DMA_Channels use DMACH_count instead -+ -+enum -+{ -+ DMAC_run_b = 0, // -+ DMAC_run_m = 0x00000001, // -+ DMAC_dm_b = 1, // done mask -+ DMAC_dm_m = 0x00000002, // -+ DMAC_mode_b = 2, // -+ DMAC_mode_m = 0x0000000c, // -+ DMAC_mode_auto_v = 0, -+ DMAC_mode_burst_v = 1, -+ DMAC_mode_transfer_v = 2, //usually used -+ DMAC_mode_reserved_v = 3, -+ DMAC_a_b = 4, // -+ DMAC_a_m = 0x00000010, // -+ -+ DMAS_f_b = 0, // finished (sticky) -+ DMAS_f_m = 0x00000001, // -+ DMAS_d_b = 1, // done (sticky) -+ DMAS_d_m = 0x00000002, // -+ DMAS_c_b = 2, // chain (sticky) -+ DMAS_c_m = 0x00000004, // -+ DMAS_e_b = 3, // error (sticky) -+ DMAS_e_m = 0x00000008, // -+ DMAS_h_b = 4, // halt (sticky) -+ DMAS_h_m = 0x00000010, // -+ -+ DMASM_f_b = 0, // finished (1=mask) -+ DMASM_f_m = 0x00000001, // -+ DMASM_d_b = 1, // done (1=mask) -+ DMASM_d_m = 0x00000002, // -+ DMASM_c_b = 2, // chain (1=mask) -+ DMASM_c_m = 0x00000004, // -+ DMASM_e_b = 3, // error (1=mask) -+ DMASM_e_m = 0x00000008, // -+ DMASM_h_b = 4, // halt (1=mask) -+ DMASM_h_m = 0x00000010, // -+} ; -+ -+/* -+ * DMA channel definitions -+ */ -+ -+enum -+{ -+ DMACH_ethRcv0 = 0, -+ DMACH_ethXmt0 = 1, -+ DMACH_ethRcv1 = 2, -+ DMACH_ethXmt2 = 3, -+ DMACH_pciToMem = 4, -+ DMACH_memToPci = 5, -+ DMACH_securityInput = 6, -+ DMACH_securityOutput = 7, -+ DMACH_rng = 8, -+ -+ DMACH_count //must be last -+}; -+ -+ -+typedef struct DMAC_s -+{ -+ struct DMA_Chan_s ch [DMACH_count] ; //use ch[DMACH_] -+} volatile *DMA_t ; -+ -+ -+/* -+ * External DMA parameters -+*/ -+ -+enum -+{ -+ DMADEVCMD_ts_b = 0, // ts field in devcmd -+ DMADEVCMD_ts_m = 0x00000007, // ts field in devcmd -+ DMADEVCMD_ts_byte_v = 0, -+ DMADEVCMD_ts_halfword_v = 1, -+ DMADEVCMD_ts_word_v = 2, -+ DMADEVCMD_ts_2word_v = 3, -+ DMADEVCMD_ts_4word_v = 4, -+ DMADEVCMD_ts_6word_v = 5, -+ DMADEVCMD_ts_8word_v = 6, -+ DMADEVCMD_ts_16word_v = 7 -+}; -+ -+ -+#if 1 // aws - Compatibility. -+# define EXTDMA_ts_b DMADEVCMD_ts_b -+# define EXTDMA_ts_m DMADEVCMD_ts_m -+# define EXTDMA_ts_byte_v DMADEVCMD_ts_byte_v -+# define EXTDMA_ts_halfword_v DMADEVCMD_ts_halfword_v -+# define EXTDMA_ts_word_v DMADEVCMD_ts_word_v -+# define EXTDMA_ts_2word_v DMADEVCMD_ts_2word_v -+# define EXTDMA_ts_4word_v DMADEVCMD_ts_4word_v -+# define EXTDMA_ts_6word_v DMADEVCMD_ts_6word_v -+# define EXTDMA_ts_8word_v DMADEVCMD_ts_8word_v -+# define EXTDMA_ts_16word_v DMADEVCMD_ts_16word_v -+#endif // aws - Compatibility. -+ -+#endif // __IDT_RC32365_DMA_H__ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32365_dma_v.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32365_dma_v.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32365_dma_v.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32365_dma_v.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,86 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * RC32365/336 DMA interface routines. -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 P. Sadik. -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#ifndef __IDT_RC32365_DMA_V_H__ -+#define __IDT_RC32365_DMA_V_H__ -+ -+ -+#include -+#include -+#include -+ -+#define DMA_CHAN_OFFSET 0x14 -+#define IS_DMA_USED(X) (((X) & (DMAD_f_m | DMAD_d_m | DMAD_t_m)) != 0) -+#define IS_DMA_FINISHED(X) (((X) & (DMAD_f_m)) != 0) -+#define IS_DMA_DONE(X) (((X) & (DMAD_d_m)) != 0) -+ -+#define DMA_COUNT(count) \ -+ ((count) & DMAD_count_m) -+ -+#define DMA_HALT_TIMEOUT 500 -+ -+static inline int rc32365_halt_dma(DMA_Chan_t ch) -+{ -+ int timeout=1; -+ if (local_readl(&ch->dmac) & DMAC_run_m) { -+ local_writel(0, &ch->dmac); -+ -+ for (timeout = DMA_HALT_TIMEOUT; timeout > 0; timeout--) { -+ if (local_readl(&ch->dmas) & DMAS_h_m) { -+ local_writel(0, &ch->dmas); -+ break; -+ } -+ } -+ -+ } -+ -+ return timeout ? 0 : 1; -+} -+ -+ -+static inline void rc32365_start_dma(DMA_Chan_t ch, u32 dma_addr) -+{ -+ local_writel(0, &ch->dmandptr); -+ local_writel(dma_addr, &ch->dmadptr); -+} -+ -+static inline void rc32365_chain_dma(DMA_Chan_t ch, u32 dma_addr) -+{ -+ local_writel(dma_addr, &ch->dmandptr); -+} -+#endif //__IDT_RC32365_DMA_V_H__ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32365_eth.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32365_eth.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32365_eth.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32365_eth.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,344 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * RC32365/336 Ethernet hardware abstraction. -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 P. Sadik. -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#ifndef __IDT_RC32365_ETH_H__ -+#define __IDT_RC32365_ETH_H__ -+ -+enum -+{ -+ ETH0_PhysicalAddress = 0x18058000, -+ ETH_PhysicalAddress = ETH0_PhysicalAddress, // Default -+ ETH0_VirtualAddress = 0xb8058000, -+ -+ ETH_VirtualAddress = ETH0_VirtualAddress, // Default -+ -+ ETH1_PhysicalAddress = 0x18060000, -+ ETH1_VirtualAddress = 0xb8060000, // Default -+} ; -+ -+typedef struct -+{ -+ u32 ethintfc ; -+ u32 ethfifott ; -+ u32 etharc ; -+ u32 ethhash0 ; -+ u32 ethhash1 ; -+ u32 ethu0 [4] ; // Reserved. -+ u32 ethpfs ; -+ u32 ethmcp ; -+ u32 eth_u1 [10] ; // Reserved. -+ u32 ethspare ; -+ u32 eth_u2 [42] ; // Reserved. -+ u32 ethsal0 ; -+ u32 ethsah0 ; -+ u32 ethsal1 ; -+ u32 ethsah1 ; -+ u32 ethsal2 ; -+ u32 ethsah2 ; -+ u32 ethsal3 ; -+ u32 ethsah3 ; -+ u32 ethrbc ; -+ u32 ethrpc ; -+ u32 ethrupc ; -+ u32 ethrfc ; -+ u32 ethtbc ; -+ u32 ethgpf ; -+ u32 eth_u9 [50] ; // Reserved. -+ u32 ethmac1 ; -+ u32 ethmac2 ; -+ u32 ethipgt ; -+ u32 ethipgr ; -+ u32 ethclrt ; -+ u32 ethmaxf ; -+ u32 eth_u10 ; // Reserved. -+ u32 ethmtest ; -+ u32 miimcfg ; -+ u32 miimcmd ; -+ u32 miimaddr ; -+ u32 miimwtd ; -+ u32 miimrdd ; -+ u32 miimind ; -+ u32 eth_u11 ; // Reserved. -+ u32 eth_u12 ; // Reserved. -+ u32 ethcfsa0 ; -+ u32 ethcfsa1 ; -+ u32 ethcfsa2 ; -+} volatile *ETH_t; -+ -+enum -+{ -+ ETHINTFC_en_b = 0, -+ ETHINTFC_en_m = 0x00000001, -+ ETHINTFC_its_b = 1, -+ ETHINTFC_its_m = 0x00000002, -+ ETHINTFC_rip_b = 2, -+ ETHINTFC_rip_m = 0x00000004, -+ ETHINTFC_jam_b = 3, -+ ETHINTFC_jam_m = 0x00000008, -+ ETHINTFC_ovr_b = 4, -+ ETHINTFC_ovr_m = 0x00000010, -+ ETHINTFC_und_b = 5, -+ ETHINTFC_und_m = 0x00000020, -+ -+ ETHFIFOTT_tth_b = 0, -+ ETHFIFOTT_tth_m = 0x0000007f, -+ -+ ETHARC_pro_b = 0, -+ ETHARC_pro_m = 0x00000001, -+ ETHARC_am_b = 1, -+ ETHARC_am_m = 0x00000002, -+ ETHARC_afm_b = 2, -+ ETHARC_afm_m = 0x00000004, -+ ETHARC_ab_b = 3, -+ ETHARC_ab_m = 0x00000008, -+ -+ ETHSAL_byte5_b = 0, -+ ETHSAL_byte5_m = 0x000000ff, -+ ETHSAL_byte4_b = 8, -+ ETHSAL_byte4_m = 0x0000ff00, -+ ETHSAL_byte3_b = 16, -+ ETHSAL_byte3_m = 0x00ff0000, -+ ETHSAL_byte2_b = 24, -+ ETHSAL_byte2_m = 0xff000000, -+ -+ ETHSAH_byte1_b = 0, -+ ETHSAH_byte1_m = 0x000000ff, -+ ETHSAH_byte0_b = 8, -+ ETHSAH_byte0_m = 0x0000ff00, -+ -+ ETHGPF_ptv_b = 0, -+ ETHGPF_ptv_m = 0x0000ffff, -+ -+ ETHPFS_pfd_b = 0, -+ ETHPFS_pfd_m = 0x00000001, -+ -+ ETHCFSA0_cfsa4_b = 0, -+ ETHCFSA0_cfsa4_m = 0x000000ff, -+ ETHCFSA0_cfsa5_b = 8, -+ ETHCFSA0_cfsa5_m = 0x0000ff00, -+ -+ ETHCFSA1_cfsa2_b = 0, -+ ETHCFSA1_cfsa2_m = 0x000000ff, -+ ETHCFSA1_cfsa3_b = 8, -+ ETHCFSA1_cfsa3_m = 0x0000ff00, -+ -+ ETHCFSA2_cfsa0_b = 0, -+ ETHCFSA2_cfsa0_m = 0x000000ff, -+ ETHCFSA2_cfsa1_b = 8, -+ ETHCFSA2_cfsa1_m = 0x0000ff00, -+ -+ ETHMAC1_re_b = 0, -+ ETHMAC1_re_m = 0x00000001, -+ ETHMAC1_paf_b = 1, -+ ETHMAC1_paf_m = 0x00000002, -+ ETHMAC1_rfc_b = 2, -+ ETHMAC1_rfc_m = 0x00000004, -+ ETHMAC1_tfc_b = 3, -+ ETHMAC1_tfc_m = 0x00000008, -+ ETHMAC1_lb_b = 4, -+ ETHMAC1_lb_m = 0x00000010, -+ ETHMAC1_mr_b = 31, -+ ETHMAC1_mr_m = 0x80000000, -+ -+ ETHMAC2_fd_b = 0, -+ ETHMAC2_fd_m = 0x00000001, -+ ETHMAC2_flc_b = 1, -+ ETHMAC2_flc_m = 0x00000002, -+ ETHMAC2_hfe_b = 2, -+ ETHMAC2_hfe_m = 0x00000004, -+ ETHMAC2_dc_b = 3, -+ ETHMAC2_dc_m = 0x00000008, -+ ETHMAC2_cen_b = 4, -+ ETHMAC2_cen_m = 0x00000010, -+ ETHMAC2_pe_b = 5, -+ ETHMAC2_pe_m = 0x00000020, -+ ETHMAC2_vpe_b = 6, -+ ETHMAC2_vpe_m = 0x00000040, -+ ETHMAC2_ape_b = 7, -+ ETHMAC2_ape_m = 0x00000080, -+ ETHMAC2_ppe_b = 8, -+ ETHMAC2_ppe_m = 0x00000100, -+ ETHMAC2_lpe_b = 9, -+ ETHMAC2_lpe_m = 0x00000200, -+ ETHMAC2_nb_b = 12, -+ ETHMAC2_nb_m = 0x00001000, -+ ETHMAC2_bp_b = 13, -+ ETHMAC2_bp_m = 0x00002000, -+ ETHMAC2_ed_b = 14, -+ ETHMAC2_ed_m = 0x00004000, -+ -+ ETHIPGT_ipgt_b = 0, -+ ETHIPGT_ipgt_m = 0x0000007f, -+ -+ ETHIPGR_ipgr2_b = 0, -+ ETHIPGR_ipgr2_m = 0x0000007f, -+ ETHIPGR_ipgr1_b = 8, -+ ETHIPGR_ipgr1_m = 0x00007f00, -+ -+ ETHCLRT_maxret_b = 0, -+ ETHCLRT_maxret_m = 0x0000000f, -+ ETHCLRT_colwin_b = 8, -+ ETHCLRT_colwin_m = 0x00003f00, -+ -+ ETHMAXF_maxf_b = 0, -+ ETHMAXF_maxf_m = 0x0000ffff, -+ -+ ETHMTEST_tb_b = 2, -+ ETHMTEST_tb_m = 0x00000004, -+ -+ ETHMCP_div_b = 0, -+ ETHMCP_div_m = 0x000000ff, -+ -+ MIIMCFG_rsv_b = 0, -+ MIIMCFG_rsv_m = 0x0000000c, -+ -+ MIIMCMD_rd_b = 0, -+ MIIMCMD_rd_m = 0x00000001, -+ MIIMCMD_scn_b = 1, -+ MIIMCMD_scn_m = 0x00000002, -+ -+ MIIMADDR_regaddr_b = 0, -+ MIIMADDR_regaddr_m = 0x0000001f, -+ MIIMADDR_phyaddr_b = 8, -+ MIIMADDR_phyaddr_m = 0x00001f00, -+ -+ MIIMWTD_wdata_b = 0, -+ MIIMWTD_wdata_m = 0x0000ffff, -+ -+ MIIMRDD_rdata_b = 0, -+ MIIMRDD_rdata_m = 0x0000ffff, -+ -+ MIIMIND_bsy_b = 0, -+ MIIMIND_bsy_m = 0x00000001, -+ MIIMIND_scn_b = 1, -+ MIIMIND_scn_m = 0x00000002, -+ MIIMIND_nv_b = 2, -+ MIIMIND_nv_m = 0x00000004, -+ -+} ; -+ -+/* -+ * Values for the DEVCS field of the Ethernet DMA Rx and Tx descriptors. -+ */ -+enum -+{ -+ ETHRX_fd_b = 0, -+ ETHRX_fd_m = 0x00000001, -+ ETHRX_ld_b = 1, -+ ETHRX_ld_m = 0x00000002, -+ ETHRX_rok_b = 2, -+ ETHRX_rok_m = 0x00000004, -+ ETHRX_fm_b = 3, -+ ETHRX_fm_m = 0x00000008, -+ ETHRX_mp_b = 4, -+ ETHRX_mp_m = 0x00000010, -+ ETHRX_bp_b = 5, -+ ETHRX_bp_m = 0x00000020, -+ ETHRX_vlt_b = 6, -+ ETHRX_vlt_m = 0x00000040, -+ ETHRX_cf_b = 7, -+ ETHRX_cf_m = 0x00000080, -+ ETHRX_ovr_b = 8, -+ ETHRX_ovr_m = 0x00000100, -+ ETHRX_crc_b = 9, -+ ETHRX_crc_m = 0x00000200, -+ ETHRX_cv_b = 10, -+ ETHRX_cv_m = 0x00000400, -+ ETHRX_db_b = 11, -+ ETHRX_db_m = 0x00000800, -+ ETHRX_le_b = 12, -+ ETHRX_le_m = 0x00001000, -+ ETHRX_lor_b = 13, -+ ETHRX_lor_m = 0x00002000, -+ ETHRX_ces_b = 14, -+ ETHRX_ces_m = 0x00004000, -+ ETHRX_length_b = 16, -+ ETHRX_length_m = 0xffff0000, -+ -+ ETHTX_fd_b = 0, -+ ETHTX_fd_m = 0x00000001, -+ ETHTX_ld_b = 1, -+ ETHTX_ld_m = 0x00000002, -+ ETHTX_oen_b = 2, -+ ETHTX_oen_m = 0x00000004, -+ ETHTX_pen_b = 3, -+ ETHTX_pen_m = 0x00000008, -+ ETHTX_cen_b = 4, -+ ETHTX_cen_m = 0x00000010, -+ ETHTX_hen_b = 5, -+ ETHTX_hen_m = 0x00000020, -+ ETHTX_tok_b = 6, -+ ETHTX_tok_m = 0x00000040, -+ ETHTX_mp_b = 7, -+ ETHTX_mp_m = 0x00000080, -+ ETHTX_bp_b = 8, -+ ETHTX_bp_m = 0x00000100, -+ ETHTX_und_b = 9, -+ ETHTX_und_m = 0x00000200, -+ ETHTX_of_b = 10, -+ ETHTX_of_m = 0x00000400, -+ ETHTX_ed_b = 11, -+ ETHTX_ed_m = 0x00000800, -+ ETHTX_ec_b = 12, -+ ETHTX_ec_m = 0x00001000, -+ ETHTX_lc_b = 13, -+ ETHTX_lc_m = 0x00002000, -+ ETHTX_td_b = 14, -+ ETHTX_td_m = 0x00004000, -+ ETHTX_crc_b = 15, -+ ETHTX_crc_m = 0x00008000, -+ ETHTX_le_b = 16, -+ ETHTX_le_m = 0x00010000, -+ ETHTX_cc_b = 17, -+ ETHTX_cc_m = 0x001E0000, -+} ; -+ -+enum -+{ -+ ETH0_IPABMC_PhysicalAddress = 0x18040010, -+ ETH0_IPABMC_VirtualAddress = 0xb8040000, -+ ETH1_IPABMC_PhysicalAddress = 0x18040018, -+ ETH1_IPABMC_VirtualAddress = 0xb8040018, -+} ; -+ -+typedef struct -+{ -+ u32 ipabmcrx ; -+ u32 ipabmctx ; -+}volatile *IPABM_ETH_t; -+#endif //__IDT_RC32365_ETH_H__ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32365_eth_v.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32365_eth_v.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32365_eth_v.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32365_eth_v.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,72 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * RC32365/336 Ethernet status checking. -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 P. Sadik. -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#ifndef __IDT_RC32365_ETH_V_H__ -+#define __IDT_RC32365_ETH_V_H__ -+#include -+ -+#define IS_TX_TOK(X) (((X) & (1<> ETHTX_tok_b ) /* Transmit Okay */ -+#define IS_TX_MP(X) (((X) & (1<> ETHTX_mp_b ) /* Multicast */ -+#define IS_TX_BP(X) (((X) & (1<> ETHTX_bp_b ) /* Broadcast */ -+#define IS_TX_UND_ERR(X) (((X) & (1<> ETHTX_und_b ) /* Transmit FIFO Underflow */ -+#define IS_TX_OF_ERR(X) (((X) & (1<> ETHTX_of_b ) /* Oversized frame */ -+#define IS_TX_ED_ERR(X) (((X) & (1<> ETHTX_ed_b ) /* Excessive deferral */ -+#define IS_TX_EC_ERR(X) (((X) & (1<> ETHTX_ec_b) /* Excessive collisions */ -+#define IS_TX_LC_ERR(X) (((X) & (1<> ETHTX_lc_b ) /* Late Collision */ -+#define IS_TX_TD_ERR(X) (((X) & (1<> ETHTX_td_b ) /* Transmit deferred*/ -+#define IS_TX_CRC_ERR(X) (((X) & (1<> ETHTX_crc_b ) /* CRC Error */ -+#define IS_TX_LE_ERR(X) (((X) & (1<> ETHTX_le_b ) /* Length Error */ -+ -+#define TX_COLLISION_COUNT(X) (((X) & ETHTX_cc_m)>>ETHTX_cc_b) /* Collision Count */ -+ -+#define IS_RCV_ROK(X) (((X) & (1<> ETHRX_rok_b) /* Receive Okay */ -+#define IS_RCV_FM(X) (((X) & (1<> ETHRX_fm_b) /* Is Filter Match */ -+#define IS_RCV_MP(X) (((X) & (1<> ETHRX_mp_b) /* Is it MP */ -+#define IS_RCV_BP(X) (((X) & (1<> ETHRX_bp_b) /* Is it BP */ -+#define IS_RCV_VLT(X) (((X) & (1<> ETHRX_vlt_b) /* VLAN Tag Detect */ -+#define IS_RCV_CF(X) (((X) & (1<> ETHRX_cf_b) /* Control Frame */ -+#define IS_RCV_OVR_ERR(X) (((X) & (1<> ETHRX_ovr_b) /* Receive Overflow */ -+#define IS_RCV_CRC_ERR(X) (((X) & (1<> ETHRX_crc_b) /* CRC Error */ -+#define IS_RCV_CV_ERR(X) (((X) & (1<> ETHRX_cv_b) /* Code Violation */ -+#define IS_RCV_DB_ERR(X) (((X) & (1<> ETHRX_db_b) /* Dribble Bits */ -+#define IS_RCV_LE_ERR(X) (((X) & (1<> ETHRX_le_b) /* Length error */ -+#define IS_RCV_LOR_ERR(X) (((X) & (1<> ETHRX_lor_b) /* Length Out of Range */ -+#define IS_RCV_CES_ERR(X) (((X) & (1<> ETHRX_ces_b) /* Preamble error */ -+#define RCVPKT_LENGTH(X) (((X) & ETHRX_length_m) >> ETHRX_length_b) /* Length of the received packet */ -+ -+#endif //__IDT_RC32365_ETH_V_H__ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32365_gpio.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32365_gpio.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32365_gpio.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32365_gpio.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,181 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * RC32365/336 GPIO hardware abstraction. -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 P. Sadik. -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#ifndef __IDT_RC32365_GPIO_H__ -+#define __IDT_RC32365_GPIO_H__ -+ -+enum -+{ -+ GPIO0_PhysicalAddress = 0x18048000, -+ GPIO_PhysicalAddress = GPIO0_PhysicalAddress, // Default -+ -+ GPIO0_VirtualAddress = 0xb8048000, -+ GPIO_VirtualAddress = GPIO0_VirtualAddress, // Default -+} ; -+ -+typedef struct -+{ -+ u32 gpiofunc; /* GPIO Function Register -+ * gpiofunc[x]==0 bit = gpio -+ * func[x]==1 bit = altfunc -+ */ -+ u32 gpiocfg; /* GPIO Configuration Register -+ * gpiocfg[x]==0 bit = input -+ * gpiocfg[x]==1 bit = output -+ */ -+ u32 gpiod; /* GPIO Data Register -+ * gpiod[x] read/write gpio pinX status -+ */ -+ u32 gpioilevel; /* GPIO Interrupt Status Register -+ * interrupt level (see gpioistat) -+ */ -+ u32 gpioistat; /* Gpio Interrupt Status Register -+ * istat[x] = (gpiod[x] == level[x]) -+ * cleared in ISR (STICKY bits) -+ */ -+ u32 gpionmien; /* GPIO Non-maskable Interrupt Enable Register */ -+} volatile * GPIO_t ; -+ -+typedef enum -+{ -+ GPIO_gpio_v = 0, // gpiofunc use pin as GPIO. -+ GPIO_alt_v = 1, // gpiofunc use pin as alt. -+ GPIO_input_v = 0, // gpiocfg use pin as input. -+ GPIO_output_v = 1, // gpiocfg use pin as output. -+ GPIO_pin0_b = 0, -+ GPIO_pin0_m = 0x00000001, -+ GPIO_pin1_b = 1, -+ GPIO_pin1_m = 0x00000002, -+ GPIO_pin2_b = 2, -+ GPIO_pin2_m = 0x00000004, -+ GPIO_pin3_b = 3, -+ GPIO_pin3_m = 0x00000008, -+ GPIO_pin4_b = 4, -+ GPIO_pin4_m = 0x00000010, -+ GPIO_pin5_b = 5, -+ GPIO_pin5_m = 0x00000020, -+ GPIO_pin6_b = 6, -+ GPIO_pin6_m = 0x00000040, -+ GPIO_pin7_b = 7, -+ GPIO_pin7_m = 0x00000080, -+ GPIO_pin8_b = 8, -+ GPIO_pin8_m = 0x00000100, -+ GPIO_pin9_b = 9, -+ GPIO_pin9_m = 0x00000200, -+ GPIO_pin10_b = 10, -+ GPIO_pin10_m = 0x00000400, -+ GPIO_pin11_b = 11, -+ GPIO_pin11_m = 0x00000800, -+ GPIO_pin12_b = 12, -+ GPIO_pin12_m = 0x00001000, -+ GPIO_pin13_b = 13, -+ GPIO_pin13_m = 0x00002000, -+ GPIO_pin14_b = 14, -+ GPIO_pin14_m = 0x00004000, -+ GPIO_pin15_b = 15, -+ GPIO_pin15_m = 0x00008000, -+ -+// Alternate function pins. Corrsponding gpiofunc bit set to GPIO_alt_v. -+ -+ GPIO_u0sout_b = GPIO_pin0_b, // UART 0 serial out. -+ GPIO_u0sout_m = GPIO_pin0_m, -+ GPIO_u0sout_cfg_v = GPIO_output_v, -+ -+ GPIO_u0sinp_b = GPIO_pin1_b, // UART 0 serial in. -+ GPIO_u0sinp_m = GPIO_pin1_m, -+ GPIO_u0sinp_cfg_v = GPIO_input_v, -+ -+ GPIO_maddr22_b = GPIO_pin2_b, // M&P bus bit 22. -+ GPIO_maddr22_m = GPIO_pin2_m, -+ GPIO_maddr22_cfg_v = GPIO_output_v, -+ -+ GPIO_maddr23_b = GPIO_pin3_b, // M&P bus bit 23. -+ GPIO_maddr23_m = GPIO_pin3_m, -+ GPIO_maddr23_cfg_v = GPIO_output_v, -+ -+ GPIO_maddr24_b = GPIO_pin4_b, // M&P bus bit 24. -+ GPIO_maddr24_m = GPIO_pin4_m, -+ GPIO_maddr24_cfg_v = GPIO_output_v, -+ -+ GPIO_maddr25_b = GPIO_pin5_b, // M&P bus bit 25. -+ GPIO_maddr25_m = GPIO_pin5_m, -+ GPIO_maddr25_cfg_v = GPIO_output_v, -+ -+ GPIO_rngclk_b = GPIO_pin6_b, // reserved. -+ GPIO_rngclk_m = GPIO_pin6_m, -+ GPIO_rngclk_cfg_v = GPIO_input_v, -+ -+ GPIO_sdckenp_b = GPIO_pin7_b, // reserved. -+ GPIO_sdckenp_m = GPIO_pin7_m, -+ GPIO_sdckenp_cfg_v = GPIO_output_v, -+ -+ GPIO_cen1_b = GPIO_pin8_b, // reserved. -+ GPIO_cen1_m = GPIO_pin8_m, -+ GPIO_cen1_cfg_v = GPIO_output_v, -+ -+ GPIO_cen2_b = GPIO_pin9_b, // reserved. -+ GPIO_cen2_m = GPIO_pin9_m, -+ GPIO_cen2_cfg_v = GPIO_output_v, -+ -+ GPIO_regn_b = GPIO_pin10_b, // reserved. -+ GPIO_regn_m = GPIO_pin10_m, -+ GPIO_regn_cfg_v = GPIO_output_v, -+ -+ GPIO_iordn_b = GPIO_pin11_b, // reserved. -+ GPIO_iordn_m = GPIO_pin11_m, -+ GPIO_iordn_cfg_v = GPIO_output_v, -+ -+ GPIO_iowrn_b = GPIO_pin12_b, // reserved. -+ GPIO_iowrn_m = GPIO_pin12_m, -+ GPIO_iowrn_cfg_v = GPIO_output_v, -+ -+ GPIO_pcireqn2_b = GPIO_pin13_b, // PCI messaging int. -+ GPIO_pcireqn2_m = GPIO_pin13_m, -+ GPIO_pcireqn2_cfg_v = GPIO_input_v, -+ -+ GPIO_pcigntn2_b = GPIO_pin14_b, // PCI messaging int. -+ GPIO_pcigntn2_m = GPIO_pin14_m, -+ GPIO_pcigntn2_cfg_v = GPIO_output_v, -+ -+ GPIO_pcimuintn_b = GPIO_pin15_b, // PCI messaging int. -+ GPIO_pcimuintn_m = GPIO_pin15_m, -+ GPIO_pcimuintn_cfg_v= GPIO_output_v, -+ -+} GPIO_DEFS_t; -+ -+#endif //__IDT_RC32365_GPIO_H__ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32365_gpio_v.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32365_gpio_v.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32365_gpio_v.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32365_gpio_v.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,91 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * Routines to set/clear/toggle GPIO on RC32365 -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 P. Sadik. -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+#ifndef __IDT_RC32365_GPIO_V_H__ -+#define __IDT_RC32365_GPIO_V_H__ -+ -+ -+#ifdef _LANGUAGE_ASSEMBLY -+#define SET_GPIO(pin) \ -+ lui t5,0xb804 ; \ -+ ori t5,t5,0x8000 ; \ -+ lw t4,8(t5) ; \ -+ ori t4,t4,pin ; \ -+ sw t4,8(t5) ; -+ -+#define CLEAR_GPIO(pin) \ -+ lui t5,0xb804 ; \ -+ ori t5,t5,0x8000 ; \ -+ lw t4,8(t5) ; \ -+ lui t6,0xFFFF; \ -+ ori t6,t6,0xFFFF; \ -+ xori t6,t6,pin ; \ -+ and t4,t6 ; \ -+ sw t4,8(t5) ; -+ -+#define TOGGLE_GPIO(pin) \ -+ lui t5,0xb804 ; \ -+ ori t5,t5,0x8000 ; \ -+ lw t4,8(t5) ; \ -+ xori t4,t4,pin ; \ -+ sw t4,8(t5) ; -+ -+#else // !_LANGUAGE_ASSEMBLY -+#include -+#include -+#include -+ -+static inline void set_gpio(unsigned long pin) -+{ -+ idt_gpio->gpiod |= pin; -+} -+ -+static inline void clear_gpio(unsigned long pin) -+{ -+ idt_gpio->gpiod &= ~pin; -+} -+static inline void toggle_gpio(unsigned long pin) -+{ -+ idt_gpio->gpiod ^= pin; -+} -+#define SET_GPIO(pin) set_gpio(pin) -+#define CLEAR_GPIO(pin) clear_gpio(pin) -+#define TOGGLE_GPIO(pin) toggle_gpio(pin) -+#endif // _LANGUAGE_ASSEMBLY -+ -+#endif //__IDT_RC32365_GPIO_V_H__ -+ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32365.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32365.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32365.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32365.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,160 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * Definitions for IDT RC32365 CPU. -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 P. Sadik. -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#ifndef __IDT_RC32365_H__ -+#define __IDT_RC32365_H__ -+ -+extern unsigned int cedar_za; -+ -+/* Base address of internal registers */ -+#define RC32365_REG_BASE 0x18000000 -+ -+/* System ID Registers */ -+#define CPU_SYSID (RC32365_REG_BASE + 0x00018) -+#define CPU_DEVTYPE (RC32365_REG_BASE + 0x0001c) -+ -+/* Reset Controller */ -+#define RESET_CNTL (RC32365_REG_BASE + 0x08000) -+#define BOOT_VECTOR (RC32365_REG_BASE + 0x08004) -+ -+/* Device Controller */ -+#define DEV0_BASE (RC32365_REG_BASE + 0x10000) -+#define DEV0_MASK (RC32365_REG_BASE + 0x10004) -+#define DEV0_CNTL (RC32365_REG_BASE + 0x10008) -+#define DEV0_TIMING (RC32365_REG_BASE + 0x1000c) -+#define DEV_REG_OFFSET 0x10 -+ -+/* SDRAM Controller */ -+#define SDRAM0_BASE (RC32365_REG_BASE + 0x18000) -+#define SDRAM0_MASK (RC32365_REG_BASE + 0x18004) -+#define SDRAM1_BASE (RC32365_REG_BASE + 0x18008) -+#define SDRAM1_MASK (RC32365_REG_BASE + 0x1800c) -+#define SDRAM_CNTL (RC32365_REG_BASE + 0x18010) -+ -+/* Counters/Timers */ -+#define TIMER0_COUNT (RC32365_REG_BASE + 0x20000) -+#define TIMER0_COMPARE (RC32365_REG_BASE + 0x20004) -+#define TIMER0_CNTL (RC32365_REG_BASE + 0x20008) -+#define TIMER0_SELECT (RC32365_REG_BASE + 0x2000c) -+#define TIMER_REG_OFFSET 0x10 -+ -+/* System Integrity */ -+ -+/* Interrupt Controller */ -+#define IC_GROUP0_PEND (RC32365_REG_BASE + 0x30000) -+#define IC_GROUP0_TEST (RC32365_REG_BASE + 0x30004) -+#define IC_GROUP0_MASK (RC32365_REG_BASE + 0x30008) -+#define IC_GROUP_OFFSET 0x0c -+ -+#define NUM_INTR_GROUPS 5 -+/* -+ * The IRQ mapping is as follows: -+ * -+ * IRQ Mapped To -+ * --- ------------------- -+ * 0 SW0 (IP0) SW0 intr -+ * 1 SW1 (IP1) SW1 intr -+ * - Int0 (IP2) mapped to GROUP0_IRQ_BASE -+ * - Int1 (IP3) mapped to GROUP1_IRQ_BASE -+ * - Int2 (IP4) mapped to GROUP2_IRQ_BASE -+ * - Int3 (IP5) mapped to GROUP3_IRQ_BASE -+ * - Int4 (IP6) mapped to GROUP4_IRQ_BASE -+ * 7 Int5 (IP7) CP0 Timer -+ * -+ * IRQ's 8 and up are all mapped to Int0-4 (IP2-IP6), which -+ * internally on the RC32365 is routed to the Expansion -+ * Interrupt Controller. -+ */ -+#define MIPS_CPU_TIMER_IRQ 7 -+ -+#define GROUP0_IRQ_BASE 8 // Counter/Timers, UCW -+#define GROUP1_IRQ_BASE (GROUP0_IRQ_BASE + 32) // DMA -+#define GROUP2_IRQ_BASE (GROUP1_IRQ_BASE + 32) // RNG, SEC -+#define GROUP3_IRQ_BASE (GROUP2_IRQ_BASE + 32) // Eth, PCI, UARTs -+#define GROUP4_IRQ_BASE (GROUP3_IRQ_BASE + 32) // GPIO -+ -+#define RC32365_NR_IRQS (GROUP4_IRQ_BASE + 32) -+ -+/* DMA - see rc32365_dma.h for full list of registers */ -+ -+#define RC32365_DMA_BASE (RC32365_REG_BASE + 0x38000) -+#define DMA_CHAN_OFFSET 0x14 -+ -+/* GPIO Controller */ -+#define idt_gpio ((volatile GPIO_t) GPIO0_VirtualAddress) -+ -+/* 16550 UARTs */ -+#ifdef __MIPSEB__ -+#define RC32300_UART0_BASE (RC32365_REG_BASE + 0x50003) -+#else -+#define RC32300_UART0_BASE (RC32365_REG_BASE + 0x50000) -+#endif -+#define RC32300_UART0_IRQ (GROUP3_IRQ_BASE + 0) -+ -+/* Ethernet - see rc32365_eth.h for full list of registers */ -+ -+#define RC32365_ETH_BASE (RC32365_REG_BASE + 0x58000) -+ -+#define IDT_CLOCK_MULT 2 -+ -+/* FLASH (device 1) */ -+#define FLASH_BASE 0x08000000 -+#define FLASH_SIZE 0x00800000 -+ -+/* LCD 4-digit display (device 2) */ -+#define LCD_DIGIT0 0x0C000003 -+#define LCD_DIGIT1 0x0C000002 -+#define LCD_DIGIT2 0x0C000001 -+#define LCD_DIGIT3 0x0C000000 -+ -+/* RTC (DS1553) (device 2) */ -+#define RTC_BASE 0x0c800000 -+/* NVRAM */ -+#define NVRAM_BASE RTC_BASE -+#define NVRAM_ENVSIZE_OFF 4 -+#define NVRAM_ENVSTART_OFF 32 -+ -+/* Interrupts routed on 79EB365 board */ -+#define RC32365_PCI_INTA_IRQ (GROUP4_IRQ_BASE + 8) -+#define RC32365_PCI_INTB_IRQ (GROUP4_IRQ_BASE + 9) -+#define RC32365_PCI_INTC_IRQ (GROUP4_IRQ_BASE + 10) -+#define RC32365_PCI_INTD_IRQ (GROUP4_IRQ_BASE + 11) -+ -+#define RAM_SIZE (32 * 1024 * 1024) -+ -+#endif //__IDT_RC32365_H__ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32365_pci.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32365_pci.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32365_pci.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32365_pci.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,515 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * Datatype declaration for IDT 79EB365/336 PCI -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 P. Sadik. -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#ifndef __IDT_RC32365_PCI_H__ -+#define __IDT_RC32365_PCI_H__ -+ -+enum -+{ -+ PCI0_PhysicalAddress = 0x18068000, -+ PCI_PhysicalAddress = PCI0_PhysicalAddress, -+ -+ PCI0_VirtualAddress = 0xb8068000, -+ PCI_VirtualAddress = PCI0_VirtualAddress, -+} ; -+ -+enum -+{ -+ PCI_LbaCount = 4, // Local base addresses. -+} ; -+ -+typedef struct -+{ -+ u32 a ; // Address. -+ u32 c ; // Control. -+ u32 m ; // mapping. -+} PCI_Map_s ; -+ -+typedef struct -+{ -+ u32 pcic ; -+ u32 pcis ; -+ u32 pcism ; -+ u32 pcicfga ; -+ u32 pcicfgd ; -+ PCI_Map_s pcilba [PCI_LbaCount] ; -+ u32 pcidac ; -+ u32 pcidas ; -+ u32 pcidasm ; -+ u32 pcidad ; -+ u32 pcidma8c ; -+ u32 pcidma9c ; -+ u32 pcitc ; -+} volatile *PCI_t ; -+ -+// PCI messaging unit. -+enum -+{ -+ PCIM_Count = 2, -+} ; -+typedef struct -+{ -+ u32 pciim [PCIM_Count] ; -+ u32 pciom [PCIM_Count] ; -+ u32 pciid ; -+ u32 pciiic ; -+ u32 pciiim ; -+ u32 pciiod ; -+ u32 pciioic ; -+ u32 pciioim ; -+} volatile *PCIM_t ; -+ -+/******************************************************************************* -+ * -+ * PCI Control Register -+ * -+ ******************************************************************************/ -+enum -+{ -+ PCIC_en_b = 0, -+ PCIC_en_m = 0x00000001, -+ PCIC_tnr_b = 1, -+ PCIC_tnr_m = 0x00000002, -+ PCIC_sce_b = 2, -+ PCIC_sce_m = 0x00000004, -+ PCIC_ien_b = 3, -+ PCIC_ien_m = 0x00000008, -+ PCIC_aaa_b = 4, -+ PCIC_aaa_m = 0x00000010, -+ PCIC_eap_b = 5, -+ PCIC_eap_m = 0x00000020, -+ PCIC_pcim_b = 6, -+ PCIC_pcim_m = 0x000001c0, -+ PCIC_pcim_disabled_v = 0, -+ PCIC_pcim_tnr_v = 1, // Satellite - target not ready -+ PCIC_pcim_suspend_v = 2, // Satellite - suspended CPU. -+ PCIC_pcim_extern_v = 3, // Host - external arbiter. -+ PCIC_pcim_fixed_v = 4, // Host - fixed priority arb. -+ PCIC_pcim_roundrobin_v = 5, // Host - round robin priority. -+ PCIC_pcim_reserved6_v = 6, -+ PCIC_pcim_reserved7_v = 7, -+ PCIC_igm_b = 9, -+ PCIC_igm_m = 0x00000200, -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI Status Register -+ * -+ ******************************************************************************/ -+enum { -+ PCIS_eed_b = 0, -+ PCIS_eed_m = 0x00000001, -+ PCIS_wr_b = 1, -+ PCIS_wr_m = 0x00000002, -+ PCIS_nmi_b = 2, -+ PCIS_nmi_m = 0x00000004, -+ PCIS_ii_b = 3, -+ PCIS_ii_m = 0x00000008, -+ PCIS_cwe_b = 4, -+ PCIS_cwe_m = 0x00000010, -+ PCIS_cre_b = 5, -+ PCIS_cre_m = 0x00000020, -+ PCIS_mdpe_b = 6, -+ PCIS_mdpe_m = 0x00000040, -+ PCIS_sta_b = 7, -+ PCIS_sta_m = 0x00000080, -+ PCIS_rta_b = 8, -+ PCIS_rta_m = 0x00000100, -+ PCIS_rma_b = 9, -+ PCIS_rma_m = 0x00000200, -+ PCIS_sse_b = 10, -+ PCIS_sse_m = 0x00000400, -+ PCIS_ose_b = 11, -+ PCIS_ose_m = 0x00000800, -+ PCIS_pe_b = 12, -+ PCIS_pe_m = 0x00001000, -+ PCIS_tae_b = 13, -+ PCIS_tae_m = 0x00002000, -+ PCIS_rle_b = 14, -+ PCIS_rle_m = 0x00004000, -+ PCIS_bme_b = 15, -+ PCIS_bme_m = 0x00008000, -+ PCIS_prd_b = 16, -+ PCIS_prd_m = 0x00010000, -+ PCIS_rip_b = 17, -+ PCIS_rip_m = 0x00020000, -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI Status Mask Register -+ * -+ ******************************************************************************/ -+enum { -+ PCISM_eed_b = 0, -+ PCISM_eed_m = 0x00000001, -+ PCISM_wr_b = 1, -+ PCISM_wr_m = 0x00000002, -+ PCISM_nmi_b = 2, -+ PCISM_nmi_m = 0x00000004, -+ PCISM_ii_b = 3, -+ PCISM_ii_m = 0x00000008, -+ PCISM_cwe_b = 4, -+ PCISM_cwe_m = 0x00000010, -+ PCISM_cre_b = 5, -+ PCISM_cre_m = 0x00000020, -+ PCISM_mdpe_b = 6, -+ PCISM_mdpe_m = 0x00000040, -+ PCISM_sta_b = 7, -+ PCISM_sta_m = 0x00000080, -+ PCISM_rta_b = 8, -+ PCISM_rta_m = 0x00000100, -+ PCISM_rma_b = 9, -+ PCISM_rma_m = 0x00000200, -+ PCISM_sse_b = 10, -+ PCISM_sse_m = 0x00000400, -+ PCISM_ose_b = 11, -+ PCISM_ose_m = 0x00000800, -+ PCISM_pe_b = 12, -+ PCISM_pe_m = 0x00001000, -+ PCISM_tae_b = 13, -+ PCISM_tae_m = 0x00002000, -+ PCISM_rle_b = 14, -+ PCISM_rle_m = 0x00004000, -+ PCISM_bme_b = 15, -+ PCISM_bme_m = 0x00008000, -+ PCISM_prd_b = 16, -+ PCISM_prd_m = 0x00010000, -+ PCISM_rip_b = 17, -+ PCISM_rip_m = 0x00020000, -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI Configuration Address Register -+ * -+ ******************************************************************************/ -+enum { -+ PCICFGA_reg_b = 2, -+ PCICFGA_reg_m = 0x000000fc, -+ PCICFGA_reg_id_v = 0x00>>2, //use PCFGID_ -+ PCICFGA_reg_04_v = 0x04>>2, //use PCFG04_ -+ PCICFGA_reg_08_v = 0x08>>2, //use PCFG08_ -+ PCICFGA_reg_0C_v = 0x0C>>2, //use PCFG0C_ -+ PCICFGA_reg_pba0_v = 0x10>>2, //use PCIPBA_ -+ PCICFGA_reg_pba1_v = 0x14>>2, //use PCIPBA_ -+ PCICFGA_reg_pba2_v = 0x18>>2, //use PCIPBA_ -+ PCICFGA_reg_pba3_v = 0x1c>>2, //use PCIPBA_ -+ PCICFGA_reg_subsystem_v = 0x2c>>2, //use PCFGSS_ -+ PCICFGA_reg_3C_v = 0x3C>>2, //use PCFG3C_ -+ PCICFGA_reg_pba0c_v = 0x44>>2, //use PCIPBAC_ -+ PCICFGA_reg_pba0m_v = 0x48>>2, -+ PCICFGA_reg_pba1c_v = 0x4c>>2, //use PCIPBAC_ -+ PCICFGA_reg_pba1m_v = 0x50>>2, -+ PCICFGA_reg_pba2c_v = 0x54>>2, //use PCIPBAC_ -+ PCICFGA_reg_pba2m_v = 0x58>>2, -+ PCICFGA_reg_pba3c_v = 0x5c>>2, //use PCIPBAC_ -+ PCICFGA_reg_pba3m_v = 0x60>>2, -+ PCICFGA_reg_pmgt_v = 0x64>>2, -+ PCICFGA_func_b = 8, -+ PCICFGA_func_m = 0x00000700, -+ PCICFGA_dev_b = 11, -+ PCICFGA_dev_m = 0x0000f800, -+ PCICFGA_dev_internal_v = 0, -+ PCICFGA_bus_b = 16, -+ PCICFGA_bus_m = 0x00ff0000, -+ PCICFGA_bus_type0_v = 0, //local bus -+ PCICFGA_en_b = 31, // read only -+ PCICFGA_en_m = 0x80000000, -+} ; -+ -+enum { -+ PCFGID_vendor_b = 0, -+ PCFGID_vendor_m = 0x0000ffff, -+ PCFGID_vendor_IDT_v = 0x111d, -+ PCFGID_device_b = 16, -+ PCFGID_device_m = 0xffff0000, -+ PCFGID_device_Acaciade_v = 0x0207, -+ -+ PCFG04_command_ioena_b = 1, -+ PCFG04_command_ioena_m = 0x00000001, -+ PCFG04_command_memena_b = 2, -+ PCFG04_command_memena_m = 0x00000002, -+ PCFG04_command_bmena_b = 3, -+ PCFG04_command_bmena_m = 0x00000004, -+ PCFG04_command_mwinv_b = 5, -+ PCFG04_command_mwinv_m = 0x00000010, -+ PCFG04_command_parena_b = 7, -+ PCFG04_command_parena_m = 0x00000040, -+ PCFG04_command_serrena_b = 9, -+ PCFG04_command_serrena_m = 0x00000100, -+ PCFG04_command_fastbbena_b = 10, -+ PCFG04_command_fastbbena_m = 0x00000200, -+ PCFG04_status_b = 16, -+ PCFG04_status_m = 0xffff0000, -+ PCFG04_status_66MHz_b = 21, // 66 MHz enable -+ PCFG04_status_66MHz_m = 0x00200000, -+ PCFG04_status_fbb_b = 23, -+ PCFG04_status_fbb_m = 0x00800000, -+ PCFG04_status_mdpe_b = 24, -+ PCFG04_status_mdpe_m = 0x01000000, -+ PCFG04_status_dst_b = 25, -+ PCFG04_status_dst_m = 0x06000000, -+ PCFG04_status_sta_b = 27, -+ PCFG04_status_sta_m = 0x08000000, -+ PCFG04_status_rta_b = 28, -+ PCFG04_status_rta_m = 0x10000000, -+ PCFG04_status_rma_b = 29, -+ PCFG04_status_rma_m = 0x20000000, -+ PCFG04_status_sse_b = 30, -+ PCFG04_status_sse_m = 0x40000000, -+ PCFG04_status_pe_b = 31, -+ PCFG04_status_pe_m = 0x40000000, -+ -+ PCFG08_revId_b = 0, -+ PCFG08_revId_m = 0x000000ff, -+ PCFG08_classCode_b = 0, -+ PCFG08_classCode_m = 0xffffff00, -+ PCFG08_classCode_bridge_v = 06, -+ PCFG08_classCode_proc_v = 0x0b3000, // processor-MIPS -+ PCFG0C_cacheline_b = 0, -+ PCFG0C_cacheline_m = 0x000000ff, -+ PCFG0C_masterLatency_b = 8, -+ PCFG0C_masterLatency_m = 0x0000ff00, -+ PCFG0C_headerType_b = 16, -+ PCFG0C_headerType_m = 0x00ff0000, -+ PCFG0C_bist_b = 24, -+ PCFG0C_bist_m = 0xff000000, -+ -+ PCIPBA_msi_b = 0, -+ PCIPBA_msi_m = 0x00000001, -+ PCIPBA_p_b = 3, -+ PCIPBA_p_m = 0x00000004, -+ PCIPBA_baddr_b = 8, -+ PCIPBA_baddr_m = 0xffffff00, -+ -+ PCFGSS_vendorId_b = 0, -+ PCFGSS_vendorId_m = 0x0000ffff, -+ PCFGSS_id_b = 16, -+ PCFGSS_id_m = 0xffff0000, -+ -+ PCFG3C_interruptLine_b = 0, -+ PCFG3C_interruptLine_m = 0x000000ff, -+ PCFG3C_interruptPin_b = 8, -+ PCFG3C_interruptPin_m = 0x0000ff00, -+ PCFG3C_minGrant_b = 16, -+ PCFG3C_minGrant_m = 0x00ff0000, -+ PCFG3C_maxLat_b = 24, -+ PCFG3C_maxLat_m = 0xff000000, -+ -+ PCIPBAC_msi_b = 0, -+ PCIPBAC_msi_m = 0x00000001, -+ PCIPBAC_p_b = 1, -+ PCIPBAC_p_m = 0x00000002, -+ PCIPBAC_size_b = 2, -+ PCIPBAC_size_m = 0x0000007c, -+ PCIPBAC_sb_b = 7, -+ PCIPBAC_sb_m = 0x00000080, -+ PCIPBAC_pp_b = 8, -+ PCIPBAC_pp_m = 0x00000100, -+ PCIPBAC_mr_b = 9, -+ PCIPBAC_mr_m = 0x00000600, -+ PCIPBAC_mr_read_v =0, //no prefetching -+ PCIPBAC_mr_readLine_v =1, -+ PCIPBAC_mr_readMult_v =2, -+ PCIPBAC_mrl_b = 11, -+ PCIPBAC_mrl_m = 0x00000800, -+ PCIPBAC_mrm_b = 12, -+ PCIPBAC_mrm_m = 0x00001000, -+ PCIPBAC_trp_b = 13, -+ PCIPBAC_trp_m = 0x00002000, -+ -+ PCFG40_trdyTimeout_b = 0, -+ PCFG40_trdyTimeout_m = 0x000000ff, -+ PCFG40_retryLim_b = 8, -+ PCFG40_retryLim_m = 0x0000ff00, -+}; -+ -+/******************************************************************************* -+ * -+ * PCI Local Base Address [0|1|2|3] Register -+ * -+ ******************************************************************************/ -+enum { -+ PCILBA_baddr_b = 0, // In PCI_t -> pcilba [] .a -+ PCILBA_baddr_m = 0xffffff00, -+} ; -+/******************************************************************************* -+ * -+ * PCI Local Base Address Control Register -+ * -+ ******************************************************************************/ -+enum { -+ PCILBAC_msi_b = 0, // In pPci->pcilba[i].c -+ PCILBAC_msi_m = 0x00000001, -+ PCILBAC_msi_mem_v = 0, -+ PCILBAC_msi_io_v = 1, -+ PCILBAC_size_b = 2, // In pPci->pcilba[i].c -+ PCILBAC_size_m = 0x0000007c, -+ PCILBAC_sb_b = 7, // In pPci->pcilba[i].c -+ PCILBAC_sb_m = 0x00000080, -+ PCILBAC_rt_b = 8, // In pPci->pcilba[i].c -+ PCILBAC_rt_m = 0x00000100, -+ PCILBAC_rt_noprefetch_v = 0, // mem read -+ PCILBAC_rt_prefetch_v = 1, // mem readline -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI Local Base Address [0|1|2|3] Mapping Register -+ * -+ ******************************************************************************/ -+enum { -+ PCILBAM_maddr_b = 8, -+ PCILBAM_maddr_m = 0xffffff00, -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI Decoupled Access Control Register -+ * -+ ******************************************************************************/ -+enum { -+ PCIDAC_den_b = 0, -+ PCIDAC_den_m = 0x00000001, -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI Decoupled Access Status Register -+ * -+ ******************************************************************************/ -+enum { -+ PCIDAS_d_b = 0, -+ PCIDAS_d_m = 0x00000001, -+ PCIDAS_b_b = 1, -+ PCIDAS_b_m = 0x00000002, -+ PCIDAS_e_b = 2, -+ PCIDAS_e_m = 0x00000004, -+ PCIDAS_ofe_b = 3, -+ PCIDAS_ofe_m = 0x00000008, -+ PCIDAS_off_b = 4, -+ PCIDAS_off_m = 0x00000010, -+ PCIDAS_ife_b = 5, -+ PCIDAS_ife_m = 0x00000020, -+ PCIDAS_iff_b = 6, -+ PCIDAS_iff_m = 0x00000040, -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI DMA Channel 8 Configuration Register -+ * -+ ******************************************************************************/ -+enum -+{ -+ PCIDMA8C_mbs_b = 0, // Maximum Burst Size. -+ PCIDMA8C_mbs_m = 0x00000fff, // { pcidma8c } -+ PCIDMA8C_our_b = 12, // Optimize Unaligned Burst Reads. -+ PCIDMA8C_our_m = 0x00001000, // { pcidma8c } -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI DMA Channel 9 Configuration Register -+ * -+ ******************************************************************************/ -+enum -+{ -+ PCIDMA9C_mbs_b = 0, // Maximum Burst Size. -+ PCIDMA9C_mbs_m = 0x00000fff, // { pcidma9c } -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI to Memory(DMA Channel 8) AND Memory to PCI DMA(DMA Channel 9)Descriptors -+ * -+ ******************************************************************************/ -+enum { -+ PCIDMAD_pt_b = 22, // in DEVCMD field (descriptor) -+ PCIDMAD_pt_m = 0x00c00000, // preferred transaction field -+ // These are for reads (DMA channel 8) -+ PCIDMAD_devcmd_mr_v = 0, //memory read -+ PCIDMAD_devcmd_mrl_v = 1, //memory read line -+ PCIDMAD_devcmd_mrm_v = 2, //memory read multiple -+ PCIDMAD_devcmd_ior_v = 3, //I/O read -+ // These are for writes (DMA channel 9) -+ PCIDMAD_devcmd_mw_v = 0, //memory write -+ PCIDMAD_devcmd_mwi_v = 1, //memory write invalidate -+ PCIDMAD_devcmd_iow_v = 3, //I/O write -+ -+ // Swap byte field applies to both DMA channel 8 and 9 -+ PCIDMAD_sb_b = 24, // in DEVCMD field (descriptor) -+ PCIDMAD_sb_m = 0x01000000, // swap byte field -+} ; -+ -+ -+/******************************************************************************* -+ * -+ * PCI Target Control Register -+ * -+ ******************************************************************************/ -+enum -+{ -+ PCITC_rtimer_b = 0, // In PCITC_t -> pcitc -+ PCITC_rtimer_m = 0x000000ff, -+ PCITC_dtimer_b = 8, // In PCITC_t -> pcitc -+ PCITC_dtimer_m = 0x0000ff00, -+ PCITC_rdr_b = 18, // In PCITC_t -> pcitc -+ PCITC_rdr_m = 0x00040000, -+ PCITC_ddt_b = 19, // In PCITC_t -> pcitc -+ PCITC_ddt_m = 0x00080000, -+} ; -+/******************************************************************************* -+ * -+ * PCI messaging unit [applies to both inbound and outbound registers ] -+ * -+ ******************************************************************************/ -+enum -+{ -+ PCIM_m0_b = 0, // In PCIM_t -> {pci{iic,iim,ioic,ioim}} -+ PCIM_m0_m = 0x00000001, // inbound or outbound message 0 -+ PCIM_m1_b = 1, // In PCIM_t -> {pci{iic,iim,ioic,ioim}} -+ PCIM_m1_m = 0x00000002, // inbound or outbound message 1 -+ PCIM_db_b = 2, // In PCIM_t -> {pci{iic,iim,ioic,ioim}} -+ PCIM_db_m = 0x00000004, // inbound or outbound doorbell -+}; -+ -+ -+#endif // __IDT_RC32365_PCI_H__ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32365_pci_v.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32365_pci_v.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32300/rc32365_pci_v.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32300/rc32365_pci_v.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,217 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * PCI header values for IDT 79EB365/336 -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 P. Sadik. -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#ifndef __IDT_RC32365_PCI_V_H__ -+#define __IDT_RC32365_PCI_V_H__ -+ -+ -+#define PCI_MSG_VirtualAddress 0xB806C010 -+#define rc32365_pci ((volatile PCI_t) PCI0_VirtualAddress) -+#define rc32365_pci_msg ((volatile PCIM_t) PCI_MSG_VirtualAddress) -+ -+#define PCIM_SHFT 0x6 -+#define PCIM_BIT_LEN 0x7 -+#define PCIM_H_EA 0x3 -+#define PCIM_H_IA_FIX 0x4 -+#define PCIM_H_IA_RR 0x5 -+ -+#define PCI_ADDR_START 0x50000000 -+ -+#define CPUTOPCI_MEM_WIN 0x02000000 -+#define CPUTOPCI_IO_WIN 0x00100000 -+#define PCILBA_SIZE_SHFT 2 -+#define PCILBA_SIZE_MASK 0x1F -+#define SIZE_256MB 0x1C -+#define SIZE_128MB 0x1B -+#define SIZE_64MB 0x1A -+#define SIZE_32MB 0x19 -+#define SIZE_16MB 0x18 -+#define SIZE_4MB 0x16 -+#define SIZE_2MB 0x15 -+#define SIZE_1MB 0x14 -+#define CEDAR_CONFIG0_ADDR 0x80000000 -+#define CEDAR_CONFIG1_ADDR 0x80000004 -+#define CEDAR_CONFIG2_ADDR 0x80000008 -+#define CEDAR_CONFIG3_ADDR 0x8000000C -+#define CEDAR_CONFIG4_ADDR 0x80000010 -+#define CEDAR_CONFIG5_ADDR 0x80000014 -+#define CEDAR_CONFIG6_ADDR 0x80000018 -+#define CEDAR_CONFIG7_ADDR 0x8000001C -+#define CEDAR_CONFIG8_ADDR 0x80000020 -+#define CEDAR_CONFIG9_ADDR 0x80000024 -+#define CEDAR_CONFIG10_ADDR 0x80000028 -+#define CEDAR_CONFIG11_ADDR 0x8000002C -+#define CEDAR_CONFIG12_ADDR 0x80000030 -+#define CEDAR_CONFIG13_ADDR 0x80000034 -+#define CEDAR_CONFIG14_ADDR 0x80000038 -+#define CEDAR_CONFIG15_ADDR 0x8000003C -+#define CEDAR_CONFIG16_ADDR 0x80000040 -+#define CEDAR_CONFIG17_ADDR 0x80000044 -+#define CEDAR_CONFIG18_ADDR 0x80000048 -+#define CEDAR_CONFIG19_ADDR 0x8000004C -+#define CEDAR_CONFIG20_ADDR 0x80000050 -+#define CEDAR_CONFIG21_ADDR 0x80000054 -+#define CEDAR_CONFIG22_ADDR 0x80000058 -+#define CEDAR_CONFIG23_ADDR 0x8000005C -+#define CEDAR_CONFIG24_ADDR 0x80000060 -+#define CEDAR_CONFIG25_ADDR 0x80000064 -+#define CEDAR_CMD (PCFG04_command_ioena_m | \ -+ PCFG04_command_memena_m | \ -+ PCFG04_command_bmena_m | \ -+ PCFG04_command_mwinv_m | \ -+ PCFG04_command_parena_m | \ -+ PCFG04_command_serrena_m ) -+ -+#define CEDAR_STAT (PCFG04_status_mdpe_m | \ -+ PCFG04_status_sta_m | \ -+ PCFG04_status_rta_m | \ -+ PCFG04_status_rma_m | \ -+ PCFG04_status_sse_m | \ -+ PCFG04_status_pe_m) -+ -+#define CEDAR_CNFG1 ((CEDAR_STAT << 16) | \ -+ CEDAR_CMD) -+ -+#define CEDAR_REVID 0 -+#define CEDAR_CLASS_CODE 0 -+#define CEDAR_CNFG2 ((CEDAR_CLASS_CODE << 8) | \ -+ CEDAR_REVID) -+ -+#define CEDAR_CACHE_LINE_SIZE 4 -+#define CEDAR_MASTER_LAT 0x3c -+#define CEDAR_HEADER_TYPE 0 -+#define CEDAR_BIST 0 -+ -+#define CEDAR_CNFG3 ((CEDAR_BIST << 24) | \ -+ (CEDAR_HEADER_TYPE << 16) | \ -+ (CEDAR_MASTER_LAT << 8) | \ -+ CEDAR_CACHE_LINE_SIZE) -+ -+#define CEDAR_BAR0 0x00000008 /* 128 MB Memory */ -+#define CEDAR_BAR1 0x18800001 /* 1 MB IO */ -+#define CEDAR_BAR2 0x18000001 /* 2 MB IO window for Cedar -+ internal Registers */ -+#define CEDAR_BAR3 0x48000008 /* Spare 128 MB Memory */ -+ -+#define CEDAR_CNFG4 CEDAR_BAR0 -+#define CEDAR_CNFG5 CEDAR_BAR1 -+#define CEDAR_CNFG6 CEDAR_BAR2 -+#define CEDAR_CNFG7 CEDAR_BAR3 -+ -+#define CEDAR_SUBSYS_VENDOR_ID 0 -+#define CEDAR_SUBSYSTEM_ID 0 -+#define CEDAR_CNFG8 0 -+#define CEDAR_CNFG9 0 -+#define CEDAR_CNFG10 0 -+#define CEDAR_CNFG11 ((CEDAR_SUBSYS_VENDOR_ID << 16) | \ -+ CEDAR_SUBSYSTEM_ID) -+#define CEDAR_INT_LINE 1 -+#define CEDAR_INT_PIN 1 -+#define CEDAR_MIN_GNT 8 -+#define CEDAR_MAX_LAT 0x38 -+#define CEDAR_CNFG12 0 -+#define CEDAR_CNFG13 0 -+#define CEDAR_CNFG14 0 -+#define CEDAR_CNFG15 ((CEDAR_MAX_LAT << 24) | \ -+ (CEDAR_MIN_GNT << 16) | \ -+ (CEDAR_INT_PIN << 8) | \ -+ CEDAR_INT_LINE) -+#define CEDAR_RETRY_LIMIT 0x80 -+#define CEDAR_TRDY_LIMIT 0x80 -+#define CEDAR_CNFG16 ((CEDAR_RETRY_LIMIT << 8) | \ -+ CEDAR_TRDY_LIMIT) -+#define PCI_PBAxC_R 0x0 -+#define PCI_PBAxC_RL 0x1 -+#define PCI_PBAxC_RM 0x2 -+#define SIZE_SHFT 2 -+#ifdef __MIPSEB__ -+#define CEDAR_PBA0C (((1 & 0x3) << PCIPBAC_mr_b) | \ -+ PCIPBAC_pp_m | \ -+ PCIPBAC_sb_m | \ -+ (SIZE_128MB << SIZE_SHFT) | \ -+ PCIPBAC_p_m) -+#else -+ -+#define CEDAR_PBA0C (((1 & 0x3) << PCIPBAC_mr_b) | \ -+ PCIPBAC_pp_m | \ -+ (SIZE_128MB << SIZE_SHFT) | \ -+ PCIPBAC_p_m) -+#endif -+#define CEDAR_CNFG17 CEDAR_PBA0C -+#define CEDAR_PBA0M 0x0 -+#define CEDAR_CNFG18 CEDAR_PBA0M -+ -+#ifdef __MIPSEB__ -+#define CEDAR_PBA1C ((SIZE_1MB << SIZE_SHFT) | \ -+ PCIPBAC_sb_m | \ -+ PCIPBAC_msi_m) -+#else -+#define CEDAR_PBA1C ((SIZE_1MB << SIZE_SHFT) | \ -+ PCIPBAC_msi_m) -+#endif -+#define CEDAR_CNFG19 CEDAR_PBA1C -+#define CEDAR_PBA1M 0x0 -+#define CEDAR_CNFG20 CEDAR_PBA1M -+ -+#ifdef __MIPSEB__ -+#define CEDAR_PBA2C ((SIZE_2MB << SIZE_SHFT) | \ -+ PCIPBAC_sb_m | \ -+ PCIPBAC_msi_m) -+#else -+#define CEDAR_PBA2C ((SIZE_2MB << SIZE_SHFT) | \ -+ PCIPBAC_msi_m) -+#endif -+ -+#define CEDAR_CNFG21 CEDAR_PBA2C -+#define CEDAR_PBA2M 0x18000000 -+#define CEDAR_CNFG22 CEDAR_PBA2M -+ -+#ifdef __MIPSEB__ -+#define CEDAR_PBA3C PCIPBAC_sb_m -+#else -+#define CEDAR_PBA3C 0 -+#endif -+ -+#define CEDAR_CNFG23 CEDAR_PBA3C -+#define CEDAR_PBA3M 0 -+#define CEDAR_CNFG24 CEDAR_PBA3M -+ -+#define PCITC_DTIMER_VAL 8 -+#define PCITC_RTIMER_VAL 0x10 -+ -+#endif //__IDT_RC32365_PCI_V_H__ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32434/rc32434_dma.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32434/rc32434_dma.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32434/rc32434_dma.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32434/rc32434_dma.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,205 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * DMA register definition -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 rkt, neb -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#ifndef __IDT_DMA_H__ -+#define __IDT_DMA_H__ -+ -+enum -+{ -+ DMA0_PhysicalAddress = 0x18040000, -+ DMA_PhysicalAddress = DMA0_PhysicalAddress, // Default -+ -+ DMA0_VirtualAddress = 0xb8040000, -+ DMA_VirtualAddress = DMA0_VirtualAddress, // Default -+} ; -+ -+/* -+ * DMA descriptor (in physical memory). -+ */ -+ -+typedef struct DMAD_s -+{ -+ u32 control ; // Control. use DMAD_* -+ u32 ca ; // Current Address. -+ u32 devcs ; // Device control and status. -+ u32 link ; // Next descriptor in chain. -+} volatile *DMAD_t ; -+ -+enum -+{ -+ DMAD_size = sizeof (struct DMAD_s), -+ DMAD_count_b = 0, // in DMAD_t -> control -+ DMAD_count_m = 0x0003ffff, // in DMAD_t -> control -+ DMAD_ds_b = 20, // in DMAD_t -> control -+ DMAD_ds_m = 0x00300000, // in DMAD_t -> control -+ DMAD_ds_ethRcv0_v = 0, -+ DMAD_ds_ethXmt0_v = 0, -+ DMAD_ds_memToFifo_v = 0, -+ DMAD_ds_fifoToMem_v = 0, -+ DMAD_ds_pciToMem_v = 0, -+ DMAD_ds_memToPci_v = 0, -+ -+ DMAD_devcmd_b = 22, // in DMAD_t -> control -+ DMAD_devcmd_m = 0x01c00000, // in DMAD_t -> control -+ DMAD_devcmd_byte_v = 0, //memory-to-memory -+ DMAD_devcmd_halfword_v = 1, //memory-to-memory -+ DMAD_devcmd_word_v = 2, //memory-to-memory -+ DMAD_devcmd_2words_v = 3, //memory-to-memory -+ DMAD_devcmd_4words_v = 4, //memory-to-memory -+ DMAD_devcmd_6words_v = 5, //memory-to-memory -+ DMAD_devcmd_8words_v = 6, //memory-to-memory -+ DMAD_devcmd_16words_v = 7, //memory-to-memory -+ DMAD_cof_b = 25, // chain on finished -+ DMAD_cof_m = 0x02000000, // -+ DMAD_cod_b = 26, // chain on done -+ DMAD_cod_m = 0x04000000, // -+ DMAD_iof_b = 27, // interrupt on finished -+ DMAD_iof_m = 0x08000000, // -+ DMAD_iod_b = 28, // interrupt on done -+ DMAD_iod_m = 0x10000000, // -+ DMAD_t_b = 29, // terminated -+ DMAD_t_m = 0x20000000, // -+ DMAD_d_b = 30, // done -+ DMAD_d_m = 0x40000000, // -+ DMAD_f_b = 31, // finished -+ DMAD_f_m = 0x80000000, // -+} ; -+ -+/* -+ * DMA register (within Internal Register Map). -+ */ -+ -+struct DMA_Chan_s -+{ -+ u32 dmac ; // Control. -+ u32 dmas ; // Status. -+ u32 dmasm ; // Mask. -+ u32 dmadptr ; // Descriptor pointer. -+ u32 dmandptr ; // Next descriptor pointer. -+}; -+ -+typedef struct DMA_Chan_s volatile *DMA_Chan_t ; -+ -+//DMA_Channels use DMACH_count instead -+ -+enum -+{ -+ DMAC_run_b = 0, // -+ DMAC_run_m = 0x00000001, // -+ DMAC_dm_b = 1, // done mask -+ DMAC_dm_m = 0x00000002, // -+ DMAC_mode_b = 2, // -+ DMAC_mode_m = 0x0000000c, // -+ DMAC_mode_auto_v = 0, -+ DMAC_mode_burst_v = 1, -+ DMAC_mode_transfer_v = 2, //usually used -+ DMAC_mode_reserved_v = 3, -+ DMAC_a_b = 4, // -+ DMAC_a_m = 0x00000010, // -+ -+ DMAS_f_b = 0, // finished (sticky) -+ DMAS_f_m = 0x00000001, // -+ DMAS_d_b = 1, // done (sticky) -+ DMAS_d_m = 0x00000002, // -+ DMAS_c_b = 2, // chain (sticky) -+ DMAS_c_m = 0x00000004, // -+ DMAS_e_b = 3, // error (sticky) -+ DMAS_e_m = 0x00000008, // -+ DMAS_h_b = 4, // halt (sticky) -+ DMAS_h_m = 0x00000010, // -+ -+ DMASM_f_b = 0, // finished (1=mask) -+ DMASM_f_m = 0x00000001, // -+ DMASM_d_b = 1, // done (1=mask) -+ DMASM_d_m = 0x00000002, // -+ DMASM_c_b = 2, // chain (1=mask) -+ DMASM_c_m = 0x00000004, // -+ DMASM_e_b = 3, // error (1=mask) -+ DMASM_e_m = 0x00000008, // -+ DMASM_h_b = 4, // halt (1=mask) -+ DMASM_h_m = 0x00000010, // -+} ; -+ -+/* -+ * DMA channel definitions -+ */ -+ -+enum -+{ -+ DMACH_ethRcv0 = 0, -+ DMACH_ethXmt0 = 1, -+ DMACH_memToFifo = 2, -+ DMACH_fifoToMem = 3, -+ DMACH_pciToMem = 4, -+ DMACH_memToPci = 5, -+ -+ DMACH_count //must be last -+}; -+ -+ -+typedef struct DMAC_s -+{ -+ struct DMA_Chan_s ch [DMACH_count] ; //use ch[DMACH_] -+} volatile *DMA_t ; -+ -+ -+/* -+ * External DMA parameters -+*/ -+ -+enum -+{ -+ DMADEVCMD_ts_b = 0, // ts field in devcmd -+ DMADEVCMD_ts_m = 0x00000007, // ts field in devcmd -+ DMADEVCMD_ts_byte_v = 0, -+ DMADEVCMD_ts_halfword_v = 1, -+ DMADEVCMD_ts_word_v = 2, -+ DMADEVCMD_ts_2word_v = 3, -+ DMADEVCMD_ts_4word_v = 4, -+ DMADEVCMD_ts_6word_v = 5, -+ DMADEVCMD_ts_8word_v = 6, -+ DMADEVCMD_ts_16word_v = 7 -+}; -+ -+ -+#endif // __IDT_DMA_H__ -+ -+ -+ -+ -+ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32434/rc32434_dma_v.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32434/rc32434_dma_v.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32434/rc32434_dma_v.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32434/rc32434_dma_v.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,89 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * Definitions for DMA controller. -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 rkt, neb. -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#ifndef __IDT_DMA_V_H__ -+#define __IDT_DMA_V_H__ -+ -+#include -+#include -+ -+#define DMA_CHAN_OFFSET 0x14 -+#define IS_DMA_USED(X) (((X) & (DMAD_f_m | DMAD_d_m | DMAD_t_m)) != 0) -+#define DMA_COUNT(count) \ -+ ((count) & DMAD_count_m) -+ -+#define DMA_HALT_TIMEOUT 500 -+ -+ -+static inline int rc32434_halt_dma(DMA_Chan_t ch) -+{ -+ int timeout=1; -+ if (rc32434_readl(&ch->dmac) & DMAC_run_m) { -+ rc32434_writel(0, &ch->dmac); -+ -+ for (timeout = DMA_HALT_TIMEOUT; timeout > 0; timeout--) { -+ if (rc32434_readl(&ch->dmas) & DMAS_h_m) { -+ rc32434_writel(0, &ch->dmas); -+ break; -+ } -+ } -+ -+ } -+ -+ return timeout ? 0 : 1; -+} -+ -+static inline void rc32434_start_dma(DMA_Chan_t ch, u32 dma_addr) -+{ -+ rc32434_writel(0, &ch->dmandptr); -+ rc32434_writel(dma_addr, &ch->dmadptr); -+} -+ -+static inline void rc32434_chain_dma(DMA_Chan_t ch, u32 dma_addr) -+{ -+ rc32434_writel(dma_addr, &ch->dmandptr); -+} -+ -+#endif // __IDT_DMA_V_H__ -+ -+ -+ -+ -+ -+ -+ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32434/rc32434_eth.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32434/rc32434_eth.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32434/rc32434_eth.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32434/rc32434_eth.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,333 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * Ethernet register definition -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 rkt, neb. -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#ifndef __IDT_ETH_H__ -+#define __IDT_ETH_H__ -+ -+ -+enum -+{ -+ ETH0_PhysicalAddress = 0x18060000, -+ ETH_PhysicalAddress = ETH0_PhysicalAddress, // Default -+ -+ ETH0_VirtualAddress = 0xb8060000, -+ ETH_VirtualAddress = ETH0_VirtualAddress, // Default -+} ; -+ -+typedef struct -+{ -+ u32 ethintfc ; -+ u32 ethfifott ; -+ u32 etharc ; -+ u32 ethhash0 ; -+ u32 ethhash1 ; -+ u32 ethu0 [4] ; // Reserved. -+ u32 ethpfs ; -+ u32 ethmcp ; -+ u32 eth_u1 [10] ; // Reserved. -+ u32 ethspare ; -+ u32 eth_u2 [42] ; // Reserved. -+ u32 ethsal0 ; -+ u32 ethsah0 ; -+ u32 ethsal1 ; -+ u32 ethsah1 ; -+ u32 ethsal2 ; -+ u32 ethsah2 ; -+ u32 ethsal3 ; -+ u32 ethsah3 ; -+ u32 ethrbc ; -+ u32 ethrpc ; -+ u32 ethrupc ; -+ u32 ethrfc ; -+ u32 ethtbc ; -+ u32 ethgpf ; -+ u32 eth_u9 [50] ; // Reserved. -+ u32 ethmac1 ; -+ u32 ethmac2 ; -+ u32 ethipgt ; -+ u32 ethipgr ; -+ u32 ethclrt ; -+ u32 ethmaxf ; -+ u32 eth_u10 ; // Reserved. -+ u32 ethmtest ; -+ u32 miimcfg ; -+ u32 miimcmd ; -+ u32 miimaddr ; -+ u32 miimwtd ; -+ u32 miimrdd ; -+ u32 miimind ; -+ u32 eth_u11 ; // Reserved. -+ u32 eth_u12 ; // Reserved. -+ u32 ethcfsa0 ; -+ u32 ethcfsa1 ; -+ u32 ethcfsa2 ; -+} volatile *ETH_t; -+ -+enum -+{ -+ ETHINTFC_en_b = 0, -+ ETHINTFC_en_m = 0x00000001, -+ ETHINTFC_its_b = 1, -+ ETHINTFC_its_m = 0x00000002, -+ ETHINTFC_rip_b = 2, -+ ETHINTFC_rip_m = 0x00000004, -+ ETHINTFC_jam_b = 3, -+ ETHINTFC_jam_m = 0x00000008, -+ ETHINTFC_ovr_b = 4, -+ ETHINTFC_ovr_m = 0x00000010, -+ ETHINTFC_und_b = 5, -+ ETHINTFC_und_m = 0x00000020, -+ -+ ETHFIFOTT_tth_b = 0, -+ ETHFIFOTT_tth_m = 0x0000007f, -+ -+ ETHARC_pro_b = 0, -+ ETHARC_pro_m = 0x00000001, -+ ETHARC_am_b = 1, -+ ETHARC_am_m = 0x00000002, -+ ETHARC_afm_b = 2, -+ ETHARC_afm_m = 0x00000004, -+ ETHARC_ab_b = 3, -+ ETHARC_ab_m = 0x00000008, -+ -+ ETHSAL_byte5_b = 0, -+ ETHSAL_byte5_m = 0x000000ff, -+ ETHSAL_byte4_b = 8, -+ ETHSAL_byte4_m = 0x0000ff00, -+ ETHSAL_byte3_b = 16, -+ ETHSAL_byte3_m = 0x00ff0000, -+ ETHSAL_byte2_b = 24, -+ ETHSAL_byte2_m = 0xff000000, -+ -+ ETHSAH_byte1_b = 0, -+ ETHSAH_byte1_m = 0x000000ff, -+ ETHSAH_byte0_b = 8, -+ ETHSAH_byte0_m = 0x0000ff00, -+ -+ ETHGPF_ptv_b = 0, -+ ETHGPF_ptv_m = 0x0000ffff, -+ -+ ETHPFS_pfd_b = 0, -+ ETHPFS_pfd_m = 0x00000001, -+ -+ ETHCFSA0_cfsa4_b = 0, -+ ETHCFSA0_cfsa4_m = 0x000000ff, -+ ETHCFSA0_cfsa5_b = 8, -+ ETHCFSA0_cfsa5_m = 0x0000ff00, -+ -+ ETHCFSA1_cfsa2_b = 0, -+ ETHCFSA1_cfsa2_m = 0x000000ff, -+ ETHCFSA1_cfsa3_b = 8, -+ ETHCFSA1_cfsa3_m = 0x0000ff00, -+ -+ ETHCFSA2_cfsa0_b = 0, -+ ETHCFSA2_cfsa0_m = 0x000000ff, -+ ETHCFSA2_cfsa1_b = 8, -+ ETHCFSA2_cfsa1_m = 0x0000ff00, -+ -+ ETHMAC1_re_b = 0, -+ ETHMAC1_re_m = 0x00000001, -+ ETHMAC1_paf_b = 1, -+ ETHMAC1_paf_m = 0x00000002, -+ ETHMAC1_rfc_b = 2, -+ ETHMAC1_rfc_m = 0x00000004, -+ ETHMAC1_tfc_b = 3, -+ ETHMAC1_tfc_m = 0x00000008, -+ ETHMAC1_lb_b = 4, -+ ETHMAC1_lb_m = 0x00000010, -+ ETHMAC1_mr_b = 31, -+ ETHMAC1_mr_m = 0x80000000, -+ -+ ETHMAC2_fd_b = 0, -+ ETHMAC2_fd_m = 0x00000001, -+ ETHMAC2_flc_b = 1, -+ ETHMAC2_flc_m = 0x00000002, -+ ETHMAC2_hfe_b = 2, -+ ETHMAC2_hfe_m = 0x00000004, -+ ETHMAC2_dc_b = 3, -+ ETHMAC2_dc_m = 0x00000008, -+ ETHMAC2_cen_b = 4, -+ ETHMAC2_cen_m = 0x00000010, -+ ETHMAC2_pe_b = 5, -+ ETHMAC2_pe_m = 0x00000020, -+ ETHMAC2_vpe_b = 6, -+ ETHMAC2_vpe_m = 0x00000040, -+ ETHMAC2_ape_b = 7, -+ ETHMAC2_ape_m = 0x00000080, -+ ETHMAC2_ppe_b = 8, -+ ETHMAC2_ppe_m = 0x00000100, -+ ETHMAC2_lpe_b = 9, -+ ETHMAC2_lpe_m = 0x00000200, -+ ETHMAC2_nb_b = 12, -+ ETHMAC2_nb_m = 0x00001000, -+ ETHMAC2_bp_b = 13, -+ ETHMAC2_bp_m = 0x00002000, -+ ETHMAC2_ed_b = 14, -+ ETHMAC2_ed_m = 0x00004000, -+ -+ ETHIPGT_ipgt_b = 0, -+ ETHIPGT_ipgt_m = 0x0000007f, -+ -+ ETHIPGR_ipgr2_b = 0, -+ ETHIPGR_ipgr2_m = 0x0000007f, -+ ETHIPGR_ipgr1_b = 8, -+ ETHIPGR_ipgr1_m = 0x00007f00, -+ -+ ETHCLRT_maxret_b = 0, -+ ETHCLRT_maxret_m = 0x0000000f, -+ ETHCLRT_colwin_b = 8, -+ ETHCLRT_colwin_m = 0x00003f00, -+ -+ ETHMAXF_maxf_b = 0, -+ ETHMAXF_maxf_m = 0x0000ffff, -+ -+ ETHMTEST_tb_b = 2, -+ ETHMTEST_tb_m = 0x00000004, -+ -+ ETHMCP_div_b = 0, -+ ETHMCP_div_m = 0x000000ff, -+ -+ MIIMCFG_rsv_b = 0, -+ MIIMCFG_rsv_m = 0x0000000c, -+ -+ MIIMCMD_rd_b = 0, -+ MIIMCMD_rd_m = 0x00000001, -+ MIIMCMD_scn_b = 1, -+ MIIMCMD_scn_m = 0x00000002, -+ -+ MIIMADDR_regaddr_b = 0, -+ MIIMADDR_regaddr_m = 0x0000001f, -+ MIIMADDR_phyaddr_b = 8, -+ MIIMADDR_phyaddr_m = 0x00001f00, -+ -+ MIIMWTD_wdata_b = 0, -+ MIIMWTD_wdata_m = 0x0000ffff, -+ -+ MIIMRDD_rdata_b = 0, -+ MIIMRDD_rdata_m = 0x0000ffff, -+ -+ MIIMIND_bsy_b = 0, -+ MIIMIND_bsy_m = 0x00000001, -+ MIIMIND_scn_b = 1, -+ MIIMIND_scn_m = 0x00000002, -+ MIIMIND_nv_b = 2, -+ MIIMIND_nv_m = 0x00000004, -+ -+} ; -+ -+/* -+ * Values for the DEVCS field of the Ethernet DMA Rx and Tx descriptors. -+ */ -+enum -+{ -+ ETHRX_fd_b = 0, -+ ETHRX_fd_m = 0x00000001, -+ ETHRX_ld_b = 1, -+ ETHRX_ld_m = 0x00000002, -+ ETHRX_rok_b = 2, -+ ETHRX_rok_m = 0x00000004, -+ ETHRX_fm_b = 3, -+ ETHRX_fm_m = 0x00000008, -+ ETHRX_mp_b = 4, -+ ETHRX_mp_m = 0x00000010, -+ ETHRX_bp_b = 5, -+ ETHRX_bp_m = 0x00000020, -+ ETHRX_vlt_b = 6, -+ ETHRX_vlt_m = 0x00000040, -+ ETHRX_cf_b = 7, -+ ETHRX_cf_m = 0x00000080, -+ ETHRX_ovr_b = 8, -+ ETHRX_ovr_m = 0x00000100, -+ ETHRX_crc_b = 9, -+ ETHRX_crc_m = 0x00000200, -+ ETHRX_cv_b = 10, -+ ETHRX_cv_m = 0x00000400, -+ ETHRX_db_b = 11, -+ ETHRX_db_m = 0x00000800, -+ ETHRX_le_b = 12, -+ ETHRX_le_m = 0x00001000, -+ ETHRX_lor_b = 13, -+ ETHRX_lor_m = 0x00002000, -+ ETHRX_ces_b = 14, -+ ETHRX_ces_m = 0x00004000, -+ ETHRX_length_b = 16, -+ ETHRX_length_m = 0xffff0000, -+ -+ ETHTX_fd_b = 0, -+ ETHTX_fd_m = 0x00000001, -+ ETHTX_ld_b = 1, -+ ETHTX_ld_m = 0x00000002, -+ ETHTX_oen_b = 2, -+ ETHTX_oen_m = 0x00000004, -+ ETHTX_pen_b = 3, -+ ETHTX_pen_m = 0x00000008, -+ ETHTX_cen_b = 4, -+ ETHTX_cen_m = 0x00000010, -+ ETHTX_hen_b = 5, -+ ETHTX_hen_m = 0x00000020, -+ ETHTX_tok_b = 6, -+ ETHTX_tok_m = 0x00000040, -+ ETHTX_mp_b = 7, -+ ETHTX_mp_m = 0x00000080, -+ ETHTX_bp_b = 8, -+ ETHTX_bp_m = 0x00000100, -+ ETHTX_und_b = 9, -+ ETHTX_und_m = 0x00000200, -+ ETHTX_of_b = 10, -+ ETHTX_of_m = 0x00000400, -+ ETHTX_ed_b = 11, -+ ETHTX_ed_m = 0x00000800, -+ ETHTX_ec_b = 12, -+ ETHTX_ec_m = 0x00001000, -+ ETHTX_lc_b = 13, -+ ETHTX_lc_m = 0x00002000, -+ ETHTX_td_b = 14, -+ ETHTX_td_m = 0x00004000, -+ ETHTX_crc_b = 15, -+ ETHTX_crc_m = 0x00008000, -+ ETHTX_le_b = 16, -+ ETHTX_le_m = 0x00010000, -+ ETHTX_cc_b = 17, -+ ETHTX_cc_m = 0x001E0000, -+} ; -+ -+#endif // __IDT_ETH_H__ -+ -+ -+ -+ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32434/rc32434_eth_v.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32434/rc32434_eth_v.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32434/rc32434_eth_v.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32434/rc32434_eth_v.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,77 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * Ethernet register definition -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 rkt, neb. -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#ifndef __IDT_ETH_V_H__ -+#define __IDT_ETH_V_H__ -+ -+#include -+ -+#define IS_TX_TOK(X) (((X) & (1<> ETHTX_tok_b ) /* Transmit Okay */ -+#define IS_TX_MP(X) (((X) & (1<> ETHTX_mp_b ) /* Multicast */ -+#define IS_TX_BP(X) (((X) & (1<> ETHTX_bp_b ) /* Broadcast */ -+#define IS_TX_UND_ERR(X) (((X) & (1<> ETHTX_und_b ) /* Transmit FIFO Underflow */ -+#define IS_TX_OF_ERR(X) (((X) & (1<> ETHTX_of_b ) /* Oversized frame */ -+#define IS_TX_ED_ERR(X) (((X) & (1<> ETHTX_ed_b ) /* Excessive deferral */ -+#define IS_TX_EC_ERR(X) (((X) & (1<> ETHTX_ec_b) /* Excessive collisions */ -+#define IS_TX_LC_ERR(X) (((X) & (1<> ETHTX_lc_b ) /* Late Collision */ -+#define IS_TX_TD_ERR(X) (((X) & (1<> ETHTX_td_b ) /* Transmit deferred*/ -+#define IS_TX_CRC_ERR(X) (((X) & (1<> ETHTX_crc_b ) /* CRC Error */ -+#define IS_TX_LE_ERR(X) (((X) & (1<> ETHTX_le_b ) /* Length Error */ -+ -+#define TX_COLLISION_COUNT(X) (((X) & ETHTX_cc_m)>>ETHTX_cc_b) /* Collision Count */ -+ -+#define IS_RCV_ROK(X) (((X) & (1<> ETHRX_rok_b) /* Receive Okay */ -+#define IS_RCV_FM(X) (((X) & (1<> ETHRX_fm_b) /* Is Filter Match */ -+#define IS_RCV_MP(X) (((X) & (1<> ETHRX_mp_b) /* Is it MP */ -+#define IS_RCV_BP(X) (((X) & (1<> ETHRX_bp_b) /* Is it BP */ -+#define IS_RCV_VLT(X) (((X) & (1<> ETHRX_vlt_b) /* VLAN Tag Detect */ -+#define IS_RCV_CF(X) (((X) & (1<> ETHRX_cf_b) /* Control Frame */ -+#define IS_RCV_OVR_ERR(X) (((X) & (1<> ETHRX_ovr_b) /* Receive Overflow */ -+#define IS_RCV_CRC_ERR(X) (((X) & (1<> ETHRX_crc_b) /* CRC Error */ -+#define IS_RCV_CV_ERR(X) (((X) & (1<> ETHRX_cv_b) /* Code Violation */ -+#define IS_RCV_DB_ERR(X) (((X) & (1<> ETHRX_db_b) /* Dribble Bits */ -+#define IS_RCV_LE_ERR(X) (((X) & (1<> ETHRX_le_b) /* Length error */ -+#define IS_RCV_LOR_ERR(X) (((X) & (1<> ETHRX_lor_b) /* Length Out of Range */ -+#define IS_RCV_CES_ERR(X) (((X) & (1<> ETHRX_ces_b) /* Preamble error */ -+#define RCVPKT_LENGTH(X) (((X) & ETHRX_length_m) >> ETHRX_length_b) /* Length of the received packet */ -+#endif // __IDT_ETH_V_H__ -+ -+ -+ -+ -+ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32434/rc32434_gpio.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32434/rc32434_gpio.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32434/rc32434_gpio.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32434/rc32434_gpio.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,167 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * GPIO register definition -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 rkt, neb. -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#ifndef __IDT_GPIO_H__ -+#define __IDT_GPIO_H__ -+ -+enum -+{ -+ GPIO0_PhysicalAddress = 0x18050000, -+ GPIO_PhysicalAddress = GPIO0_PhysicalAddress, // Default -+ -+ GPIO0_VirtualAddress = 0xb8050000, -+ GPIO_VirtualAddress = GPIO0_VirtualAddress, // Default -+} ; -+ -+typedef struct -+{ -+ u32 gpiofunc; /* GPIO Function Register -+ * gpiofunc[x]==0 bit = gpio -+ * func[x]==1 bit = altfunc -+ */ -+ u32 gpiocfg; /* GPIO Configuration Register -+ * gpiocfg[x]==0 bit = input -+ * gpiocfg[x]==1 bit = output -+ */ -+ u32 gpiod; /* GPIO Data Register -+ * gpiod[x] read/write gpio pinX status -+ */ -+ u32 gpioilevel; /* GPIO Interrupt Status Register -+ * interrupt level (see gpioistat) -+ */ -+ u32 gpioistat; /* Gpio Interrupt Status Register -+ * istat[x] = (gpiod[x] == level[x]) -+ * cleared in ISR (STICKY bits) -+ */ -+ u32 gpionmien; /* GPIO Non-maskable Interrupt Enable Register */ -+} volatile * GPIO_t ; -+ -+typedef enum -+{ -+ GPIO_gpio_v = 0, // gpiofunc use pin as GPIO. -+ GPIO_alt_v = 1, // gpiofunc use pin as alt. -+ GPIO_input_v = 0, // gpiocfg use pin as input. -+ GPIO_output_v = 1, // gpiocfg use pin as output. -+ GPIO_pin0_b = 0, -+ GPIO_pin0_m = 0x00000001, -+ GPIO_pin1_b = 1, -+ GPIO_pin1_m = 0x00000002, -+ GPIO_pin2_b = 2, -+ GPIO_pin2_m = 0x00000004, -+ GPIO_pin3_b = 3, -+ GPIO_pin3_m = 0x00000008, -+ GPIO_pin4_b = 4, -+ GPIO_pin4_m = 0x00000010, -+ GPIO_pin5_b = 5, -+ GPIO_pin5_m = 0x00000020, -+ GPIO_pin6_b = 6, -+ GPIO_pin6_m = 0x00000040, -+ GPIO_pin7_b = 7, -+ GPIO_pin7_m = 0x00000080, -+ GPIO_pin8_b = 8, -+ GPIO_pin8_m = 0x00000100, -+ GPIO_pin9_b = 9, -+ GPIO_pin9_m = 0x00000200, -+ GPIO_pin10_b = 10, -+ GPIO_pin10_m = 0x00000400, -+ GPIO_pin11_b = 11, -+ GPIO_pin11_m = 0x00000800, -+ GPIO_pin12_b = 12, -+ GPIO_pin12_m = 0x00001000, -+ GPIO_pin13_b = 13, -+ GPIO_pin13_m = 0x00002000, -+ -+// Alternate function pins. Corrsponding gpiofunc bit set to GPIO_alt_v. -+ -+ GPIO_u0sout_b = GPIO_pin0_b, // UART 0 serial out. -+ GPIO_u0sout_m = GPIO_pin0_m, -+ GPIO_u0sout_cfg_v = GPIO_output_v, -+ GPIO_u0sinp_b = GPIO_pin1_b, // UART 0 serial in. -+ GPIO_u0sinp_m = GPIO_pin1_m, -+ GPIO_u0sinp_cfg_v = GPIO_input_v, -+ GPIO_u0rtsn_b = GPIO_pin2_b, // UART 0 req. to send. -+ GPIO_u0rtsn_m = GPIO_pin2_m, -+ GPIO_u0rtsn_cfg_v = GPIO_output_v, -+ GPIO_u0ctsn_b = GPIO_pin3_b, // UART 0 clear to send. -+ GPIO_u0ctsn_m = GPIO_pin3_m, -+ GPIO_u0ctsn_cfg_v = GPIO_input_v, -+ -+ GPIO_maddr22_b = GPIO_pin4_b, // M&P bus bit 22. -+ GPIO_maddr22_m = GPIO_pin4_m, -+ GPIO_maddr22_cfg_v = GPIO_output_v, -+ -+ GPIO_maddr23_b = GPIO_pin5_b, // M&P bus bit 23. -+ GPIO_maddr23_m = GPIO_pin5_m, -+ GPIO_maddr23_cfg_v = GPIO_output_v, -+ -+ GPIO_maddr24_b = GPIO_pin6_b, // M&P bus bit 24. -+ GPIO_maddr24_m = GPIO_pin6_m, -+ GPIO_maddr24_cfg_v = GPIO_output_v, -+ -+ GPIO_maddr25_b = GPIO_pin7_b, // M&P bus bit 25. -+ GPIO_maddr25_m = GPIO_pin7_m, -+ GPIO_maddr25_cfg_v = GPIO_output_v, -+ -+ GPIO_cpudmadebug_b = GPIO_pin8_b, // CPU or DMA debug pin -+ GPIO_cpudmadebug_m = GPIO_pin8_m, -+ GPIO_cpudmadebug_cfg_v = GPIO_output_v, -+ -+ GPIO_pcireq4_b = GPIO_pin9_b, // PCI Request 4 -+ GPIO_pcireq4_m = GPIO_pin9_m, -+ GPIO_pcireq4_cfg_v = GPIO_input_v, -+ -+ GPIO_pcigrant4_b = GPIO_pin10_b, // PCI Grant 4 -+ GPIO_pcigrant4_m = GPIO_pin10_m, -+ GPIO_pcigrant4_cfg_v = GPIO_output_v, -+ -+ GPIO_pcireq5_b = GPIO_pin11_b, // PCI Request 5 -+ GPIO_pcireq5_m = GPIO_pin11_m, -+ GPIO_pcireq5_cfg_v = GPIO_input_v, -+ -+ GPIO_pcigrant5_b = GPIO_pin12_b, // PCI Grant 5 -+ GPIO_pcigrant5_m = GPIO_pin12_m, -+ GPIO_pcigrant5_cfg_v = GPIO_output_v, -+ -+ GPIO_pcimuintn_b = GPIO_pin13_b, // PCI messaging int. -+ GPIO_pcimuintn_m = GPIO_pin13_m, -+ GPIO_pcimuintn_cfg_v = GPIO_output_v, -+ -+} GPIO_DEFS_t; -+ -+#endif // __IDT_GPIO_H__ -+ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32434/rc32434.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32434/rc32434.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32434/rc32434.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32434/rc32434.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,199 @@ -+ /************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * Definitions for IDT RC32434 CPU -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 rkt, neb. -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#ifndef _RC32434_H_ -+#define _RC32434_H_ -+ -+#include -+#include -+#include -+#include -+ -+#define RC32434_REG_BASE 0x18000000 -+ -+ -+#define interrupt ((volatile INT_t ) INT0_VirtualAddress) -+#define idt_timer ((volatile TIM_t) TIM0_VirtualAddress) -+#define idt_gpio ((volatile GPIO_t) GPIO0_VirtualAddress) -+ -+#define IDT_CLOCK_MULT 2 -+#define MIPS_CPU_TIMER_IRQ 7 -+/* Interrupt Controller */ -+#define IC_GROUP0_PEND (RC32434_REG_BASE + 0x38000) -+#define IC_GROUP0_MASK (RC32434_REG_BASE + 0x38008) -+#define IC_GROUP_OFFSET 0x0C -+#define RTC_BASE 0xBA001FF0 -+ -+#define NUM_INTR_GROUPS 5 -+/* 16550 UARTs */ -+ -+#define GROUP0_IRQ_BASE 8 /* GRP2 IRQ numbers start here */ -+#define GROUP1_IRQ_BASE (GROUP0_IRQ_BASE + 32) /* GRP3 IRQ numbers start here */ -+#define GROUP2_IRQ_BASE (GROUP1_IRQ_BASE + 32) /* GRP4 IRQ numbers start here */ -+#define GROUP3_IRQ_BASE (GROUP2_IRQ_BASE + 32) /* GRP5 IRQ numbers start here */ -+#define GROUP4_IRQ_BASE (GROUP3_IRQ_BASE + 32) -+ -+#ifdef __MIPSEB__ -+ -+#define RC32434_UART0_BASE (RC32434_REG_BASE + 0x58003) -+#define EB434_UART1_BASE (0x19800003) -+ -+#else -+ -+#define RC32434_UART0_BASE (RC32434_REG_BASE + 0x58000) -+#define EB434_UART1_BASE (0x19800000) -+ -+#endif -+ -+#define RC32434_UART0_IRQ GROUP3_IRQ_BASE + 0 -+#define EB434_UART1_IRQ GROUP4_IRQ_BASE + 11 -+ -+#define RC32434_NR_IRQS (GROUP4_IRQ_BASE + 32) -+ -+/* cpu pipeline flush */ -+static inline void rc32434_sync(void) -+{ -+ __asm__ volatile ("sync"); -+} -+ -+static inline void rc32434_sync_udelay(int us) -+{ -+ __asm__ volatile ("sync"); -+ udelay(us); -+} -+ -+static inline void rc32434_sync_delay(int ms) -+{ -+ __asm__ volatile ("sync"); -+ mdelay(ms); -+} -+ -+ -+ -+/* -+ * Macros to access internal RC32434 registers. No byte -+ * swapping should be done when accessing the internal -+ * registers. -+ */ -+ -+#define rc32434_readb __raw_readb -+#define rc32434_readw __raw_readw -+#define rc32434_readl __raw_readl -+ -+#define rc32434_writeb __raw_writeb -+#define rc32434_writew __raw_writew -+#define rc32434_writel __raw_writel -+ -+#if 0 -+static inline u8 rc32434_readb(unsigned long pa) -+{ -+ return *((volatile u8 *)KSEG1ADDR(pa)); -+} -+static inline u16 rc32434_readw(unsigned long pa) -+{ -+ return *((volatile u16 *)KSEG1ADDR(pa)); -+} -+static inline u32 rc32434_readl(unsigned long pa) -+{ -+ return *((volatile u32 *)KSEG1ADDR(pa)); -+} -+static inline void rc32434_writeb(u8 val, unsigned long pa) -+{ -+ *((volatile u8 *)KSEG1ADDR(pa)) = val; -+} -+static inline void rc32434_writew(u16 val, unsigned long pa) -+{ -+ *((volatile u16 *)KSEG1ADDR(pa)) = val; -+} -+static inline void rc32434_writel(u32 val, unsigned long pa) -+{ -+ *((volatile u32 *)KSEG1ADDR(pa)) = val; -+} -+ -+#endif -+ -+ -+/* -+ * C access to CLZ and CLO instructions -+ * (count leading zeroes/ones). -+ */ -+static inline int rc32434_clz(unsigned long val) -+{ -+ int ret; -+ __asm__ volatile ( -+ ".set\tnoreorder\n\t" -+ ".set\tnoat\n\t" -+ ".set\tmips32\n\t" -+ "clz\t%0,%1\n\t" -+ ".set\tmips0\n\t" -+ ".set\tat\n\t" -+ ".set\treorder" -+ : "=r" (ret) -+ : "r" (val)); -+ -+ return ret; -+} -+static inline int rc32434_clo(unsigned long val) -+{ -+ int ret; -+ __asm__ volatile ( -+ ".set\tnoreorder\n\t" -+ ".set\tnoat\n\t" -+ ".set\tmips32\n\t" -+ "clo\t%0,%1\n\t" -+ ".set\tmips0\n\t" -+ ".set\tat\n\t" -+ ".set\treorder" -+ : "=r" (ret) -+ : "r" (val)); -+ -+ return ret; -+} -+#endif /* _RC32434_H_ */ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32434/rc32434_integ.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32434/rc32434_integ.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32434/rc32434_integ.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32434/rc32434_integ.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,90 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * System Integrity register definition -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 rkt, neb -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#ifndef __IDT_INTEG_H__ -+#define __IDT_INTEG_H__ -+ -+enum -+{ -+ INTEG0_PhysicalAddress = 0x18030000, -+ INTEG_PhysicalAddress = INTEG0_PhysicalAddress, // Default -+ -+ INTEG0_VirtualAddress = 0xB8030000, -+ INTEG_VirtualAddress = INTEG0_VirtualAddress, // Default -+} ; -+ -+// if you are looking for CEA, try rst.h -+typedef struct -+{ -+ u32 filler [0xc] ; // 0x30 bytes unused. -+ u32 errcs ; // sticky use ERRCS_ -+ u32 wtcount ; // Watchdog timer count reg. -+ u32 wtcompare ; // Watchdog timer timeout value. -+ u32 wtc ; // Watchdog timer control. use WTC_ -+} volatile *INTEG_t ; -+ -+enum -+{ -+ ERRCS_wto_b = 0, // In INTEG_t -> errcs -+ ERRCS_wto_m = 0x00000001, -+ ERRCS_wne_b = 1, // In INTEG_t -> errcs -+ ERRCS_wne_m = 0x00000002, -+ ERRCS_ucw_b = 2, // In INTEG_t -> errcs -+ ERRCS_ucw_m = 0x00000004, -+ ERRCS_ucr_b = 3, // In INTEG_t -> errcs -+ ERRCS_ucr_m = 0x00000008, -+ ERRCS_upw_b = 4, // In INTEG_t -> errcs -+ ERRCS_upw_m = 0x00000010, -+ ERRCS_upr_b = 5, // In INTEG_t -> errcs -+ ERRCS_upr_m = 0x00000020, -+ ERRCS_udw_b = 6, // In INTEG_t -> errcs -+ ERRCS_udw_m = 0x00000040, -+ ERRCS_udr_b = 7, // In INTEG_t -> errcs -+ ERRCS_udr_m = 0x00000080, -+ ERRCS_sae_b = 8, // In INTEG_t -> errcs -+ ERRCS_sae_m = 0x00000100, -+ ERRCS_wre_b = 9, // In INTEG_t -> errcs -+ ERRCS_wre_m = 0x00000200, -+ -+ WTC_en_b = 0, // In INTEG_t -> wtc -+ WTC_en_m = 0x00000001, -+ WTC_to_b = 1, // In INTEG_t -> wtc -+ WTC_to_m = 0x00000002, -+} ; -+ -+#endif // __IDT_INTEG_H__ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32434/rc32434_int.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32434/rc32434_int.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32434/rc32434_int.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32434/rc32434_int.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,174 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * Interrupt Controller register definition. -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 rkt, neb. -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#ifndef __IDT_INT_H__ -+#define __IDT_INT_H__ -+ -+enum -+{ -+ INT0_PhysicalAddress = 0x18038000, -+ INT_PhysicalAddress = INT0_PhysicalAddress, // Default -+ -+ INT0_VirtualAddress = 0xB8038000, -+ INT_VirtualAddress = INT0_VirtualAddress, // Default -+} ; -+ -+struct INT_s -+{ -+ u32 ipend ; //Pending interrupts. use INT?_ -+ u32 itest ; //Test bits. use INT?_ -+ u32 imask ; //Interrupt disabled when set. use INT?_ -+} ; -+ -+enum -+{ -+ IPEND2 = 0, // HW 2 interrupt to core. use INT2_ -+ IPEND3 = 1, // HW 3 interrupt to core. use INT3_ -+ IPEND4 = 2, // HW 4 interrupt to core. use INT4_ -+ IPEND5 = 3, // HW 5 interrupt to core. use INT5_ -+ IPEND6 = 4, // HW 6 interrupt to core. use INT6_ -+ -+ IPEND_count, // must be last (used in loops) -+ IPEND_min = IPEND2 // min IPEND (used in loops) -+}; -+ -+typedef struct INTC_s -+{ -+ struct INT_s i [IPEND_count] ;// use i[IPEND?] = INT?_ -+ u32 nmips ; // use NMIPS_ -+} volatile *INT_t ; -+ -+enum -+{ -+ INT2_timer0_b = 0, -+ INT2_timer0_m = 0x00000001, -+ INT2_timer1_b = 1, -+ INT2_timer1_m = 0x00000002, -+ INT2_timer2_b = 2, -+ INT2_timer2_m = 0x00000004, -+ INT2_refresh_b = 3, -+ INT2_refresh_m = 0x00000008, -+ INT2_watchdogTimeout_b = 4, -+ INT2_watchdogTimeout_m = 0x00000010, -+ INT2_undecodedCpuWrite_b = 5, -+ INT2_undecodedCpuWrite_m = 0x00000020, -+ INT2_undecodedCpuRead_b = 6, -+ INT2_undecodedCpuRead_m = 0x00000040, -+ INT2_undecodedPciWrite_b = 7, -+ INT2_undecodedPciWrite_m = 0x00000080, -+ INT2_undecodedPciRead_b = 8, -+ INT2_undecodedPciRead_m = 0x00000100, -+ INT2_undecodedDmaWrite_b = 9, -+ INT2_undecodedDmaWrite_m = 0x00000200, -+ INT2_undecodedDmaRead_b = 10, -+ INT2_undecodedDmaRead_m = 0x00000400, -+ INT2_ipBusSlaveAckError_b = 11, -+ INT2_ipBusSlaveAckError_m = 0x00000800, -+ -+ INT3_dmaChannel0_b = 0, -+ INT3_dmaChannel0_m = 0x00000001, -+ INT3_dmaChannel1_b = 1, -+ INT3_dmaChannel1_m = 0x00000002, -+ INT3_dmaChannel2_b = 2, -+ INT3_dmaChannel2_m = 0x00000004, -+ INT3_dmaChannel3_b = 3, -+ INT3_dmaChannel3_m = 0x00000008, -+ INT3_dmaChannel4_b = 4, -+ INT3_dmaChannel4_m = 0x00000010, -+ INT3_dmaChannel5_b = 5, -+ INT3_dmaChannel5_m = 0x00000020, -+ -+ INT5_uartGeneral0_b = 0, -+ INT5_uartGeneral0_m = 0x00000001, -+ INT5_uartTxrdy0_b = 1, -+ INT5_uartTxrdy0_m = 0x00000002, -+ INT5_uartRxrdy0_b = 2, -+ INT5_uartRxrdy0_m = 0x00000004, -+ INT5_pci_b = 3, -+ INT5_pci_m = 0x00000008, -+ INT5_pciDecoupled_b = 4, -+ INT5_pciDecoupled_m = 0x00000010, -+ INT5_spi_b = 5, -+ INT5_spi_m = 0x00000020, -+ INT5_deviceDecoupled_b = 6, -+ INT5_deviceDecoupled_m = 0x00000040, -+ INT5_eth0Ovr_b = 9, -+ INT5_eth0Ovr_m = 0x00000200, -+ INT5_eth0Und_b = 10, -+ INT5_eth0Und_m = 0x00000400, -+ INT5_eth0Pfd_b = 11, -+ INT5_eth0Pfd_m = 0x00000800, -+ INT5_nvram_b = 12, -+ INT5_nvram_m = 0x00001000, -+ -+ INT6_gpio0_b = 0, -+ INT6_gpio0_m = 0x00000001, -+ INT6_gpio1_b = 1, -+ INT6_gpio1_m = 0x00000002, -+ INT6_gpio2_b = 2, -+ INT6_gpio2_m = 0x00000004, -+ INT6_gpio3_b = 3, -+ INT6_gpio3_m = 0x00000008, -+ INT6_gpio4_b = 4, -+ INT6_gpio4_m = 0x00000010, -+ INT6_gpio5_b = 5, -+ INT6_gpio5_m = 0x00000020, -+ INT6_gpio6_b = 6, -+ INT6_gpio6_m = 0x00000040, -+ INT6_gpio7_b = 7, -+ INT6_gpio7_m = 0x00000080, -+ INT6_gpio8_b = 8, -+ INT6_gpio8_m = 0x00000100, -+ INT6_gpio9_b = 9, -+ INT6_gpio9_m = 0x00000200, -+ INT6_gpio10_b = 10, -+ INT6_gpio10_m = 0x00000400, -+ INT6_gpio11_b = 11, -+ INT6_gpio11_m = 0x00000800, -+ INT6_gpio12_b = 12, -+ INT6_gpio12_m = 0x00001000, -+ INT6_gpio13_b = 13, -+ INT6_gpio13_m = 0x00002000, -+ -+ NMIPS_gpio_b = 0, -+ NMIPS_gpio_m = 0x00000001, -+} ; -+ -+#endif // __IDT_INT_H__ -+ -+ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32434/rc32434_iparb.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32434/rc32434_iparb.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32434/rc32434_iparb.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32434/rc32434_iparb.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,111 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * IP Arbiter register definitions -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 rkt,neb -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#ifndef __IDT_IPARB_H__ -+#define __IDT_IPARB_H__ -+ -+enum -+{ -+ IPARB0_PhysicalAddress = 0x18048000, -+ IPARB_PhysicalAddress = IPARB0_PhysicalAddress, // Default -+ -+ IPARB0_VirtualAddress = 0xB8048000, -+ IPARB_VirtualAddress = IPARB0_VirtualAddress, // Default -+} ; -+ -+enum -+{ -+ IPABMXC_ethernet0Receive = 0, -+ IPABMXC_ethernet0Transmit = 1, -+ IPABMXC_memoryToHoldFifo = 2, -+ IPABMXC_holdFifoToMemory = 3, -+ IPABMXC_pciToMemory = 4, -+ IPABMXC_memoryToPci = 5, -+ IPABMXC_pciTarget = 6, -+ IPABMXC_pciTargetStart = 7, -+ IPABMXC_cpuToIpBus = 8, -+ -+ IPABMXC_Count, // Must be last in list ! -+ IPABMXC_Min = IPABMXC_ethernet0Receive, -+ -+ IPAPXC_PriorityCount = 4, // 3-highest, 0-lowest. -+} ; -+ -+typedef struct -+{ -+ u32 ipapc [IPAPXC_PriorityCount] ; // ipapc[IPAPXC_] = IPAPC_ -+ u32 ipabmc [IPABMXC_Count] ; // ipabmc[IPABMXC_] = IPABMC_ -+ u32 ipac ; // use IPAC_ -+ u32 ipaitcc; // use IPAITCC_ -+ u32 ipaspare ; -+} volatile * IPARB_t ; -+ -+enum -+{ -+ IPAC_dp_b = 0, -+ IPAC_dp_m = 0x00000001, -+ IPAC_dep_b = 1, -+ IPAC_dep_m = 0x00000002, -+ IPAC_drm_b = 2, -+ IPAC_drm_m = 0x00000004, -+ IPAC_dwm_b = 3, -+ IPAC_dwm_m = 0x00000008, -+ IPAC_msk_b = 4, -+ IPAC_msk_m = 0x00000010, -+ -+ IPAPC_ptc_b = 0, -+ IPAPC_ptc_m = 0x00003fff, -+ IPAPC_mf_b = 14, -+ IPAPC_mf_m = 0x00004000, -+ IPAPC_cptc_b = 16, -+ IPAPC_cptc_m = 0x3fff0000, -+ -+ IPAITCC_itcc = 0, -+ IPAITCC_itcc, = 0x000001ff, -+ -+ IPABMC_mtc_b = 0, -+ IPABMC_mtc_m = 0x00000fff, -+ IPABMC_p_b = 12, -+ IPABMC_p_m = 0x00003000, -+ IPABMC_msk_b = 14, -+ IPABMC_msk_m = 0x00004000, -+ IPABMC_cmtc_b = 16, -+ IPABMC_cmtc_m = 0x0fff0000, -+}; -+ -+#endif // __IDT_IPARB_H__ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32434/rc32434_pci.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32434/rc32434_pci.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32434/rc32434_pci.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32434/rc32434_pci.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,695 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * PCI register definitio -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 rkt, neb. -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#ifndef __IDT_PCI_H__ -+#define __IDT_PCI_H__ -+ -+enum -+{ -+ PCI0_PhysicalAddress = 0x18080000, -+ PCI_PhysicalAddress = PCI0_PhysicalAddress, -+ -+ PCI0_VirtualAddress = 0xB8080000, -+ PCI_VirtualAddress = PCI0_VirtualAddress, -+} ; -+ -+enum -+{ -+ PCI_LbaCount = 4, // Local base addresses. -+} ; -+ -+typedef struct -+{ -+ u32 a ; // Address. -+ u32 c ; // Control. -+ u32 m ; // mapping. -+} PCI_Map_s ; -+ -+typedef struct -+{ -+ u32 pcic ; -+ u32 pcis ; -+ u32 pcism ; -+ u32 pcicfga ; -+ u32 pcicfgd ; -+ PCI_Map_s pcilba [PCI_LbaCount] ; -+ u32 pcidac ; -+ u32 pcidas ; -+ u32 pcidasm ; -+ u32 pcidad ; -+ u32 pcidma8c ; -+ u32 pcidma9c ; -+ u32 pcitc ; -+} volatile *PCI_t ; -+ -+// PCI messaging unit. -+enum -+{ -+ PCIM_Count = 2, -+} ; -+typedef struct -+{ -+ u32 pciim [PCIM_Count] ; -+ u32 pciom [PCIM_Count] ; -+ u32 pciid ; -+ u32 pciiic ; -+ u32 pciiim ; -+ u32 pciiod ; -+ u32 pciioic ; -+ u32 pciioim ; -+} volatile *PCIM_t ; -+ -+/******************************************************************************* -+ * -+ * PCI Control Register -+ * -+ ******************************************************************************/ -+enum -+{ -+ PCIC_en_b = 0, -+ PCIC_en_m = 0x00000001, -+ PCIC_tnr_b = 1, -+ PCIC_tnr_m = 0x00000002, -+ PCIC_sce_b = 2, -+ PCIC_sce_m = 0x00000004, -+ PCIC_ien_b = 3, -+ PCIC_ien_m = 0x00000008, -+ PCIC_aaa_b = 4, -+ PCIC_aaa_m = 0x00000010, -+ PCIC_eap_b = 5, -+ PCIC_eap_m = 0x00000020, -+ PCIC_pcim_b = 6, -+ PCIC_pcim_m = 0x000001c0, -+ PCIC_pcim_disabled_v = 0, -+ PCIC_pcim_tnr_v = 1, // Satellite - target not ready -+ PCIC_pcim_suspend_v = 2, // Satellite - suspended CPU. -+ PCIC_pcim_extern_v = 3, // Host - external arbiter. -+ PCIC_pcim_fixed_v = 4, // Host - fixed priority arb. -+ PCIC_pcim_roundrobin_v = 5, // Host - round robin priority. -+ PCIC_pcim_reserved6_v = 6, -+ PCIC_pcim_reserved7_v = 7, -+ PCIC_igm_b = 9, -+ PCIC_igm_m = 0x00000200, -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI Status Register -+ * -+ ******************************************************************************/ -+enum { -+ PCIS_eed_b = 0, -+ PCIS_eed_m = 0x00000001, -+ PCIS_wr_b = 1, -+ PCIS_wr_m = 0x00000002, -+ PCIS_nmi_b = 2, -+ PCIS_nmi_m = 0x00000004, -+ PCIS_ii_b = 3, -+ PCIS_ii_m = 0x00000008, -+ PCIS_cwe_b = 4, -+ PCIS_cwe_m = 0x00000010, -+ PCIS_cre_b = 5, -+ PCIS_cre_m = 0x00000020, -+ PCIS_mdpe_b = 6, -+ PCIS_mdpe_m = 0x00000040, -+ PCIS_sta_b = 7, -+ PCIS_sta_m = 0x00000080, -+ PCIS_rta_b = 8, -+ PCIS_rta_m = 0x00000100, -+ PCIS_rma_b = 9, -+ PCIS_rma_m = 0x00000200, -+ PCIS_sse_b = 10, -+ PCIS_sse_m = 0x00000400, -+ PCIS_ose_b = 11, -+ PCIS_ose_m = 0x00000800, -+ PCIS_pe_b = 12, -+ PCIS_pe_m = 0x00001000, -+ PCIS_tae_b = 13, -+ PCIS_tae_m = 0x00002000, -+ PCIS_rle_b = 14, -+ PCIS_rle_m = 0x00004000, -+ PCIS_bme_b = 15, -+ PCIS_bme_m = 0x00008000, -+ PCIS_prd_b = 16, -+ PCIS_prd_m = 0x00010000, -+ PCIS_rip_b = 17, -+ PCIS_rip_m = 0x00020000, -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI Status Mask Register -+ * -+ ******************************************************************************/ -+enum { -+ PCISM_eed_b = 0, -+ PCISM_eed_m = 0x00000001, -+ PCISM_wr_b = 1, -+ PCISM_wr_m = 0x00000002, -+ PCISM_nmi_b = 2, -+ PCISM_nmi_m = 0x00000004, -+ PCISM_ii_b = 3, -+ PCISM_ii_m = 0x00000008, -+ PCISM_cwe_b = 4, -+ PCISM_cwe_m = 0x00000010, -+ PCISM_cre_b = 5, -+ PCISM_cre_m = 0x00000020, -+ PCISM_mdpe_b = 6, -+ PCISM_mdpe_m = 0x00000040, -+ PCISM_sta_b = 7, -+ PCISM_sta_m = 0x00000080, -+ PCISM_rta_b = 8, -+ PCISM_rta_m = 0x00000100, -+ PCISM_rma_b = 9, -+ PCISM_rma_m = 0x00000200, -+ PCISM_sse_b = 10, -+ PCISM_sse_m = 0x00000400, -+ PCISM_ose_b = 11, -+ PCISM_ose_m = 0x00000800, -+ PCISM_pe_b = 12, -+ PCISM_pe_m = 0x00001000, -+ PCISM_tae_b = 13, -+ PCISM_tae_m = 0x00002000, -+ PCISM_rle_b = 14, -+ PCISM_rle_m = 0x00004000, -+ PCISM_bme_b = 15, -+ PCISM_bme_m = 0x00008000, -+ PCISM_prd_b = 16, -+ PCISM_prd_m = 0x00010000, -+ PCISM_rip_b = 17, -+ PCISM_rip_m = 0x00020000, -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI Configuration Address Register -+ * -+ ******************************************************************************/ -+enum { -+ PCICFGA_reg_b = 2, -+ PCICFGA_reg_m = 0x000000fc, -+ PCICFGA_reg_id_v = 0x00>>2, //use PCFGID_ -+ PCICFGA_reg_04_v = 0x04>>2, //use PCFG04_ -+ PCICFGA_reg_08_v = 0x08>>2, //use PCFG08_ -+ PCICFGA_reg_0C_v = 0x0C>>2, //use PCFG0C_ -+ PCICFGA_reg_pba0_v = 0x10>>2, //use PCIPBA_ -+ PCICFGA_reg_pba1_v = 0x14>>2, //use PCIPBA_ -+ PCICFGA_reg_pba2_v = 0x18>>2, //use PCIPBA_ -+ PCICFGA_reg_pba3_v = 0x1c>>2, //use PCIPBA_ -+ PCICFGA_reg_subsystem_v = 0x2c>>2, //use PCFGSS_ -+ PCICFGA_reg_3C_v = 0x3C>>2, //use PCFG3C_ -+ PCICFGA_reg_pba0c_v = 0x44>>2, //use PCIPBAC_ -+ PCICFGA_reg_pba0m_v = 0x48>>2, -+ PCICFGA_reg_pba1c_v = 0x4c>>2, //use PCIPBAC_ -+ PCICFGA_reg_pba1m_v = 0x50>>2, -+ PCICFGA_reg_pba2c_v = 0x54>>2, //use PCIPBAC_ -+ PCICFGA_reg_pba2m_v = 0x58>>2, -+ PCICFGA_reg_pba3c_v = 0x5c>>2, //use PCIPBAC_ -+ PCICFGA_reg_pba3m_v = 0x60>>2, -+ PCICFGA_reg_pmgt_v = 0x64>>2, -+ PCICFGA_func_b = 8, -+ PCICFGA_func_m = 0x00000700, -+ PCICFGA_dev_b = 11, -+ PCICFGA_dev_m = 0x0000f800, -+ PCICFGA_dev_internal_v = 0, -+ PCICFGA_bus_b = 16, -+ PCICFGA_bus_m = 0x00ff0000, -+ PCICFGA_bus_type0_v = 0, //local bus -+ PCICFGA_en_b = 31, // read only -+ PCICFGA_en_m = 0x80000000, -+} ; -+ -+enum { -+ PCFGID_vendor_b = 0, -+ PCFGID_vendor_m = 0x0000ffff, -+ PCFGID_vendor_IDT_v = 0x111d, -+ PCFGID_device_b = 16, -+ PCFGID_device_m = 0xffff0000, -+ PCFGID_device_Korinade_v = 0x0214, -+ -+ PCFG04_command_ioena_b = 1, -+ PCFG04_command_ioena_m = 0x00000001, -+ PCFG04_command_memena_b = 2, -+ PCFG04_command_memena_m = 0x00000002, -+ PCFG04_command_bmena_b = 3, -+ PCFG04_command_bmena_m = 0x00000004, -+ PCFG04_command_mwinv_b = 5, -+ PCFG04_command_mwinv_m = 0x00000010, -+ PCFG04_command_parena_b = 7, -+ PCFG04_command_parena_m = 0x00000040, -+ PCFG04_command_serrena_b = 9, -+ PCFG04_command_serrena_m = 0x00000100, -+ PCFG04_command_fastbbena_b = 10, -+ PCFG04_command_fastbbena_m = 0x00000200, -+ PCFG04_status_b = 16, -+ PCFG04_status_m = 0xffff0000, -+ PCFG04_status_66MHz_b = 21, // 66 MHz enable -+ PCFG04_status_66MHz_m = 0x00200000, -+ PCFG04_status_fbb_b = 23, -+ PCFG04_status_fbb_m = 0x00800000, -+ PCFG04_status_mdpe_b = 24, -+ PCFG04_status_mdpe_m = 0x01000000, -+ PCFG04_status_dst_b = 25, -+ PCFG04_status_dst_m = 0x06000000, -+ PCFG04_status_sta_b = 27, -+ PCFG04_status_sta_m = 0x08000000, -+ PCFG04_status_rta_b = 28, -+ PCFG04_status_rta_m = 0x10000000, -+ PCFG04_status_rma_b = 29, -+ PCFG04_status_rma_m = 0x20000000, -+ PCFG04_status_sse_b = 30, -+ PCFG04_status_sse_m = 0x40000000, -+ PCFG04_status_pe_b = 31, -+ PCFG04_status_pe_m = 0x40000000, -+ -+ PCFG08_revId_b = 0, -+ PCFG08_revId_m = 0x000000ff, -+ PCFG08_classCode_b = 0, -+ PCFG08_classCode_m = 0xffffff00, -+ PCFG08_classCode_bridge_v = 06, -+ PCFG08_classCode_proc_v = 0x0b3000, // processor-MIPS -+ PCFG0C_cacheline_b = 0, -+ PCFG0C_cacheline_m = 0x000000ff, -+ PCFG0C_masterLatency_b = 8, -+ PCFG0C_masterLatency_m = 0x0000ff00, -+ PCFG0C_headerType_b = 16, -+ PCFG0C_headerType_m = 0x00ff0000, -+ PCFG0C_bist_b = 24, -+ PCFG0C_bist_m = 0xff000000, -+ -+ PCIPBA_msi_b = 0, -+ PCIPBA_msi_m = 0x00000001, -+ PCIPBA_p_b = 3, -+ PCIPBA_p_m = 0x00000004, -+ PCIPBA_baddr_b = 8, -+ PCIPBA_baddr_m = 0xffffff00, -+ -+ PCFGSS_vendorId_b = 0, -+ PCFGSS_vendorId_m = 0x0000ffff, -+ PCFGSS_id_b = 16, -+ PCFGSS_id_m = 0xffff0000, -+ -+ PCFG3C_interruptLine_b = 0, -+ PCFG3C_interruptLine_m = 0x000000ff, -+ PCFG3C_interruptPin_b = 8, -+ PCFG3C_interruptPin_m = 0x0000ff00, -+ PCFG3C_minGrant_b = 16, -+ PCFG3C_minGrant_m = 0x00ff0000, -+ PCFG3C_maxLat_b = 24, -+ PCFG3C_maxLat_m = 0xff000000, -+ -+ PCIPBAC_msi_b = 0, -+ PCIPBAC_msi_m = 0x00000001, -+ PCIPBAC_p_b = 1, -+ PCIPBAC_p_m = 0x00000002, -+ PCIPBAC_size_b = 2, -+ PCIPBAC_size_m = 0x0000007c, -+ PCIPBAC_sb_b = 7, -+ PCIPBAC_sb_m = 0x00000080, -+ PCIPBAC_pp_b = 8, -+ PCIPBAC_pp_m = 0x00000100, -+ PCIPBAC_mr_b = 9, -+ PCIPBAC_mr_m = 0x00000600, -+ PCIPBAC_mr_read_v =0, //no prefetching -+ PCIPBAC_mr_readLine_v =1, -+ PCIPBAC_mr_readMult_v =2, -+ PCIPBAC_mrl_b = 11, -+ PCIPBAC_mrl_m = 0x00000800, -+ PCIPBAC_mrm_b = 12, -+ PCIPBAC_mrm_m = 0x00001000, -+ PCIPBAC_trp_b = 13, -+ PCIPBAC_trp_m = 0x00002000, -+ -+ PCFG40_trdyTimeout_b = 0, -+ PCFG40_trdyTimeout_m = 0x000000ff, -+ PCFG40_retryLim_b = 8, -+ PCFG40_retryLim_m = 0x0000ff00, -+}; -+ -+/******************************************************************************* -+ * -+ * PCI Local Base Address [0|1|2|3] Register -+ * -+ ******************************************************************************/ -+enum { -+ PCILBA_baddr_b = 0, // In PCI_t -> pcilba [] .a -+ PCILBA_baddr_m = 0xffffff00, -+} ; -+/******************************************************************************* -+ * -+ * PCI Local Base Address Control Register -+ * -+ ******************************************************************************/ -+enum { -+ PCILBAC_msi_b = 0, // In pPci->pcilba[i].c -+ PCILBAC_msi_m = 0x00000001, -+ PCILBAC_msi_mem_v = 0, -+ PCILBAC_msi_io_v = 1, -+ PCILBAC_size_b = 2, // In pPci->pcilba[i].c -+ PCILBAC_size_m = 0x0000007c, -+ PCILBAC_sb_b = 7, // In pPci->pcilba[i].c -+ PCILBAC_sb_m = 0x00000080, -+ PCILBAC_rt_b = 8, // In pPci->pcilba[i].c -+ PCILBAC_rt_m = 0x00000100, -+ PCILBAC_rt_noprefetch_v = 0, // mem read -+ PCILBAC_rt_prefetch_v = 1, // mem readline -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI Local Base Address [0|1|2|3] Mapping Register -+ * -+ ******************************************************************************/ -+enum { -+ PCILBAM_maddr_b = 8, -+ PCILBAM_maddr_m = 0xffffff00, -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI Decoupled Access Control Register -+ * -+ ******************************************************************************/ -+enum { -+ PCIDAC_den_b = 0, -+ PCIDAC_den_m = 0x00000001, -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI Decoupled Access Status Register -+ * -+ ******************************************************************************/ -+enum { -+ PCIDAS_d_b = 0, -+ PCIDAS_d_m = 0x00000001, -+ PCIDAS_b_b = 1, -+ PCIDAS_b_m = 0x00000002, -+ PCIDAS_e_b = 2, -+ PCIDAS_e_m = 0x00000004, -+ PCIDAS_ofe_b = 3, -+ PCIDAS_ofe_m = 0x00000008, -+ PCIDAS_off_b = 4, -+ PCIDAS_off_m = 0x00000010, -+ PCIDAS_ife_b = 5, -+ PCIDAS_ife_m = 0x00000020, -+ PCIDAS_iff_b = 6, -+ PCIDAS_iff_m = 0x00000040, -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI DMA Channel 8 Configuration Register -+ * -+ ******************************************************************************/ -+enum -+{ -+ PCIDMA8C_mbs_b = 0, // Maximum Burst Size. -+ PCIDMA8C_mbs_m = 0x00000fff, // { pcidma8c } -+ PCIDMA8C_our_b = 12, // Optimize Unaligned Burst Reads. -+ PCIDMA8C_our_m = 0x00001000, // { pcidma8c } -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI DMA Channel 9 Configuration Register -+ * -+ ******************************************************************************/ -+enum -+{ -+ PCIDMA9C_mbs_b = 0, // Maximum Burst Size. -+ PCIDMA9C_mbs_m = 0x00000fff, // { pcidma9c } -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI to Memory(DMA Channel 8) AND Memory to PCI DMA(DMA Channel 9)Descriptors -+ * -+ ******************************************************************************/ -+enum { -+ PCIDMAD_pt_b = 22, // in DEVCMD field (descriptor) -+ PCIDMAD_pt_m = 0x00c00000, // preferred transaction field -+ // These are for reads (DMA channel 8) -+ PCIDMAD_devcmd_mr_v = 0, //memory read -+ PCIDMAD_devcmd_mrl_v = 1, //memory read line -+ PCIDMAD_devcmd_mrm_v = 2, //memory read multiple -+ PCIDMAD_devcmd_ior_v = 3, //I/O read -+ // These are for writes (DMA channel 9) -+ PCIDMAD_devcmd_mw_v = 0, //memory write -+ PCIDMAD_devcmd_mwi_v = 1, //memory write invalidate -+ PCIDMAD_devcmd_iow_v = 3, //I/O write -+ -+ // Swap byte field applies to both DMA channel 8 and 9 -+ PCIDMAD_sb_b = 24, // in DEVCMD field (descriptor) -+ PCIDMAD_sb_m = 0x01000000, // swap byte field -+} ; -+ -+ -+/******************************************************************************* -+ * -+ * PCI Target Control Register -+ * -+ ******************************************************************************/ -+enum -+{ -+ PCITC_rtimer_b = 0, // In PCITC_t -> pcitc -+ PCITC_rtimer_m = 0x000000ff, -+ PCITC_dtimer_b = 8, // In PCITC_t -> pcitc -+ PCITC_dtimer_m = 0x0000ff00, -+ PCITC_rdr_b = 18, // In PCITC_t -> pcitc -+ PCITC_rdr_m = 0x00040000, -+ PCITC_ddt_b = 19, // In PCITC_t -> pcitc -+ PCITC_ddt_m = 0x00080000, -+} ; -+/******************************************************************************* -+ * -+ * PCI messaging unit [applies to both inbound and outbound registers ] -+ * -+ ******************************************************************************/ -+enum -+{ -+ PCIM_m0_b = 0, // In PCIM_t -> {pci{iic,iim,ioic,ioim}} -+ PCIM_m0_m = 0x00000001, // inbound or outbound message 0 -+ PCIM_m1_b = 1, // In PCIM_t -> {pci{iic,iim,ioic,ioim}} -+ PCIM_m1_m = 0x00000002, // inbound or outbound message 1 -+ PCIM_db_b = 2, // In PCIM_t -> {pci{iic,iim,ioic,ioim}} -+ PCIM_db_m = 0x00000004, // inbound or outbound doorbell -+}; -+ -+ -+ -+ -+ -+ -+#define PCI_MSG_VirtualAddress 0xB8088010 -+#define rc32434_pci ((volatile PCI_t) PCI0_VirtualAddress) -+#define rc32434_pci_msg ((volatile PCIM_t) PCI_MSG_VirtualAddress) -+ -+#define PCIM_SHFT 0x6 -+#define PCIM_BIT_LEN 0x7 -+#define PCIM_H_EA 0x3 -+#define PCIM_H_IA_FIX 0x4 -+#define PCIM_H_IA_RR 0x5 -+#if 0 -+#define PCI_ADDR_START 0x13000000 -+#endif -+ -+#define PCI_ADDR_START 0x50000000 -+ -+#define CPUTOPCI_MEM_WIN 0x02000000 -+#define CPUTOPCI_IO_WIN 0x00100000 -+#define PCILBA_SIZE_SHFT 2 -+#define PCILBA_SIZE_MASK 0x1F -+#define SIZE_256MB 0x1C -+#define SIZE_128MB 0x1B -+#define SIZE_64MB 0x1A -+#define SIZE_32MB 0x19 -+#define SIZE_16MB 0x18 -+#define SIZE_4MB 0x16 -+#define SIZE_2MB 0x15 -+#define SIZE_1MB 0x14 -+#define KORINA_CONFIG0_ADDR 0x80000000 -+#define KORINA_CONFIG1_ADDR 0x80000004 -+#define KORINA_CONFIG2_ADDR 0x80000008 -+#define KORINA_CONFIG3_ADDR 0x8000000C -+#define KORINA_CONFIG4_ADDR 0x80000010 -+#define KORINA_CONFIG5_ADDR 0x80000014 -+#define KORINA_CONFIG6_ADDR 0x80000018 -+#define KORINA_CONFIG7_ADDR 0x8000001C -+#define KORINA_CONFIG8_ADDR 0x80000020 -+#define KORINA_CONFIG9_ADDR 0x80000024 -+#define KORINA_CONFIG10_ADDR 0x80000028 -+#define KORINA_CONFIG11_ADDR 0x8000002C -+#define KORINA_CONFIG12_ADDR 0x80000030 -+#define KORINA_CONFIG13_ADDR 0x80000034 -+#define KORINA_CONFIG14_ADDR 0x80000038 -+#define KORINA_CONFIG15_ADDR 0x8000003C -+#define KORINA_CONFIG16_ADDR 0x80000040 -+#define KORINA_CONFIG17_ADDR 0x80000044 -+#define KORINA_CONFIG18_ADDR 0x80000048 -+#define KORINA_CONFIG19_ADDR 0x8000004C -+#define KORINA_CONFIG20_ADDR 0x80000050 -+#define KORINA_CONFIG21_ADDR 0x80000054 -+#define KORINA_CONFIG22_ADDR 0x80000058 -+#define KORINA_CONFIG23_ADDR 0x8000005C -+#define KORINA_CONFIG24_ADDR 0x80000060 -+#define KORINA_CONFIG25_ADDR 0x80000064 -+#define KORINA_CMD (PCFG04_command_ioena_m | \ -+ PCFG04_command_memena_m | \ -+ PCFG04_command_bmena_m | \ -+ PCFG04_command_mwinv_m | \ -+ PCFG04_command_parena_m | \ -+ PCFG04_command_serrena_m ) -+ -+#define KORINA_STAT (PCFG04_status_mdpe_m | \ -+ PCFG04_status_sta_m | \ -+ PCFG04_status_rta_m | \ -+ PCFG04_status_rma_m | \ -+ PCFG04_status_sse_m | \ -+ PCFG04_status_pe_m) -+ -+#define KORINA_CNFG1 ((KORINA_STAT<<16)|KORINA_CMD) -+ -+#define KORINA_REVID 0 -+#define KORINA_CLASS_CODE 0 -+#define KORINA_CNFG2 ((KORINA_CLASS_CODE<<8) | \ -+ KORINA_REVID) -+ -+#define KORINA_CACHE_LINE_SIZE 4 -+#define KORINA_MASTER_LAT 0x3c -+#define KORINA_HEADER_TYPE 0 -+#define KORINA_BIST 0 -+ -+#define KORINA_CNFG3 ((KORINA_BIST << 24) | \ -+ (KORINA_HEADER_TYPE<<16) | \ -+ (KORINA_MASTER_LAT<<8) | \ -+ KORINA_CACHE_LINE_SIZE ) -+ -+#define KORINA_BAR0 0x00000008 /* 128 MB Memory */ -+#define KORINA_BAR1 0x18800001 /* 1 MB IO */ -+#define KORINA_BAR2 0x18000001 /* 2 MB IO window for Korina -+ internal Registers */ -+#define KORINA_BAR3 0x48000008 /* Spare 128 MB Memory */ -+ -+#define KORINA_CNFG4 KORINA_BAR0 -+#define KORINA_CNFG5 KORINA_BAR1 -+#define KORINA_CNFG6 KORINA_BAR2 -+#define KORINA_CNFG7 KORINA_BAR3 -+ -+#define KORINA_SUBSYS_VENDOR_ID 0x011d -+#define KORINA_SUBSYSTEM_ID 0x0214 -+#define KORINA_CNFG8 0 -+#define KORINA_CNFG9 0 -+#define KORINA_CNFG10 0 -+#define KORINA_CNFG11 ((KORINA_SUBSYS_VENDOR_ID<<16) | \ -+ KORINA_SUBSYSTEM_ID) -+#define KORINA_INT_LINE 1 -+#define KORINA_INT_PIN 1 -+#define KORINA_MIN_GNT 8 -+#define KORINA_MAX_LAT 0x38 -+#define KORINA_CNFG12 0 -+#define KORINA_CNFG13 0 -+#define KORINA_CNFG14 0 -+#define KORINA_CNFG15 ((KORINA_MAX_LAT<<24) | \ -+ (KORINA_MIN_GNT<<16) | \ -+ (KORINA_INT_PIN<<8) | \ -+ KORINA_INT_LINE) -+#define KORINA_RETRY_LIMIT 0x80 -+#define KORINA_TRDY_LIMIT 0x80 -+#define KORINA_CNFG16 ((KORINA_RETRY_LIMIT<<8) | \ -+ KORINA_TRDY_LIMIT) -+#define PCI_PBAxC_R 0x0 -+#define PCI_PBAxC_RL 0x1 -+#define PCI_PBAxC_RM 0x2 -+#define SIZE_SHFT 2 -+ -+#if defined(__MIPSEB__) -+#define KORINA_PBA0C ( PCIPBAC_mrl_m | PCIPBAC_sb_m | \ -+ ((PCI_PBAxC_RM &0x3) << PCIPBAC_mr_b) | \ -+ PCIPBAC_pp_m | \ -+ (SIZE_128MB< control -+ DMAD_count_m = 0x0003ffff, // in DMAD_t -> control -+ DMAD_ds_b = 20, // in DMAD_t -> control -+ DMAD_ds_m = 0x00300000, // in DMAD_t -> control -+ DMAD_ds_extToMem0_v = 0, -+ DMAD_ds_memToExt0_v = 1, -+ DMAD_ds_extToMem1_v = 0, -+ DMAD_ds_memToExt1_v = 1, -+ DMAD_ds_ethRcv0_v = 0, -+ DMAD_ds_ethXmt0_v = 0, -+ DMAD_ds_ethRcv1_v = 0, -+ DMAD_ds_ethXmt2_v = 0, -+ DMAD_ds_memToFifo_v = 0, -+ DMAD_ds_fifoToMem_v = 0, -+ DMAD_ds_rng_de_v = 1,//randomNumberGenerator on LC/DE -+ DMAD_ds_pciToMem_v = 0, -+ DMAD_ds_memToPci_v = 0, -+ DMAD_ds_securityInput_v = 0, -+ DMAD_ds_securityOutput_v = 0, -+ DMAD_ds_rng_se_v = 0,//randomNumberGenerator on SE -+ -+ DMAD_devcmd_b = 22, // in DMAD_t -> control -+ DMAD_devcmd_m = 0x01c00000, // in DMAD_t -> control -+ DMAD_devcmd_byte_v = 0, //memory-to-memory -+ DMAD_devcmd_halfword_v = 1, //memory-to-memory -+ DMAD_devcmd_word_v = 2, //memory-to-memory -+ DMAD_devcmd_2words_v = 3, //memory-to-memory -+ DMAD_devcmd_4words_v = 4, //memory-to-memory -+ DMAD_devcmd_6words_v = 5, //memory-to-memory -+ DMAD_devcmd_8words_v = 6, //memory-to-memory -+ DMAD_devcmd_16words_v = 7, //memory-to-memory -+ DMAD_cof_b = 25, // chain on finished -+ DMAD_cof_m = 0x02000000, // -+ DMAD_cod_b = 26, // chain on done -+ DMAD_cod_m = 0x04000000, // -+ DMAD_iof_b = 27, // interrupt on finished -+ DMAD_iof_m = 0x08000000, // -+ DMAD_iod_b = 28, // interrupt on done -+ DMAD_iod_m = 0x10000000, // -+ DMAD_t_b = 29, // terminated -+ DMAD_t_m = 0x20000000, // -+ DMAD_d_b = 30, // done -+ DMAD_d_m = 0x40000000, // -+ DMAD_f_b = 31, // finished -+ DMAD_f_m = 0x80000000, // -+} ; -+ -+/* -+ * DMA register (within Internal Register Map). -+ */ -+ -+struct DMA_Chan_s -+{ -+ u32 dmac ; // Control. -+ u32 dmas ; // Status. -+ u32 dmasm ; // Mask. -+ u32 dmadptr ; // Descriptor pointer. -+ u32 dmandptr ; // Next descriptor pointer. -+}; -+ -+typedef struct DMA_Chan_s volatile *DMA_Chan_t ; -+ -+//DMA_Channels use DMACH_count instead -+ -+enum -+{ -+ DMAC_run_b = 0, // -+ DMAC_run_m = 0x00000001, // -+ DMAC_dm_b = 1, // done mask -+ DMAC_dm_m = 0x00000002, // -+ DMAC_mode_b = 2, // -+ DMAC_mode_m = 0x0000000c, // -+ DMAC_mode_auto_v = 0, -+ DMAC_mode_burst_v = 1, -+ DMAC_mode_transfer_v = 2, //usually used -+ DMAC_mode_reserved_v = 3, -+ DMAC_a_b = 4, // -+ DMAC_a_m = 0x00000010, // -+ -+ DMAS_f_b = 0, // finished (sticky) -+ DMAS_f_m = 0x00000001, // -+ DMAS_d_b = 1, // done (sticky) -+ DMAS_d_m = 0x00000002, // -+ DMAS_c_b = 2, // chain (sticky) -+ DMAS_c_m = 0x00000004, // -+ DMAS_e_b = 3, // error (sticky) -+ DMAS_e_m = 0x00000008, // -+ DMAS_h_b = 4, // halt (sticky) -+ DMAS_h_m = 0x00000010, // -+ -+ DMASM_f_b = 0, // finished (1=mask) -+ DMASM_f_m = 0x00000001, // -+ DMASM_d_b = 1, // done (1=mask) -+ DMASM_d_m = 0x00000002, // -+ DMASM_c_b = 2, // chain (1=mask) -+ DMASM_c_m = 0x00000004, // -+ DMASM_e_b = 3, // error (1=mask) -+ DMASM_e_m = 0x00000008, // -+ DMASM_h_b = 4, // halt (1=mask) -+ DMASM_h_m = 0x00000010, // -+} ; -+ -+/* -+ * DMA channel definitions -+ */ -+ -+enum -+{ -+ DMACH_extToMem0 = 0, -+ DMACH_memToExt0 = 0, -+ DMACH_extToMem1 = 1, -+ DMACH_memToExt1 = 1, -+ DMACH_ethRcv0 = 2, -+ DMACH_ethXmt0 = 3, -+ DMACH_ethRcv1 = 4, -+ DMACH_ethXmt2 = 5, -+ DMACH_memToFifo = 6, -+ DMACH_fifoToMem = 7, -+ DMACH_rng_de = 7,//randomNumberGenerator on LC/DE -+ DMACH_pciToMem = 8, -+ DMACH_memToPci = 9, -+ DMACH_securityInput = 10, -+ DMACH_securityOutput = 11, -+ DMACH_rng_se = 12, //randomNumberGenerator on SE -+ -+ DMACH_count //must be last -+}; -+ -+ -+typedef struct DMAC_s -+{ -+ struct DMA_Chan_s ch [DMACH_count] ; //use ch[DMACH_] -+} volatile *DMA_t ; -+ -+ -+/* -+ * External DMA parameters -+*/ -+ -+enum -+{ -+ DMADEVCMD_ts_b = 0, // ts field in devcmd -+ DMADEVCMD_ts_m = 0x00000007, // ts field in devcmd -+ DMADEVCMD_ts_byte_v = 0, -+ DMADEVCMD_ts_halfword_v = 1, -+ DMADEVCMD_ts_word_v = 2, -+ DMADEVCMD_ts_2word_v = 3, -+ DMADEVCMD_ts_4word_v = 4, -+ DMADEVCMD_ts_6word_v = 5, -+ DMADEVCMD_ts_8word_v = 6, -+ DMADEVCMD_ts_16word_v = 7 -+}; -+ -+ -+#if 1 // aws - Compatibility. -+# define EXTDMA_ts_b DMADEVCMD_ts_b -+# define EXTDMA_ts_m DMADEVCMD_ts_m -+# define EXTDMA_ts_byte_v DMADEVCMD_ts_byte_v -+# define EXTDMA_ts_halfword_v DMADEVCMD_ts_halfword_v -+# define EXTDMA_ts_word_v DMADEVCMD_ts_word_v -+# define EXTDMA_ts_2word_v DMADEVCMD_ts_2word_v -+# define EXTDMA_ts_4word_v DMADEVCMD_ts_4word_v -+# define EXTDMA_ts_6word_v DMADEVCMD_ts_6word_v -+# define EXTDMA_ts_8word_v DMADEVCMD_ts_8word_v -+# define EXTDMA_ts_16word_v DMADEVCMD_ts_16word_v -+#endif // aws - Compatibility. -+ -+#endif //__IDT_RC32438_DMA_H__ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32438/rc32438_dma_v.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32438/rc32438_dma_v.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32438/rc32438_dma_v.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32438/rc32438_dma_v.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,82 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * DMA operations for IDT RC32438. -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 P. Sadik. -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#ifndef __IDT_RC32438_DMA_V_H__ -+#define __IDT_RC32438_DMA_V_H__ -+#include -+ -+#define DMA_CHAN_OFFSET 0x14 -+#define IS_DMA_USED(X) (((X) & (DMAD_f_m | DMAD_d_m | DMAD_t_m)) != 0) -+#define DMA_COUNT(count) \ -+ ((count) & DMAD_count_m) -+ -+#define DMA_HALT_TIMEOUT 500 -+ -+ -+static inline int rc32438_halt_dma(DMA_Chan_t ch) -+{ -+ int timeout=1; -+ if (rc32438_readl(&ch->dmac) & DMAC_run_m) { -+ rc32438_writel(0, &ch->dmac); -+ -+ for (timeout = DMA_HALT_TIMEOUT; timeout > 0; timeout--) { -+ if (rc32438_readl(&ch->dmas) & DMAS_h_m) { -+ rc32438_writel(0, &ch->dmas); -+ break; -+ } -+ } -+ -+ } -+ -+ return timeout ? 0 : 1; -+} -+ -+ -+ -+ -+static inline void rc32438_start_dma(DMA_Chan_t ch, u32 dma_addr) -+{ -+ rc32438_writel(0, &ch->dmandptr); -+ rc32438_writel(dma_addr, &ch->dmadptr); -+} -+ -+static inline void rc32438_chain_dma(DMA_Chan_t ch, u32 dma_addr) -+{ -+ rc32438_writel(dma_addr, &ch->dmandptr); -+} -+#endif //__IDT_RC32438_DMA_V_H__ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32438/rc32438_eth.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32438/rc32438_eth.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32438/rc32438_eth.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32438/rc32438_eth.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,328 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * Definitions for IDT EB438 ethernet -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 P. Sadik. -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#ifndef __IDT_RC32438_ETH_H__ -+#define __IDT_RC32438_ETH_H__ -+enum -+{ -+ ETH0_PhysicalAddress = 0x18058000, -+ ETH_PhysicalAddress = ETH0_PhysicalAddress, // Default -+ -+ ETH0_VirtualAddress = 0xb8058000, -+ ETH_VirtualAddress = ETH0_VirtualAddress, // Default -+ ETH1_PhysicalAddress = 0x18060000, -+ ETH1_VirtualAddress = 0xb8060000, // Default -+} ; -+ -+typedef struct -+{ -+ u32 ethintfc ; -+ u32 ethfifott ; -+ u32 etharc ; -+ u32 ethhash0 ; -+ u32 ethhash1 ; -+ u32 ethu0 [4] ; // Reserved. -+ u32 ethpfs ; -+ u32 ethmcp ; -+ u32 eth_u1 [10] ; // Reserved. -+ u32 ethspare ; -+ u32 eth_u2 [42] ; // Reserved. -+ u32 ethsal0 ; -+ u32 ethsah0 ; -+ u32 ethsal1 ; -+ u32 ethsah1 ; -+ u32 ethsal2 ; -+ u32 ethsah2 ; -+ u32 ethsal3 ; -+ u32 ethsah3 ; -+ u32 ethrbc ; -+ u32 ethrpc ; -+ u32 ethrupc ; -+ u32 ethrfc ; -+ u32 ethtbc ; -+ u32 ethgpf ; -+ u32 eth_u9 [50] ; // Reserved. -+ u32 ethmac1 ; -+ u32 ethmac2 ; -+ u32 ethipgt ; -+ u32 ethipgr ; -+ u32 ethclrt ; -+ u32 ethmaxf ; -+ u32 eth_u10 ; // Reserved. -+ u32 ethmtest ; -+ u32 miimcfg ; -+ u32 miimcmd ; -+ u32 miimaddr ; -+ u32 miimwtd ; -+ u32 miimrdd ; -+ u32 miimind ; -+ u32 eth_u11 ; // Reserved. -+ u32 eth_u12 ; // Reserved. -+ u32 ethcfsa0 ; -+ u32 ethcfsa1 ; -+ u32 ethcfsa2 ; -+} volatile *ETH_t; -+ -+enum -+{ -+ ETHINTFC_en_b = 0, -+ ETHINTFC_en_m = 0x00000001, -+ ETHINTFC_its_b = 1, -+ ETHINTFC_its_m = 0x00000002, -+ ETHINTFC_rip_b = 2, -+ ETHINTFC_rip_m = 0x00000004, -+ ETHINTFC_jam_b = 3, -+ ETHINTFC_jam_m = 0x00000008, -+ ETHINTFC_ovr_b = 4, -+ ETHINTFC_ovr_m = 0x00000010, -+ ETHINTFC_und_b = 5, -+ ETHINTFC_und_m = 0x00000020, -+ -+ ETHFIFOTT_tth_b = 0, -+ ETHFIFOTT_tth_m = 0x0000007f, -+ -+ ETHARC_pro_b = 0, -+ ETHARC_pro_m = 0x00000001, -+ ETHARC_am_b = 1, -+ ETHARC_am_m = 0x00000002, -+ ETHARC_afm_b = 2, -+ ETHARC_afm_m = 0x00000004, -+ ETHARC_ab_b = 3, -+ ETHARC_ab_m = 0x00000008, -+ -+ ETHSAL_byte5_b = 0, -+ ETHSAL_byte5_m = 0x000000ff, -+ ETHSAL_byte4_b = 8, -+ ETHSAL_byte4_m = 0x0000ff00, -+ ETHSAL_byte3_b = 16, -+ ETHSAL_byte3_m = 0x00ff0000, -+ ETHSAL_byte2_b = 24, -+ ETHSAL_byte2_m = 0xff000000, -+ -+ ETHSAH_byte1_b = 0, -+ ETHSAH_byte1_m = 0x000000ff, -+ ETHSAH_byte0_b = 8, -+ ETHSAH_byte0_m = 0x0000ff00, -+ -+ ETHGPF_ptv_b = 0, -+ ETHGPF_ptv_m = 0x0000ffff, -+ -+ ETHPFS_pfd_b = 0, -+ ETHPFS_pfd_m = 0x00000001, -+ -+ ETHCFSA0_cfsa4_b = 0, -+ ETHCFSA0_cfsa4_m = 0x000000ff, -+ ETHCFSA0_cfsa5_b = 8, -+ ETHCFSA0_cfsa5_m = 0x0000ff00, -+ -+ ETHCFSA1_cfsa2_b = 0, -+ ETHCFSA1_cfsa2_m = 0x000000ff, -+ ETHCFSA1_cfsa3_b = 8, -+ ETHCFSA1_cfsa3_m = 0x0000ff00, -+ -+ ETHCFSA2_cfsa0_b = 0, -+ ETHCFSA2_cfsa0_m = 0x000000ff, -+ ETHCFSA2_cfsa1_b = 8, -+ ETHCFSA2_cfsa1_m = 0x0000ff00, -+ -+ ETHMAC1_re_b = 0, -+ ETHMAC1_re_m = 0x00000001, -+ ETHMAC1_paf_b = 1, -+ ETHMAC1_paf_m = 0x00000002, -+ ETHMAC1_rfc_b = 2, -+ ETHMAC1_rfc_m = 0x00000004, -+ ETHMAC1_tfc_b = 3, -+ ETHMAC1_tfc_m = 0x00000008, -+ ETHMAC1_lb_b = 4, -+ ETHMAC1_lb_m = 0x00000010, -+ ETHMAC1_mr_b = 31, -+ ETHMAC1_mr_m = 0x80000000, -+ -+ ETHMAC2_fd_b = 0, -+ ETHMAC2_fd_m = 0x00000001, -+ ETHMAC2_flc_b = 1, -+ ETHMAC2_flc_m = 0x00000002, -+ ETHMAC2_hfe_b = 2, -+ ETHMAC2_hfe_m = 0x00000004, -+ ETHMAC2_dc_b = 3, -+ ETHMAC2_dc_m = 0x00000008, -+ ETHMAC2_cen_b = 4, -+ ETHMAC2_cen_m = 0x00000010, -+ ETHMAC2_pe_b = 5, -+ ETHMAC2_pe_m = 0x00000020, -+ ETHMAC2_vpe_b = 6, -+ ETHMAC2_vpe_m = 0x00000040, -+ ETHMAC2_ape_b = 7, -+ ETHMAC2_ape_m = 0x00000080, -+ ETHMAC2_ppe_b = 8, -+ ETHMAC2_ppe_m = 0x00000100, -+ ETHMAC2_lpe_b = 9, -+ ETHMAC2_lpe_m = 0x00000200, -+ ETHMAC2_nb_b = 12, -+ ETHMAC2_nb_m = 0x00001000, -+ ETHMAC2_bp_b = 13, -+ ETHMAC2_bp_m = 0x00002000, -+ ETHMAC2_ed_b = 14, -+ ETHMAC2_ed_m = 0x00004000, -+ -+ ETHIPGT_ipgt_b = 0, -+ ETHIPGT_ipgt_m = 0x0000007f, -+ -+ ETHIPGR_ipgr2_b = 0, -+ ETHIPGR_ipgr2_m = 0x0000007f, -+ ETHIPGR_ipgr1_b = 8, -+ ETHIPGR_ipgr1_m = 0x00007f00, -+ -+ ETHCLRT_maxret_b = 0, -+ ETHCLRT_maxret_m = 0x0000000f, -+ ETHCLRT_colwin_b = 8, -+ ETHCLRT_colwin_m = 0x00003f00, -+ -+ ETHMAXF_maxf_b = 0, -+ ETHMAXF_maxf_m = 0x0000ffff, -+ -+ ETHMTEST_tb_b = 2, -+ ETHMTEST_tb_m = 0x00000004, -+ -+ ETHMCP_div_b = 0, -+ ETHMCP_div_m = 0x000000ff, -+ -+ MIIMCFG_rsv_b = 0, -+ MIIMCFG_rsv_m = 0x0000000c, -+ -+ MIIMCMD_rd_b = 0, -+ MIIMCMD_rd_m = 0x00000001, -+ MIIMCMD_scn_b = 1, -+ MIIMCMD_scn_m = 0x00000002, -+ -+ MIIMADDR_regaddr_b = 0, -+ MIIMADDR_regaddr_m = 0x0000001f, -+ MIIMADDR_phyaddr_b = 8, -+ MIIMADDR_phyaddr_m = 0x00001f00, -+ -+ MIIMWTD_wdata_b = 0, -+ MIIMWTD_wdata_m = 0x0000ffff, -+ -+ MIIMRDD_rdata_b = 0, -+ MIIMRDD_rdata_m = 0x0000ffff, -+ -+ MIIMIND_bsy_b = 0, -+ MIIMIND_bsy_m = 0x00000001, -+ MIIMIND_scn_b = 1, -+ MIIMIND_scn_m = 0x00000002, -+ MIIMIND_nv_b = 2, -+ MIIMIND_nv_m = 0x00000004, -+ -+} ; -+ -+/* -+ * Values for the DEVCS field of the Ethernet DMA Rx and Tx descriptors. -+ */ -+enum -+{ -+ ETHRX_fd_b = 0, -+ ETHRX_fd_m = 0x00000001, -+ ETHRX_ld_b = 1, -+ ETHRX_ld_m = 0x00000002, -+ ETHRX_rok_b = 2, -+ ETHRX_rok_m = 0x00000004, -+ ETHRX_fm_b = 3, -+ ETHRX_fm_m = 0x00000008, -+ ETHRX_mp_b = 4, -+ ETHRX_mp_m = 0x00000010, -+ ETHRX_bp_b = 5, -+ ETHRX_bp_m = 0x00000020, -+ ETHRX_vlt_b = 6, -+ ETHRX_vlt_m = 0x00000040, -+ ETHRX_cf_b = 7, -+ ETHRX_cf_m = 0x00000080, -+ ETHRX_ovr_b = 8, -+ ETHRX_ovr_m = 0x00000100, -+ ETHRX_crc_b = 9, -+ ETHRX_crc_m = 0x00000200, -+ ETHRX_cv_b = 10, -+ ETHRX_cv_m = 0x00000400, -+ ETHRX_db_b = 11, -+ ETHRX_db_m = 0x00000800, -+ ETHRX_le_b = 12, -+ ETHRX_le_m = 0x00001000, -+ ETHRX_lor_b = 13, -+ ETHRX_lor_m = 0x00002000, -+ ETHRX_ces_b = 14, -+ ETHRX_ces_m = 0x00004000, -+ ETHRX_length_b = 16, -+ ETHRX_length_m = 0xffff0000, -+ -+ ETHTX_fd_b = 0, -+ ETHTX_fd_m = 0x00000001, -+ ETHTX_ld_b = 1, -+ ETHTX_ld_m = 0x00000002, -+ ETHTX_oen_b = 2, -+ ETHTX_oen_m = 0x00000004, -+ ETHTX_pen_b = 3, -+ ETHTX_pen_m = 0x00000008, -+ ETHTX_cen_b = 4, -+ ETHTX_cen_m = 0x00000010, -+ ETHTX_hen_b = 5, -+ ETHTX_hen_m = 0x00000020, -+ ETHTX_tok_b = 6, -+ ETHTX_tok_m = 0x00000040, -+ ETHTX_mp_b = 7, -+ ETHTX_mp_m = 0x00000080, -+ ETHTX_bp_b = 8, -+ ETHTX_bp_m = 0x00000100, -+ ETHTX_und_b = 9, -+ ETHTX_und_m = 0x00000200, -+ ETHTX_of_b = 10, -+ ETHTX_of_m = 0x00000400, -+ ETHTX_ed_b = 11, -+ ETHTX_ed_m = 0x00000800, -+ ETHTX_ec_b = 12, -+ ETHTX_ec_m = 0x00001000, -+ ETHTX_lc_b = 13, -+ ETHTX_lc_m = 0x00002000, -+ ETHTX_td_b = 14, -+ ETHTX_td_m = 0x00004000, -+ ETHTX_crc_b = 15, -+ ETHTX_crc_m = 0x00008000, -+ ETHTX_le_b = 16, -+ ETHTX_le_m = 0x00010000, -+ ETHTX_cc_b = 17, -+ ETHTX_cc_m = 0x001E0000, -+} ; -+#endif //__IDT_RC32438_ETH_H__ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32438/rc32438_eth_v.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32438/rc32438_eth_v.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32438/rc32438_eth_v.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32438/rc32438_eth_v.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,72 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * macros for IDT EB438 ethernet -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 P. Sadik. -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#ifndef __IDT_RC32438_ETH_V_H__ -+#define __IDT_RC32438_ETH_V_H__ -+#include -+ -+#define IS_TX_TOK(X) (((X) & (1<> ETHTX_tok_b ) /* Transmit Okay */ -+#define IS_TX_MP(X) (((X) & (1<> ETHTX_mp_b ) /* Multicast */ -+#define IS_TX_BP(X) (((X) & (1<> ETHTX_bp_b ) /* Broadcast */ -+#define IS_TX_UND_ERR(X) (((X) & (1<> ETHTX_und_b ) /* Transmit FIFO Underflow */ -+#define IS_TX_OF_ERR(X) (((X) & (1<> ETHTX_of_b ) /* Oversized frame */ -+#define IS_TX_ED_ERR(X) (((X) & (1<> ETHTX_ed_b ) /* Excessive deferral */ -+#define IS_TX_EC_ERR(X) (((X) & (1<> ETHTX_ec_b) /* Excessive collisions */ -+#define IS_TX_LC_ERR(X) (((X) & (1<> ETHTX_lc_b ) /* Late Collision */ -+#define IS_TX_TD_ERR(X) (((X) & (1<> ETHTX_td_b ) /* Transmit deferred*/ -+#define IS_TX_CRC_ERR(X) (((X) & (1<> ETHTX_crc_b ) /* CRC Error */ -+#define IS_TX_LE_ERR(X) (((X) & (1<> ETHTX_le_b ) /* Length Error */ -+ -+#define TX_COLLISION_COUNT(X) (((X) & ETHTX_cc_m)>>ETHTX_cc_b) /* Collision Count */ -+ -+#define IS_RCV_ROK(X) (((X) & (1<> ETHRX_rok_b) /* Receive Okay */ -+#define IS_RCV_FM(X) (((X) & (1<> ETHRX_fm_b) /* Is Filter Match */ -+#define IS_RCV_MP(X) (((X) & (1<> ETHRX_mp_b) /* Is it MP */ -+#define IS_RCV_BP(X) (((X) & (1<> ETHRX_bp_b) /* Is it BP */ -+#define IS_RCV_VLT(X) (((X) & (1<> ETHRX_vlt_b) /* VLAN Tag Detect */ -+#define IS_RCV_CF(X) (((X) & (1<> ETHRX_cf_b) /* Control Frame */ -+#define IS_RCV_OVR_ERR(X) (((X) & (1<> ETHRX_ovr_b) /* Receive Overflow */ -+#define IS_RCV_CRC_ERR(X) (((X) & (1<> ETHRX_crc_b) /* CRC Error */ -+#define IS_RCV_CV_ERR(X) (((X) & (1<> ETHRX_cv_b) /* Code Violation */ -+#define IS_RCV_DB_ERR(X) (((X) & (1<> ETHRX_db_b) /* Dribble Bits */ -+#define IS_RCV_LE_ERR(X) (((X) & (1<> ETHRX_le_b) /* Length error */ -+#define IS_RCV_LOR_ERR(X) (((X) & (1<> ETHRX_lor_b) /* Length Out of Range */ -+#define IS_RCV_CES_ERR(X) (((X) & (1<> ETHRX_ces_b) /* Preamble error */ -+#define RCVPKT_LENGTH(X) (((X) & ETHRX_length_m) >> ETHRX_length_b) /* Length of the received packet */ -+ -+#endif //__IDT_RC32438_ETH_V_H__ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32438/rc32438_gpio.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32438/rc32438_gpio.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32438/rc32438_gpio.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32438/rc32438_gpio.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,257 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * Definitions for IDT RC32438 GPIO. -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 P. Sadik. -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+#ifndef __IDT_RC32438_GPIO_H__ -+#define __IDT_RC32438_GPIO_H__ -+enum -+{ -+ GPIO0_PhysicalAddress = 0x18048000, -+ GPIO_PhysicalAddress = GPIO0_PhysicalAddress, // Default -+ -+ GPIO0_VirtualAddress = 0xb8048000, -+ GPIO_VirtualAddress = GPIO0_VirtualAddress, // Default -+} ; -+ -+typedef struct -+{ -+ u32 gpiofunc; /* GPIO Function Register -+ * gpiofunc[x]==0 bit = gpio -+ * func[x]==1 bit = altfunc -+ */ -+ u32 gpiocfg; /* GPIO Configuration Register -+ * gpiocfg[x]==0 bit = input -+ * gpiocfg[x]==1 bit = output -+ */ -+ u32 gpiod; /* GPIO Data Register -+ * gpiod[x] read/write gpio pinX status -+ */ -+ u32 gpioilevel; /* GPIO Interrupt Status Register -+ * interrupt level (see gpioistat) -+ */ -+ u32 gpioistat; /* Gpio Interrupt Status Register -+ * istat[x] = (gpiod[x] == level[x]) -+ * cleared in ISR (STICKY bits) -+ */ -+ u32 gpionmien; /* GPIO Non-maskable Interrupt Enable Register */ -+} volatile * GPIO_t ; -+ -+typedef enum -+{ -+ GPIO_gpio_v = 0, // gpiofunc use pin as GPIO. -+ GPIO_alt_v = 1, // gpiofunc use pin as alt. -+ GPIO_input_v = 0, // gpiocfg use pin as input. -+ GPIO_output_v = 1, // gpiocfg use pin as output. -+ GPIO_pin0_b = 0, -+ GPIO_pin0_m = 0x00000001, -+ GPIO_pin1_b = 1, -+ GPIO_pin1_m = 0x00000002, -+ GPIO_pin2_b = 2, -+ GPIO_pin2_m = 0x00000004, -+ GPIO_pin3_b = 3, -+ GPIO_pin3_m = 0x00000008, -+ GPIO_pin4_b = 4, -+ GPIO_pin4_m = 0x00000010, -+ GPIO_pin5_b = 5, -+ GPIO_pin5_m = 0x00000020, -+ GPIO_pin6_b = 6, -+ GPIO_pin6_m = 0x00000040, -+ GPIO_pin7_b = 7, -+ GPIO_pin7_m = 0x00000080, -+ GPIO_pin8_b = 8, -+ GPIO_pin8_m = 0x00000100, -+ GPIO_pin9_b = 9, -+ GPIO_pin9_m = 0x00000200, -+ GPIO_pin10_b = 10, -+ GPIO_pin10_m = 0x00000400, -+ GPIO_pin11_b = 11, -+ GPIO_pin11_m = 0x00000800, -+ GPIO_pin12_b = 12, -+ GPIO_pin12_m = 0x00001000, -+ GPIO_pin13_b = 13, -+ GPIO_pin13_m = 0x00002000, -+ GPIO_pin14_b = 14, -+ GPIO_pin14_m = 0x00004000, -+ GPIO_pin15_b = 15, -+ GPIO_pin15_m = 0x00008000, -+ GPIO_pin16_b = 16, -+ GPIO_pin16_m = 0x00010000, -+ GPIO_pin17_b = 17, -+ GPIO_pin17_m = 0x00020000, -+ GPIO_pin18_b = 18, -+ GPIO_pin18_m = 0x00040000, -+ GPIO_pin19_b = 19, -+ GPIO_pin19_m = 0x00080000, -+ GPIO_pin20_b = 20, -+ GPIO_pin20_m = 0x00100000, -+ GPIO_pin21_b = 21, -+ GPIO_pin21_m = 0x00200000, -+ GPIO_pin22_b = 22, -+ GPIO_pin22_m = 0x00400000, -+ GPIO_pin23_b = 23, -+ GPIO_pin23_m = 0x00800000, -+ GPIO_pin24_b = 24, -+ GPIO_pin24_m = 0x01000000, -+ GPIO_pin25_b = 25, -+ GPIO_pin25_m = 0x02000000, -+ GPIO_pin26_b = 26, -+ GPIO_pin26_m = 0x04000000, -+ GPIO_pin27_b = 27, -+ GPIO_pin27_m = 0x08000000, -+ GPIO_pin28_b = 28, -+ GPIO_pin28_m = 0x10000000, -+ GPIO_pin29_b = 29, -+ GPIO_pin29_m = 0x20000000, -+ GPIO_pin30_b = 30, -+ GPIO_pin30_m = 0x40000000, -+ GPIO_pin31_b = 31, -+ GPIO_pin31_m = 0x80000000, -+ -+// Alternate function pins. Corrsponding gpiofunc bit set to GPIO_alt_v. -+ -+ GPIO_u0sout_b = GPIO_pin0_b, // UART 0 serial out. -+ GPIO_u0sout_m = GPIO_pin0_m, -+ GPIO_u0sout_cfg_v = GPIO_output_v, -+ GPIO_u0sinp_b = GPIO_pin1_b, // UART 0 serial in. -+ GPIO_u0sinp_m = GPIO_pin1_m, -+ GPIO_u0sinp_cfg_v = GPIO_input_v, -+ GPIO_u0rin_b = GPIO_pin2_b, // UART 0 ring indic. -+ GPIO_u0rin_m = GPIO_pin2_m, -+ GPIO_u0rin_cfg_v = GPIO_input_v, -+ GPIO_u0dcdn_b = GPIO_pin3_b, // UART 0 data carr.det. -+ GPIO_u0dcdn_m = GPIO_pin3_m, -+ GPIO_u0dcdn_cfg_v = GPIO_input_v, -+ GPIO_u0dtrn_b = GPIO_pin4_b, // UART 0 data term rdy. -+ GPIO_u0dtrn_m = GPIO_pin4_m, -+ GPIO_u0dtrn_cfg_v = GPIO_output_v, -+ GPIO_u0dsrn_b = GPIO_pin5_b, // UART 0 data set rdy. -+ GPIO_u0dsrn_m = GPIO_pin5_m, -+ GPIO_u0dsrn_cfg_v = GPIO_input_v, -+ GPIO_u0rtsn_b = GPIO_pin6_b, // UART 0 req. to send. -+ GPIO_u0rtsn_m = GPIO_pin6_m, -+ GPIO_u0rtsn_cfg_v = GPIO_output_v, -+ GPIO_u0ctsn_b = GPIO_pin7_b, // UART 0 clear to send. -+ GPIO_u0ctsn_m = GPIO_pin7_m, -+ GPIO_u0ctsn_cfg_v = GPIO_input_v, -+ -+ GPIO_u1sout_b = GPIO_pin8_b, // UART 1 serial out. -+ GPIO_u1sout_m = GPIO_pin8_m, -+ GPIO_u1sout_cfg_v = GPIO_output_v, -+ GPIO_u1sinp_b = GPIO_pin9_b, // UART 1 serial in. -+ GPIO_u1sinp_m = GPIO_pin9_m, -+ GPIO_u1sinp_cfg_v = GPIO_input_v, -+ GPIO_u1dtrn_b = GPIO_pin10_b, // UART 1 data term rdy. -+ GPIO_u1dtrn_m = GPIO_pin10_m, -+ GPIO_u1dtrn_cfg_v = GPIO_output_v, -+ GPIO_u1dsrn_b = GPIO_pin11_b, // UART 1 data set rdy. -+ GPIO_u1dsrn_m = GPIO_pin11_m, -+ GPIO_u1dsrn_cfg_v = GPIO_input_v, -+ GPIO_u1rtsn_b = GPIO_pin12_b, // UART 1 req. to send. -+ GPIO_u1rtsn_m = GPIO_pin12_m, -+ GPIO_u1rtsn_cfg_v = GPIO_output_v, -+ GPIO_u1ctsn_b = GPIO_pin13_b, // UART 1 clear to send. -+ GPIO_u1ctsn_m = GPIO_pin13_m, -+ GPIO_u1ctsn_cfg_v = GPIO_input_v, -+ -+ GPIO_dmareqn0_b = GPIO_pin14_b, // Ext. DMA 0 request -+ GPIO_dmareqn0_m = GPIO_pin14_m, -+ GPIO_dmareqn0_cfg_v = GPIO_input_v, -+ -+ GPIO_dmareqn1_b = GPIO_pin15_b, // Ext. DMA 1 request -+ GPIO_dmareqn1_m = GPIO_pin15_m, -+ GPIO_dmareqn1_cfg_v = GPIO_input_v, -+ -+ GPIO_dmadonen0_b = GPIO_pin16_b, // Ext. DMA 0 done -+ GPIO_dmadonen0_m = GPIO_pin16_m, -+ GPIO_dmadonen0_cfg_v = GPIO_input_v, -+ -+ GPIO_dmadonen1_b = GPIO_pin17_b, // Ext. DMA 1 done -+ GPIO_dmadonen1_m = GPIO_pin17_m, -+ GPIO_dmadonen1_cfg_v = GPIO_input_v, -+ -+ GPIO_dmafinn0_b = GPIO_pin18_b, // Ext. DMA 0 finished -+ GPIO_dmafinn0_m = GPIO_pin18_m, -+ GPIO_dmafinn0_cfg_v = GPIO_output_v, -+ -+ GPIO_dmafinn1_b = GPIO_pin19_b, // Ext. DMA 1 finished -+ GPIO_dmafinn1_m = GPIO_pin19_m, -+ GPIO_dmafinn1_cfg_v = GPIO_output_v, -+ -+ GPIO_maddr22_b = GPIO_pin20_b, // M&P bus bit 22. -+ GPIO_maddr22_m = GPIO_pin20_m, -+ GPIO_maddr22_cfg_v = GPIO_output_v, -+ -+ GPIO_maddr23_b = GPIO_pin21_b, // M&P bus bit 23. -+ GPIO_maddr23_m = GPIO_pin21_m, -+ GPIO_maddr23_cfg_v = GPIO_output_v, -+ -+ GPIO_maddr24_b = GPIO_pin22_b, // M&P bus bit 24. -+ GPIO_maddr24_m = GPIO_pin22_m, -+ GPIO_maddr24_cfg_v = GPIO_output_v, -+ -+ GPIO_maddr25_b = GPIO_pin23_b, // M&P bus bit 25. -+ GPIO_maddr25_m = GPIO_pin23_m, -+ GPIO_maddr25_cfg_v = GPIO_output_v, -+ -+ GPIO_afspare6_b = GPIO_pin24_b, // reserved. -+ GPIO_afspare6_m = GPIO_pin24_m, -+ GPIO_afspare6_cfg_v = GPIO_input_v, -+ GPIO_afspare5_b = GPIO_pin25_b, // reserved. -+ GPIO_afspare5_m = GPIO_pin25_m, -+ GPIO_afspare5_cfg_v = GPIO_input_v, -+ GPIO_afspare4_b = GPIO_pin26_b, // reserved. -+ GPIO_afspare4_m = GPIO_pin26_m, -+ GPIO_afspare4_cfg_v = GPIO_input_v, -+ GPIO_afspare3_b = GPIO_pin27_b, // reserved. -+ GPIO_afspare3_m = GPIO_pin27_m, -+ GPIO_afspare3_cfg_v = GPIO_input_v, -+ GPIO_afspare2_b = GPIO_pin28_b, // reserved. -+ GPIO_afspare2_m = GPIO_pin28_m, -+ GPIO_afspare2_cfg_v = GPIO_input_v, -+ GPIO_afspare1_b = GPIO_pin29_b, // reserved. -+ GPIO_afspare1_m = GPIO_pin29_m, -+ GPIO_afspare1_cfg_v = GPIO_input_v, -+ -+ GPIO_pcimuintn_b = GPIO_pin30_b, // PCI messaging int. -+ GPIO_pcimuintn_m = GPIO_pin30_m, -+ GPIO_pcimuintn_cfg_v = GPIO_output_v, -+ -+ GPIO_rngclk_b = GPIO_pin31_b, // RNG external clock -+ GPIO_rngclk_m = GPIO_pin31_m, -+ GPIO_rncclk_cfg_v = GPIO_input_v, -+} GPIO_DEFS_t; -+ -+#endif //__IDT_RC32438_GPIO_H__ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32438/rc32438.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32438/rc32438.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32438/rc32438.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32438/rc32438.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,152 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * Definitions for IDT RC32438 CPU. -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 P. Sadik. -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#ifndef __IDT_RC32438_H__ -+#define __IDT_RC32438_H__ -+#include -+#include -+#include -+#include -+ -+#define RC32438_REG_BASE 0x18000000 -+ -+#define interrupt ((volatile INT_t ) INT0_VirtualAddress) -+#define idttimer ((volatile TIM_t) TIM0_VirtualAddress) -+#define idt_gpio ((volatile GPIO_t) GPIO0_VirtualAddress) -+ -+#define IDT_CLOCK_MULT 2 -+#define MIPS_CPU_TIMER_IRQ 7 -+/* Interrupt Controller */ -+#define IC_GROUP0_PEND (RC32438_REG_BASE + 0x38000) -+#define IC_GROUP0_MASK (RC32438_REG_BASE + 0x38008) -+#define IC_GROUP_OFFSET 0x0C -+#define RTC_BASE 0xAC0801FF0 -+ -+#define NUM_INTR_GROUPS 5 -+/* 16550 UARTs */ -+ -+#define GROUP0_IRQ_BASE 8 /* GRP2 IRQ numbers start here */ -+#define GROUP1_IRQ_BASE (GROUP0_IRQ_BASE + 32) /* GRP3 IRQ numbers start here */ -+#define GROUP2_IRQ_BASE (GROUP1_IRQ_BASE + 32) /* GRP4 IRQ numbers start here */ -+#define GROUP3_IRQ_BASE (GROUP2_IRQ_BASE + 32) /* GRP5 IRQ numbers start here */ -+#define GROUP4_IRQ_BASE (GROUP3_IRQ_BASE + 32) -+ -+#ifdef __MIPSEB__ -+#define RC32438_UART0_BASE (RC32438_REG_BASE + 0x50003) -+#define RC32438_UART1_BASE (RC32438_REG_BASE + 0x50023) -+#else -+#define RC32438_UART0_BASE (RC32438_REG_BASE + 0x50000) -+#define RC32438_UART1_BASE (RC32438_REG_BASE + 0x50020) -+#endif -+ -+#define RC32438_UART0_IRQ GROUP3_IRQ_BASE + 0 -+#define RC32438_UART1_IRQ GROUP3_IRQ_BASE + 3 -+ -+#define RC32438_NR_IRQS (GROUP4_IRQ_BASE + 32) -+ -+ -+ -+/* cpu pipeline flush */ -+static inline void rc32438_sync(void) -+{ -+ __asm__ volatile ("sync"); -+} -+ -+static inline void rc32438_sync_udelay(int us) -+{ -+ __asm__ volatile ("sync"); -+ udelay(us); -+} -+ -+static inline void rc32438_sync_delay(int ms) -+{ -+ __asm__ volatile ("sync"); -+ mdelay(ms); -+} -+ -+/* -+ * Macros to access internal RC32438 registers. No byte -+ * swapping should be done when accessing the internal -+ * registers. -+ */ -+ -+#define rc32438_readb __raw_readb -+#define rc32438_readw __raw_readw -+#define rc32438_readl __raw_readl -+ -+#define rc32438_writeb __raw_writeb -+#define rc32438_writew __raw_writew -+#define rc32438_writel __raw_writel -+ -+/* -+ * C access to CLZ and CLO instructions -+ * (count leading zeroes/ones). -+ */ -+static inline int rc32438_clz(unsigned long val) -+{ -+ int ret; -+ __asm__ volatile ( -+ ".set\tnoreorder\n\t" -+ ".set\tnoat\n\t" -+ ".set\tmips32\n\t" -+ "clz\t%0,%1\n\t" -+ ".set\tmips0\n\t" -+ ".set\tat\n\t" -+ ".set\treorder" -+ : "=r" (ret) -+ : "r" (val)); -+ -+ return ret; -+} -+static inline int rc32438_clo(unsigned long val) -+{ -+ int ret; -+ __asm__ volatile ( -+ ".set\tnoreorder\n\t" -+ ".set\tnoat\n\t" -+ ".set\tmips32\n\t" -+ "clo\t%0,%1\n\t" -+ ".set\tmips0\n\t" -+ ".set\tat\n\t" -+ ".set\treorder" -+ : "=r" (ret) -+ : "r" (val)); -+ -+ return ret; -+} -+#endif //__IDT_RC32438_H__ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32438/rc32438_pci.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32438/rc32438_pci.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32438/rc32438_pci.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32438/rc32438_pci.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,510 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * Definitions for IDT RC32438 PCI. -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 P. Sadik -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+enum -+{ -+ PCI0_PhysicalAddress = 0x18080000, -+ PCI_PhysicalAddress = PCI0_PhysicalAddress, -+ -+ PCI0_VirtualAddress = 0xb8080000, -+ PCI_VirtualAddress = PCI0_VirtualAddress, -+} ; -+ -+enum -+{ -+ PCI_LbaCount = 4, // Local base addresses. -+} ; -+ -+typedef struct -+{ -+ u32 a ; // Address. -+ u32 c ; // Control. -+ u32 m ; // mapping. -+} PCI_Map_s ; -+ -+typedef struct -+{ -+ u32 pcic ; -+ u32 pcis ; -+ u32 pcism ; -+ u32 pcicfga ; -+ u32 pcicfgd ; -+ PCI_Map_s pcilba [PCI_LbaCount] ; -+ u32 pcidac ; -+ u32 pcidas ; -+ u32 pcidasm ; -+ u32 pcidad ; -+ u32 pcidma8c ; -+ u32 pcidma9c ; -+ u32 pcitc ; -+} volatile *PCI_t ; -+ -+// PCI messaging unit. -+enum -+{ -+ PCIM_Count = 2, -+} ; -+typedef struct -+{ -+ u32 pciim [PCIM_Count] ; -+ u32 pciom [PCIM_Count] ; -+ u32 pciid ; -+ u32 pciiic ; -+ u32 pciiim ; -+ u32 pciiod ; -+ u32 pciioic ; -+ u32 pciioim ; -+} volatile *PCIM_t ; -+ -+/******************************************************************************* -+ * -+ * PCI Control Register -+ * -+ ******************************************************************************/ -+enum -+{ -+ PCIC_en_b = 0, -+ PCIC_en_m = 0x00000001, -+ PCIC_tnr_b = 1, -+ PCIC_tnr_m = 0x00000002, -+ PCIC_sce_b = 2, -+ PCIC_sce_m = 0x00000004, -+ PCIC_ien_b = 3, -+ PCIC_ien_m = 0x00000008, -+ PCIC_aaa_b = 4, -+ PCIC_aaa_m = 0x00000010, -+ PCIC_eap_b = 5, -+ PCIC_eap_m = 0x00000020, -+ PCIC_pcim_b = 6, -+ PCIC_pcim_m = 0x000001c0, -+ PCIC_pcim_disabled_v = 0, -+ PCIC_pcim_tnr_v = 1, // Satellite - target not ready -+ PCIC_pcim_suspend_v = 2, // Satellite - suspended CPU. -+ PCIC_pcim_extern_v = 3, // Host - external arbiter. -+ PCIC_pcim_fixed_v = 4, // Host - fixed priority arb. -+ PCIC_pcim_roundrobin_v = 5, // Host - round robin priority. -+ PCIC_pcim_reserved6_v = 6, -+ PCIC_pcim_reserved7_v = 7, -+ PCIC_igm_b = 9, -+ PCIC_igm_m = 0x00000200, -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI Status Register -+ * -+ ******************************************************************************/ -+enum { -+ PCIS_eed_b = 0, -+ PCIS_eed_m = 0x00000001, -+ PCIS_wr_b = 1, -+ PCIS_wr_m = 0x00000002, -+ PCIS_nmi_b = 2, -+ PCIS_nmi_m = 0x00000004, -+ PCIS_ii_b = 3, -+ PCIS_ii_m = 0x00000008, -+ PCIS_cwe_b = 4, -+ PCIS_cwe_m = 0x00000010, -+ PCIS_cre_b = 5, -+ PCIS_cre_m = 0x00000020, -+ PCIS_mdpe_b = 6, -+ PCIS_mdpe_m = 0x00000040, -+ PCIS_sta_b = 7, -+ PCIS_sta_m = 0x00000080, -+ PCIS_rta_b = 8, -+ PCIS_rta_m = 0x00000100, -+ PCIS_rma_b = 9, -+ PCIS_rma_m = 0x00000200, -+ PCIS_sse_b = 10, -+ PCIS_sse_m = 0x00000400, -+ PCIS_ose_b = 11, -+ PCIS_ose_m = 0x00000800, -+ PCIS_pe_b = 12, -+ PCIS_pe_m = 0x00001000, -+ PCIS_tae_b = 13, -+ PCIS_tae_m = 0x00002000, -+ PCIS_rle_b = 14, -+ PCIS_rle_m = 0x00004000, -+ PCIS_bme_b = 15, -+ PCIS_bme_m = 0x00008000, -+ PCIS_prd_b = 16, -+ PCIS_prd_m = 0x00010000, -+ PCIS_rip_b = 17, -+ PCIS_rip_m = 0x00020000, -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI Status Mask Register -+ * -+ ******************************************************************************/ -+enum { -+ PCISM_eed_b = 0, -+ PCISM_eed_m = 0x00000001, -+ PCISM_wr_b = 1, -+ PCISM_wr_m = 0x00000002, -+ PCISM_nmi_b = 2, -+ PCISM_nmi_m = 0x00000004, -+ PCISM_ii_b = 3, -+ PCISM_ii_m = 0x00000008, -+ PCISM_cwe_b = 4, -+ PCISM_cwe_m = 0x00000010, -+ PCISM_cre_b = 5, -+ PCISM_cre_m = 0x00000020, -+ PCISM_mdpe_b = 6, -+ PCISM_mdpe_m = 0x00000040, -+ PCISM_sta_b = 7, -+ PCISM_sta_m = 0x00000080, -+ PCISM_rta_b = 8, -+ PCISM_rta_m = 0x00000100, -+ PCISM_rma_b = 9, -+ PCISM_rma_m = 0x00000200, -+ PCISM_sse_b = 10, -+ PCISM_sse_m = 0x00000400, -+ PCISM_ose_b = 11, -+ PCISM_ose_m = 0x00000800, -+ PCISM_pe_b = 12, -+ PCISM_pe_m = 0x00001000, -+ PCISM_tae_b = 13, -+ PCISM_tae_m = 0x00002000, -+ PCISM_rle_b = 14, -+ PCISM_rle_m = 0x00004000, -+ PCISM_bme_b = 15, -+ PCISM_bme_m = 0x00008000, -+ PCISM_prd_b = 16, -+ PCISM_prd_m = 0x00010000, -+ PCISM_rip_b = 17, -+ PCISM_rip_m = 0x00020000, -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI Configuration Address Register -+ * -+ ******************************************************************************/ -+enum { -+ PCICFGA_reg_b = 2, -+ PCICFGA_reg_m = 0x000000fc, -+ PCICFGA_reg_id_v = 0x00>>2, //use PCFGID_ -+ PCICFGA_reg_04_v = 0x04>>2, //use PCFG04_ -+ PCICFGA_reg_08_v = 0x08>>2, //use PCFG08_ -+ PCICFGA_reg_0C_v = 0x0C>>2, //use PCFG0C_ -+ PCICFGA_reg_pba0_v = 0x10>>2, //use PCIPBA_ -+ PCICFGA_reg_pba1_v = 0x14>>2, //use PCIPBA_ -+ PCICFGA_reg_pba2_v = 0x18>>2, //use PCIPBA_ -+ PCICFGA_reg_pba3_v = 0x1c>>2, //use PCIPBA_ -+ PCICFGA_reg_subsystem_v = 0x2c>>2, //use PCFGSS_ -+ PCICFGA_reg_3C_v = 0x3C>>2, //use PCFG3C_ -+ PCICFGA_reg_pba0c_v = 0x44>>2, //use PCIPBAC_ -+ PCICFGA_reg_pba0m_v = 0x48>>2, -+ PCICFGA_reg_pba1c_v = 0x4c>>2, //use PCIPBAC_ -+ PCICFGA_reg_pba1m_v = 0x50>>2, -+ PCICFGA_reg_pba2c_v = 0x54>>2, //use PCIPBAC_ -+ PCICFGA_reg_pba2m_v = 0x58>>2, -+ PCICFGA_reg_pba3c_v = 0x5c>>2, //use PCIPBAC_ -+ PCICFGA_reg_pba3m_v = 0x60>>2, -+ PCICFGA_reg_pmgt_v = 0x64>>2, -+ PCICFGA_func_b = 8, -+ PCICFGA_func_m = 0x00000700, -+ PCICFGA_dev_b = 11, -+ PCICFGA_dev_m = 0x0000f800, -+ PCICFGA_dev_internal_v = 0, -+ PCICFGA_bus_b = 16, -+ PCICFGA_bus_m = 0x00ff0000, -+ PCICFGA_bus_type0_v = 0, //local bus -+ PCICFGA_en_b = 31, // read only -+ PCICFGA_en_m = 0x80000000, -+} ; -+ -+enum { -+ PCFGID_vendor_b = 0, -+ PCFGID_vendor_m = 0x0000ffff, -+ PCFGID_vendor_IDT_v = 0x111d, -+ PCFGID_device_b = 16, -+ PCFGID_device_m = 0xffff0000, -+ PCFGID_device_Acaciade_v = 0x0207, -+ -+ PCFG04_command_ioena_b = 1, -+ PCFG04_command_ioena_m = 0x00000001, -+ PCFG04_command_memena_b = 2, -+ PCFG04_command_memena_m = 0x00000002, -+ PCFG04_command_bmena_b = 3, -+ PCFG04_command_bmena_m = 0x00000004, -+ PCFG04_command_mwinv_b = 5, -+ PCFG04_command_mwinv_m = 0x00000010, -+ PCFG04_command_parena_b = 7, -+ PCFG04_command_parena_m = 0x00000040, -+ PCFG04_command_serrena_b = 9, -+ PCFG04_command_serrena_m = 0x00000100, -+ PCFG04_command_fastbbena_b = 10, -+ PCFG04_command_fastbbena_m = 0x00000200, -+ PCFG04_status_b = 16, -+ PCFG04_status_m = 0xffff0000, -+ PCFG04_status_66MHz_b = 21, // 66 MHz enable -+ PCFG04_status_66MHz_m = 0x00200000, -+ PCFG04_status_fbb_b = 23, -+ PCFG04_status_fbb_m = 0x00800000, -+ PCFG04_status_mdpe_b = 24, -+ PCFG04_status_mdpe_m = 0x01000000, -+ PCFG04_status_dst_b = 25, -+ PCFG04_status_dst_m = 0x06000000, -+ PCFG04_status_sta_b = 27, -+ PCFG04_status_sta_m = 0x08000000, -+ PCFG04_status_rta_b = 28, -+ PCFG04_status_rta_m = 0x10000000, -+ PCFG04_status_rma_b = 29, -+ PCFG04_status_rma_m = 0x20000000, -+ PCFG04_status_sse_b = 30, -+ PCFG04_status_sse_m = 0x40000000, -+ PCFG04_status_pe_b = 31, -+ PCFG04_status_pe_m = 0x40000000, -+ -+ PCFG08_revId_b = 0, -+ PCFG08_revId_m = 0x000000ff, -+ PCFG08_classCode_b = 0, -+ PCFG08_classCode_m = 0xffffff00, -+ PCFG08_classCode_bridge_v = 06, -+ PCFG08_classCode_proc_v = 0x0b3000, // processor-MIPS -+ PCFG0C_cacheline_b = 0, -+ PCFG0C_cacheline_m = 0x000000ff, -+ PCFG0C_masterLatency_b = 8, -+ PCFG0C_masterLatency_m = 0x0000ff00, -+ PCFG0C_headerType_b = 16, -+ PCFG0C_headerType_m = 0x00ff0000, -+ PCFG0C_bist_b = 24, -+ PCFG0C_bist_m = 0xff000000, -+ -+ PCIPBA_msi_b = 0, -+ PCIPBA_msi_m = 0x00000001, -+ PCIPBA_p_b = 3, -+ PCIPBA_p_m = 0x00000004, -+ PCIPBA_baddr_b = 8, -+ PCIPBA_baddr_m = 0xffffff00, -+ -+ PCFGSS_vendorId_b = 0, -+ PCFGSS_vendorId_m = 0x0000ffff, -+ PCFGSS_id_b = 16, -+ PCFGSS_id_m = 0xffff0000, -+ -+ PCFG3C_interruptLine_b = 0, -+ PCFG3C_interruptLine_m = 0x000000ff, -+ PCFG3C_interruptPin_b = 8, -+ PCFG3C_interruptPin_m = 0x0000ff00, -+ PCFG3C_minGrant_b = 16, -+ PCFG3C_minGrant_m = 0x00ff0000, -+ PCFG3C_maxLat_b = 24, -+ PCFG3C_maxLat_m = 0xff000000, -+ -+ PCIPBAC_msi_b = 0, -+ PCIPBAC_msi_m = 0x00000001, -+ PCIPBAC_p_b = 1, -+ PCIPBAC_p_m = 0x00000002, -+ PCIPBAC_size_b = 2, -+ PCIPBAC_size_m = 0x0000007c, -+ PCIPBAC_sb_b = 7, -+ PCIPBAC_sb_m = 0x00000080, -+ PCIPBAC_pp_b = 8, -+ PCIPBAC_pp_m = 0x00000100, -+ PCIPBAC_mr_b = 9, -+ PCIPBAC_mr_m = 0x00000600, -+ PCIPBAC_mr_read_v =0, //no prefetching -+ PCIPBAC_mr_readLine_v =1, -+ PCIPBAC_mr_readMult_v =2, -+ PCIPBAC_mrl_b = 11, -+ PCIPBAC_mrl_m = 0x00000800, -+ PCIPBAC_mrm_b = 12, -+ PCIPBAC_mrm_m = 0x00001000, -+ PCIPBAC_trp_b = 13, -+ PCIPBAC_trp_m = 0x00002000, -+ -+ PCFG40_trdyTimeout_b = 0, -+ PCFG40_trdyTimeout_m = 0x000000ff, -+ PCFG40_retryLim_b = 8, -+ PCFG40_retryLim_m = 0x0000ff00, -+}; -+ -+/******************************************************************************* -+ * -+ * PCI Local Base Address [0|1|2|3] Register -+ * -+ ******************************************************************************/ -+enum { -+ PCILBA_baddr_b = 0, // In PCI_t -> pcilba [] .a -+ PCILBA_baddr_m = 0xffffff00, -+} ; -+/******************************************************************************* -+ * -+ * PCI Local Base Address Control Register -+ * -+ ******************************************************************************/ -+enum { -+ PCILBAC_msi_b = 0, // In pPci->pcilba[i].c -+ PCILBAC_msi_m = 0x00000001, -+ PCILBAC_msi_mem_v = 0, -+ PCILBAC_msi_io_v = 1, -+ PCILBAC_size_b = 2, // In pPci->pcilba[i].c -+ PCILBAC_size_m = 0x0000007c, -+ PCILBAC_sb_b = 7, // In pPci->pcilba[i].c -+ PCILBAC_sb_m = 0x00000080, -+ PCILBAC_rt_b = 8, // In pPci->pcilba[i].c -+ PCILBAC_rt_m = 0x00000100, -+ PCILBAC_rt_noprefetch_v = 0, // mem read -+ PCILBAC_rt_prefetch_v = 1, // mem readline -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI Local Base Address [0|1|2|3] Mapping Register -+ * -+ ******************************************************************************/ -+enum { -+ PCILBAM_maddr_b = 8, -+ PCILBAM_maddr_m = 0xffffff00, -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI Decoupled Access Control Register -+ * -+ ******************************************************************************/ -+enum { -+ PCIDAC_den_b = 0, -+ PCIDAC_den_m = 0x00000001, -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI Decoupled Access Status Register -+ * -+ ******************************************************************************/ -+enum { -+ PCIDAS_d_b = 0, -+ PCIDAS_d_m = 0x00000001, -+ PCIDAS_b_b = 1, -+ PCIDAS_b_m = 0x00000002, -+ PCIDAS_e_b = 2, -+ PCIDAS_e_m = 0x00000004, -+ PCIDAS_ofe_b = 3, -+ PCIDAS_ofe_m = 0x00000008, -+ PCIDAS_off_b = 4, -+ PCIDAS_off_m = 0x00000010, -+ PCIDAS_ife_b = 5, -+ PCIDAS_ife_m = 0x00000020, -+ PCIDAS_iff_b = 6, -+ PCIDAS_iff_m = 0x00000040, -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI DMA Channel 8 Configuration Register -+ * -+ ******************************************************************************/ -+enum -+{ -+ PCIDMA8C_mbs_b = 0, // Maximum Burst Size. -+ PCIDMA8C_mbs_m = 0x00000fff, // { pcidma8c } -+ PCIDMA8C_our_b = 12, // Optimize Unaligned Burst Reads. -+ PCIDMA8C_our_m = 0x00001000, // { pcidma8c } -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI DMA Channel 9 Configuration Register -+ * -+ ******************************************************************************/ -+enum -+{ -+ PCIDMA9C_mbs_b = 0, // Maximum Burst Size. -+ PCIDMA9C_mbs_m = 0x00000fff, // { pcidma9c } -+} ; -+ -+/******************************************************************************* -+ * -+ * PCI to Memory(DMA Channel 8) AND Memory to PCI DMA(DMA Channel 9)Descriptors -+ * -+ ******************************************************************************/ -+enum { -+ PCIDMAD_pt_b = 22, // in DEVCMD field (descriptor) -+ PCIDMAD_pt_m = 0x00c00000, // preferred transaction field -+ // These are for reads (DMA channel 8) -+ PCIDMAD_devcmd_mr_v = 0, //memory read -+ PCIDMAD_devcmd_mrl_v = 1, //memory read line -+ PCIDMAD_devcmd_mrm_v = 2, //memory read multiple -+ PCIDMAD_devcmd_ior_v = 3, //I/O read -+ // These are for writes (DMA channel 9) -+ PCIDMAD_devcmd_mw_v = 0, //memory write -+ PCIDMAD_devcmd_mwi_v = 1, //memory write invalidate -+ PCIDMAD_devcmd_iow_v = 3, //I/O write -+ -+ // Swap byte field applies to both DMA channel 8 and 9 -+ PCIDMAD_sb_b = 24, // in DEVCMD field (descriptor) -+ PCIDMAD_sb_m = 0x01000000, // swap byte field -+} ; -+ -+ -+/******************************************************************************* -+ * -+ * PCI Target Control Register -+ * -+ ******************************************************************************/ -+enum -+{ -+ PCITC_rtimer_b = 0, // In PCITC_t -> pcitc -+ PCITC_rtimer_m = 0x000000ff, -+ PCITC_dtimer_b = 8, // In PCITC_t -> pcitc -+ PCITC_dtimer_m = 0x0000ff00, -+ PCITC_rdr_b = 18, // In PCITC_t -> pcitc -+ PCITC_rdr_m = 0x00040000, -+ PCITC_ddt_b = 19, // In PCITC_t -> pcitc -+ PCITC_ddt_m = 0x00080000, -+} ; -+/******************************************************************************* -+ * -+ * PCI messaging unit [applies to both inbound and outbound registers ] -+ * -+ ******************************************************************************/ -+enum -+{ -+ PCIM_m0_b = 0, // In PCIM_t -> {pci{iic,iim,ioic,ioim}} -+ PCIM_m0_m = 0x00000001, // inbound or outbound message 0 -+ PCIM_m1_b = 1, // In PCIM_t -> {pci{iic,iim,ioic,ioim}} -+ PCIM_m1_m = 0x00000002, // inbound or outbound message 1 -+ PCIM_db_b = 2, // In PCIM_t -> {pci{iic,iim,ioic,ioim}} -+ PCIM_db_m = 0x00000004, // inbound or outbound doorbell -+}; -+ -diff -Nur linux-2.6.17/include/asm-mips/idt-boards/rc32438/rc32438_pci_v.h linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32438/rc32438_pci_v.h ---- linux-2.6.17/include/asm-mips/idt-boards/rc32438/rc32438_pci_v.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/include/asm-mips/idt-boards/rc32438/rc32438_pci_v.h 2006-06-18 12:44:28.000000000 +0200 -@@ -0,0 +1,190 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * Definitions for IDT RC32438 PCI setup. -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 P. Sadik -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#define PCI_MSG_VirtualAddress 0xB8088010 -+#define rc32438_pci ((volatile PCI_t) PCI0_VirtualAddress) -+#define rc32438_pci_msg ((volatile PCIM_t) PCI_MSG_VirtualAddress) -+ -+#define PCIM_SHFT 0x6 -+#define PCIM_BIT_LEN 0x7 -+#define PCIM_H_EA 0x3 -+#define PCIM_H_IA_FIX 0x4 -+#define PCIM_H_IA_RR 0x5 -+ -+#define PCI_ADDR_START 0x50000000 -+ -+#define CPUTOPCI_MEM_WIN 0x02000000 -+#define CPUTOPCI_IO_WIN 0x00100000 -+#define PCILBA_SIZE_SHFT 2 -+#define PCILBA_SIZE_MASK 0x1F -+#define SIZE_256MB 0x1C -+#define SIZE_128MB 0x1B -+#define SIZE_64MB 0x1A -+#define SIZE_32MB 0x19 -+#define SIZE_16MB 0x18 -+#define SIZE_4MB 0x16 -+#define SIZE_2MB 0x15 -+#define SIZE_1MB 0x14 -+#define ACACIA_CONFIG0_ADDR 0x80000000 -+#define ACACIA_CONFIG1_ADDR 0x80000004 -+#define ACACIA_CONFIG2_ADDR 0x80000008 -+#define ACACIA_CONFIG3_ADDR 0x8000000C -+#define ACACIA_CONFIG4_ADDR 0x80000010 -+#define ACACIA_CONFIG5_ADDR 0x80000014 -+#define ACACIA_CONFIG6_ADDR 0x80000018 -+#define ACACIA_CONFIG7_ADDR 0x8000001C -+#define ACACIA_CONFIG8_ADDR 0x80000020 -+#define ACACIA_CONFIG9_ADDR 0x80000024 -+#define ACACIA_CONFIG10_ADDR 0x80000028 -+#define ACACIA_CONFIG11_ADDR 0x8000002C -+#define ACACIA_CONFIG12_ADDR 0x80000030 -+#define ACACIA_CONFIG13_ADDR 0x80000034 -+#define ACACIA_CONFIG14_ADDR 0x80000038 -+#define ACACIA_CONFIG15_ADDR 0x8000003C -+#define ACACIA_CONFIG16_ADDR 0x80000040 -+#define ACACIA_CONFIG17_ADDR 0x80000044 -+#define ACACIA_CONFIG18_ADDR 0x80000048 -+#define ACACIA_CONFIG19_ADDR 0x8000004C -+#define ACACIA_CONFIG20_ADDR 0x80000050 -+#define ACACIA_CONFIG21_ADDR 0x80000054 -+#define ACACIA_CONFIG22_ADDR 0x80000058 -+#define ACACIA_CONFIG23_ADDR 0x8000005C -+#define ACACIA_CONFIG24_ADDR 0x80000060 -+#define ACACIA_CONFIG25_ADDR 0x80000064 -+#define ACACIA_CMD (PCFG04_command_ioena_m | \ -+ PCFG04_command_memena_m | \ -+ PCFG04_command_bmena_m | \ -+ PCFG04_command_mwinv_m | \ -+ PCFG04_command_parena_m | \ -+ PCFG04_command_serrena_m ) -+ -+#define ACACIA_STAT (PCFG04_status_mdpe_m | \ -+ PCFG04_status_sta_m | \ -+ PCFG04_status_rta_m | \ -+ PCFG04_status_rma_m | \ -+ PCFG04_status_sse_m | \ -+ PCFG04_status_pe_m) -+ -+#define ACACIA_CNFG1 ((ACACIA_STAT<<16)|ACACIA_CMD) -+ -+#define ACACIA_REVID 0 -+#define ACACIA_CLASS_CODE 0 -+#define ACACIA_CNFG2 ((ACACIA_CLASS_CODE<<8) | \ -+ ACACIA_REVID) -+ -+#define ACACIA_CACHE_LINE_SIZE 4 -+#define ACACIA_MASTER_LAT 0x3c -+#define ACACIA_HEADER_TYPE 0 -+#define ACACIA_BIST 0 -+ -+#define ACACIA_CNFG3 ((ACACIA_BIST << 24) | \ -+ (ACACIA_HEADER_TYPE<<16) | \ -+ (ACACIA_MASTER_LAT<<8) | \ -+ ACACIA_CACHE_LINE_SIZE ) -+ -+#define ACACIA_BAR0 0x00000008 /* 128 MB Memory */ -+#define ACACIA_BAR1 0x18800001 /* 1 MB IO */ -+#define ACACIA_BAR2 0x18000001 /* 2 MB IO window for Acacia -+ internal Registers */ -+#define ACACIA_BAR3 0x48000008 /* Spare 128 MB Memory */ -+ -+#define ACACIA_CNFG4 ACACIA_BAR0 -+#define ACACIA_CNFG5 ACACIA_BAR1 -+#define ACACIA_CNFG6 ACACIA_BAR2 -+#define ACACIA_CNFG7 ACACIA_BAR3 -+ -+#define ACACIA_SUBSYS_VENDOR_ID 0 -+#define ACACIA_SUBSYSTEM_ID 0 -+#define ACACIA_CNFG8 0 -+#define ACACIA_CNFG9 0 -+#define ACACIA_CNFG10 0 -+#define ACACIA_CNFG11 ((ACACIA_SUBSYS_VENDOR_ID<<16) | \ -+ ACACIA_SUBSYSTEM_ID) -+#define ACACIA_INT_LINE 1 -+#define ACACIA_INT_PIN 1 -+#define ACACIA_MIN_GNT 8 -+#define ACACIA_MAX_LAT 0x38 -+#define ACACIA_CNFG12 0 -+#define ACACIA_CNFG13 0 -+#define ACACIA_CNFG14 0 -+#define ACACIA_CNFG15 ((ACACIA_MAX_LAT<<24) | \ -+ (ACACIA_MIN_GNT<<16) | \ -+ (ACACIA_INT_PIN<<8) | \ -+ ACACIA_INT_LINE) -+#define ACACIA_RETRY_LIMIT 0x80 -+#define ACACIA_TRDY_LIMIT 0x80 -+#define ACACIA_CNFG16 ((ACACIA_RETRY_LIMIT<<8) | \ -+ ACACIA_TRDY_LIMIT) -+#define PCI_PBAxC_R 0x0 -+#define PCI_PBAxC_RL 0x1 -+#define PCI_PBAxC_RM 0x2 -+#define SIZE_SHFT 2 -+ -+#define ACACIA_PBA0C ( PCIPBAC_mrl_m | PCIPBAC_sb_m | \ -+ ((PCI_PBAxC_RM &0x3) << PCIPBAC_mr_b) | \ -+ PCIPBAC_pp_m | \ -+ (SIZE_128MB< -+#include -+#include -+ -+#define AP70_PROT_ADDR 0xb8010008 -+#define AP70_PROT_DATA 0x8 -+#define AP60_PROT_ADDR 0xB8400000 -+#define AP60_PROT_DATA 0x04000000 -+ -+void unlock_ap60_70_flash(void) -+{ -+ volatile __u32 val; -+ switch (mips_machtype) { -+ case MACH_ARUBA_AP70: -+ val = *(volatile __u32 *)AP70_PROT_ADDR; -+ val &= ~(AP70_PROT_DATA); -+ *(volatile __u32 *)AP70_PROT_ADDR = val; -+ break; -+ case MACH_ARUBA_AP65: -+ case MACH_ARUBA_AP60: -+ default: -+ val = *(volatile __u32 *)AP60_PROT_ADDR; -+ val &= ~(AP60_PROT_DATA); -+ *(volatile __u32 *)AP60_PROT_ADDR = val; -+ break; -+ } -+} -diff -Nur linux-2.6.15/drivers/mtd/chips/cfi_probe.c linux-2.6.15-openwrt/drivers/mtd/chips/cfi_probe.c ---- linux-2.6.15/drivers/mtd/chips/cfi_probe.c 2006-01-03 04:21:10.000000000 +0100 -+++ linux-2.6.15-openwrt/drivers/mtd/chips/cfi_probe.c 2006-01-10 00:32:32.000000000 +0100 -@@ -26,6 +26,74 @@ - static void print_cfi_ident(struct cfi_ident *); - #endif - -+#if 1 -+ -+#define AMD_AUTOSEL_OFF1 0xAAA -+#define AMD_AUTOSEL_OFF2 0x555 -+#define AMD_MANUF_ID 0x1 -+#define AMD_DEVICE_ID1 0xF6 /* T */ -+#define AMD_DEVICE_ID2 0xF9 /* B */ -+/* Foll. are definitions for Macronix Flash Part */ -+#define MCX_MANUF_ID 0xC2 -+#define MCX_DEVICE_ID1 0xA7 -+#define MCX_DEVICE_ID2 0xA8 -+/* Foll. common to both AMD and Macronix */ -+#define FACTORY_LOCKED 0x99 -+#define USER_LOCKED 0x19 -+ -+/* NOTE: AP-70/6x use BYTE mode flash access. Therefore the -+ * lowest Addr. pin in the flash is not A0 but A-1 (A minus 1). -+ * CPU's A0 is tied to Flash's A-1, A1 to A0 and so on. This -+ * gives 4MB of byte-addressable mem. In byte mode, all addr -+ * need to be multiplied by 2 (i.e compared to word mode). -+ * NOTE: AMD_AUTOSEL_OFF1 and OFF2 are already mult. by 2 -+ * Just blindly use the addr offsets suggested in the manual -+ * for byte mode and you'll be OK. Offs. in Table 6 need to -+ * be mult by 2 (for getting autosel params) -+ */ -+void -+flash_detect(struct map_info *map, __u32 base, struct cfi_private *cfi) -+{ -+ map_word val[3]; -+ int osf = cfi->interleave * cfi->device_type; // =2 for AP70/6x -+ char *manuf, *part, *lock ; -+ -+ if (osf != 1) return ; -+ -+ cfi_send_gen_cmd(0xAA, AMD_AUTOSEL_OFF1, base, map, cfi, cfi->device_type, NULL); -+ cfi_send_gen_cmd(0x55, AMD_AUTOSEL_OFF2, base, map, cfi, cfi->device_type, NULL); -+ cfi_send_gen_cmd(0x90, AMD_AUTOSEL_OFF1, base, map, cfi, cfi->device_type, NULL); -+ val[0] = map_read(map, base) ; // manuf ID -+ val[1] = map_read(map, base+2) ; // device ID -+ val[2] = map_read(map, base+6) ; // lock indicator -+#if 0 -+printk("v1=0x%x v2=0x%x v3=0x%x\n", val[0], val[1], val[2]) ; -+#endif -+ if (val[0].x[0] == AMD_MANUF_ID) { -+ manuf = "AMD Flash" ; -+ if (val[1].x[0] == AMD_DEVICE_ID1) -+ part = "AM29LV320D (Top)" ; -+ else if (val[1].x[0] == AMD_DEVICE_ID2) -+ part = "AM29LV320D (Bot)" ; -+ else part = "Unknown" ; -+ } else if (val[0].x[0] == MCX_MANUF_ID) { -+ manuf = "Macronix Flash" ; -+ if (val[1].x[0] == MCX_DEVICE_ID1) -+ part = "MX29LV320A (Top)" ; -+ else if (val[1].x[0] == MCX_DEVICE_ID2) -+ part = "MX29LV320A (Bot)" ; -+ else part = "Unknown" ; -+ } else -+ return ; -+ if (val[2].x[0] == FACTORY_LOCKED) -+ lock = "Factory Locked" ; -+ else if (val[2].x[0] == USER_LOCKED) -+ lock = "User Locked" ; -+ else lock = "Unknown locking" ; -+ printk("%s %s (%s)\n", manuf, part, lock) ; -+} -+#endif -+ - static int cfi_probe_chip(struct map_info *map, __u32 base, - unsigned long *chip_map, struct cfi_private *cfi); - static int cfi_chip_setup(struct map_info *map, struct cfi_private *cfi); -@@ -118,6 +186,10 @@ - } - - xip_disable(); -+#if 1 -+ //cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL); -+ flash_detect(map, base, cfi) ; -+#endif - cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL); - cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL); - cfi_send_gen_cmd(0x98, 0x55, base, map, cfi, cfi->device_type, NULL); - diff --git a/target/linux/aruba-2.6/patches/002-irq.patch b/target/linux/aruba-2.6/patches/002-irq.patch deleted file mode 100644 index cc5ea84c42..0000000000 --- a/target/linux/aruba-2.6/patches/002-irq.patch +++ /dev/null @@ -1,289 +0,0 @@ -diff -Nur linux-2.6.17/arch/mips/aruba/irq.c linux-2.6.17-openwrt/arch/mips/aruba/irq.c ---- linux-2.6.17/arch/mips/aruba/irq.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-openwrt/arch/mips/aruba/irq.c 2006-10-12 14:32:40.026285000 -0700 -@@ -0,0 +1,285 @@ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+extern void aruba_timer_interrupt(struct pt_regs *regs); -+ -+typedef struct { -+ u32 mask; -+ volatile u32 *base_addr; -+} intr_group_t; -+ -+static const intr_group_t intr_group_merlot[NUM_INTR_GROUPS] = { -+ {0x00000000, (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 0)}, -+}; -+ -+#define READ_PEND_MERLOT(base) (*((volatile unsigned long *)(0xbc003010))) -+#define READ_MASK_MERLOT(base) (*((volatile unsigned long *)(0xbc003014))) -+#define WRITE_MASK_MERLOT(base, val) ((*((volatile unsigned long *)(0xbc003014))) = (val), READ_MASK_MERLOT()) -+ -+static const intr_group_t intr_group_muscat[NUM_INTR_GROUPS] = { -+ {0x0000efff, (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 0 * IC_GROUP_OFFSET)}, -+ {0x00001fff, (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 1 * IC_GROUP_OFFSET)}, -+ {0x00000007, (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 2 * IC_GROUP_OFFSET)}, -+ {0x0003ffff, (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 3 * IC_GROUP_OFFSET)}, -+ {0xffffffff, (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 4 * IC_GROUP_OFFSET)} -+}; -+ -+#define READ_PEND_MUSCAT(base) (*(base)) -+#define READ_MASK_MUSCAT(base) (*(base + 2)) -+#define WRITE_MASK_MUSCAT(base, val) (*(base + 2) = (val)) -+ -+static inline int group_to_ip(unsigned int group) -+{ -+ switch (mips_machtype) { -+ case MACH_ARUBA_AP70: -+ return group + 2; -+ case MACH_ARUBA_AP65: -+ case MACH_ARUBA_AP60: -+ default: -+ return 6; -+ } -+} -+ -+static inline void enable_local_irq(unsigned int irq) -+{ -+ clear_c0_cause(0x100 << irq); -+ set_c0_status(0x100 << irq); -+ irq_enable_hazard(); -+} -+ -+static inline void disable_local_irq(unsigned int irq) -+{ -+ clear_c0_status(0x100 << irq); -+ clear_c0_cause(0x100 << irq); -+ irq_disable_hazard(); -+} -+ -+static inline void aruba_irq_enable(unsigned int irq) -+{ -+ unsigned long flags; -+ unsigned int group, intr_bit; -+ volatile unsigned int *addr; -+ -+ local_irq_save(flags); -+ -+ if (irq < GROUP0_IRQ_BASE) { -+ enable_local_irq(irq); -+ } else { -+ int ip = irq - GROUP0_IRQ_BASE; -+ switch (mips_machtype) { -+ case MACH_ARUBA_AP70: -+ if (irq >= GROUP4_IRQ_BASE) -+ idt_gpio->gpioistat &= ~(1 << (irq - GROUP4_IRQ_BASE)); -+ -+ // irqs are in groups of 32 -+ // ip is set to the remainder -+ group = ip >> 5; -+ ip &= 0x1f; -+ -+ // bit -> 0 = unmask -+ intr_bit = 1 << ip; -+ addr = intr_group_muscat[group].base_addr; -+ WRITE_MASK_MUSCAT(addr, READ_MASK_MUSCAT(addr) & ~intr_bit); -+ break; -+ -+ case MACH_ARUBA_AP65: -+ case MACH_ARUBA_AP60: -+ group = 0; -+ -+ // bit -> 1 = unmasked -+ intr_bit = 1 << ip; -+ addr = intr_group_merlot[group].base_addr; -+ WRITE_MASK_MERLOT(addr, READ_MASK_MERLOT(addr) | intr_bit); -+ break; -+ } -+ enable_local_irq(group_to_ip(group)); -+ } -+ -+ back_to_back_c0_hazard(); -+ local_irq_restore(flags); -+} -+ -+static void aruba_irq_disable(unsigned int irq) -+{ -+ unsigned long flags; -+ unsigned int group, intr_bit, mask; -+ volatile unsigned int *addr; -+ -+ local_irq_save(flags); -+ -+ if (irq < GROUP0_IRQ_BASE) { -+ disable_local_irq(irq); -+ } else { -+ int ip = irq - GROUP0_IRQ_BASE; -+ switch (mips_machtype) { -+ case MACH_ARUBA_AP70: -+ idt_gpio->gpioistat &= ~(1 << ip); -+ -+ // irqs are in groups of 32 -+ // ip is set to the remainder -+ group = ip >> 5; -+ ip &= 0x1f; -+ -+ // bit -> 1 = mask -+ intr_bit = 1 << ip; -+ addr = intr_group_muscat[group].base_addr; -+ -+ mask = READ_MASK_MUSCAT(addr); -+ mask |= intr_bit; -+ WRITE_MASK_MUSCAT(addr, mask); -+ -+ if (mask == intr_group_muscat[group].mask) { -+ disable_local_irq(group_to_ip(group)); -+ } -+ break; -+ -+ case MACH_ARUBA_AP65: -+ case MACH_ARUBA_AP60: -+ group = 0; -+ -+ // bit -> 0 = masked -+ intr_bit = 1 << ip; -+ addr = intr_group_merlot[group].base_addr; -+ -+ mask = READ_MASK_MERLOT(addr); -+ mask &= ~intr_bit; -+ WRITE_MASK_MERLOT(addr, mask); -+ -+ if (mask == intr_group_merlot[group].mask) { -+ disable_local_irq(group_to_ip(group)); -+ } -+ break; -+ } -+ } -+ -+ back_to_back_c0_hazard(); -+ local_irq_restore(flags); -+} -+ -+static unsigned int aruba_irq_startup(unsigned int irq) -+{ -+ aruba_irq_enable(irq); -+ return 0; -+} -+ -+#define aruba_irq_shutdown aruba_irq_disable -+ -+static void aruba_irq_ack(unsigned int irq) -+{ -+ aruba_irq_disable(irq); -+} -+ -+static void aruba_irq_end(unsigned int irq) -+{ -+ if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) -+ aruba_irq_enable(irq); -+} -+ -+static struct hw_interrupt_type aruba_irq_type = { -+ .typename = "ARUBA", -+ .startup = aruba_irq_startup, -+ .shutdown = aruba_irq_shutdown, -+ .enable = aruba_irq_enable, -+ .disable = aruba_irq_disable, -+ .ack = aruba_irq_ack, -+ .end = aruba_irq_end, -+}; -+ -+void __init arch_init_irq(void) -+{ -+ int i; -+ printk("Initializing IRQ's: %d out of %d\n", RC32434_NR_IRQS, NR_IRQS); -+ memset(irq_desc, 0, sizeof(irq_desc)); -+ -+ for (i = 0; i < RC32434_NR_IRQS; i++) { -+ irq_desc[i].status = IRQ_DISABLED; -+ irq_desc[i].action = NULL; -+ irq_desc[i].depth = 1; -+ irq_desc[i].chip = &aruba_irq_type; -+ spin_lock_init(&irq_desc[i].lock); -+ } -+} -+ -+/* Main Interrupt dispatcher */ -+ -+void plat_irq_dispatch(struct pt_regs *regs) -+{ -+ unsigned int pend, group, ip; -+ volatile unsigned int *addr; -+ unsigned long cp0_cause = read_c0_cause() & read_c0_status() & CAUSEF_IP; -+ -+ if (cp0_cause & CAUSEF_IP7) -+ return aruba_timer_interrupt(regs); -+ -+ if(cp0_cause == 0) { -+ printk("INTERRUPT(S) FIRED WHILE MASKED\n"); -+#ifdef ARUBA_DEBUG -+ // debuging use -- figure out which interrupt(s) fired -+ cp0_cause = read_c0_cause() & CAUSEF_IP; -+ while (cp0_cause) { -+ unsigned long intr_bit; -+ unsigned int irq_nr; -+ intr_bit = (31 - rc32434_clz(cp0_cause)); -+ irq_nr = intr_bit - GROUP0_IRQ_BASE; -+ printk(" ---> MASKED IRQ %d\n",irq_nr); -+ cp0_cause &= ~(1 << intr_bit); -+ } -+#endif -+ return; -+ } -+ -+ switch (mips_machtype) { -+ case MACH_ARUBA_AP70: -+ if ((ip = (cp0_cause & 0x7c00))) { -+ group = 21 - rc32434_clz(ip); -+ -+ addr = intr_group_muscat[group].base_addr; -+ -+ pend = READ_PEND_MUSCAT(addr); -+ pend &= ~READ_MASK_MUSCAT(addr); // only unmasked interrupts -+ pend = 39 - rc32434_clz(pend); -+ do_IRQ(pend + (group << 5)); -+ } -+ break; -+ case MACH_ARUBA_AP65: -+ case MACH_ARUBA_AP60: -+ default: -+ if (cp0_cause & 0x4000) { // 1 << (8 +6) == irq 6 -+ // Misc Interrupt -+ group = 0; -+ -+ addr = intr_group_merlot[group].base_addr; -+ -+ pend = READ_PEND_MERLOT(addr); -+ pend &= READ_MASK_MERLOT(addr); // only unmasked interrupts -+ pend = 31 - rc32434_clz(pend); -+ do_IRQ(pend + GROUP0_IRQ_BASE); -+ } -+ if ((ip = (cp0_cause & 0x3c00))) { // irq 2-5 -+ pend = 31 - rc32434_clz(ip); -+ do_IRQ(pend - GROUP0_IRQ_BASE); -+ } -+ break; -+ } -+} diff --git a/target/linux/aruba-2.6/patches/003-pci.patch b/target/linux/aruba-2.6/patches/003-pci.patch deleted file mode 100644 index 1ab5da2d09..0000000000 --- a/target/linux/aruba-2.6/patches/003-pci.patch +++ /dev/null @@ -1,618 +0,0 @@ -diff -Nur linux-2.6.15/arch/mips/pci/fixup-aruba.c linux-2.6.15-openwrt/arch/mips/pci/fixup-aruba.c ---- linux-2.6.15/arch/mips/pci/fixup-aruba.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.15-openwrt/arch/mips/pci/fixup-aruba.c 2006-01-10 00:34:41.000000000 +0100 -@@ -0,0 +1,115 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * PCI fixups for IDT EB434 board -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 rkt, neb -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) -+{ -+ -+ if (dev->bus->number != 0) { -+ return 0; -+ } -+ -+ slot = PCI_SLOT(dev->devfn); -+ dev->irq = 0; -+ -+ if (slot > 0 && slot <= 15) { -+#if 1 -+ if(slot == 10) { -+ if(pin == 1) dev->irq = GROUP4_IRQ_BASE + 9; // intA -+ } else if(slot == 11) { -+ if(pin == 1) dev->irq = GROUP4_IRQ_BASE + 10; // intA -+ if(pin == 2) dev->irq = GROUP4_IRQ_BASE + 10; // intA -+ if(pin == 3) dev->irq = GROUP4_IRQ_BASE + 10; // intA -+ } else if(slot == 12) { -+ if(pin == 1) dev->irq = GROUP4_IRQ_BASE + 11; // intA -+ if(pin == 2) dev->irq = GROUP4_IRQ_BASE + 12; // intB -+ } else if (slot == 13) { -+ if(pin == 1) dev->irq = GROUP4_IRQ_BASE + 12; // intA -+ if(pin == 2) dev->irq = GROUP4_IRQ_BASE + 11; // intB -+ } else { -+ dev->irq = GROUP4_IRQ_BASE + 11; -+ } -+#else -+ switch (pin) { -+ case 1: /* INTA*/ -+ dev->irq = GROUP4_IRQ_BASE + 11; -+ break; -+ case 2: /* INTB */ -+ dev->irq = GROUP4_IRQ_BASE + 11; -+ break; -+ case 3: /* INTC */ -+ dev->irq = GROUP4_IRQ_BASE + 11; -+ break; -+ case 4: /* INTD */ -+ dev->irq = GROUP4_IRQ_BASE + 11; -+ break; -+ default: -+ dev->irq = 0xff; -+ break; -+ } -+#endif -+#ifdef DEBUG -+ printk("irq fixup: slot %d, pin %d, irq %d\n", -+ slot, pin, dev->irq); -+#endif -+ pci_write_config_byte(dev, PCI_INTERRUPT_LINE,dev->irq); -+ } -+ return (dev->irq); -+} -+ -+struct pci_fixup pcibios_fixups[] = { -+ {0} -+}; -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -diff -Nur linux-2.6.15/arch/mips/pci/Makefile linux-2.6.15-openwrt/arch/mips/pci/Makefile ---- linux-2.6.15/arch/mips/pci/Makefile 2006-01-03 04:21:10.000000000 +0100 -+++ linux-2.6.15-openwrt/arch/mips/pci/Makefile 2006-01-10 00:32:32.000000000 +0100 -@@ -53,3 +53,4 @@ - obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o - obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o - obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o -+obj-$(CONFIG_MACH_ARUBA) += fixup-aruba.o ops-aruba.o pci-aruba.o -diff -Nur linux-2.6.15/arch/mips/pci/ops-aruba.c linux-2.6.15-openwrt/arch/mips/pci/ops-aruba.c ---- linux-2.6.15/arch/mips/pci/ops-aruba.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.15-openwrt/arch/mips/pci/ops-aruba.c 2006-01-10 00:32:32.000000000 +0100 -@@ -0,0 +1,204 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * pci_ops for IDT EB434 board -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 rkt, neb -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include -+#include -+ -+#define PCI_ACCESS_READ 0 -+#define PCI_ACCESS_WRITE 1 -+ -+ -+#define PCI_CFG_SET(slot,func,off) \ -+ (rc32434_pci->pcicfga = (0x80000000 | ((slot)<<11) | \ -+ ((func)<<8) | (off))) -+ -+static int config_access(unsigned char access_type, struct pci_bus *bus, -+ unsigned int devfn, unsigned char where, -+ u32 * data) -+{ -+ /* -+ * config cycles are on 4 byte boundary only -+ */ -+ unsigned int slot = PCI_SLOT(devfn); -+ u8 func = PCI_FUNC(devfn); -+ -+ if (slot < 2 || slot > 15) { -+ *data = 0xFFFFFFFF; -+ return -1; -+ } -+ /* Setup address */ -+ PCI_CFG_SET(slot, func, where); -+ rc32434_sync(); -+ -+ if (access_type == PCI_ACCESS_WRITE) { -+ rc32434_sync(); -+ rc32434_pci->pcicfgd = *data; -+ } else { -+ rc32434_sync(); -+ *data = rc32434_pci->pcicfgd; -+ } -+ -+ rc32434_sync(); -+ -+ return 0; -+} -+ -+ -+/* -+ * We can't address 8 and 16 bit words directly. Instead we have to -+ * read/write a 32bit word and mask/modify the data we actually want. -+ */ -+static int read_config_byte(struct pci_bus *bus, unsigned int devfn, -+ int where, u8 * val) -+{ -+ u32 data; -+ int ret; -+ -+ ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data); -+ *val = (data >> ((where & 3) << 3)) & 0xff; -+ return ret; -+} -+ -+static int read_config_word(struct pci_bus *bus, unsigned int devfn, -+ int where, u16 * val) -+{ -+ u32 data; -+ int ret; -+ -+ ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data); -+ *val = (data >> ((where & 3) << 3)) & 0xffff; -+ return ret; -+} -+ -+static int read_config_dword(struct pci_bus *bus, unsigned int devfn, -+ int where, u32 * val) -+{ -+ int ret; -+ -+ ret = config_access(PCI_ACCESS_READ, bus, devfn, where, val); -+ return ret; -+} -+ -+static int -+write_config_byte(struct pci_bus *bus, unsigned int devfn, int where, -+ u8 val) -+{ -+ u32 data = 0; -+ -+ if (config_access(PCI_ACCESS_READ, bus, devfn, where, &data)) -+ return -1; -+ -+ data = (data & ~(0xff << ((where & 3) << 3))) | -+ (val << ((where & 3) << 3)); -+ -+ if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) -+ return -1; -+ -+ return PCIBIOS_SUCCESSFUL; -+} -+ -+ -+static int -+write_config_word(struct pci_bus *bus, unsigned int devfn, int where, -+ u16 val) -+{ -+ u32 data = 0; -+ -+ if (config_access(PCI_ACCESS_READ, bus, devfn, where, &data)) -+ return -1; -+ -+ data = (data & ~(0xffff << ((where & 3) << 3))) | -+ (val << ((where & 3) << 3)); -+ -+ if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) -+ return -1; -+ -+ -+ return PCIBIOS_SUCCESSFUL; -+} -+ -+ -+static int -+write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, -+ u32 val) -+{ -+ if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &val)) -+ return -1; -+ -+ return PCIBIOS_SUCCESSFUL; -+} -+ -+static int pci_config_read(struct pci_bus *bus, unsigned int devfn, -+ int where, int size, u32 * val) -+{ -+ switch (size) { -+ case 1: -+ return read_config_byte(bus, devfn, where, (u8 *) val); -+ case 2: -+ return read_config_word(bus, devfn, where, (u16 *) val); -+ default: -+ return read_config_dword(bus, devfn, where, val); -+ } -+} -+ -+static int pci_config_write(struct pci_bus *bus, unsigned int devfn, -+ int where, int size, u32 val) -+{ -+ switch (size) { -+ case 1: -+ return write_config_byte(bus, devfn, where, (u8) val); -+ case 2: -+ return write_config_word(bus, devfn, where, (u16) val); -+ default: -+ return write_config_dword(bus, devfn, where, val); -+ } -+} -+ -+struct pci_ops rc32434_pci_ops = { -+ .read = pci_config_read, -+ .write = pci_config_write, -+}; -diff -Nur linux-2.6.15/arch/mips/pci/pci-aruba.c linux-2.6.15-openwrt/arch/mips/pci/pci-aruba.c ---- linux-2.6.15/arch/mips/pci/pci-aruba.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.15-openwrt/arch/mips/pci/pci-aruba.c 2006-01-10 00:32:32.000000000 +0100 -@@ -0,0 +1,235 @@ -+/************************************************************************** -+ * -+ * BRIEF MODULE DESCRIPTION -+ * PCI initialization for IDT EB434 board -+ * -+ * Copyright 2004 IDT Inc. (rischelp@idt.com) -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ * -+ ************************************************************************** -+ * May 2004 rkt, neb -+ * -+ * Initial Release -+ * -+ * -+ * -+ ************************************************************************** -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define PCI_ACCESS_READ 0 -+#define PCI_ACCESS_WRITE 1 -+ -+#undef DEBUG -+#ifdef DEBUG -+#define DBG(x...) printk(x) -+#else -+#define DBG(x...) -+#endif -+/* define an unsigned array for the PCI registers */ -+unsigned int korinaCnfgRegs[25] = { -+ KORINA_CNFG1, KORINA_CNFG2, KORINA_CNFG3, KORINA_CNFG4, -+ KORINA_CNFG5, KORINA_CNFG6, KORINA_CNFG7, KORINA_CNFG8, -+ KORINA_CNFG9, KORINA_CNFG10, KORINA_CNFG11, KORINA_CNFG12, -+ KORINA_CNFG13, KORINA_CNFG14, KORINA_CNFG15, KORINA_CNFG16, -+ KORINA_CNFG17, KORINA_CNFG18, KORINA_CNFG19, KORINA_CNFG20, -+ KORINA_CNFG21, KORINA_CNFG22, KORINA_CNFG23, KORINA_CNFG24 -+}; -+ -+static struct resource rc32434_res_pci_mem2; -+ -+static struct resource rc32434_res_pci_mem1 = { -+ .name = "PCI MEM1", -+ .start = 0x50000000, -+ .end = 0x5FFFFFFF, -+ .flags = IORESOURCE_MEM, -+ .child = &rc32434_res_pci_mem2, -+}; -+static struct resource rc32434_res_pci_mem2 = { -+ .name = "PCI MEM2", -+ .start = 0x60000000, -+ .end = 0x6FFFFFFF, -+ .flags = IORESOURCE_MEM, -+ .parent = &rc32434_res_pci_mem1, -+}; -+static struct resource rc32434_res_pci_io1 = { -+ .name = "PCI I/O1", -+ .start = 0x18800000, -+ .end = 0x188FFFFF, -+ .flags = IORESOURCE_IO, -+}; -+ -+extern struct pci_ops rc32434_pci_ops; -+ -+struct pci_controller rc32434_controller = { -+ .pci_ops = &rc32434_pci_ops, -+ .mem_resource = &rc32434_res_pci_mem1, -+ .io_resource = &rc32434_res_pci_io1, -+ .mem_offset = 0x00000000UL, -+ .io_offset = 0x00000000UL, -+}; -+ -+extern unsigned int arch_has_pci; -+ -+static int __init rc32434_pcibridge_init(void) -+{ -+ -+ unsigned int pciConfigAddr = 0;/*used for writing pci config values */ -+ int loopCount=0 ;/*used for the loop */ -+ -+ unsigned int pcicValue, pcicData=0; -+ unsigned int dummyRead, pciCntlVal = 0; -+ -+ if (!arch_has_pci) return 0; -+ -+ printk("PCI: Initializing PCI\n"); -+ -+ /* Disable the IP bus error for PCI scaning */ -+ pciCntlVal=rc32434_pci->pcic; -+ pciCntlVal &= 0xFFFFFF7; -+ rc32434_pci->pcic = pciCntlVal; -+ -+ ioport_resource.start = rc32434_res_pci_io1.start; -+ ioport_resource.end = rc32434_res_pci_io1.end; -+/* -+ iomem_resource.start = rc32434_res_pci_mem1.start; -+ iomem_resource.end = rc32434_res_pci_mem1.end; -+*/ -+ -+ pcicValue = rc32434_pci->pcic; -+ pcicValue = (pcicValue >> PCIM_SHFT) & PCIM_BIT_LEN; -+ if (!((pcicValue == PCIM_H_EA) || -+ (pcicValue == PCIM_H_IA_FIX) || -+ (pcicValue == PCIM_H_IA_RR))) { -+ /* Not in Host Mode, return ERROR */ -+ return -1; -+ } -+ -+ /* Enables the Idle Grant mode, Arbiter Parking */ -+ pcicData |=(PCIC_igm_m|PCIC_eap_m|PCIC_en_m); -+ rc32434_pci->pcic = pcicData; /* Enable the PCI bus Interface */ -+ /* Zero out the PCI status & PCI Status Mask */ -+ for(;;) { -+ pcicData = rc32434_pci->pcis; -+ if (!(pcicData & PCIS_rip_m)) -+ break; -+ } -+ -+ rc32434_pci->pcis = 0; -+ rc32434_pci->pcism = 0xFFFFFFFF; -+ /* Zero out the PCI decoupled registers */ -+ rc32434_pci->pcidac=0; /* disable PCI decoupled accesses at initialization */ -+ rc32434_pci->pcidas=0; /* clear the status */ -+ rc32434_pci->pcidasm=0x0000007F; /* Mask all the interrupts */ -+ /* Mask PCI Messaging Interrupts */ -+ rc32434_pci_msg->pciiic = 0; -+ rc32434_pci_msg->pciiim = 0xFFFFFFFF; -+ rc32434_pci_msg->pciioic = 0; -+ rc32434_pci_msg->pciioim = 0; -+ -+ /* Setup PCILB0 as Memory Window */ -+ rc32434_pci->pcilba[0].a = (unsigned int) (PCI_ADDR_START); -+ -+ /* setup the PCI map address as same as the local address */ -+ -+ rc32434_pci->pcilba[0].m = (unsigned int) (PCI_ADDR_START); -+ -+ /* Setup PCILBA1 as MEM */ -+#ifdef __MIPSEB__ -+ rc32434_pci->pcilba[0].c = ( ((SIZE_16MB & 0x1f) << PCILBAC_size_b) | PCILBAC_sb_m); -+#else -+ rc32434_pci->pcilba[0].c = ( ((SIZE_16MB & 0x1f) << PCILBAC_size_b)); -+#endif -+ dummyRead = rc32434_pci->pcilba[0].c; /* flush the CPU write Buffers */ -+ -+ rc32434_pci->pcilba[1].a = 0x60000000; -+ -+ rc32434_pci->pcilba[1].m = 0x60000000; -+ /* setup PCILBA2 as IO Window*/ -+#ifdef __MIPSEB__ -+ rc32434_pci->pcilba[1].c = ( ((SIZE_256MB & 0x1f) << PCILBAC_size_b) | PCILBAC_sb_m); -+#else -+ rc32434_pci->pcilba[1].c = ((SIZE_256MB & 0x1f) << PCILBAC_size_b); -+#endif -+ dummyRead = rc32434_pci->pcilba[1].c; /* flush the CPU write Buffers */ -+ rc32434_pci->pcilba[2].a = 0x18C00000; -+ -+ rc32434_pci->pcilba[2].m = 0x18FFFFFF; -+ /* setup PCILBA2 as IO Window*/ -+#ifdef __MIPSEB__ -+ rc32434_pci->pcilba[2].c = ( ((SIZE_4MB & 0x1f) << PCILBAC_size_b) | PCILBAC_sb_m); -+#else -+ rc32434_pci->pcilba[2].c = ((SIZE_4MB & 0x1f) << PCILBAC_size_b); -+#endif -+ -+ dummyRead = rc32434_pci->pcilba[2].c; /* flush the CPU write Buffers */ -+ -+ -+ rc32434_pci->pcilba[3].a = 0x18800000; -+ -+ rc32434_pci->pcilba[3].m = 0x18800000; -+ /* Setup PCILBA3 as IO Window */ -+ -+#ifdef __MIPSEB__ -+ rc32434_pci->pcilba[3].c = ( (((SIZE_1MB & 0x1ff) << PCILBAC_size_b) | PCILBAC_msi_m) | PCILBAC_sb_m); -+#else -+ rc32434_pci->pcilba[3].c = (((SIZE_1MB & 0x1ff) << PCILBAC_size_b) | PCILBAC_msi_m); -+#endif -+ dummyRead = rc32434_pci->pcilba[2].c; /* flush the CPU write Buffers */ -+ -+ pciConfigAddr = (unsigned int)(0x80000004); -+ for(loopCount = 0; loopCount < 24; loopCount++){ -+ rc32434_pci->pcicfga = pciConfigAddr; -+ dummyRead = rc32434_pci->pcicfga; -+ rc32434_pci->pcicfgd = korinaCnfgRegs[loopCount]; -+ dummyRead=rc32434_pci->pcicfgd; -+ pciConfigAddr += 4; -+ } -+ rc32434_pci->pcitc=(unsigned int)((PCITC_RTIMER_VAL&0xff) << PCITC_rtimer_b) | -+ ((PCITC_DTIMER_VAL&0xff)<pcic; -+ pciCntlVal &= ~(PCIC_tnr_m); -+ rc32434_pci->pcic = pciCntlVal; -+ pciCntlVal = rc32434_pci->pcic; -+ -+ register_pci_controller(&rc32434_controller); -+ -+ rc32434_sync(); -+ return 0; -+} -+ -+arch_initcall(rc32434_pcibridge_init); -+ -+/* Do platform specific device initialization at pci_enable_device() time */ -+int pcibios_plat_dev_init(struct pci_dev *dev) -+{ -+ return 0; -+} -diff -Nur linux-2.6.15/drivers/pci/access.c linux-2.6.15-openwrt/drivers/pci/access.c ---- linux-2.6.15/drivers/pci/access.c 2006-01-03 04:21:10.000000000 +0100 -+++ linux-2.6.15-openwrt/drivers/pci/access.c 2006-01-10 00:43:10.000000000 +0100 -@@ -21,6 +21,7 @@ - #define PCI_word_BAD (pos & 1) - #define PCI_dword_BAD (pos & 3) - -+#ifdef __MIPSEB__ - #define PCI_OP_READ(size,type,len) \ - int pci_bus_read_config_##size \ - (struct pci_bus *bus, unsigned int devfn, int pos, type *value) \ -@@ -31,11 +32,32 @@ - if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \ - spin_lock_irqsave(&pci_lock, flags); \ - res = bus->ops->read(bus, devfn, pos, len, &data); \ -+ if (len == 1) \ -+ *value = (type)((data >> 24) & 0xff); \ -+ else if (len == 2) \ -+ *value = (type)((data >> 16) & 0xffff); \ -+ else \ - *value = (type)data; \ - spin_unlock_irqrestore(&pci_lock, flags); \ - return res; \ - } -+#else - -+#define PCI_OP_READ(size,type,len) \ -+int pci_bus_read_config_##size \ -+ (struct pci_bus *bus, unsigned int devfn, int pos, type *value) \ -+{ \ -+ int res; \ -+ unsigned long flags; \ -+ u32 data = 0; \ -+ if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \ -+ spin_lock_irqsave(&pci_lock, flags); \ -+ res = bus->ops->read(bus, devfn, pos, len, &data); \ -+ *value = (type)data; \ -+ spin_unlock_irqrestore(&pci_lock, flags); \ -+ return res; \ -+} -+#endif - #define PCI_OP_WRITE(size,type,len) \ - int pci_bus_write_config_##size \ - (struct pci_bus *bus, unsigned int devfn, int pos, type value) \ diff --git a/target/linux/aruba-2.6/patches/004-wdt.patch b/target/linux/aruba-2.6/patches/004-wdt.patch deleted file mode 100644 index 2f034afbef..0000000000 --- a/target/linux/aruba-2.6/patches/004-wdt.patch +++ /dev/null @@ -1,126 +0,0 @@ -diff -Nur linux-2.6.15.1/drivers/char/watchdog/wdt_merlot.c linux-2.6.15.1-openwrt/drivers/char/watchdog/wdt_merlot.c ---- linux-2.6.15.1/drivers/char/watchdog/wdt_merlot.c 2006-01-26 21:14:02.204626250 -0800 -+++ linux-2.6.15.1-openwrt/drivers/char/watchdog/wdt_merlot.c 2006-02-02 20:31:43.000000000 -0800 -@@ -0,0 +1,110 @@ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+ -+extern unsigned long mips_machtype; -+ -+static unsigned long wdt_is_open; -+static struct timer_list wdt_timer; -+ -+static void wdt_merlot_refresh(void) -+{ -+ volatile __u32 *wdt; -+ switch (mips_machtype) { -+ case MACH_ARUBA_AP70: -+ wdt = (__u32 *) 0xb8030034; -+ *wdt = 0x10000000; -+ break; -+ default: -+ wdt = (__u32 *) 0xbc00300c; -+ *wdt = 0x40000000; -+ break; -+ } -+} -+ -+static void wdt_merlot_timer_fn(unsigned long data) -+{ -+ wdt_merlot_refresh(); -+ if (!test_bit(1, &wdt_is_open)) -+ mod_timer(&wdt_timer, jiffies + HZ); -+} -+ -+static int wdt_merlot_setup_timer(void) -+{ -+ -+ init_timer(&wdt_timer); -+ wdt_timer.function = wdt_merlot_timer_fn; -+ wdt_timer.data = 0; -+ wdt_timer.expires = jiffies + HZ; -+ add_timer(&wdt_timer); -+ return 0; -+} -+ -+static int wdt_open(struct inode *inode, struct file *file) -+{ -+ if (test_and_set_bit(0, &wdt_is_open)) -+ return -EBUSY; -+ set_bit(1, &wdt_is_open); -+ return nonseekable_open(inode, file); -+} -+ -+static ssize_t wdt_write(struct file *file, const char __user * buf, size_t count, loff_t * ppos) -+{ -+ if (count) /* something was written */ -+ wdt_merlot_refresh(); -+ return count; -+} -+ -+static int wdt_release(struct inode *inode, struct file *file) -+{ -+ clear_bit(0, &wdt_is_open); -+ return 0; -+} -+ -+static struct file_operations wdt_fops = { -+ .owner = THIS_MODULE, -+ .llseek = no_llseek, -+ .write = wdt_write, -+ .open = wdt_open, -+ .release = wdt_release, -+}; -+ -+static struct miscdevice wdt_miscdev = { -+ .minor = WATCHDOG_MINOR, -+ .name = "watchdog", -+ .fops = &wdt_fops, -+}; -+ -+static void __exit wdt_exit(void) -+{ -+ misc_deregister(&wdt_miscdev); -+} -+ -+static int __init wdt_init(void) -+{ -+ int ret; -+ ret = misc_register(&wdt_miscdev); -+ if (ret) { -+ printk(KERN_ERR -+ "wdt: cannot register miscdev on minor=%d (err=%d)\n", -+ WATCHDOG_MINOR, ret); -+ misc_deregister(&wdt_miscdev); -+ goto out; -+ } -+ printk("wdt: registered with refresh\n"); -+ wdt_merlot_refresh(); -+ wdt_merlot_setup_timer(); -+ out: -+ return ret; -+} -+ -+module_init(wdt_init); -+module_exit(wdt_exit); -diff -Nur linux-2.6.15.3/drivers/char/watchdog/Makefile linux-2.6.15.3-openwrt/drivers/char/watchdog/Makefile ---- linux-2.6.15.3/drivers/char/watchdog/Makefile 2006-02-22 10:04:18.596278000 -0800 -+++ linux-2.6.15.3-openwrt/drivers/char/watchdog/Makefile 2006-02-22 10:06:21.400960000 -0800 -@@ -71,5 +71,8 @@ - - # SPARC64 Architecture - -+# Aruba Architecture -+obj-$(CONFIG_MACH_ARUBA) += wdt_merlot.o -+ - # Architecture Independant - obj-$(CONFIG_SOFT_WATCHDOG) += softdog.o diff --git a/target/linux/aruba-2.6/patches/010-ar2313_enet.patch b/target/linux/aruba-2.6/patches/010-ar2313_enet.patch deleted file mode 100644 index 0488bd4548..0000000000 --- a/target/linux/aruba-2.6/patches/010-ar2313_enet.patch +++ /dev/null @@ -1,2175 +0,0 @@ -diff -Nur linux-2.6.17/drivers/net/ar2313/ar2313.c linux-2.6.17-owrt/drivers/net/ar2313/ar2313.c ---- linux-2.6.17/drivers/net/ar2313/ar2313.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/drivers/net/ar2313/ar2313.c 2006-06-19 12:57:27.000000000 +0200 -@@ -0,0 +1,1649 @@ -+/* -+ * ar2313.c: Linux driver for the Atheros AR2313 Ethernet device. -+ * -+ * Copyright 2004 by Sameer Dekate, . -+ * Copyright (C) 2006 Imre Kaloz -+ * -+ * Thanks to Atheros for providing hardware and documentation -+ * enabling me to write this driver. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * Additional credits: -+ * This code is taken from John Taylor's Sibyte driver and then -+ * modified for the AR2313. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+extern char *getenv(char *e); -+ -+ -+#undef INDEX_DEBUG -+#define DEBUG 0 -+#define DEBUG_TX 0 -+#define DEBUG_RX 0 -+#define DEBUG_INT 0 -+#define DEBUG_MC 0 -+#define DEBUG_ERR 1 -+ -+#ifndef __exit -+#define __exit -+#endif -+ -+#ifndef min -+#define min(a,b) (((a)<(b))?(a):(b)) -+#endif -+ -+#ifndef SMP_CACHE_BYTES -+#define SMP_CACHE_BYTES L1_CACHE_BYTES -+#endif -+ -+#ifndef SET_MODULE_OWNER -+#define SET_MODULE_OWNER(dev) {do{} while(0);} -+#define AR2313_MOD_INC_USE_COUNT MOD_INC_USE_COUNT -+#define AR2313_MOD_DEC_USE_COUNT MOD_DEC_USE_COUNT -+#else -+#define AR2313_MOD_INC_USE_COUNT {do{} while(0);} -+#define AR2313_MOD_DEC_USE_COUNT {do{} while(0);} -+#endif -+ -+#define PHYSADDR(a) ((_ACAST32_ (a)) & 0x1fffffff) -+ -+static char ethaddr[18] = "00:00:00:00:00:00"; -+static char ifname[5] = "bond"; -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,52) -+module_param_string(ethaddr, ethaddr, 18, 0); -+module_param_string(ifname, ifname, 5, 0); -+#else -+MODULE_PARM(ethaddr, "c18"); -+MODULE_PARM(ifname, "c5"); -+#endif -+ -+#define AR2313_MBOX_SET_BIT 0x8 -+ -+#define BOARD_IDX_STATIC 0 -+#define BOARD_IDX_OVERFLOW -1 -+ -+/* margot includes */ -+#include -+ -+#include "ar2313_msg.h" -+#include "platform.h" -+#include "dma.h" -+#include "ar2313.h" -+ -+/* -+ * New interrupt handler strategy: -+ * -+ * An old interrupt handler worked using the traditional method of -+ * replacing an skbuff with a new one when a packet arrives. However -+ * the rx rings do not need to contain a static number of buffer -+ * descriptors, thus it makes sense to move the memory allocation out -+ * of the main interrupt handler and do it in a bottom half handler -+ * and only allocate new buffers when the number of buffers in the -+ * ring is below a certain threshold. In order to avoid starving the -+ * NIC under heavy load it is however necessary to force allocation -+ * when hitting a minimum threshold. The strategy for alloction is as -+ * follows: -+ * -+ * RX_LOW_BUF_THRES - allocate buffers in the bottom half -+ * RX_PANIC_LOW_THRES - we are very low on buffers, allocate -+ * the buffers in the interrupt handler -+ * RX_RING_THRES - maximum number of buffers in the rx ring -+ * -+ * One advantagous side effect of this allocation approach is that the -+ * entire rx processing can be done without holding any spin lock -+ * since the rx rings and registers are totally independent of the tx -+ * ring and its registers. This of course includes the kmalloc's of -+ * new skb's. Thus start_xmit can run in parallel with rx processing -+ * and the memory allocation on SMP systems. -+ * -+ * Note that running the skb reallocation in a bottom half opens up -+ * another can of races which needs to be handled properly. In -+ * particular it can happen that the interrupt handler tries to run -+ * the reallocation while the bottom half is either running on another -+ * CPU or was interrupted on the same CPU. To get around this the -+ * driver uses bitops to prevent the reallocation routines from being -+ * reentered. -+ * -+ * TX handling can also be done without holding any spin lock, wheee -+ * this is fun! since tx_csm is only written to by the interrupt -+ * handler. -+ */ -+ -+/* -+ * Threshold values for RX buffer allocation - the low water marks for -+ * when to start refilling the rings are set to 75% of the ring -+ * sizes. It seems to make sense to refill the rings entirely from the -+ * intrrupt handler once it gets below the panic threshold, that way -+ * we don't risk that the refilling is moved to another CPU when the -+ * one running the interrupt handler just got the slab code hot in its -+ * cache. -+ */ -+#define RX_RING_SIZE AR2313_DESCR_ENTRIES -+#define RX_PANIC_THRES (RX_RING_SIZE/4) -+#define RX_LOW_THRES ((3*RX_RING_SIZE)/4) -+#define CRC_LEN 4 -+#define RX_OFFSET 2 -+ -+#define AR2313_BUFSIZE (AR2313_MTU + ETH_HLEN + CRC_LEN + RX_OFFSET) -+ -+#ifdef MODULE -+MODULE_AUTHOR("Sameer Dekate"); -+MODULE_DESCRIPTION("AR2313 Ethernet driver"); -+#endif -+ -+#if DEBUG -+static char version[] __initdata = -+ "ar2313.c: v0.02 2006/06/19 sdekate@arubanetworks.com\n"; -+#endif /* DEBUG */ -+ -+#define virt_to_phys(x) ((u32)(x) & 0x1fffffff) -+ -+// prototypes -+static short armiiread(short phy, short reg); -+static void armiiwrite(short phy, short reg, short data); -+#ifdef TX_TIMEOUT -+static void ar2313_tx_timeout(struct net_device *dev); -+#endif -+static void ar2313_halt(struct net_device *dev); -+static void rx_tasklet_func(unsigned long data); -+static void ar2313_multicast_list(struct net_device *dev); -+ -+static struct net_device *root_dev; -+static int probed __initdata = 0; -+static unsigned long ar_eth_base; -+static unsigned long ar_dma_base; -+static unsigned long ar_int_base; -+static unsigned long ar_int_mac_mask; -+static unsigned long ar_int_phy_mask; -+ -+#ifndef ERR -+#define ERR(fmt, args...) printk("%s: " fmt, __func__, ##args) -+#endif -+ -+static int parse_mac_addr(struct net_device *dev, char* macstr){ -+ int i, j; -+ unsigned char result, value; -+ -+ for (i=0; i<6; i++) { -+ result = 0; -+ if (i != 5 && *(macstr+2) != ':') { -+ ERR("invalid mac address format: %d %c\n", -+ i, *(macstr+2)); -+ return -EINVAL; -+ } -+ for (j=0; j<2; j++) { -+ if (isxdigit(*macstr) && (value = isdigit(*macstr) ? *macstr-'0' : -+ toupper(*macstr)-'A'+10) < 16) -+ { -+ result = result*16 + value; -+ macstr++; -+ } -+ else { -+ ERR("invalid mac address " -+ "character: %c\n", *macstr); -+ return -EINVAL; -+ } -+ } -+ -+ macstr++; -+ dev->dev_addr[i] = result; -+ } -+ -+ return 0; -+} -+ -+ -+int __init ar2313_probe(void) -+{ -+ struct net_device *dev; -+ struct ar2313_private *sp; -+ int version_disp; -+ char name[64] ; -+ -+ if (probed) -+ return -ENODEV; -+ probed++; -+ -+ version_disp = 0; -+ sprintf(name, "%s%%d", ifname) ; -+ dev = alloc_etherdev(sizeof(struct ar2313_private)); -+ -+ if (dev == NULL) { -+ printk(KERN_ERR "ar2313: Unable to allocate net_device structure!\n"); -+ return -ENOMEM; -+ } -+ -+ SET_MODULE_OWNER(dev); -+ -+ sp = dev->priv; -+ -+ sp->link = 0; -+ switch (mips_machtype) { -+ case MACH_ARUBA_AP60: -+ ar_eth_base = 0xb8100000; -+ ar_dma_base = ar_eth_base + 0x1000; -+ ar_int_base = 0x1C003020; -+ ar_int_mac_mask = RESET_ENET0|RESET_ENET1; -+ ar_int_phy_mask = RESET_EPHY0|RESET_EPHY1; -+ sp->mac = 1; -+ sp->phy = 1; -+ dev->irq = 4; -+ break; -+ -+ case MACH_ARUBA_AP40: -+ ar_eth_base = 0xb0500000; -+ ar_dma_base = ar_eth_base + 0x1000; -+ ar_int_base = 0x11000004; -+ ar_int_mac_mask = 0x800; -+ ar_int_phy_mask = 0x400; -+ sp->mac = 0; -+ sp->phy = 1; -+ dev->irq = 4; -+ break; -+ -+ case MACH_ARUBA_AP65: -+ ar_eth_base = 0xb8100000; -+ ar_dma_base = ar_eth_base + 0x1000; -+ ar_int_base = 0x1C003020; -+ ar_int_mac_mask = RESET_ENET0|RESET_ENET1; -+ ar_int_phy_mask = RESET_EPHY0|RESET_EPHY1; -+ sp->mac = 0; -+#if 0 -+ // commented out, for now -+ -+ if (mips_machtype == MACH_ARUBA_SAMSUNG) { -+ sp->phy = 0x1f; -+ } else { -+ sp->phy = 1; -+ } -+#else -+ sp->phy = 1; -+#endif -+ dev->irq = 3; -+ break; -+ -+ default: -+ printk("%s: unsupported mips_machtype=0x%lx\n", -+ __FUNCTION__, mips_machtype) ; -+ return -ENODEV; -+ } -+ -+ spin_lock_init(&sp->lock); -+ -+ /* initialize func pointers */ -+ dev->open = &ar2313_open; -+ dev->stop = &ar2313_close; -+ dev->hard_start_xmit = &ar2313_start_xmit; -+ -+ dev->get_stats = &ar2313_get_stats; -+ dev->set_multicast_list = &ar2313_multicast_list; -+#ifdef TX_TIMEOUT -+ dev->tx_timeout = ar2313_tx_timeout; -+ dev->watchdog_timeo = AR2313_TX_TIMEOUT; -+#endif -+ dev->do_ioctl = &ar2313_ioctl; -+ -+ // SAMEER: do we need this? -+ dev->features |= NETIF_F_SG | NETIF_F_HIGHDMA; -+ -+ tasklet_init(&sp->rx_tasklet, rx_tasklet_func, (unsigned long) dev); -+ tasklet_disable(&sp->rx_tasklet); -+ -+ /* display version info if adapter is found */ -+ if (!version_disp) { -+ /* set display flag to TRUE so that */ -+ /* we only display this string ONCE */ -+ version_disp = 1; -+#if DEBUG -+ printk(version); -+#endif /* DEBUG */ -+ } -+ -+ request_region(PHYSADDR(ETHERNET_BASE), ETHERNET_SIZE*ETHERNET_MACS, -+ "AR2313ENET"); -+ -+ sp->eth_regs = ioremap_nocache(PHYSADDR(ETHERNET_BASE + ETHERNET_SIZE*sp->mac), -+ sizeof(*sp->eth_regs)); -+ if (!sp->eth_regs) { -+ printk("Can't remap eth registers\n"); -+ return(-ENXIO); -+ } -+ -+ sp->dma_regs = ioremap_nocache(PHYSADDR(DMA_BASE + DMA_SIZE*sp->mac), -+ sizeof(*sp->dma_regs)); -+ dev->base_addr = (unsigned int) sp->dma_regs; -+ if (!sp->dma_regs) { -+ printk("Can't remap DMA registers\n"); -+ return(-ENXIO); -+ } -+ -+ sp->int_regs = ioremap_nocache(PHYSADDR(INTERRUPT_BASE), -+ sizeof(*sp->int_regs)); -+ if (!sp->int_regs) { -+ printk("Can't remap INTERRUPT registers\n"); -+ return(-ENXIO); -+ } -+ -+ strncpy(sp->name, "Atheros AR2313", sizeof (sp->name) - 1); -+ sp->name [sizeof (sp->name) - 1] = '\0'; -+ -+ { -+ char mac[32]; -+ extern char *getenv(char *e); -+ unsigned char def_mac[6] = {0, 0x0b, 0x86, 0xba, 0xdb, 0xad}; -+ memset(mac, 0, 32); -+ memcpy(mac, getenv("ethaddr"), 17); -+ if (parse_mac_addr(dev, mac)){ -+ printk("%s: MAC address not found, using default\n", __func__); -+ memcpy(dev->dev_addr, def_mac, 6); -+ } -+ } -+ -+ sp->board_idx = BOARD_IDX_STATIC; -+ -+ if (ar2313_init(dev)) { -+ /* -+ * ar2313_init() calls ar2313_init_cleanup() on error. -+ */ -+ kfree(dev); -+ return -ENODEV; -+ } -+ -+ if (register_netdev(dev)){ -+ printk("%s: register_netdev failed\n", __func__); -+ return -1; -+ } -+ -+ printk("%s: %s: %02x:%02x:%02x:%02x:%02x:%02x, irq %d\n", -+ dev->name, sp->name, -+ dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2], -+ dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5], -+ dev->irq); -+ -+ /* start link poll timer */ -+ ar2313_setup_timer(dev); -+ -+ /* -+ * Register the device -+ */ -+ root_dev = dev; -+ -+ return 0; -+} -+ -+#if 0 -+static void ar2313_dump_regs(struct net_device *dev) -+{ -+ unsigned int *ptr, i; -+ struct ar2313_private *sp = (struct ar2313_private *)dev->priv; -+ -+ ptr = (unsigned int *)sp->eth_regs; -+ for(i=0; i< (sizeof(ETHERNET_STRUCT)/ sizeof(unsigned int)); i++, ptr++) { -+ printk("ENET: %08x = %08x\n", (int)ptr, *ptr); -+ } -+ -+ ptr = (unsigned int *)sp->dma_regs; -+ for(i=0; i< (sizeof(DMA)/ sizeof(unsigned int)); i++, ptr++) { -+ printk("DMA: %08x = %08x\n", (int)ptr, *ptr); -+ } -+ -+ ptr = (unsigned int *)sp->int_regs; -+ for(i=0; i< (sizeof(INTERRUPT)/ sizeof(unsigned int)); i++, ptr++){ -+ printk("INT: %08x = %08x\n", (int)ptr, *ptr); -+ } -+ -+ for (i = 0; i < AR2313_DESCR_ENTRIES; i++) { -+ ar2313_descr_t *td = &sp->tx_ring[i]; -+ printk("Tx desc %2d: %08x %08x %08x %08x\n", i, -+ td->status, td->devcs, td->addr, td->descr); -+ } -+} -+#endif -+ -+#ifdef TX_TIMEOUT -+static void -+ar2313_tx_timeout(struct net_device *dev) -+{ -+ struct ar2313_private *sp = (struct ar2313_private *)dev->priv; -+ unsigned long flags; -+ -+#if DEBUG_TX -+ printk("Tx timeout\n"); -+#endif -+ spin_lock_irqsave(&sp->lock, flags); -+ ar2313_restart(dev); -+ spin_unlock_irqrestore(&sp->lock, flags); -+} -+#endif -+ -+#if DEBUG_MC -+static void -+printMcList(struct net_device *dev) -+{ -+ struct dev_mc_list *list = dev->mc_list; -+ int num=0, i; -+ while(list){ -+ printk("%d MC ADDR ", num); -+ for(i=0;idmi_addrlen;i++) { -+ printk(":%02x", list->dmi_addr[i]); -+ } -+ list = list->next; -+ printk("\n"); -+ } -+} -+#endif -+ -+/* -+ * Set or clear the multicast filter for this adaptor. -+ * THIS IS ABSOLUTE CRAP, disabled -+ */ -+static void -+ar2313_multicast_list(struct net_device *dev) -+{ -+ /* -+ * Always listen to broadcasts and -+ * treat IFF bits independently -+ */ -+ struct ar2313_private *sp = (struct ar2313_private *)dev->priv; -+ unsigned int recognise; -+ -+ recognise = sp->eth_regs->mac_control; -+ -+ if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */ -+ recognise |= MAC_CONTROL_PR; -+ } else { -+ recognise &= ~MAC_CONTROL_PR; -+ } -+ -+ if ((dev->flags & IFF_ALLMULTI) || (dev->mc_count > 15)) { -+#if DEBUG_MC -+ printMcList(dev); -+ printk("%s: all MULTICAST mc_count %d\n", __FUNCTION__, dev->mc_count); -+#endif -+ recognise |= MAC_CONTROL_PM;/* all multicast */ -+ } else if (dev->mc_count > 0) { -+#if DEBUG_MC -+ printMcList(dev); -+ printk("%s: mc_count %d\n", __FUNCTION__, dev->mc_count); -+#endif -+ recognise |= MAC_CONTROL_PM; /* for the time being */ -+ } -+#if DEBUG_MC -+ printk("%s: setting %08x to %08x\n", __FUNCTION__, (int)sp->eth_regs, recognise); -+#endif -+ -+ sp->eth_regs->mac_control = recognise; -+} -+ -+static void rx_tasklet_cleanup(struct net_device *dev) -+{ -+ struct ar2313_private *sp = dev->priv; -+ -+ /* -+ * Tasklet may be scheduled. Need to get it removed from the list -+ * since we're about to free the struct. -+ */ -+ -+ sp->unloading = 1; -+ tasklet_enable(&sp->rx_tasklet); -+ tasklet_kill(&sp->rx_tasklet); -+} -+ -+static void __exit ar2313_module_cleanup(void) -+{ -+ rx_tasklet_cleanup(root_dev); -+ ar2313_init_cleanup(root_dev); -+ unregister_netdev(root_dev); -+ kfree(root_dev); -+ release_region(PHYSADDR(ETHERNET_BASE), ETHERNET_SIZE*ETHERNET_MACS); -+} -+ -+ -+/* -+ * Restart the AR2313 ethernet controller. -+ */ -+static int ar2313_restart(struct net_device *dev) -+{ -+ /* disable interrupts */ -+ disable_irq(dev->irq); -+ -+ /* stop mac */ -+ ar2313_halt(dev); -+ -+ /* initialize */ -+ ar2313_init(dev); -+ -+ /* enable interrupts */ -+ enable_irq(dev->irq); -+ -+ return 0; -+} -+ -+extern unsigned long mips_machtype; -+ -+int __init ar2313_module_init(void) -+{ -+ int status=-1; -+ switch (mips_machtype){ -+ case MACH_ARUBA_AP60: -+ case MACH_ARUBA_AP65: -+ case MACH_ARUBA_AP40: -+ root_dev = NULL; -+ status = ar2313_probe(); -+ break; -+ } -+ return status; -+} -+ -+ -+module_init(ar2313_module_init); -+module_exit(ar2313_module_cleanup); -+ -+ -+static void ar2313_free_descriptors(struct net_device *dev) -+{ -+ struct ar2313_private *sp = dev->priv; -+ if (sp->rx_ring != NULL) { -+ kfree((void*)KSEG0ADDR(sp->rx_ring)); -+ sp->rx_ring = NULL; -+ sp->tx_ring = NULL; -+ } -+} -+ -+ -+static int ar2313_allocate_descriptors(struct net_device *dev) -+{ -+ struct ar2313_private *sp = dev->priv; -+ int size; -+ int j; -+ ar2313_descr_t *space; -+ -+ if(sp->rx_ring != NULL){ -+ printk("%s: already done.\n", __FUNCTION__); -+ return 0; -+ } -+ -+ size = (sizeof(ar2313_descr_t) * (AR2313_DESCR_ENTRIES * AR2313_QUEUES)); -+ space = kmalloc(size, GFP_KERNEL); -+ if (space == NULL) -+ return 1; -+ -+ /* invalidate caches */ -+ dma_cache_inv((unsigned int)space, size); -+ -+ /* now convert pointer to KSEG1 */ -+ space = (ar2313_descr_t *)KSEG1ADDR(space); -+ -+ memset((void *)space, 0, size); -+ -+ sp->rx_ring = space; -+ space += AR2313_DESCR_ENTRIES; -+ -+ sp->tx_ring = space; -+ space += AR2313_DESCR_ENTRIES; -+ -+ /* Initialize the transmit Descriptors */ -+ for (j = 0; j < AR2313_DESCR_ENTRIES; j++) { -+ ar2313_descr_t *td = &sp->tx_ring[j]; -+ td->status = 0; -+ td->devcs = DMA_TX1_CHAINED; -+ td->addr = 0; -+ td->descr = K1_TO_PHYS(&sp->tx_ring[(j+1) & (AR2313_DESCR_ENTRIES-1)]); -+ } -+ -+ return 0; -+} -+ -+ -+/* -+ * Generic cleanup handling data allocated during init. Used when the -+ * module is unloaded or if an error occurs during initialization -+ */ -+static void ar2313_init_cleanup(struct net_device *dev) -+{ -+ struct ar2313_private *sp = dev->priv; -+ struct sk_buff *skb; -+ int j; -+ -+ ar2313_free_descriptors(dev); -+ -+ if (sp->eth_regs) iounmap((void*)sp->eth_regs); -+ if (sp->dma_regs) iounmap((void*)sp->dma_regs); -+ -+ if (sp->rx_skb) { -+ for (j = 0; j < AR2313_DESCR_ENTRIES; j++) { -+ skb = sp->rx_skb[j]; -+ if (skb) { -+ sp->rx_skb[j] = NULL; -+ dev_kfree_skb(skb); -+ } -+ } -+ kfree(sp->rx_skb); -+ sp->rx_skb = NULL; -+ } -+ -+ if (sp->tx_skb) { -+ for (j = 0; j < AR2313_DESCR_ENTRIES; j++) { -+ skb = sp->tx_skb[j]; -+ if (skb) { -+ sp->tx_skb[j] = NULL; -+ dev_kfree_skb(skb); -+ } -+ } -+ kfree(sp->tx_skb); -+ sp->tx_skb = NULL; -+ } -+} -+ -+static int ar2313_setup_timer(struct net_device *dev) -+{ -+ struct ar2313_private *sp = dev->priv; -+ -+ init_timer(&sp->link_timer); -+ -+ sp->link_timer.function = ar2313_link_timer_fn; -+ sp->link_timer.data = (int) dev; -+ sp->link_timer.expires = jiffies + HZ; -+ -+ add_timer(&sp->link_timer); -+ return 0; -+ -+} -+ -+static void ar2313_link_timer_fn(unsigned long data) -+{ -+ struct net_device *dev = (struct net_device *) data; -+ struct ar2313_private *sp = dev->priv; -+ -+ // see if the link status changed -+ // This was needed to make sure we set the PHY to the -+ // autonegotiated value of half or full duplex. -+ ar2313_check_link(dev); -+ -+ // Loop faster when we don't have link. -+ // This was needed to speed up the AP bootstrap time. -+ if(sp->link == 0) { -+ mod_timer(&sp->link_timer, jiffies + HZ/2); -+ } else { -+ mod_timer(&sp->link_timer, jiffies + LINK_TIMER); -+ } -+} -+ -+static void ar2313_check_link(struct net_device *dev) -+{ -+ struct ar2313_private *sp = dev->priv; -+ u16 phyData; -+ -+ phyData = armiiread(sp->phy, MII_BMSR); -+ if (sp->phyData != phyData) { -+ if (phyData & BMSR_LSTATUS) { -+ /* link is present, ready link partner ability to deterine duplexity */ -+ int duplex = 0; -+ u16 reg; -+ -+ sp->link = 1; -+ reg = armiiread(sp->phy, MII_BMCR); -+ if (reg & BMCR_ANENABLE) { -+ /* auto neg enabled */ -+ reg = armiiread(sp->phy, MII_LPA); -+ duplex = (reg & (LPA_100FULL|LPA_10FULL))? 1:0; -+ } else { -+ /* no auto neg, just read duplex config */ -+ duplex = (reg & BMCR_FULLDPLX)? 1:0; -+ } -+ -+ printk(KERN_INFO "%s: Configuring MAC for %s duplex\n", dev->name, -+ (duplex)? "full":"half"); -+ -+ if (duplex) { -+ /* full duplex */ -+ sp->eth_regs->mac_control = ((sp->eth_regs->mac_control | MAC_CONTROL_F) & -+ ~MAC_CONTROL_DRO); -+ } else { -+ /* half duplex */ -+ sp->eth_regs->mac_control = ((sp->eth_regs->mac_control | MAC_CONTROL_DRO) & -+ ~MAC_CONTROL_F); -+ } -+ } else { -+ /* no link */ -+ sp->link = 0; -+ } -+ sp->phyData = phyData; -+ } -+} -+ -+static int -+ar2313_reset_reg(struct net_device *dev) -+{ -+ struct ar2313_private *sp = (struct ar2313_private *)dev->priv; -+ unsigned int ethsal, ethsah; -+ unsigned int flags; -+ -+ *sp->int_regs |= ar_int_mac_mask; -+ mdelay(10); -+ *sp->int_regs &= ~ar_int_mac_mask; -+ mdelay(10); -+ *sp->int_regs |= ar_int_phy_mask; -+ mdelay(10); -+ *sp->int_regs &= ~ar_int_phy_mask; -+ mdelay(10); -+ -+ sp->dma_regs->bus_mode = (DMA_BUS_MODE_SWR); -+ mdelay(10); -+ sp->dma_regs->bus_mode = ((32 << DMA_BUS_MODE_PBL_SHIFT) | DMA_BUS_MODE_BLE); -+ -+ /* enable interrupts */ -+ sp->dma_regs->intr_ena = (DMA_STATUS_AIS | -+ DMA_STATUS_NIS | -+ DMA_STATUS_RI | -+ DMA_STATUS_TI | -+ DMA_STATUS_FBE); -+ sp->dma_regs->xmt_base = K1_TO_PHYS(sp->tx_ring); -+ sp->dma_regs->rcv_base = K1_TO_PHYS(sp->rx_ring); -+ sp->dma_regs->control = (DMA_CONTROL_SR | DMA_CONTROL_ST | DMA_CONTROL_SF); -+ -+ sp->eth_regs->flow_control = (FLOW_CONTROL_FCE); -+ sp->eth_regs->vlan_tag = (0x8100); -+ -+ /* Enable Ethernet Interface */ -+ flags = (MAC_CONTROL_TE | /* transmit enable */ -+ MAC_CONTROL_PM | /* pass mcast */ -+ MAC_CONTROL_F | /* full duplex */ -+ MAC_CONTROL_HBD); /* heart beat disabled */ -+ -+ if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */ -+ flags |= MAC_CONTROL_PR; -+ } -+ sp->eth_regs->mac_control = flags; -+ -+ /* Set all Ethernet station address registers to their initial values */ -+ ethsah = ((((u_int)(dev->dev_addr[5]) << 8) & (u_int)0x0000FF00) | -+ (((u_int)(dev->dev_addr[4]) << 0) & (u_int)0x000000FF)); -+ -+ ethsal = ((((u_int)(dev->dev_addr[3]) << 24) & (u_int)0xFF000000) | -+ (((u_int)(dev->dev_addr[2]) << 16) & (u_int)0x00FF0000) | -+ (((u_int)(dev->dev_addr[1]) << 8) & (u_int)0x0000FF00) | -+ (((u_int)(dev->dev_addr[0]) << 0) & (u_int)0x000000FF) ); -+ -+ sp->eth_regs->mac_addr[0] = ethsah; -+ sp->eth_regs->mac_addr[1] = ethsal; -+ -+ mdelay(10); -+ -+ return(0); -+} -+ -+ -+static int ar2313_init(struct net_device *dev) -+{ -+ struct ar2313_private *sp = dev->priv; -+ int ecode=0; -+ -+ /* -+ * Allocate descriptors -+ */ -+ if (ar2313_allocate_descriptors(dev)) { -+ printk("%s: %s: ar2313_allocate_descriptors failed\n", -+ dev->name, __FUNCTION__); -+ ecode = -EAGAIN; -+ goto init_error; -+ } -+ -+ /* -+ * Get the memory for the skb rings. -+ */ -+ if(sp->rx_skb == NULL) { -+ sp->rx_skb = kmalloc(sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES, GFP_KERNEL); -+ if (!(sp->rx_skb)) { -+ printk("%s: %s: rx_skb kmalloc failed\n", -+ dev->name, __FUNCTION__); -+ ecode = -EAGAIN; -+ goto init_error; -+ } -+ } -+ memset(sp->rx_skb, 0, sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES); -+ -+ if(sp->tx_skb == NULL) { -+ sp->tx_skb = kmalloc(sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES, GFP_KERNEL); -+ if (!(sp->tx_skb)) { -+ printk("%s: %s: tx_skb kmalloc failed\n", -+ dev->name, __FUNCTION__); -+ ecode = -EAGAIN; -+ goto init_error; -+ } -+ } -+ memset(sp->tx_skb, 0, sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES); -+ -+ /* -+ * Set tx_csm before we start receiving interrupts, otherwise -+ * the interrupt handler might think it is supposed to process -+ * tx ints before we are up and running, which may cause a null -+ * pointer access in the int handler. -+ */ -+ sp->rx_skbprd = 0; -+ sp->cur_rx = 0; -+ sp->tx_prd = 0; -+ sp->tx_csm = 0; -+ -+ /* -+ * Zero the stats before starting the interface -+ */ -+ memset(&sp->stats, 0, sizeof(sp->stats)); -+ -+ /* -+ * We load the ring here as there seem to be no way to tell the -+ * firmware to wipe the ring without re-initializing it. -+ */ -+ ar2313_load_rx_ring(dev, RX_RING_SIZE); -+ -+ /* -+ * Init hardware -+ */ -+ ar2313_reset_reg(dev); -+ -+ /* -+ * Get the IRQ -+ */ -+ ecode = request_irq(dev->irq, &ar2313_interrupt, SA_SHIRQ | SA_INTERRUPT, dev->name, dev); -+ if (ecode) { -+ printk(KERN_WARNING "%s: %s: Requested IRQ %d is busy\n", -+ dev->name, __FUNCTION__, dev->irq); -+ goto init_error; -+ } -+ -+#if 0 -+ // commented out, for now -+ -+ if(mips_machtype == MACH_ARUBA_SAMSUNG) { -+ int i; -+ /* configure Marvell 88E6060 */ -+ /* reset chip */ -+ armiiwrite(0x1f, 0xa, 0xa130); -+ do { -+ udelay(1000); -+ i = armiiread(sp->phy, 0xa); -+ } while (i & 0x8000); -+ -+ /* configure MAC address */ -+ armiiwrite(sp->phy, 0x1, dev->dev_addr[0] << 8 | dev->dev_addr[1]); -+ armiiwrite(sp->phy, 0x2, dev->dev_addr[2] << 8 | dev->dev_addr[3]); -+ armiiwrite(sp->phy, 0x3, dev->dev_addr[4] << 8 | dev->dev_addr[5]); -+ -+ /* set ports to forwarding */ -+ armiiwrite(0x18, 0x4, 0x3); -+ armiiwrite(0x1c, 0x4, 0x3); -+ armiiwrite(0x1d, 0x4, 0x3); -+ } -+#endif -+ -+ tasklet_enable(&sp->rx_tasklet); -+ -+ return 0; -+ -+ init_error: -+ ar2313_init_cleanup(dev); -+ return ecode; -+} -+ -+/* -+ * Load the rx ring. -+ * -+ * Loading rings is safe without holding the spin lock since this is -+ * done only before the device is enabled, thus no interrupts are -+ * generated and by the interrupt handler/tasklet handler. -+ */ -+static void ar2313_load_rx_ring(struct net_device *dev, int nr_bufs) -+{ -+ -+ struct ar2313_private *sp = ((struct net_device *)dev)->priv; -+ short i, idx; -+ -+ idx = sp->rx_skbprd; -+ -+ for (i = 0; i < nr_bufs; i++) { -+ struct sk_buff *skb; -+ ar2313_descr_t *rd; -+ -+ if (sp->rx_skb[idx]) { -+#if DEBUG_RX -+ printk(KERN_INFO "ar2313 rx refill full\n"); -+#endif /* DEBUG */ -+ break; -+ } -+ -+ // partha: create additional room for the second GRE fragment -+ skb = alloc_skb(AR2313_BUFSIZE+128, GFP_ATOMIC); -+ if (!skb) { -+ printk("\n\n\n\n %s: No memory in system\n\n\n\n", __FUNCTION__); -+ break; -+ } -+ // partha: create additional room in the front for tx pkt capture -+ skb_reserve(skb, 32); -+ -+ /* -+ * Make sure IP header starts on a fresh cache line. -+ */ -+ skb->dev = dev; -+ skb_reserve(skb, RX_OFFSET); -+ sp->rx_skb[idx] = skb; -+ -+ rd = (ar2313_descr_t *) &sp->rx_ring[idx]; -+ -+ /* initialize dma descriptor */ -+ rd->devcs = ((AR2313_BUFSIZE << DMA_RX1_BSIZE_SHIFT) | -+ DMA_RX1_CHAINED); -+ rd->addr = virt_to_phys(skb->data); -+ rd->descr = virt_to_phys(&sp->rx_ring[(idx+1) & (AR2313_DESCR_ENTRIES-1)]); -+ rd->status = DMA_RX_OWN; -+ -+ idx = DSC_NEXT(idx); -+ } -+ -+ if (!i) { -+#if DEBUG_ERR -+ printk(KERN_INFO "Out of memory when allocating standard receive buffers\n"); -+#endif /* DEBUG */ -+ } else { -+ sp->rx_skbprd = idx; -+ } -+ -+ return; -+} -+ -+#define AR2313_MAX_PKTS_PER_CALL 64 -+ -+static int ar2313_rx_int(struct net_device *dev) -+{ -+ struct ar2313_private *sp = dev->priv; -+ struct sk_buff *skb, *skb_new; -+ ar2313_descr_t *rxdesc; -+ unsigned int status; -+ u32 idx; -+ int pkts = 0; -+ int rval; -+ -+ idx = sp->cur_rx; -+ -+ /* process at most the entire ring and then wait for another interrupt */ -+ while(1) { -+ -+ rxdesc = &sp->rx_ring[idx]; -+ status = rxdesc->status; -+ if (status & DMA_RX_OWN) { -+ /* SiByte owns descriptor or descr not yet filled in */ -+ rval = 0; -+ break; -+ } -+ -+ if (++pkts > AR2313_MAX_PKTS_PER_CALL) { -+ rval = 1; -+ break; -+ } -+ -+#if DEBUG_RX -+ printk("index %d\n", idx); -+ printk("RX status %08x\n", rxdesc->status); -+ printk("RX devcs %08x\n", rxdesc->devcs ); -+ printk("RX addr %08x\n", rxdesc->addr ); -+ printk("RX descr %08x\n", rxdesc->descr ); -+#endif -+ -+ if ((status & (DMA_RX_ERROR|DMA_RX_ERR_LENGTH)) && -+ (!(status & DMA_RX_LONG))){ -+#if DEBUG_RX -+ printk("%s: rx ERROR %08x\n", __FUNCTION__, status); -+#endif -+ sp->stats.rx_errors++; -+ sp->stats.rx_dropped++; -+ -+ /* add statistics counters */ -+ if (status & DMA_RX_ERR_CRC) sp->stats.rx_crc_errors++; -+ if (status & DMA_RX_ERR_COL) sp->stats.rx_over_errors++; -+ if (status & DMA_RX_ERR_LENGTH) -+ sp->stats.rx_length_errors++; -+ if (status & DMA_RX_ERR_RUNT) sp->stats.rx_over_errors++; -+ if (status & DMA_RX_ERR_DESC) sp->stats.rx_over_errors++; -+ -+ } else { -+ /* alloc new buffer. */ -+ skb_new = dev_alloc_skb(AR2313_BUFSIZE + RX_OFFSET + 128); -+ if (skb_new != NULL) { -+ -+ skb = sp->rx_skb[idx]; -+ /* set skb */ -+ skb_put(skb, ((status >> DMA_RX_LEN_SHIFT) & 0x3fff) - CRC_LEN); -+ -+#ifdef CONFIG_MERLOT -+ if ((dev->am_pkt_handler == NULL) || -+ (dev->am_pkt_handler(skb, dev) == 0)) { -+#endif -+ sp->stats.rx_bytes += skb->len; -+ skb->protocol = eth_type_trans(skb, dev); -+ /* pass the packet to upper layers */ -+ -+#ifdef CONFIG_MERLOT -+ if (dev->asap_netif_rx) -+ dev->asap_netif_rx(skb); -+ else -+#endif -+ netif_rx(skb); -+#ifdef CONFIG_MERLOT -+ } -+#endif -+ skb_new->dev = dev; -+ /* 16 bit align */ -+ skb_reserve(skb_new, RX_OFFSET+32); -+ /* reset descriptor's curr_addr */ -+ rxdesc->addr = virt_to_phys(skb_new->data); -+ -+ sp->stats.rx_packets++; -+ sp->rx_skb[idx] = skb_new; -+ -+ } else { -+ sp->stats.rx_dropped++; -+ } -+ } -+ -+ rxdesc->devcs = ((AR2313_BUFSIZE << DMA_RX1_BSIZE_SHIFT) | -+ DMA_RX1_CHAINED); -+ rxdesc->status = DMA_RX_OWN; -+ -+ idx = DSC_NEXT(idx); -+ } -+ -+ sp->cur_rx = idx; -+ -+ return rval; -+} -+ -+ -+static void ar2313_tx_int(struct net_device *dev) -+{ -+ struct ar2313_private *sp = dev->priv; -+ u32 idx; -+ struct sk_buff *skb; -+ ar2313_descr_t *txdesc; -+ unsigned int status=0; -+ -+ idx = sp->tx_csm; -+ -+ while (idx != sp->tx_prd) { -+ -+ txdesc = &sp->tx_ring[idx]; -+ -+#if DEBUG_TX -+ printk("%s: TXINT: csm=%d idx=%d prd=%d status=%x devcs=%x addr=%08x descr=%x\n", -+ dev->name, sp->tx_csm, idx, sp->tx_prd, -+ txdesc->status, txdesc->devcs, txdesc->addr, txdesc->descr); -+#endif /* DEBUG */ -+ -+ if ((status = txdesc->status) & DMA_TX_OWN) { -+ /* ar2313 dma still owns descr */ -+ break; -+ } -+ /* done with this descriptor */ -+ txdesc->status = 0; -+ -+ if (status & DMA_TX_ERROR){ -+ sp->stats.tx_errors++; -+ sp->stats.tx_dropped++; -+ if(status & DMA_TX_ERR_UNDER) -+ sp->stats.tx_fifo_errors++; -+ if(status & DMA_TX_ERR_HB) -+ sp->stats.tx_heartbeat_errors++; -+ if(status & (DMA_TX_ERR_LOSS | -+ DMA_TX_ERR_LINK)) -+ sp->stats.tx_carrier_errors++; -+ if (status & (DMA_TX_ERR_LATE| -+ DMA_TX_ERR_COL | -+ DMA_TX_ERR_JABBER | -+ DMA_TX_ERR_DEFER)) -+ sp->stats.tx_aborted_errors++; -+ } else { -+ /* transmit OK */ -+ sp->stats.tx_packets++; -+ } -+ -+ skb = sp->tx_skb[idx]; -+ sp->tx_skb[idx] = NULL; -+ idx = DSC_NEXT(idx); -+ sp->stats.tx_bytes += skb->len; -+ dev_kfree_skb_irq(skb); -+ } -+ -+ sp->tx_csm = idx; -+ -+ return; -+} -+ -+ -+static void -+rx_tasklet_func(unsigned long data) -+{ -+ struct net_device *dev = (struct net_device *) data; -+ struct ar2313_private *sp = dev->priv; -+ -+ if (sp->unloading) { -+ return; -+ } -+ -+ if (ar2313_rx_int(dev)) { -+ tasklet_hi_schedule(&sp->rx_tasklet); -+ } -+ else { -+ unsigned long flags; -+ spin_lock_irqsave(&sp->lock, flags); -+ sp->dma_regs->intr_ena |= DMA_STATUS_RI; -+ spin_unlock_irqrestore(&sp->lock, flags); -+ } -+} -+ -+static void -+rx_schedule(struct net_device *dev) -+{ -+ struct ar2313_private *sp = dev->priv; -+ -+ sp->dma_regs->intr_ena &= ~DMA_STATUS_RI; -+ -+ tasklet_hi_schedule(&sp->rx_tasklet); -+} -+ -+static irqreturn_t ar2313_interrupt(int irq, void *dev_id) -+{ -+ struct net_device *dev = (struct net_device *)dev_id; -+ struct ar2313_private *sp = dev->priv; -+ unsigned int status, enabled; -+ -+ /* clear interrupt */ -+ /* -+ * Don't clear RI bit if currently disabled. -+ */ -+ status = sp->dma_regs->status; -+ enabled = sp->dma_regs->intr_ena; -+ sp->dma_regs->status = status & enabled; -+ -+ if (status & DMA_STATUS_NIS) { -+ /* normal status */ -+ /* -+ * Don't schedule rx processing if interrupt -+ * is already disabled. -+ */ -+ if (status & enabled & DMA_STATUS_RI) { -+ /* receive interrupt */ -+ rx_schedule(dev); -+ } -+ if (status & DMA_STATUS_TI) { -+ /* transmit interrupt */ -+ ar2313_tx_int(dev); -+ } -+ } -+ -+ if (status & DMA_STATUS_AIS) { -+#if DEBUG_INT -+ printk("%s: AIS set %08x & %x\n", __FUNCTION__, -+ status, (DMA_STATUS_FBE | DMA_STATUS_TPS)); -+#endif -+ /* abnormal status */ -+ if (status & (DMA_STATUS_FBE | DMA_STATUS_TPS)) { -+ ar2313_restart(dev); -+ } -+ } -+ return IRQ_HANDLED; -+} -+ -+ -+static int ar2313_open(struct net_device *dev) -+{ -+ struct ar2313_private *sp; -+ -+ sp = dev->priv; -+ -+ dev->mtu = 1500; -+ netif_start_queue(dev); -+ -+ sp->eth_regs->mac_control |= MAC_CONTROL_RE; -+ -+ AR2313_MOD_INC_USE_COUNT; -+ -+ return 0; -+} -+ -+static void ar2313_halt(struct net_device *dev) -+{ -+ struct ar2313_private *sp = dev->priv; -+ int j; -+ -+ tasklet_disable(&sp->rx_tasklet); -+ -+ /* kill the MAC */ -+ sp->eth_regs->mac_control &= ~(MAC_CONTROL_RE | /* disable Receives */ -+ MAC_CONTROL_TE); /* disable Transmits */ -+ /* stop dma */ -+ sp->dma_regs->control = 0; -+ sp->dma_regs->bus_mode = DMA_BUS_MODE_SWR; -+ -+ /* place phy and MAC in reset */ -+ *sp->int_regs |= (ar_int_mac_mask | ar_int_phy_mask); -+ -+ /* free buffers on tx ring */ -+ for (j = 0; j < AR2313_DESCR_ENTRIES; j++) { -+ struct sk_buff *skb; -+ ar2313_descr_t *txdesc; -+ -+ txdesc = &sp->tx_ring[j]; -+ txdesc->descr = 0; -+ -+ skb = sp->tx_skb[j]; -+ if (skb) { -+ dev_kfree_skb(skb); -+ sp->tx_skb[j] = NULL; -+ } -+ } -+} -+ -+/* -+ * close should do nothing. Here's why. It's called when -+ * 'ifconfig bond0 down' is run. If it calls free_irq then -+ * the irq is gone forever ! When bond0 is made 'up' again, -+ * the ar2313_open () does not call request_irq (). Worse, -+ * the call to ar2313_halt() generates a WDOG reset due to -+ * the write to 'sp->int_regs' and the box reboots. -+ * Commenting this out is good since it allows the -+ * system to resume when bond0 is made up again. -+ */ -+static int ar2313_close(struct net_device *dev) -+{ -+#if 0 -+ /* -+ * Disable interrupts -+ */ -+ disable_irq(dev->irq); -+ -+ /* -+ * Without (or before) releasing irq and stopping hardware, this -+ * is an absolute non-sense, by the way. It will be reset instantly -+ * by the first irq. -+ */ -+ netif_stop_queue(dev); -+ -+ /* stop the MAC and DMA engines */ -+ ar2313_halt(dev); -+ -+ /* release the interrupt */ -+ free_irq(dev->irq, dev); -+ -+#endif -+ AR2313_MOD_DEC_USE_COUNT; -+ return 0; -+} -+ -+static int ar2313_start_xmit(struct sk_buff *skb, struct net_device *dev) -+{ -+ struct ar2313_private *sp = dev->priv; -+ ar2313_descr_t *td; -+ u32 idx; -+ -+ idx = sp->tx_prd; -+ td = &sp->tx_ring[idx]; -+ -+ if (td->status & DMA_TX_OWN) { -+#if DEBUG_TX -+ printk("%s: No space left to Tx\n", __FUNCTION__); -+#endif -+ /* free skbuf and lie to the caller that we sent it out */ -+ sp->stats.tx_dropped++; -+ dev_kfree_skb(skb); -+ -+ /* restart transmitter in case locked */ -+ sp->dma_regs->xmt_poll = 0; -+ return 0; -+ } -+ -+ /* Setup the transmit descriptor. */ -+ td->devcs = ((skb->len << DMA_TX1_BSIZE_SHIFT) | -+ (DMA_TX1_LS|DMA_TX1_IC|DMA_TX1_CHAINED)); -+ td->addr = virt_to_phys(skb->data); -+ td->status = DMA_TX_OWN; -+ -+ /* kick transmitter last */ -+ sp->dma_regs->xmt_poll = 0; -+ -+#if DEBUG_TX -+ printk("index %d\n", idx); -+ printk("TX status %08x\n", td->status); -+ printk("TX devcs %08x\n", td->devcs ); -+ printk("TX addr %08x\n", td->addr ); -+ printk("TX descr %08x\n", td->descr ); -+#endif -+ -+ sp->tx_skb[idx] = skb; -+ idx = DSC_NEXT(idx); -+ sp->tx_prd = idx; -+ -+ //dev->trans_start = jiffies; -+ -+ return 0; -+} -+ -+static int netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd) -+{ -+ struct ar2313_private *np = dev->priv; -+ u32 tmp; -+ -+ ecmd->supported = -+ (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | -+ SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full | -+ SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII); -+ -+ ecmd->port = PORT_TP; -+ /* only supports internal transceiver */ -+ ecmd->transceiver = XCVR_INTERNAL; -+ /* not sure what this is for */ -+ ecmd->phy_address = 1; -+ -+ ecmd->advertising = ADVERTISED_MII; -+ tmp = armiiread(np->phy, MII_ADVERTISE); -+ if (tmp & ADVERTISE_10HALF) -+ ecmd->advertising |= ADVERTISED_10baseT_Half; -+ if (tmp & ADVERTISE_10FULL) -+ ecmd->advertising |= ADVERTISED_10baseT_Full; -+ if (tmp & ADVERTISE_100HALF) -+ ecmd->advertising |= ADVERTISED_100baseT_Half; -+ if (tmp & ADVERTISE_100FULL) -+ ecmd->advertising |= ADVERTISED_100baseT_Full; -+ -+ tmp = armiiread(np->phy, MII_BMCR); -+ if (tmp & BMCR_ANENABLE) { -+ ecmd->advertising |= ADVERTISED_Autoneg; -+ ecmd->autoneg = AUTONEG_ENABLE; -+ } else { -+ ecmd->autoneg = AUTONEG_DISABLE; -+ } -+ -+ if (ecmd->autoneg == AUTONEG_ENABLE) { -+ tmp = armiiread(np->phy, MII_LPA); -+ if (tmp & (LPA_100FULL|LPA_10FULL)) { -+ ecmd->duplex = DUPLEX_FULL; -+ } else { -+ ecmd->duplex = DUPLEX_HALF; -+ } -+ if (tmp & (LPA_100FULL|LPA_100HALF)) { -+ ecmd->speed = SPEED_100; -+ } else { -+ ecmd->speed = SPEED_10; -+ } -+ } else { -+ if (tmp & BMCR_FULLDPLX) { -+ ecmd->duplex = DUPLEX_FULL; -+ } else { -+ ecmd->duplex = DUPLEX_HALF; -+ } -+ if (tmp & BMCR_SPEED100) { -+ ecmd->speed = SPEED_100; -+ } else { -+ ecmd->speed = SPEED_10; -+ } -+ } -+ -+ /* ignore maxtxpkt, maxrxpkt for now */ -+ -+ return 0; -+} -+ -+static int netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd) -+{ -+ struct ar2313_private *np = dev->priv; -+ u32 tmp; -+ -+ if (ecmd->speed != SPEED_10 && ecmd->speed != SPEED_100) -+ return -EINVAL; -+ if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL) -+ return -EINVAL; -+ if (ecmd->port != PORT_TP) -+ return -EINVAL; -+ if (ecmd->transceiver != XCVR_INTERNAL) -+ return -EINVAL; -+ if (ecmd->autoneg != AUTONEG_DISABLE && ecmd->autoneg != AUTONEG_ENABLE) -+ return -EINVAL; -+ /* ignore phy_address, maxtxpkt, maxrxpkt for now */ -+ -+ /* WHEW! now lets bang some bits */ -+ -+ tmp = armiiread(np->phy, MII_BMCR); -+ if (ecmd->autoneg == AUTONEG_ENABLE) { -+ /* turn on autonegotiation */ -+ tmp |= BMCR_ANENABLE; -+ printk("%s: Enabling auto-neg\n", dev->name); -+ } else { -+ /* turn off auto negotiation, set speed and duplexity */ -+ tmp &= ~(BMCR_ANENABLE | BMCR_SPEED100 | BMCR_FULLDPLX); -+ if (ecmd->speed == SPEED_100) -+ tmp |= BMCR_SPEED100; -+ if (ecmd->duplex == DUPLEX_FULL) -+ tmp |= BMCR_FULLDPLX; -+ printk("%s: Hard coding %d/%s\n", dev->name, -+ (ecmd->speed == SPEED_100)? 100:10, -+ (ecmd->duplex == DUPLEX_FULL)? "full":"half"); -+ } -+ armiiwrite(np->phy, MII_BMCR, tmp); -+ np->phyData = 0; -+ return 0; -+} -+ -+static int netdev_ethtool_ioctl(struct net_device *dev, void *useraddr) -+{ -+ struct ar2313_private *np = dev->priv; -+ u32 cmd; -+ -+ if (get_user(cmd, (u32 *)useraddr)) -+ return -EFAULT; -+ -+ switch (cmd) { -+ /* get settings */ -+ case ETHTOOL_GSET: { -+ struct ethtool_cmd ecmd = { ETHTOOL_GSET }; -+ spin_lock_irq(&np->lock); -+ netdev_get_ecmd(dev, &ecmd); -+ spin_unlock_irq(&np->lock); -+ if (copy_to_user(useraddr, &ecmd, sizeof(ecmd))) -+ return -EFAULT; -+ return 0; -+ } -+ /* set settings */ -+ case ETHTOOL_SSET: { -+ struct ethtool_cmd ecmd; -+ int r; -+ if (copy_from_user(&ecmd, useraddr, sizeof(ecmd))) -+ return -EFAULT; -+ spin_lock_irq(&np->lock); -+ r = netdev_set_ecmd(dev, &ecmd); -+ spin_unlock_irq(&np->lock); -+ return r; -+ } -+ /* restart autonegotiation */ -+ case ETHTOOL_NWAY_RST: { -+ int tmp; -+ int r = -EINVAL; -+ /* if autoneg is off, it's an error */ -+ tmp = armiiread(np->phy, MII_BMCR); -+ if (tmp & BMCR_ANENABLE) { -+ tmp |= (BMCR_ANRESTART); -+ armiiwrite(np->phy, MII_BMCR, tmp); -+ r = 0; -+ } -+ return r; -+ } -+ /* get link status */ -+ case ETHTOOL_GLINK: { -+ struct ethtool_value edata = {ETHTOOL_GLINK}; -+ edata.data = (armiiread(np->phy, MII_BMSR)&BMSR_LSTATUS) ? 1:0; -+ if (copy_to_user(useraddr, &edata, sizeof(edata))) -+ return -EFAULT; -+ return 0; -+ } -+ } -+ -+ return -EOPNOTSUPP; -+} -+ -+static int ar2313_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) -+{ -+ struct mii_ioctl_data *data = (struct mii_ioctl_data *)&ifr->ifr_data; -+ -+ switch (cmd) { -+ case SIOCDEVPRIVATE: { -+ struct ar2313_cmd scmd; -+ -+ if (copy_from_user(&scmd, ifr->ifr_data, sizeof(scmd))) -+ return -EFAULT; -+ -+#if DEBUG -+ printk("%s: ioctl devprivate c=%d a=%x l=%d m=%d d=%x,%x\n", -+ dev->name, scmd.cmd, -+ scmd.address, scmd.length, -+ scmd.mailbox, scmd.data[0], scmd.data[1]); -+#endif /* DEBUG */ -+ -+ switch (scmd.cmd) { -+ case AR2313_READ_DATA: -+ if(scmd.length==4){ -+ scmd.data[0] = *((u32*)scmd.address); -+ } else if(scmd.length==2) { -+ scmd.data[0] = *((u16*)scmd.address); -+ } else if (scmd.length==1) { -+ scmd.data[0] = *((u8*)scmd.address); -+ } else { -+ return -EOPNOTSUPP; -+ } -+ if(copy_to_user(ifr->ifr_data, &scmd, sizeof(scmd))) -+ return -EFAULT; -+ break; -+ -+ case AR2313_WRITE_DATA: -+ if(scmd.length==4){ -+ *((u32*)scmd.address) = scmd.data[0]; -+ } else if(scmd.length==2) { -+ *((u16*)scmd.address) = scmd.data[0]; -+ } else if (scmd.length==1) { -+ *((u8*)scmd.address) = scmd.data[0]; -+ } else { -+ return -EOPNOTSUPP; -+ } -+ break; -+ -+ case AR2313_GET_VERSION: -+ // SAMEER: sprintf((char*) &scmd, "%s", ARUBA_VERSION); -+ if(copy_to_user(ifr->ifr_data, &scmd, sizeof(scmd))) -+ return -EFAULT; -+ break; -+ -+ default: -+ return -EOPNOTSUPP; -+ } -+ return 0; -+ } -+ -+ case SIOCETHTOOL: -+ return netdev_ethtool_ioctl(dev, (void *) ifr->ifr_data); -+ -+ case SIOCGMIIPHY: /* Get address of MII PHY in use. */ -+ data->phy_id = 1; -+ /* Fall Through */ -+ -+ case SIOCGMIIREG: /* Read MII PHY register. */ -+ case SIOCDEVPRIVATE+1: /* for binary compat, remove in 2.5 */ -+ data->val_out = armiiread(data->phy_id & 0x1f, -+ data->reg_num & 0x1f); -+ return 0; -+ case SIOCSMIIREG: /* Write MII PHY register. */ -+ case SIOCDEVPRIVATE+2: /* for binary compat, remove in 2.5 */ -+ if (!capable(CAP_NET_ADMIN)) -+ return -EPERM; -+ armiiwrite(data->phy_id & 0x1f, -+ data->reg_num & 0x1f, data->val_in); -+ return 0; -+ -+ case SIOCSIFHWADDR: -+ if (copy_from_user(dev->dev_addr, ifr->ifr_data, sizeof(dev->dev_addr))) -+ return -EFAULT; -+ return 0; -+ -+ case SIOCGIFHWADDR: -+ if (copy_to_user(ifr->ifr_data, dev->dev_addr, sizeof(dev->dev_addr))) -+ return -EFAULT; -+ return 0; -+ -+ default: -+ break; -+ } -+ -+ return -EOPNOTSUPP; -+} -+ -+static struct net_device_stats *ar2313_get_stats(struct net_device *dev) -+{ -+ struct ar2313_private *sp = dev->priv; -+ return &sp->stats; -+} -+ -+static short -+armiiread(short phy, short reg) -+{ -+ volatile ETHERNET_STRUCT * ethernet; -+ -+ ethernet = (volatile ETHERNET_STRUCT *)ETHERNET_BASE; /* always MAC 0 */ -+ ethernet->mii_addr = ((reg << MII_ADDR_REG_SHIFT) | -+ (phy << MII_ADDR_PHY_SHIFT)); -+ while (ethernet->mii_addr & MII_ADDR_BUSY); -+ return (ethernet->mii_data >> MII_DATA_SHIFT); -+} -+ -+static void -+armiiwrite(short phy, short reg, short data) -+{ -+ volatile ETHERNET_STRUCT * ethernet; -+ -+ ethernet = (volatile ETHERNET_STRUCT *)ETHERNET_BASE; /* always MAC 0 */ -+ while (ethernet->mii_addr & MII_ADDR_BUSY); -+ ethernet->mii_data = data << MII_DATA_SHIFT; -+ ethernet->mii_addr = ((reg << MII_ADDR_REG_SHIFT) | -+ (phy << MII_ADDR_PHY_SHIFT) | -+ MII_ADDR_WRITE); -+} -+ -diff -Nur linux-2.6.17/drivers/net/ar2313/ar2313.h linux-2.6.17-owrt/drivers/net/ar2313/ar2313.h ---- linux-2.6.17/drivers/net/ar2313/ar2313.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/drivers/net/ar2313/ar2313.h 2006-06-19 12:05:29.000000000 +0200 -@@ -0,0 +1,190 @@ -+#ifndef _AR2313_H_ -+#define _AR2313_H_ -+ -+#include -+#include -+#include "platform.h" -+ -+extern unsigned long mips_machtype; -+ -+#undef ETHERNET_BASE -+#define ETHERNET_BASE ar_eth_base -+#define ETHERNET_SIZE 0x00100000 -+#define ETHERNET_MACS 2 -+ -+#undef DMA_BASE -+#define DMA_BASE ar_dma_base -+#define DMA_SIZE 0x00100000 -+ -+ -+/* -+ * probe link timer - 5 secs -+ */ -+#define LINK_TIMER (5*HZ) -+ -+/* -+ * Interrupt register base address -+ */ -+#define INTERRUPT_BASE PHYS_TO_K1(ar_int_base) -+ -+/* -+ * Reset Register -+ */ -+#define AR531X_RESET (AR531X_RESETTMR + 0x0020) -+#define RESET_SYSTEM 0x00000001 /* cold reset full system */ -+#define RESET_PROC 0x00000002 /* cold reset MIPS core */ -+#define RESET_WLAN0 0x00000004 /* cold reset WLAN MAC and BB */ -+#define RESET_EPHY0 0x00000008 /* cold reset ENET0 phy */ -+#define RESET_EPHY1 0x00000010 /* cold reset ENET1 phy */ -+#define RESET_ENET0 0x00000020 /* cold reset ENET0 mac */ -+#define RESET_ENET1 0x00000040 /* cold reset ENET1 mac */ -+ -+#define IS_DMA_TX_INT(X) (((X) & (DMA_STATUS_TI)) != 0) -+#define IS_DMA_RX_INT(X) (((X) & (DMA_STATUS_RI)) != 0) -+#define IS_DRIVER_OWNED(X) (((X) & (DMA_TX_OWN)) == 0) -+ -+#ifndef K1_TO_PHYS -+// hack -+#define K1_TO_PHYS(x) (((unsigned int)(x)) & 0x1FFFFFFF) /* kseg1 to physical */ -+#endif -+ -+#ifndef PHYS_TO_K1 -+// hack -+#define PHYS_TO_K1(x) (((unsigned int)(x)) | 0xA0000000) /* physical to kseg1 */ -+#endif -+ -+#define AR2313_TX_TIMEOUT (HZ/4) -+ -+/* -+ * Rings -+ */ -+#define DSC_RING_ENTRIES_SIZE (AR2313_DESCR_ENTRIES * sizeof(struct desc)) -+#define DSC_NEXT(idx) ((idx + 1) & (AR2313_DESCR_ENTRIES - 1)) -+ -+static inline int tx_space (u32 csm, u32 prd) -+{ -+ return (csm - prd - 1) & (AR2313_DESCR_ENTRIES - 1); -+} -+ -+#if MAX_SKB_FRAGS -+#define TX_RESERVED (MAX_SKB_FRAGS+1) /* +1 for message header */ -+#define tx_ring_full(csm, prd) (tx_space(csm, prd) <= TX_RESERVED) -+#else -+#define tx_ring_full 0 -+#endif -+ -+#define AR2313_MBGET 2 -+#define AR2313_MBSET 3 -+#define AR2313_PCI_RECONFIG 4 -+#define AR2313_PCI_DUMP 5 -+#define AR2313_TEST_PANIC 6 -+#define AR2313_TEST_NULLPTR 7 -+#define AR2313_READ_DATA 8 -+#define AR2313_WRITE_DATA 9 -+#define AR2313_GET_VERSION 10 -+#define AR2313_TEST_HANG 11 -+#define AR2313_SYNC 12 -+ -+ -+struct ar2313_cmd { -+ u32 cmd; -+ u32 address; /* virtual address of image */ -+ u32 length; /* size of image to download */ -+ u32 mailbox; /* mailbox to get/set */ -+ u32 data[2]; /* contents of mailbox to read/write */ -+}; -+ -+ -+/* -+ * Struct private for the Sibyte. -+ * -+ * Elements are grouped so variables used by the tx handling goes -+ * together, and will go into the same cache lines etc. in order to -+ * avoid cache line contention between the rx and tx handling on SMP. -+ * -+ * Frequently accessed variables are put at the beginning of the -+ * struct to help the compiler generate better/shorter code. -+ */ -+struct ar2313_private -+{ -+ int version; -+ u32 mb[2]; -+ -+ volatile ETHERNET_STRUCT *eth_regs; -+ volatile DMA *dma_regs; -+ volatile u32 *int_regs; -+ -+ spinlock_t lock; /* Serialise access to device */ -+ -+ /* -+ * RX and TX descriptors, must be adjacent -+ */ -+ ar2313_descr_t *rx_ring; -+ ar2313_descr_t *tx_ring; -+ -+ -+ struct sk_buff **rx_skb; -+ struct sk_buff **tx_skb; -+ -+ /* -+ * RX elements -+ */ -+ u32 rx_skbprd; -+ u32 cur_rx; -+ -+ /* -+ * TX elements -+ */ -+ u32 tx_prd; -+ u32 tx_csm; -+ -+ /* -+ * Misc elements -+ */ -+ int board_idx; -+ char name[48]; -+ struct net_device_stats stats; -+ struct { -+ u32 address; -+ u32 length; -+ char *mapping; -+ } desc; -+ -+ -+ struct timer_list link_timer; -+ unsigned short phy; /* merlot phy = 1, samsung phy = 0x1f */ -+ unsigned short mac; -+ unsigned short link; /* 0 - link down, 1 - link up */ -+ u16 phyData; -+ -+ struct tasklet_struct rx_tasklet; -+ int unloading; -+}; -+ -+ -+/* -+ * Prototypes -+ */ -+static int ar2313_init(struct net_device *dev); -+#ifdef TX_TIMEOUT -+static void ar2313_tx_timeout(struct net_device *dev); -+#endif -+#if 0 -+static void ar2313_multicast_list(struct net_device *dev); -+#endif -+static int ar2313_restart(struct net_device *dev); -+#if DEBUG -+static void ar2313_dump_regs(struct net_device *dev); -+#endif -+static void ar2313_load_rx_ring(struct net_device *dev, int bufs); -+static irqreturn_t ar2313_interrupt(int irq, void *dev_id); -+static int ar2313_open(struct net_device *dev); -+static int ar2313_start_xmit(struct sk_buff *skb, struct net_device *dev); -+static int ar2313_close(struct net_device *dev); -+static int ar2313_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); -+static void ar2313_init_cleanup(struct net_device *dev); -+static int ar2313_setup_timer(struct net_device *dev); -+static void ar2313_link_timer_fn(unsigned long data); -+static void ar2313_check_link(struct net_device *dev); -+static struct net_device_stats *ar2313_get_stats(struct net_device *dev); -+#endif /* _AR2313_H_ */ -diff -Nur linux-2.6.17/drivers/net/ar2313/ar2313_msg.h linux-2.6.17-owrt/drivers/net/ar2313/ar2313_msg.h ---- linux-2.6.17/drivers/net/ar2313/ar2313_msg.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/drivers/net/ar2313/ar2313_msg.h 2006-06-19 12:05:29.000000000 +0200 -@@ -0,0 +1,17 @@ -+#ifndef _AR2313_MSG_H_ -+#define _AR2313_MSG_H_ -+ -+#define AR2313_MTU 1692 -+#define AR2313_PRIOS 1 -+#define AR2313_QUEUES (2*AR2313_PRIOS) -+ -+#define AR2313_DESCR_ENTRIES 64 -+ -+typedef struct { -+ volatile unsigned int status; // OWN, Device control and status. -+ volatile unsigned int devcs; // pkt Control bits + Length -+ volatile unsigned int addr; // Current Address. -+ volatile unsigned int descr; // Next descriptor in chain. -+} ar2313_descr_t; -+ -+#endif /* _AR2313_MSG_H_ */ -diff -Nur linux-2.6.17/drivers/net/ar2313/dma.h linux-2.6.17-owrt/drivers/net/ar2313/dma.h ---- linux-2.6.17/drivers/net/ar2313/dma.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/drivers/net/ar2313/dma.h 2006-06-19 12:05:29.000000000 +0200 -@@ -0,0 +1,135 @@ -+#ifndef __ARUBA_DMA_H__ -+#define __ARUBA_DMA_H__ -+ -+/******************************************************************************* -+ * -+ * Copyright 2002 Integrated Device Technology, Inc. -+ * All rights reserved. -+ * -+ * DMA register definition. -+ * -+ * File : $Id: dma.h,v 1.3 2002/06/06 18:34:03 astichte Exp $ -+ * -+ * Author : ryan.holmQVist@idt.com -+ * Date : 20011005 -+ * Update : -+ * $Log: dma.h,v $ -+ * Revision 1.3 2002/06/06 18:34:03 astichte -+ * Added XXX_PhysicalAddress and XXX_VirtualAddress -+ * -+ * Revision 1.2 2002/06/05 18:30:46 astichte -+ * Removed IDTField -+ * -+ * Revision 1.1 2002/05/29 17:33:21 sysarch -+ * jba File moved from vcode/include/idt/acacia -+ * -+ * -+ ******************************************************************************/ -+ -+#define AR_BIT(x) (1 << (x)) -+#define DMA_RX_ERR_CRC AR_BIT(1) -+#define DMA_RX_ERR_DRIB AR_BIT(2) -+#define DMA_RX_ERR_MII AR_BIT(3) -+#define DMA_RX_EV2 AR_BIT(5) -+#define DMA_RX_ERR_COL AR_BIT(6) -+#define DMA_RX_LONG AR_BIT(7) -+#define DMA_RX_LS AR_BIT(8) /* last descriptor */ -+#define DMA_RX_FS AR_BIT(9) /* first descriptor */ -+#define DMA_RX_MF AR_BIT(10) /* multicast frame */ -+#define DMA_RX_ERR_RUNT AR_BIT(11) /* runt frame */ -+#define DMA_RX_ERR_LENGTH AR_BIT(12) /* length error */ -+#define DMA_RX_ERR_DESC AR_BIT(14) /* descriptor error */ -+#define DMA_RX_ERROR AR_BIT(15) /* error summary */ -+#define DMA_RX_LEN_MASK 0x3fff0000 -+#define DMA_RX_LEN_SHIFT 16 -+#define DMA_RX_FILT AR_BIT(30) -+#define DMA_RX_OWN AR_BIT(31) /* desc owned by DMA controller */ -+ -+#define DMA_RX1_BSIZE_MASK 0x000007ff -+#define DMA_RX1_BSIZE_SHIFT 0 -+#define DMA_RX1_CHAINED AR_BIT(24) -+#define DMA_RX1_RER AR_BIT(25) -+ -+#define DMA_TX_ERR_UNDER AR_BIT(1) /* underflow error */ -+#define DMA_TX_ERR_DEFER AR_BIT(2) /* excessive deferral */ -+#define DMA_TX_COL_MASK 0x78 -+#define DMA_TX_COL_SHIFT 3 -+#define DMA_TX_ERR_HB AR_BIT(7) /* hearbeat failure */ -+#define DMA_TX_ERR_COL AR_BIT(8) /* excessive collisions */ -+#define DMA_TX_ERR_LATE AR_BIT(9) /* late collision */ -+#define DMA_TX_ERR_LINK AR_BIT(10) /* no carrier */ -+#define DMA_TX_ERR_LOSS AR_BIT(11) /* loss of carrier */ -+#define DMA_TX_ERR_JABBER AR_BIT(14) /* transmit jabber timeout */ -+#define DMA_TX_ERROR AR_BIT(15) /* frame aborted */ -+#define DMA_TX_OWN AR_BIT(31) /* descr owned by DMA controller */ -+ -+#define DMA_TX1_BSIZE_MASK 0x000007ff -+#define DMA_TX1_BSIZE_SHIFT 0 -+#define DMA_TX1_CHAINED AR_BIT(24) /* chained descriptors */ -+#define DMA_TX1_TER AR_BIT(25) /* transmit end of ring */ -+#define DMA_TX1_FS AR_BIT(29) /* first segment */ -+#define DMA_TX1_LS AR_BIT(30) /* last segment */ -+#define DMA_TX1_IC AR_BIT(31) /* interrupt on completion */ -+ -+#define RCVPKT_LENGTH(X) (X >> 16) /* Received pkt Length */ -+ -+#define MAC_CONTROL_RE AR_BIT(2) /* receive enable */ -+#define MAC_CONTROL_TE AR_BIT(3) /* transmit enable */ -+#define MAC_CONTROL_DC AR_BIT(5) /* Deferral check*/ -+#define MAC_CONTROL_ASTP AR_BIT(8) /* Auto pad strip */ -+#define MAC_CONTROL_DRTY AR_BIT(10) /* Disable retry */ -+#define MAC_CONTROL_DBF AR_BIT(11) /* Disable bcast frames */ -+#define MAC_CONTROL_LCC AR_BIT(12) /* late collision ctrl */ -+#define MAC_CONTROL_HP AR_BIT(13) /* Hash Perfect filtering */ -+#define MAC_CONTROL_HASH AR_BIT(14) /* Unicast hash filtering */ -+#define MAC_CONTROL_HO AR_BIT(15) /* Hash only filtering */ -+#define MAC_CONTROL_PB AR_BIT(16) /* Pass Bad frames */ -+#define MAC_CONTROL_IF AR_BIT(17) /* Inverse filtering */ -+#define MAC_CONTROL_PR AR_BIT(18) /* promiscuous mode (valid frames only) */ -+#define MAC_CONTROL_PM AR_BIT(19) /* pass multicast */ -+#define MAC_CONTROL_F AR_BIT(20) /* full-duplex */ -+#define MAC_CONTROL_DRO AR_BIT(23) /* Disable Receive Own */ -+#define MAC_CONTROL_HBD AR_BIT(28) /* heart-beat disabled (MUST BE SET) */ -+#define MAC_CONTROL_BLE AR_BIT(30) /* big endian mode */ -+#define MAC_CONTROL_RA AR_BIT(31) /* receive all (valid and invalid frames) */ -+ -+#define MII_ADDR_BUSY AR_BIT(0) -+#define MII_ADDR_WRITE AR_BIT(1) -+#define MII_ADDR_REG_SHIFT 6 -+#define MII_ADDR_PHY_SHIFT 11 -+#define MII_DATA_SHIFT 0 -+ -+#define FLOW_CONTROL_FCE AR_BIT(1) -+ -+#define DMA_BUS_MODE_SWR AR_BIT(0) /* software reset */ -+#define DMA_BUS_MODE_BLE AR_BIT(7) /* big endian mode */ -+#define DMA_BUS_MODE_PBL_SHIFT 8 /* programmable burst length 32 */ -+#define DMA_BUS_MODE_DBO AR_BIT(20) /* big-endian descriptors */ -+ -+#define DMA_STATUS_TI AR_BIT(0) /* transmit interrupt */ -+#define DMA_STATUS_TPS AR_BIT(1) /* transmit process stopped */ -+#define DMA_STATUS_TU AR_BIT(2) /* transmit buffer unavailable */ -+#define DMA_STATUS_TJT AR_BIT(3) /* transmit buffer timeout */ -+#define DMA_STATUS_UNF AR_BIT(5) /* transmit underflow */ -+#define DMA_STATUS_RI AR_BIT(6) /* receive interrupt */ -+#define DMA_STATUS_RU AR_BIT(7) /* receive buffer unavailable */ -+#define DMA_STATUS_RPS AR_BIT(8) /* receive process stopped */ -+#define DMA_STATUS_ETI AR_BIT(10) /* early transmit interrupt */ -+#define DMA_STATUS_FBE AR_BIT(13) /* fatal bus interrupt */ -+#define DMA_STATUS_ERI AR_BIT(14) /* early receive interrupt */ -+#define DMA_STATUS_AIS AR_BIT(15) /* abnormal interrupt summary */ -+#define DMA_STATUS_NIS AR_BIT(16) /* normal interrupt summary */ -+#define DMA_STATUS_RS_SHIFT 17 /* receive process state */ -+#define DMA_STATUS_TS_SHIFT 20 /* transmit process state */ -+#define DMA_STATUS_EB_SHIFT 23 /* error bits */ -+ -+#define DMA_CONTROL_SR AR_BIT(1) /* start receive */ -+#define DMA_CONTROL_ST AR_BIT(13) /* start transmit */ -+#define DMA_CONTROL_SF AR_BIT(21) /* store and forward */ -+ -+#endif // __ARUBA_DMA_H__ -+ -+ -+ -+ -+ -diff -Nur linux-2.6.17/drivers/net/ar2313/Makefile linux-2.6.17-owrt/drivers/net/ar2313/Makefile ---- linux-2.6.17/drivers/net/ar2313/Makefile 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/drivers/net/ar2313/Makefile 2006-06-19 12:25:58.000000000 +0200 -@@ -0,0 +1,5 @@ -+# -+# Makefile for the AR2313 ethernet driver -+# -+ -+obj-$(CONFIG_AR2313) += ar2313.o -diff -Nur linux-2.6.17/drivers/net/ar2313/platform.h linux-2.6.17-owrt/drivers/net/ar2313/platform.h ---- linux-2.6.17/drivers/net/ar2313/platform.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.17-owrt/drivers/net/ar2313/platform.h 2006-06-19 12:05:29.000000000 +0200 -@@ -0,0 +1,128 @@ -+/******************************************************************************** -+ Title: $Source: platform.h,v $ -+ -+ Author: Dan Steinberg -+ Copyright Integrated Device Technology 2001 -+ -+ Purpose: AR2313 Register/Bit Definitions -+ -+ Update: -+ $Log: platform.h,v $ -+ -+ Notes: See Merlot architecture spec for complete details. Note, all -+ addresses are virtual addresses in kseg1 (Uncached, Unmapped). -+ -+********************************************************************************/ -+ -+#ifndef PLATFORM_H -+#define PLATFORM_H -+ -+#define BIT(x) (1 << (x)) -+ -+#define RESET_BASE 0xBC003020 -+#define RESET_VALUE 0x00000001 -+ -+/******************************************************************** -+ * Device controller -+ ********************************************************************/ -+typedef struct { -+ volatile unsigned int flash0; -+} DEVICE; -+ -+#define device (*((volatile DEVICE *) DEV_CTL_BASE)) -+ -+// DDRC register -+#define DEV_WP (1<<26) -+ -+/******************************************************************** -+ * DDR controller -+ ********************************************************************/ -+typedef struct { -+ volatile unsigned int ddrc0; -+ volatile unsigned int ddrc1; -+ volatile unsigned int ddrrefresh; -+} DDR; -+ -+#define ddr (*((volatile DDR *) DDR_BASE)) -+ -+// DDRC register -+#define DDRC_CS(i) ((i&0x3)<<0) -+#define DDRC_WE (1<<2) -+ -+/******************************************************************** -+ * Ethernet interfaces -+ ********************************************************************/ -+#define ETHERNET_BASE 0xB8200000 -+ -+// -+// New Combo structure for Both Eth0 AND eth1 -+// -+typedef struct { -+ volatile unsigned int mac_control; /* 0x00 */ -+ volatile unsigned int mac_addr[2]; /* 0x04 - 0x08*/ -+ volatile unsigned int mcast_table[2]; /* 0x0c - 0x10 */ -+ volatile unsigned int mii_addr; /* 0x14 */ -+ volatile unsigned int mii_data; /* 0x18 */ -+ volatile unsigned int flow_control; /* 0x1c */ -+ volatile unsigned int vlan_tag; /* 0x20 */ -+ volatile unsigned int pad[7]; /* 0x24 - 0x3c */ -+ volatile unsigned int ucast_table[8]; /* 0x40-0x5c */ -+ -+} ETHERNET_STRUCT; -+ -+/******************************************************************** -+ * Interrupt controller -+ ********************************************************************/ -+ -+typedef struct { -+ volatile unsigned int wdog_control; /* 0x08 */ -+ volatile unsigned int wdog_timer; /* 0x0c */ -+ volatile unsigned int misc_status; /* 0x10 */ -+ volatile unsigned int misc_mask; /* 0x14 */ -+ volatile unsigned int global_status; /* 0x18 */ -+ volatile unsigned int reserved; /* 0x1c */ -+ volatile unsigned int reset_control; /* 0x20 */ -+} INTERRUPT; -+ -+#define interrupt (*((volatile INTERRUPT *) INTERRUPT_BASE)) -+ -+#define INTERRUPT_MISC_TIMER BIT(0) -+#define INTERRUPT_MISC_AHBPROC BIT(1) -+#define INTERRUPT_MISC_AHBDMA BIT(2) -+#define INTERRUPT_MISC_GPIO BIT(3) -+#define INTERRUPT_MISC_UART BIT(4) -+#define INTERRUPT_MISC_UARTDMA BIT(5) -+#define INTERRUPT_MISC_WATCHDOG BIT(6) -+#define INTERRUPT_MISC_LOCAL BIT(7) -+ -+#define INTERRUPT_GLOBAL_ETH BIT(2) -+#define INTERRUPT_GLOBAL_WLAN BIT(3) -+#define INTERRUPT_GLOBAL_MISC BIT(4) -+#define INTERRUPT_GLOBAL_ITIMER BIT(5) -+ -+/******************************************************************** -+ * DMA controller -+ ********************************************************************/ -+#define DMA_BASE 0xB8201000 -+ -+typedef struct { -+ volatile unsigned int bus_mode; /* 0x00 (CSR0) */ -+ volatile unsigned int xmt_poll; /* 0x04 (CSR1) */ -+ volatile unsigned int rcv_poll; /* 0x08 (CSR2) */ -+ volatile unsigned int rcv_base; /* 0x0c (CSR3) */ -+ volatile unsigned int xmt_base; /* 0x10 (CSR4) */ -+ volatile unsigned int status; /* 0x14 (CSR5) */ -+ volatile unsigned int control; /* 0x18 (CSR6) */ -+ volatile unsigned int intr_ena; /* 0x1c (CSR7) */ -+ volatile unsigned int rcv_missed; /* 0x20 (CSR8) */ -+ volatile unsigned int reserved[11]; /* 0x24-0x4c (CSR9-19) */ -+ volatile unsigned int cur_tx_buf_addr; /* 0x50 (CSR20) */ -+ volatile unsigned int cur_rx_buf_addr; /* 0x50 (CSR21) */ -+} DMA; -+ -+#define dma (*((volatile DMA *) DMA_BASE)) -+ -+// macro to convert from virtual to physical address -+#define phys_addr(x) (x & 0x1fffffff) -+ -+#endif /* PLATFORM_H */ -diff -Nur linux-2.6.17/drivers/net/Kconfig linux-2.6.17-owrt/drivers/net/Kconfig ---- linux-2.6.17/drivers/net/Kconfig 2006-06-19 12:05:01.000000000 +0200 -+++ linux-2.6.17-owrt/drivers/net/Kconfig 2006-06-19 12:26:35.000000000 +0200 -@@ -310,6 +310,12 @@ - - source "drivers/net/arm/Kconfig" - -+config AR2313 -+ tristate "AR2313 Ethernet support" -+ depends on NET_ETHERNET && MACH_ARUBA -+ help -+ Support for the AR2313 Ethernet part on Aruba AP60/61 -+ - config IDT_RC32434_ETH - tristate "IDT RC32434 Local Ethernet support" - depends on NET_ETHERNET -diff -Nur linux-2.6.17/drivers/net/Makefile linux-2.6.17-owrt/drivers/net/Makefile ---- linux-2.6.17/drivers/net/Makefile 2006-06-19 12:05:01.000000000 +0200 -+++ linux-2.6.17-owrt/drivers/net/Makefile 2006-06-19 12:27:02.000000000 +0200 -@@ -12,6 +12,7 @@ - obj-$(CONFIG_CHELSIO_T1) += chelsio/ - obj-$(CONFIG_BONDING) += bonding/ - obj-$(CONFIG_GIANFAR) += gianfar_driver.o -+obj-$(CONFIG_AR2313) += ar2313/ - - gianfar_driver-objs := gianfar.o \ - gianfar_ethtool.o \ diff --git a/target/linux/aruba-2.6/patches/011-ap6x_serial_fix.patch b/target/linux/aruba-2.6/patches/011-ap6x_serial_fix.patch deleted file mode 100644 index 528d0e90fb..0000000000 --- a/target/linux/aruba-2.6/patches/011-ap6x_serial_fix.patch +++ /dev/null @@ -1,31 +0,0 @@ -diff -urN linux.old/drivers/serial/8250.c linux.net/drivers/serial/8250.c ---- linux.old/drivers/serial/8250.c 2006-01-15 07:16:02.000000000 +0100 -+++ linux.net/drivers/serial/8250.c 2006-01-30 06:12:30.509342250 +0100 -@@ -1510,7 +1510,7 @@ - { - struct uart_8250_port *up = (struct uart_8250_port *)port; - unsigned long flags; -- unsigned char lsr, iir; -+// unsigned char lsr, iir; - int retval; - - up->capabilities = uart_config[up->port.type].flags; -@@ -1615,6 +1615,8 @@ - - serial8250_set_mctrl(&up->port, up->port.mctrl); - -+// For some reason this test causes problems on the AP6x serial console -+#if 0 - /* - * Do a quick test to see if we receive an - * interrupt when we enable the TX irq. -@@ -1633,7 +1635,8 @@ - } else { - up->bugs &= ~UART_BUG_TXEN; - } -- -+#endif -+ - spin_unlock_irqrestore(&up->port.lock, flags); - - /* diff --git a/target/linux/aruba-2.6/patches/012-ehci_softirq.patch b/target/linux/aruba-2.6/patches/012-ehci_softirq.patch deleted file mode 100644 index 4c187d12b1..0000000000 --- a/target/linux/aruba-2.6/patches/012-ehci_softirq.patch +++ /dev/null @@ -1,70 +0,0 @@ -diff -Nurb linux-2.6.16.1/drivers/usb/host/ehci.h linux-patched/drivers/usb/host/ehci.h ---- linux-2.6.16.1/drivers/usb/host/ehci.h 2006-03-27 22:49:02.000000000 -0800 -+++ linux-patched/drivers/usb/host/ehci.h 2006-04-07 12:07:30.000000000 -0700 -@@ -82,6 +82,7 @@ - struct dma_pool *sitd_pool; /* sitd per split iso urb */ - - struct timer_list watchdog; -+ struct timer_list softirq; - unsigned long actions; - unsigned stamp; - unsigned long next_statechange; -diff -Nurb linux-2.6.16.1/drivers/usb/host/ehci-hcd.c linux-patched/drivers/usb/host/ehci-hcd.c ---- linux-2.6.16.1/drivers/usb/host/ehci-hcd.c 2006-03-27 22:49:02.000000000 -0800 -+++ linux-patched/drivers/usb/host/ehci-hcd.c 2006-04-07 13:20:13.000000000 -0700 -@@ -116,6 +116,7 @@ - #define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */ - #define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */ - #define EHCI_SHRINK_JIFFIES (HZ/200) /* async qh unlink delay */ -+#define EHCI_SOFTIRQ (HZ/400) - - /* Initial IRQ latency: faster than hw default */ - static int log2_irq_thresh = 0; // 0 to 6 -@@ -263,6 +264,16 @@ - #include "ehci-sched.c" - - /*-------------------------------------------------------------------------*/ -+static irqreturn_t ehci_irq (struct usb_hcd *hcd); -+ -+static void ehci_softirq (unsigned long param) -+{ -+ struct ehci_hcd *ehci = (struct ehci_hcd *) param; -+ -+ if (ehci_irq(ehci_to_hcd(ehci)) != IRQ_NONE) -+ set_bit(HCD_FLAG_SAW_IRQ, &(ehci_to_hcd(ehci))->flags); -+ mod_timer (&ehci->softirq, jiffies + EHCI_SOFTIRQ); -+} - - static void ehci_watchdog (unsigned long param) - { -@@ -280,6 +291,10 @@ - COUNT (ehci->stats.lost_iaa); - writel (STS_IAA, &ehci->regs->status); - ehci->reclaim_ready = 1; -+ if (!timer_pending(&ehci->softirq)) { -+ ehci_info(ehci, "switching to softirq\n"); -+ mod_timer (&ehci->softirq, jiffies + EHCI_SOFTIRQ); -+ } - } - } - -@@ -371,6 +388,7 @@ - - /* no more interrupts ... */ - del_timer_sync (&ehci->watchdog); -+ del_timer_sync (&ehci->softirq); - - spin_lock_irq(&ehci->lock); - if (HC_IS_RUNNING (hcd->state)) -@@ -418,6 +436,10 @@ - ehci->watchdog.function = ehci_watchdog; - ehci->watchdog.data = (unsigned long) ehci; - -+ init_timer(&ehci->softirq); -+ ehci->softirq.function = ehci_softirq; -+ ehci->softirq.data = (unsigned long) ehci; -+ - /* - * hw default: 1K periodic list heads, one per frame. - * periodic_size can shrink by USBCMD update if hcc_params allows. - diff --git a/target/linux/at91-2.6/Makefile b/target/linux/at91-2.6/Makefile deleted file mode 100644 index 982a91139f..0000000000 --- a/target/linux/at91-2.6/Makefile +++ /dev/null @@ -1,24 +0,0 @@ -# -# Copyright (C) 2006 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# -include $(TOPDIR)/rules.mk - -ARCH:=arm -BOARD:=at91 -BOARDNAME:=AT91 -FEATURES:=squashfs - -define Target/Description - Build fimware images for Figment Design Labs VersaLink board. -endef - -include $(INCLUDE_DIR)/kernel-build.mk - -#include the profiles --include profiles/*.mk - -KERNELNAME:="uImage" -$(eval $(call BuildKernel)) diff --git a/target/linux/at91-2.6/base-files/default/etc/inittab b/target/linux/at91-2.6/base-files/default/etc/inittab deleted file mode 100644 index c1b9cd7eb9..0000000000 --- a/target/linux/at91-2.6/base-files/default/etc/inittab +++ /dev/null @@ -1,5 +0,0 @@ -::sysinit:/etc/init.d/rcS -tts/0::askfirst:/bin/ash --login -ttyS0::askfirst:/bin/ash --login - -ttyS2::respawn:/sbin/getty -L ttyS2 115200 vt100 diff --git a/target/linux/at91-2.6/base-files/default/etc/ipkg.conf b/target/linux/at91-2.6/base-files/default/etc/ipkg.conf deleted file mode 100644 index 9b00f874e4..0000000000 --- a/target/linux/at91-2.6/base-files/default/etc/ipkg.conf +++ /dev/null @@ -1,3 +0,0 @@ -src snapshots http://vlink.guthrie.homedns.org/vlink2 -dest root / -dest ram /tmp diff --git a/target/linux/at91-2.6/config/default b/target/linux/at91-2.6/config/default deleted file mode 100644 index 79b053a47e..0000000000 --- a/target/linux/at91-2.6/config/default +++ /dev/null @@ -1,262 +0,0 @@ -# CONFIG_AEABI is not set -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_APM is not set -# CONFIG_ARCH_AAEC2000 is not set -CONFIG_ARCH_AT91=y -CONFIG_ARCH_AT91RM9200=y -# CONFIG_ARCH_AT91RM9200DK is not set -# CONFIG_ARCH_AT91SAM9260 is not set -# CONFIG_ARCH_AT91SAM9261 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_CLPS7500 is not set -# CONFIG_ARCH_CO285 is not set -# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_IMX is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_VERSATILE is not set -CONFIG_ARM=y -CONFIG_ARM_AT91_ETHER=y -CONFIG_ARM_THUMB=y -# CONFIG_ARPD is not set -# CONFIG_ARTHUR is not set -# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set -CONFIG_AT91_SPI=y -CONFIG_AT91_SPIDEV=y -CONFIG_AT91_VLIO=y -# CONFIG_ATM_DUMMY is not set -# CONFIG_ATM_TCP is not set -CONFIG_BASE_SMALL=0 -# CONFIG_BINFMT_AOUT is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=4096 -# CONFIG_BONDING is not set -# CONFIG_BRIDGE_NETFILTER is not set -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_BT is not set -# CONFIG_CIFS_STATS is not set -# CONFIG_CLS_U32_MARK is not set -# CONFIG_CLS_U32_PERF is not set -# CONFIG_CONFIGFS_FS is not set -CONFIG_CPU_32=y -CONFIG_CPU_32v4T=y -CONFIG_CPU_ABRT_EV4T=y -CONFIG_CPU_ARM920T=y -CONFIG_CPU_CACHE_V4WT=y -CONFIG_CPU_CACHE_VIVT=y -CONFIG_CPU_COPY_V4WB=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_WRITETHROUGH is not set -# CONFIG_CPU_ICACHE_DISABLE is not set -CONFIG_CPU_TLB_V4WBI=y -# CONFIG_CRYPTO_ANUBIS is not set -CONFIG_CRYPTO_BLKCIPHER=m -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -CONFIG_CRYPTO_CBC=m -# CONFIG_CRYPTO_CRC32C is not set -CONFIG_CRYPTO_DES=m -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HMAC=y -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_MD4 is not set -CONFIG_CRYPTO_MD5=m -# CONFIG_CRYPTO_NULL is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TEST is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_TWOFISH is not set -# CONFIG_CRYPTO_WP512 is not set -CONFIG_DAVICOM_PHY=y -# CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_DEBUG_USER is not set -# CONFIG_DM9000 is not set -CONFIG_DUMMY_CONSOLE=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FIXED_PHY is not set -# CONFIG_FPE_FASTFPE is not set -CONFIG_FPE_NWFPE=y -# CONFIG_FPE_NWFPE_XP is not set -CONFIG_FRAME_POINTER=y -CONFIG_FS_POSIX_ACL=y -# CONFIG_FW_LOADER is not set -# CONFIG_GENERIC_TIME is not set -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HW_CONSOLE=y -# CONFIG_HW_RANDOM is not set -CONFIG_HZ=100 -# CONFIG_I2C is not set -# CONFIG_IEEE80211 is not set -# CONFIG_IKCONFIG is not set -CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m -CONFIG_INITRAMFS_SOURCE="" -CONFIG_INPUT=y -# CONFIG_INPUT_EVDEV is not set -CONFIG_INPUT_MOUSEDEV=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_IP6_NF_MATCH_FRAG is not set -# CONFIG_IP6_NF_MATCH_HL is not set -# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set -# CONFIG_IP6_NF_MATCH_OPTS is not set -# CONFIG_IP6_NF_MATCH_RT is not set -# CONFIG_IP6_NF_RAW is not set -# CONFIG_IP6_NF_TARGET_HL is not set -# CONFIG_IP6_NF_TARGET_LOG is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_NF_ARPTABLES is not set -# CONFIG_IP_NF_CT_PROTO_SCTP is not set -# CONFIG_IP_NF_MATCH_ADDRTYPE is not set -# CONFIG_IP_NF_MATCH_HASHLIMIT is not set -# CONFIG_IP_NF_TARGET_LOG is not set -# CONFIG_IP_NF_TARGET_NETMAP is not set -# CONFIG_IP_NF_TARGET_SAME is not set -# CONFIG_IP_ROUTE_VERBOSE is not set -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_LEDS=y -CONFIG_LEDS_CPU=y -CONFIG_LEDS_TIMER=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=32 -# CONFIG_LIBCRC32C is not set -# CONFIG_LLC2 is not set -# CONFIG_MACH_AT91RM9200EK is not set -# CONFIG_MACH_ATEB9200 is not set -# CONFIG_MACH_CARMEVA is not set -# CONFIG_MACH_CSB337 is not set -# CONFIG_MACH_CSB637 is not set -# CONFIG_MACH_KAFA is not set -# CONFIG_MACH_KB9200 is not set -# CONFIG_MACH_ONEARM is not set -CONFIG_MACH_VLINK=y -CONFIG_MINI_FO=y -CONFIG_MMC=m -CONFIG_MMC_AT91=m -CONFIG_MMC_BLOCK=m -# CONFIG_MMC_DEBUG is not set -# CONFIG_MMC_TIFM_SD is not set -CONFIG_MTD=y -# CONFIG_MTD_ABSENT is not set -# CONFIG_MTD_AFS_PARTS is not set -CONFIG_MTD_AT91_DATAFLASH=y -CONFIG_MTD_AT91_PARTS=y -CONFIG_MTD_BLOCK=y -# CONFIG_MTD_BLOCK2MTD is not set -# CONFIG_MTD_CFI is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -CONFIG_MTD_CHAR=y -CONFIG_MTD_CMDLINE_PARTS=y -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_CONCAT is not set -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -CONFIG_MTD_MAP_BANK_WIDTH_2=y -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_OBSOLETE_CHIPS is not set -# CONFIG_MTD_ONENAND is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_PLATRAM is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_SPLIT_ROOTFS is not set -# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set -# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set -# CONFIG_NETFILTER_XT_MATCH_DCCP is not set -# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set -# CONFIG_NETFILTER_XT_MATCH_REALM is not set -# CONFIG_NETFILTER_XT_MATCH_SCTP is not set -# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set -# CONFIG_NET_CLS_ACT is not set -# CONFIG_NET_CLS_IND is not set -# CONFIG_NET_EMATCH is not set -# CONFIG_NET_IPGRE_BROADCAST is not set -# CONFIG_NET_PKTGEN is not set -# CONFIG_NET_RADIO is not set -# CONFIG_NET_SCH_NETEM is not set -# CONFIG_NEW_LEDS is not set -# CONFIG_NO_IDLE_HZ is not set -# CONFIG_NTFS_FS is not set -# CONFIG_NVRAM is not set -# CONFIG_PCCARD is not set -CONFIG_PHYLIB=y -# CONFIG_PM is not set -# CONFIG_PPPOATM is not set -# CONFIG_PPPOL2TP is not set -# CONFIG_PPP_MULTILINK is not set -# CONFIG_PPP_SYNC_TTY is not set -# CONFIG_QSEMI_PHY is not set -# CONFIG_ROMFS_FS is not set -CONFIG_RTC_LIB=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_SCSI is not set -# CONFIG_SERIAL_8250 is not set -CONFIG_SERIAL_ATMEL=y -CONFIG_SERIAL_ATMEL_CONSOLE=y -# CONFIG_SERIAL_ATMEL_TTYAT is not set -CONFIG_SERIO=y -# CONFIG_SERIO_LIBPS2 is not set -CONFIG_SERIO_RAW=y -CONFIG_SERIO_SERPORT=y -# CONFIG_SMC91X is not set -# CONFIG_SMSC_PHY is not set -# CONFIG_SOUND is not set -# CONFIG_SPARSEMEM_STATIC is not set -CONFIG_SPLIT_PTLOCK_CPUS=4096 -CONFIG_UID16=y -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_USB is not set -# CONFIG_USB_ARCH_HAS_EHCI is not set -CONFIG_VECTORS_BASE=0xffff0000 -# CONFIG_VGA_CONSOLE is not set -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -# CONFIG_WATCHDOG is not set -# CONFIG_XIP_KERNEL is not set -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_ZBOOT_ROM_TEXT=0x0 diff --git a/target/linux/at91-2.6/files/drivers/mtd/at91part.c b/target/linux/at91-2.6/files/drivers/mtd/at91part.c deleted file mode 100644 index bfa9590492..0000000000 --- a/target/linux/at91-2.6/files/drivers/mtd/at91part.c +++ /dev/null @@ -1,121 +0,0 @@ -/* - * $Id: at91part.c 6948 2007-04-15 04:01:45Z hcg $ - * - * Copyright (C) 2007 OpenWrt.org - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * Atmel AT91 flash partition table. (Modified by Hamish Guthrie). - * Based on ar7 map by Felix Fietkau. - * - */ - -#include -#include - -#include -#include -#include -#include - -static struct mtd_partition at91_parts[6]; - -static int create_mtd_partitions(struct mtd_info *master, - struct mtd_partition **pparts, - unsigned long origin) -{ - unsigned int offset, len; - unsigned int pre_size = 0x42000, root_max = 0x362400; - unsigned char buf[512]; - struct squashfs_super_block *sb = (struct squashfs_super_block *) buf; - - printk("Parsing AT91 partition map...\n"); - - at91_parts[0].name = "loaders"; - at91_parts[0].offset = 0; - at91_parts[0].size = 0x21000; - at91_parts[0].mask_flags = MTD_WRITEABLE; - - at91_parts[1].name = "ubparams"; - at91_parts[1].offset = 0x21000; - at91_parts[1].size = 0x8400; - at91_parts[1].mask_flags = 0; - - at91_parts[2].name = "kernel"; - at91_parts[2].offset = pre_size; - at91_parts[2].size = 0; - at91_parts[2].mask_flags = 0; - - at91_parts[3].name = "rootfs"; - at91_parts[3].offset = 0; - at91_parts[3].size = 0; - at91_parts[3].mask_flags = 0; - - for(offset = pre_size; offset < root_max; offset += master->erasesize) { - - memset(&buf, 0xe5, sizeof(buf)); - - if (master->read(master, offset, sizeof(buf), &len, buf) || len != sizeof(buf)) - break; - - if (*((__u32 *) buf) == SQUASHFS_MAGIC) { - printk(KERN_INFO "%s: Filesystem type: squashfs, size=0x%x\n", - master->name, (u32) sb->bytes_used); - - at91_parts[3].size = sb->bytes_used; - at91_parts[3].offset = offset; - len = at91_parts[3].offset + at91_parts[3].size; - len = ((len / (master->erasesize * 8)) + 1) * master->erasesize * 8; - at91_parts[3].size = len - at91_parts[3].offset; - at91_parts[2].size = offset - at91_parts[2].offset; - break; - } - } - - if (at91_parts[3].size == 0) { - printk(KERN_NOTICE "%s: Couldn't find root filesystem\n", master->name); - return -1; - } - - at91_parts[4].name = "rootfs_data"; - at91_parts[4].offset = root_max; - at91_parts[4].size = master->size - root_max; - at91_parts[4].mask_flags = 0; - - at91_parts[5].name = "complete"; - at91_parts[5].offset = 0; - at91_parts[5].size = master->size; - at91_parts[5].mask_flags = 0; - - *pparts = at91_parts; - return 6; -} - -static struct mtd_part_parser at91_parser = { - .owner = THIS_MODULE, - .parse_fn = create_mtd_partitions, - .name = "at91part", -}; - -static int __init at91_parser_init(void) -{ - return register_mtd_parser(&at91_parser); -} - -module_init(at91_parser_init); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Felix Fietkau, Eugene Konev, Hamish Guthrie"); -MODULE_DESCRIPTION("MTD partitioning for Atmel at91"); diff --git a/target/linux/at91-2.6/image/Config.in b/target/linux/at91-2.6/image/Config.in deleted file mode 100644 index 4335faac5a..0000000000 --- a/target/linux/at91-2.6/image/Config.in +++ /dev/null @@ -1,18 +0,0 @@ -config AT91_ROMBOOT - bool "Build romboot loader" - depends LINUX_2_6_AT91 - default y - -config AT91_UBOOT - bool "Build u-boot loader" - depends LINUX_2_6_AT91 - default y - -config UBOOT_TARGET - string "U-Boot Board Configuration" - default "vlink" - help - For all supported boards there are reqdy-to-use default - configurations available; just type "". - - diff --git a/target/linux/at91-2.6/image/Makefile b/target/linux/at91-2.6/image/Makefile deleted file mode 100644 index 73a281b808..0000000000 --- a/target/linux/at91-2.6/image/Makefile +++ /dev/null @@ -1,46 +0,0 @@ -# -# Copyright (C) 2006 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# - -include $(TOPDIR)/rules.mk -include $(INCLUDE_DIR)/image.mk - -define Build/Clean - $(MAKE) -C romboot clean - $(MAKE) -C u-boot clean -endef - -define Build/Compile - $(MAKE) -C romboot compile -# $(MAKE) -C u-boot configure - $(MAKE) -C u-boot compile - $(KDIR)/u-boot-1.1.4/tools/ubparams - cp params $(KDIR) -endef - -define Image/Prepare - cp $(LINUX_DIR)/arch/arm/boot/uImage $(KDIR)/uImage - cp $(KDIR)/romboot/romboot.bin $(KDIR)/romboot.bin - cp $(KDIR)/romboot/rbptest.bin $(KDIR)/rbptest.bin - cp $(KDIR)/u-boot-1.1.4/u-boot.bin $(KDIR)/u-boot.bin - dd if=$(KDIR)/u-boot.bin of=$(KDIR)/u-boot.block bs=100k count=1 conv=sync - cat $(KDIR)/u-boot.block $(KDIR)/params > $(KDIR)/u-boot.full -endef - -define Image/BuildKernel - cp $(KDIR)/uImage $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-uImage -endef - -define Image/Build - dd if=$(KDIR)/uImage of=$(KDIR)/uImage.block bs=8448 conv=sync - dd if=$(KDIR)/root.squashfs of=$(KDIR)/root.block bs=8448 conv=sync - cat $(KDIR)/uImage.block $(KDIR)/root.block > $(KDIR)/knlroot.bin - $(STAGING_DIR)/bin/trx -o $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL).trx -f $(KDIR)/romboot.bin -f$(KDIR)/u-boot.full -f$(KDIR)/knlroot.bin - cp $(KDIR)/rbptest.bin $(BIN_DIR) - $(call Image/Build/$(1),$(1)) -endef - -$(eval $(call BuildImage)) diff --git a/target/linux/at91-2.6/image/romboot/Makefile b/target/linux/at91-2.6/image/romboot/Makefile deleted file mode 100644 index 586a4813bd..0000000000 --- a/target/linux/at91-2.6/image/romboot/Makefile +++ /dev/null @@ -1,30 +0,0 @@ -# -# Copyright (C) 2006 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# -# $Id$ - -include $(TOPDIR)/rules.mk -include $(INCLUDE_DIR)/kernel.mk - -PKG_NAME:=romboot -PKG_VERSION:=0.1 -PKG_RELEASE:=1 - -PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME) -PKG_SOURCE:=$(PKG_NAME).tar.gz -PKG_SOURCE_URL:=http://www.teest.com/at91 -PKG_MD5SUM:= -PKG_CAT:=zcat - -CRLF_WORKAROUND=1 - -include $(INCLUDE_DIR)/package.mk - -define Build/InstallDev - dd if=$(PKG_BUILD_DIR)/romboot.bin of=$(PKG_BUILD_DIR)/romboot.block bs=32k count=1 conv=sync -endef - -$(eval $(call Build/DefaultTargets)) diff --git a/target/linux/at91-2.6/image/romboot/patches/000-fixenv.patch b/target/linux/at91-2.6/image/romboot/patches/000-fixenv.patch deleted file mode 100644 index 7c28572859..0000000000 --- a/target/linux/at91-2.6/image/romboot/patches/000-fixenv.patch +++ /dev/null @@ -1,57 +0,0 @@ -diff -uNr romboot/main.cpp romboot.new/main.cpp ---- romboot/main.cpp 2004-07-16 17:10:04.000000000 +0200 -+++ romboot.new/main.cpp 2006-03-03 02:27:37.000000000 +0100 -@@ -23,12 +23,12 @@ - #define AT91C_UBOOT_DATAFLASH_ADDR 0xC0008000 - - // crystal= 18.432MHz --//#define AT91C_PLLA_VALUE 0x2026BE04 // -> 179.712MHz --//#define AT91C_PLLA_MCK 0x0000202 -+#define AT91C_PLLA_VALUE 0x2026BE04 // -> 179.712MHz -+#define AT91C_PLLA_MCK 0x0000202 - - // crystal= 20.000MHz --#define AT91C_PLLA_VALUE 0x2023BE04 // -> 180MHz --#define AT91C_PLLA_MCK 0x0000202 -+//#define AT91C_PLLA_VALUE 0x2023BE04 // -> 180MHz -+//#define AT91C_PLLA_MCK 0x0000202 - - #define DELAY_MAIN_FREQ 1000 - #define DISP_LINE_LEN 16 -@@ -151,7 +151,7 @@ - //*----------------------------------------------------------------------------- - void AT91F_DisplayMenu(void) - { -- printf("\n\rATMEL LOADER %s %s %s\n\r", AT91C_VERSION, __DATE__, __TIME__); -+ printf("\n\rFDL LOADER %s %s %s\n\r", AT91C_VERSION, __DATE__, __TIME__); - printf(menu_separ); - AT91F_DataflashPrintInfo(); - printf(menu_separ); -@@ -306,6 +306,19 @@ - AT91F_SetPLL(); - } - -+void LedCode(void) -+{ -+ int *pRegister; -+ pRegister = (int *)0xFFFFF800; // Enable port C peripheral reg -+ *pRegister = 0x3c00; -+ pRegister = (int *)0xFFFFF810; // Output Enable reg -+ *pRegister = 0x3c00; -+ pRegister = (int *)0xFFFFF830; // Set data -+ *pRegister = 0x1400; -+ pRegister = (int *)0xFFFFF834; // Clear bits -+ *pRegister = 0x2800; -+} -+ - void AT91F_StartUboot(unsigned int dummy, void *pvoid) - { - printf("Load U-BOOT from dataflash[%x] to SDRAM[%x]\n\r", AT91C_UBOOT_DATAFLASH_ADDR, AT91C_UBOOT_ADDR); -@@ -313,6 +326,7 @@ - printf("Set PLLA to 180Mhz and Master clock to 60Mhz and start U-BOOT\n\r"); - //* Reset registers - AT91F_ResetRegisters(); -+ LedCode(); - Jump(AT91C_UBOOT_ADDR); - while(1); - } diff --git a/target/linux/at91-2.6/image/romboot/patches/001-makefile.patch b/target/linux/at91-2.6/image/romboot/patches/001-makefile.patch deleted file mode 100644 index e0995c778d..0000000000 --- a/target/linux/at91-2.6/image/romboot/patches/001-makefile.patch +++ /dev/null @@ -1,50 +0,0 @@ ---- romboot/Makefile.old 2007-03-18 09:29:20.000000000 +0100 -+++ romboot/Makefile 2007-03-18 09:29:13.000000000 +0100 -@@ -0,0 +1,47 @@ -+LINKFLAGS= -T elf32-littlearm.lds -Ttext 0 -+COMPILEFLAGS= -Os -+TARGET=romboot -+OBJFILES=cstartup_ram.o asm_isr.o jump.o at45.o com.o dataflash.o \ -+ init.o main.o stdio.o _udivsi3.o _umodsi3.o div0.o -+LIBRARIES= -+INCLUDES= -Iinclude -+ -+all:$(TARGET) -+ -+$(TARGET): $(OBJFILES) -+ $(LD) $(OBJFILES) -o $(TARGET).out $(LINKFLAGS) -n -+ $(OBJCOPY) $(TARGET).out -O binary $(TARGET).bin -+ -+asm_isr.o: asm_isr.S -+ $(CC) -c -Iinclude -o $@ $< -+ -+cstartup_ram.o: cstartup_ram.S -+ $(CC) -c -Iinclude -o $@ $< -+ -+jump.o: jump.S -+ $(CC) -c -Iinclude -o $@ $< -+ -+_udivsi3.o: _udivsi3.S -+ $(CC) -c $< -+ -+_umodsi3.o: _umodsi3.S -+ $(CC) -c $< -+ -+#%.o: %.S -+# $(CC) -c $(INCLUDES) -o $@ $< -+ -+%.o: %.cpp -+ $(CC) -c $(COMPILEFLAGS) $(INCLUDES) -o $@ $< -+ -+div0.o: div0.c -+ $(CC) -c $(COMPILEFLAGS) $< -+ -+clean: -+ rm $(OBJFILES) -f -+ rm *~ -f -+ rm $(TARGET) -f -+ -+ -+#LD="$CROSS"ld -+ -+ diff --git a/target/linux/at91-2.6/image/romboot/patches/002-Add-SD-Card.patch b/target/linux/at91-2.6/image/romboot/patches/002-Add-SD-Card.patch deleted file mode 100644 index 8ed0db9142..0000000000 --- a/target/linux/at91-2.6/image/romboot/patches/002-Add-SD-Card.patch +++ /dev/null @@ -1,1822 +0,0 @@ -diff -urN romboot.old/asm_mci_isr.S romboot/asm_mci_isr.S ---- romboot.old/asm_mci_isr.S 1970-01-01 01:00:00.000000000 +0100 -+++ romboot/asm_mci_isr.S 2007-03-22 18:52:05.000000000 +0100 -@@ -0,0 +1,75 @@ -+#include -+ -+#define ARM_MODE_USER 0x10 -+#define ARM_MODE_FIQ 0x11 -+#define ARM_MODE_IRQ 0x12 -+#define ARM_MODE_SVC 0x13 -+#define ARM_MODE_ABORT 0x17 -+#define ARM_MODE_UNDEF 0x1B -+#define ARM_MODE_SYS 0x1F -+ -+#define I_BIT 0x80 -+#define F_BIT 0x40 -+#define T_BIT 0x20 -+ -+ -+/* ----------------------------------------------------------------------------- -+ AT91F_ASM_MCI_Handler -+ --------------------- -+ Handler called by the AIC -+ -+ Save context -+ Call C handler -+ Restore context -+ ----------------------------------------------------------------------------- */ -+ -+.global AT91F_ASM_MCI_Handler -+ -+AT91F_ASM_MCI_Handler: -+/* Adjust and save LR_irq in IRQ stack */ -+ sub r14, r14, #4 -+ stmfd sp!, {r14} -+ -+/* Write in the IVR to support Protect Mode -+ No effect in Normal Mode -+ De-assert the NIRQ and clear the source in Protect Mode */ -+ ldr r14, =AT91C_BASE_AIC -+ str r14, [r14, #AIC_IVR] -+ -+/* Save SPSR and r0 in IRQ stack */ -+ mrs r14, SPSR -+ stmfd sp!, {r0, r14} -+ -+/* Enable Interrupt and Switch in SYS Mode */ -+ mrs r0, CPSR -+ bic r0, r0, #I_BIT -+ orr r0, r0, #ARM_MODE_SYS -+ msr CPSR_c, r0 -+ -+/* Save scratch/used registers and LR in User Stack */ -+ stmfd sp!, { r1-r3, r12, r14} -+ -+ ldr r1, =AT91F_MCI_Handler -+ mov r14, pc -+ bx r1 -+ -+/* Restore scratch/used registers and LR from User Stack */ -+ ldmia sp!, { r1-r3, r12, r14} -+ -+/* Disable Interrupt and switch back in IRQ mode */ -+ mrs r0, CPSR -+ bic r0, r0, #ARM_MODE_SYS -+ orr r0, r0, #I_BIT | ARM_MODE_IRQ -+ msr CPSR_c, r0 -+ -+/* Mark the End of Interrupt on the AIC */ -+ ldr r0, =AT91C_BASE_AIC -+ str r0, [r0, #AIC_EOICR] -+ -+/* Restore SPSR_irq and r0 from IRQ stack */ -+ ldmia sp!, {r0, r14} -+ msr SPSR_cxsf, r14 -+ -+/* Restore adjusted LR_irq from IRQ stack directly in the PC */ -+ ldmia sp!, {pc}^ -+ -diff -urN romboot.old/compile romboot/compile ---- romboot.old/compile 2004-08-04 18:24:24.000000000 +0200 -+++ romboot/compile 1970-01-01 01:00:00.000000000 +0100 -@@ -1,35 +0,0 @@ --#!/bin/sh -- --OUTPUT=romboot -- --CROSS=/space/arm/buildroot/build_arm_nofpu/staging_dir/bin/arm-linux- --#CROSS=/opt/cross/bin/arm-linux- --#GCC="$CROSS"gcc --GCC="$CROSS"gcc-msoft-float --LD="$CROSS"ld --OBJCOPY="$CROSS"objcopy --SIZE="$CROSS"size --OBJDUMP="$CROSS"objdump -- --LDFLAGS="-T elf32-littlearm.lds -Ttext 0" -- --$GCC asm_isr.S -c -Iinclude --$GCC cstartup_ram.S -c -Iinclude --$GCC jump.S -c -Iinclude --$GCC at45.cpp -c -Iinclude -Os --$GCC com.cpp -c -Iinclude -Os --$GCC dataflash.cpp -c -Iinclude -Os --$GCC init.cpp -c -Iinclude -Os --$GCC main.cpp -c -Iinclude -Os --$GCC -c stdio.cpp -Os --$GCC -c _udivsi3.S --$GCC -c _umodsi3.S --$GCC -c div0.c -Os -- --$LD cstartup_ram.o asm_isr.o jump.o at45.o com.o dataflash.o init.o main.o stdio.o _udivsi3.o _umodsi3.o div0.o -o $OUTPUT.out $LDFLAGS -n -- --$OBJCOPY $OUTPUT.out -O binary $OUTPUT.bin -- --$OBJDUMP -h -s $OUTPUT.out > $OUTPUT.lss -- --$SIZE $OUTPUT.out -diff -urN romboot.old/include/AT91C_MCI_Device.h romboot/include/AT91C_MCI_Device.h ---- romboot.old/include/AT91C_MCI_Device.h 1970-01-01 01:00:00.000000000 +0100 -+++ romboot/include/AT91C_MCI_Device.h 2007-03-22 18:53:51.000000000 +0100 -@@ -0,0 +1,379 @@ -+//*--------------------------------------------------------------------------- -+//* ATMEL Microcontroller Software Support - ROUSSET - -+//*--------------------------------------------------------------------------- -+//* The software is delivered "AS IS" without warranty or condition of any -+//* kind, either express, implied or statutory. This includes without -+//* limitation any warranty or condition with respect to merchantability or -+//* fitness for any particular purpose, or against the infringements of -+//* intellectual property rights of others. -+//*--------------------------------------------------------------------------- -+//* File Name : AT91C_MCI_Device.h -+//* Object : Data Flash Atmel Description File -+//* Translator : -+//* -+//* 1.0 26/11/02 FB : Creation -+//*--------------------------------------------------------------------------- -+ -+#ifndef AT91C_MCI_Device_h -+#define AT91C_MCI_Device_h -+ -+#include "AT91RM9200.h" -+#include "lib_AT91RM9200.h" -+ -+typedef unsigned int AT91S_MCIDeviceStatus; -+ -+///////////////////////////////////////////////////////////////////////////////////////////////////// -+ -+#define AT91C_CARD_REMOVED 0 -+#define AT91C_MMC_CARD_INSERTED 1 -+#define AT91C_SD_CARD_INSERTED 2 -+ -+#define AT91C_NO_ARGUMENT 0x0 -+ -+#define AT91C_FIRST_RCA 0xCAFE -+#define AT91C_MAX_MCI_CARDS 10 -+ -+#define AT91C_BUS_WIDTH_1BIT 0x00 -+#define AT91C_BUS_WIDTH_4BITS 0x02 -+ -+/* Driver State */ -+#define AT91C_MCI_IDLE 0x0 -+#define AT91C_MCI_TIMEOUT_ERROR 0x1 -+#define AT91C_MCI_RX_SINGLE_BLOCK 0x2 -+#define AT91C_MCI_RX_MULTIPLE_BLOCK 0x3 -+#define AT91C_MCI_RX_STREAM 0x4 -+#define AT91C_MCI_TX_SINGLE_BLOCK 0x5 -+#define AT91C_MCI_TX_MULTIPLE_BLOCK 0x6 -+#define AT91C_MCI_TX_STREAM 0x7 -+ -+/* TimeOut */ -+#define AT91C_TIMEOUT_CMDRDY 30 -+ -+///////////////////////////////////////////////////////////////////////////////////////////////////// -+// MMC & SDCard Structures -+///////////////////////////////////////////////////////////////////////////////////////////////////// -+ -+/*-----------------------------------------------*/ -+/* SDCard Device Descriptor Structure Definition */ -+/*-----------------------------------------------*/ -+typedef struct _AT91S_MciDeviceDesc -+{ -+ volatile unsigned char state; -+ unsigned char SDCard_bus_width; -+ -+} AT91S_MciDeviceDesc, *AT91PS_MciDeviceDesc; -+ -+/*---------------------------------------------*/ -+/* MMC & SDCard Structure Device Features */ -+/*---------------------------------------------*/ -+typedef struct _AT91S_MciDeviceFeatures -+{ -+ unsigned char Card_Inserted; // (0=AT91C_CARD_REMOVED) (1=AT91C_MMC_CARD_INSERTED) (2=AT91C_SD_CARD_INSERTED) -+ unsigned int Relative_Card_Address; // RCA -+ unsigned int Max_Read_DataBlock_Length; // 2^(READ_BL_LEN) in CSD -+ unsigned int Max_Write_DataBlock_Length; // 2^(WRITE_BL_LEN) in CSD -+ unsigned char Read_Partial; // READ_BL_PARTIAL -+ unsigned char Write_Partial; // WRITE_BL_PARTIAL -+ unsigned char Erase_Block_Enable; // ERASE_BLK_EN -+ unsigned char Read_Block_Misalignment; // READ_BLK_MISALIGN -+ unsigned char Write_Block_Misalignment; // WRITE_BLK_MISALIGN -+ unsigned char Sector_Size; // SECTOR_SIZE -+ unsigned int Memory_Capacity; // Size in bits of the device -+ -+} AT91S_MciDeviceFeatures, *AT91PS_MciDeviceFeatures ; -+ -+/*---------------------------------------------*/ -+/* MCI Device Structure Definition */ -+/*---------------------------------------------*/ -+typedef struct _AT91S_MciDevice -+{ -+ AT91PS_MciDeviceDesc pMCI_DeviceDesc; // MCI device descriptor -+ AT91PS_MciDeviceFeatures pMCI_DeviceFeatures;// Pointer on a MCI device features array -+}AT91S_MciDevice, *AT91PS_MciDevice; -+ -+///////////////////////////////////////////////////////////////////////////////////////////////////// -+// MCI_CMD Register Value -+///////////////////////////////////////////////////////////////////////////////////////////////////// -+#define AT91C_POWER_ON_INIT (0 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_INIT | AT91C_MCI_OPDCMD) -+ -+///////////////////////////////////////////////////////////////// -+// Class 0 & 1 commands: Basic commands and Read Stream commands -+///////////////////////////////////////////////////////////////// -+ -+#define AT91C_GO_IDLE_STATE_CMD (0 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE ) -+#define AT91C_MMC_GO_IDLE_STATE_CMD (0 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_OPDCMD) -+#define AT91C_MMC_SEND_OP_COND_CMD (1 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_OPDCMD) -+#define AT91C_ALL_SEND_CID_CMD (2 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_136 ) -+#define AT91C_MMC_ALL_SEND_CID_CMD (2 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_136 | AT91C_MCI_OPDCMD) -+#define AT91C_SET_RELATIVE_ADDR_CMD (3 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT ) -+#define AT91C_MMC_SET_RELATIVE_ADDR_CMD (3 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT | AT91C_MCI_OPDCMD) -+ -+#define AT91C_SET_DSR_CMD (4 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_NO | AT91C_MCI_MAXLAT ) // no tested -+ -+#define AT91C_SEL_DESEL_CARD_CMD (7 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT ) -+#define AT91C_SEND_CSD_CMD (9 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_136 | AT91C_MCI_MAXLAT ) -+#define AT91C_SEND_CID_CMD (10 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_136 | AT91C_MCI_MAXLAT ) -+#define AT91C_MMC_READ_DAT_UNTIL_STOP_CMD (11 | AT91C_MCI_TRTYP_STREAM| AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRDIR | AT91C_MCI_TRCMD_START | AT91C_MCI_MAXLAT ) -+ -+#define AT91C_STOP_TRANSMISSION_CMD (12 | AT91C_MCI_TRCMD_STOP | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT ) -+#define AT91C_STOP_TRANSMISSION_SYNC_CMD (12 | AT91C_MCI_TRCMD_STOP | AT91C_MCI_SPCMD_SYNC | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT ) -+#define AT91C_SEND_STATUS_CMD (13 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT ) -+#define AT91C_GO_INACTIVE_STATE_CMD (15 | AT91C_MCI_RSPTYP_NO ) -+ -+//*------------------------------------------------ -+//* Class 2 commands: Block oriented Read commands -+//*------------------------------------------------ -+ -+#define AT91C_SET_BLOCKLEN_CMD (16 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT ) -+#define AT91C_READ_SINGLE_BLOCK_CMD (17 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_START | AT91C_MCI_TRTYP_BLOCK | AT91C_MCI_TRDIR | AT91C_MCI_MAXLAT) -+#define AT91C_READ_MULTIPLE_BLOCK_CMD (18 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_START | AT91C_MCI_TRTYP_MULTIPLE | AT91C_MCI_TRDIR | AT91C_MCI_MAXLAT) -+ -+//*-------------------------------------------- -+//* Class 3 commands: Sequential write commands -+//*-------------------------------------------- -+ -+#define AT91C_MMC_WRITE_DAT_UNTIL_STOP_CMD (20 | AT91C_MCI_TRTYP_STREAM| AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 & ~(AT91C_MCI_TRDIR) | AT91C_MCI_TRCMD_START | AT91C_MCI_MAXLAT ) // MMC -+ -+//*------------------------------------------------ -+//* Class 4 commands: Block oriented write commands -+//*------------------------------------------------ -+ -+#define AT91C_WRITE_BLOCK_CMD (24 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_START | (AT91C_MCI_TRTYP_BLOCK & ~(AT91C_MCI_TRDIR)) | AT91C_MCI_MAXLAT) -+#define AT91C_WRITE_MULTIPLE_BLOCK_CMD (25 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_START | (AT91C_MCI_TRTYP_MULTIPLE & ~(AT91C_MCI_TRDIR)) | AT91C_MCI_MAXLAT) -+#define AT91C_PROGRAM_CSD_CMD (27 | AT91C_MCI_RSPTYP_48 ) -+ -+ -+//*---------------------------------------- -+//* Class 6 commands: Group Write protect -+//*---------------------------------------- -+ -+#define AT91C_SET_WRITE_PROT_CMD (28 | AT91C_MCI_RSPTYP_48 ) -+#define AT91C_CLR_WRITE_PROT_CMD (29 | AT91C_MCI_RSPTYP_48 ) -+#define AT91C_SEND_WRITE_PROT_CMD (30 | AT91C_MCI_RSPTYP_48 ) -+ -+ -+//*---------------------------------------- -+//* Class 5 commands: Erase commands -+//*---------------------------------------- -+ -+#define AT91C_TAG_SECTOR_START_CMD (32 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) -+#define AT91C_TAG_SECTOR_END_CMD (33 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) -+#define AT91C_MMC_UNTAG_SECTOR_CMD (34 | AT91C_MCI_RSPTYP_48 ) -+#define AT91C_MMC_TAG_ERASE_GROUP_START_CMD (35 | AT91C_MCI_RSPTYP_48 ) -+#define AT91C_MMC_TAG_ERASE_GROUP_END_CMD (36 | AT91C_MCI_RSPTYP_48 ) -+#define AT91C_MMC_UNTAG_ERASE_GROUP_CMD (37 | AT91C_MCI_RSPTYP_48 ) -+#define AT91C_ERASE_CMD (38 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT ) -+ -+//*---------------------------------------- -+//* Class 7 commands: Lock commands -+//*---------------------------------------- -+ -+#define AT91C_LOCK_UNLOCK (42 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) // no tested -+ -+//*----------------------------------------------- -+// Class 8 commands: Application specific commands -+//*----------------------------------------------- -+ -+#define AT91C_APP_CMD (55 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) -+#define AT91C_GEN_CMD (56 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) // no tested -+ -+#define AT91C_SDCARD_SET_BUS_WIDTH_CMD (6 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) -+#define AT91C_SDCARD_STATUS_CMD (13 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) -+#define AT91C_SDCARD_SEND_NUM_WR_BLOCKS_CMD (22 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) -+#define AT91C_SDCARD_SET_WR_BLK_ERASE_COUNT_CMD (23 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) -+#define AT91C_SDCARD_APP_OP_COND_CMD (41 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO ) -+#define AT91C_SDCARD_SET_CLR_CARD_DETECT_CMD (42 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) -+#define AT91C_SDCARD_SEND_SCR_CMD (51 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) -+ -+#define AT91C_SDCARD_APP_ALL_CMD (AT91C_SDCARD_SET_BUS_WIDTH_CMD +\ -+ AT91C_SDCARD_STATUS_CMD +\ -+ AT91C_SDCARD_SEND_NUM_WR_BLOCKS_CMD +\ -+ AT91C_SDCARD_SET_WR_BLK_ERASE_COUNT_CMD +\ -+ AT91C_SDCARD_APP_OP_COND_CMD +\ -+ AT91C_SDCARD_SET_CLR_CARD_DETECT_CMD +\ -+ AT91C_SDCARD_SEND_SCR_CMD) -+ -+//*---------------------------------------- -+//* Class 9 commands: IO Mode commands -+//*---------------------------------------- -+ -+#define AT91C_MMC_FAST_IO_CMD (39 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT) -+#define AT91C_MMC_GO_IRQ_STATE_CMD (40 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) -+ -+///////////////////////////////////////////////////////////////////////////////////////////////////// -+// Functions returnals -+///////////////////////////////////////////////////////////////////////////////////////////////////// -+#define AT91C_CMD_SEND_OK 0 // Command ok -+#define AT91C_CMD_SEND_ERROR -1 // Command failed -+#define AT91C_INIT_OK 2 // Init Successfull -+#define AT91C_INIT_ERROR 3 // Init Failed -+#define AT91C_READ_OK 4 // Read Successfull -+#define AT91C_READ_ERROR 5 // Read Failed -+#define AT91C_WRITE_OK 6 // Write Successfull -+#define AT91C_WRITE_ERROR 7 // Write Failed -+#define AT91C_ERASE_OK 8 // Erase Successfull -+#define AT91C_ERASE_ERROR 9 // Erase Failed -+#define AT91C_CARD_SELECTED_OK 10 // Card Selection Successfull -+#define AT91C_CARD_SELECTED_ERROR 11 // Card Selection Failed -+ -+///////////////////////////////////////////////////////////////////////////////////////////////////// -+// MCI_SR Errors -+///////////////////////////////////////////////////////////////////////////////////////////////////// -+#define AT91C_MCI_SR_ERROR (AT91C_MCI_UNRE |\ -+ AT91C_MCI_OVRE |\ -+ AT91C_MCI_DTOE |\ -+ AT91C_MCI_DCRCE |\ -+ AT91C_MCI_RTOE |\ -+ AT91C_MCI_RENDE |\ -+ AT91C_MCI_RCRCE |\ -+ AT91C_MCI_RDIRE |\ -+ AT91C_MCI_RINDE) -+ -+//////////////////////////////////////////////////////////////////////////////////////////////////// -+// OCR Register -+//////////////////////////////////////////////////////////////////////////////////////////////////// -+#define AT91C_VDD_16_17 (1 << 4) -+#define AT91C_VDD_17_18 (1 << 5) -+#define AT91C_VDD_18_19 (1 << 6) -+#define AT91C_VDD_19_20 (1 << 7) -+#define AT91C_VDD_20_21 (1 << 8) -+#define AT91C_VDD_21_22 (1 << 9) -+#define AT91C_VDD_22_23 (1 << 10) -+#define AT91C_VDD_23_24 (1 << 11) -+#define AT91C_VDD_24_25 (1 << 12) -+#define AT91C_VDD_25_26 (1 << 13) -+#define AT91C_VDD_26_27 (1 << 14) -+#define AT91C_VDD_27_28 (1 << 15) -+#define AT91C_VDD_28_29 (1 << 16) -+#define AT91C_VDD_29_30 (1 << 17) -+#define AT91C_VDD_30_31 (1 << 18) -+#define AT91C_VDD_31_32 (1 << 19) -+#define AT91C_VDD_32_33 (1 << 20) -+#define AT91C_VDD_33_34 (1 << 21) -+#define AT91C_VDD_34_35 (1 << 22) -+#define AT91C_VDD_35_36 (1 << 23) -+#define AT91C_CARD_POWER_UP_BUSY (1 << 31) -+ -+#define AT91C_MMC_HOST_VOLTAGE_RANGE (AT91C_VDD_27_28 +\ -+ AT91C_VDD_28_29 +\ -+ AT91C_VDD_29_30 +\ -+ AT91C_VDD_30_31 +\ -+ AT91C_VDD_31_32 +\ -+ AT91C_VDD_32_33) -+ -+//////////////////////////////////////////////////////////////////////////////////////////////////// -+// CURRENT_STATE & READY_FOR_DATA in SDCard Status Register definition (response type R1) -+//////////////////////////////////////////////////////////////////////////////////////////////////// -+#define AT91C_SR_READY_FOR_DATA (1 << 8) // corresponds to buffer empty signalling on the bus -+#define AT91C_SR_IDLE (0 << 9) -+#define AT91C_SR_READY (1 << 9) -+#define AT91C_SR_IDENT (2 << 9) -+#define AT91C_SR_STBY (3 << 9) -+#define AT91C_SR_TRAN (4 << 9) -+#define AT91C_SR_DATA (5 << 9) -+#define AT91C_SR_RCV (6 << 9) -+#define AT91C_SR_PRG (7 << 9) -+#define AT91C_SR_DIS (8 << 9) -+ -+#define AT91C_SR_CARD_SELECTED (AT91C_SR_READY_FOR_DATA + AT91C_SR_TRAN) -+ -+///////////////////////////////////////////////////////////////////////////////////////////////////// -+// MMC CSD register header File -+// AT91C_CSD_xxx_S for shift value -+// AT91C_CSD_xxx_M for mask value -+///////////////////////////////////////////////////////////////////////////////////////////////////// -+ -+// First Response INT <=> CSD[3] : bits 0 to 31 -+#define AT91C_CSD_BIT0_S 0 // [0:0] -+#define AT91C_CSD_BIT0_M 0x01 -+#define AT91C_CSD_CRC_S 1 // [7:1] -+#define AT91C_CSD_CRC_M 0x7F -+#define AT91C_CSD_MMC_ECC_S 8 // [9:8] reserved for MMC compatibility -+#define AT91C_CSD_MMC_ECC_M 0x03 -+#define AT91C_CSD_FILE_FMT_S 10 // [11:10] -+#define AT91C_CSD_FILE_FMT_M 0x03 -+#define AT91C_CSD_TMP_WP_S 12 // [12:12] -+#define AT91C_CSD_TMP_WP_M 0x01 -+#define AT91C_CSD_PERM_WP_S 13 // [13:13] -+#define AT91C_CSD_PERM_WP_M 0x01 -+#define AT91C_CSD_COPY_S 14 // [14:14] -+#define AT91C_CSD_COPY_M 0x01 -+#define AT91C_CSD_FILE_FMT_GRP_S 15 // [15:15] -+#define AT91C_CSD_FILE_FMT_GRP_M 0x01 -+// reserved 16 // [20:16] -+// reserved 0x1F -+#define AT91C_CSD_WBLOCK_P_S 21 // [21:21] -+#define AT91C_CSD_WBLOCK_P_M 0x01 -+#define AT91C_CSD_WBLEN_S 22 // [25:22] -+#define AT91C_CSD_WBLEN_M 0x0F -+#define AT91C_CSD_R2W_F_S 26 // [28:26] -+#define AT91C_CSD_R2W_F_M 0x07 -+#define AT91C_CSD_MMC_DEF_ECC_S 29 // [30:29] reserved for MMC compatibility -+#define AT91C_CSD_MMC_DEF_ECC_M 0x03 -+#define AT91C_CSD_WP_GRP_EN_S 31 // [31:31] -+#define AT91C_CSD_WP_GRP_EN_M 0x01 -+ -+// Seconde Response INT <=> CSD[2] : bits 32 to 63 -+#define AT91C_CSD_v21_WP_GRP_SIZE_S 0 // [38:32] -+#define AT91C_CSD_v21_WP_GRP_SIZE_M 0x7F -+#define AT91C_CSD_v21_SECT_SIZE_S 7 // [45:39] -+#define AT91C_CSD_v21_SECT_SIZE_M 0x7F -+#define AT91C_CSD_v21_ER_BLEN_EN_S 14 // [46:46] -+#define AT91C_CSD_v21_ER_BLEN_EN_M 0x01 -+ -+#define AT91C_CSD_v22_WP_GRP_SIZE_S 0 // [36:32] -+#define AT91C_CSD_v22_WP_GRP_SIZE_M 0x1F -+#define AT91C_CSD_v22_ER_GRP_SIZE_S 5 // [41:37] -+#define AT91C_CSD_v22_ER_GRP_SIZE_M 0x1F -+#define AT91C_CSD_v22_SECT_SIZE_S 10 // [46:42] -+#define AT91C_CSD_v22_SECT_SIZE_M 0x1F -+ -+#define AT91C_CSD_C_SIZE_M_S 15 // [49:47] -+#define AT91C_CSD_C_SIZE_M_M 0x07 -+#define AT91C_CSD_VDD_WMAX_S 18 // [52:50] -+#define AT91C_CSD_VDD_WMAX_M 0x07 -+#define AT91C_CSD_VDD_WMIN_S 21 // [55:53] -+#define AT91C_CSD_VDD_WMIN_M 0x07 -+#define AT91C_CSD_RCUR_MAX_S 24 // [58:56] -+#define AT91C_CSD_RCUR_MAX_M 0x07 -+#define AT91C_CSD_RCUR_MIN_S 27 // [61:59] -+#define AT91C_CSD_RCUR_MIN_M 0x07 -+#define AT91C_CSD_CSIZE_L_S 30 // [63:62] <=> 2 LSB of CSIZE -+#define AT91C_CSD_CSIZE_L_M 0x03 -+ -+// Third Response INT <=> CSD[1] : bits 64 to 95 -+#define AT91C_CSD_CSIZE_H_S 0 // [73:64] <=> 10 MSB of CSIZE -+#define AT91C_CSD_CSIZE_H_M 0x03FF -+// reserved 10 // [75:74] -+// reserved 0x03 -+#define AT91C_CSD_DSR_I_S 12 // [76:76] -+#define AT91C_CSD_DSR_I_M 0x01 -+#define AT91C_CSD_RD_B_MIS_S 13 // [77:77] -+#define AT91C_CSD_RD_B_MIS_M 0x01 -+#define AT91C_CSD_WR_B_MIS_S 14 // [78:78] -+#define AT91C_CSD_WR_B_MIS_M 0x01 -+#define AT91C_CSD_RD_B_PAR_S 15 // [79:79] -+#define AT91C_CSD_RD_B_PAR_M 0x01 -+#define AT91C_CSD_RD_B_LEN_S 16 // [83:80] -+#define AT91C_CSD_RD_B_LEN_M 0x0F -+#define AT91C_CSD_CCC_S 20 // [95:84] -+#define AT91C_CSD_CCC_M 0x0FFF -+ -+// Fourth Response INT <=> CSD[0] : bits 96 to 127 -+#define AT91C_CSD_TRANS_SPEED_S 0 // [103:96] -+#define AT91C_CSD_TRANS_SPEED_M 0xFF -+#define AT91C_CSD_NSAC_S 8 // [111:104] -+#define AT91C_CSD_NSAC_M 0xFF -+#define AT91C_CSD_TAAC_S 16 // [119:112] -+#define AT91C_CSD_TAAC_M 0xFF -+// reserved 24 // [121:120] -+// reserved 0x03 -+#define AT91C_CSD_MMC_SPEC_VERS_S 26 // [125:122] reserved for MMC compatibility -+#define AT91C_CSD_MMC_SPEC_VERS_M 0x0F -+#define AT91C_CSD_STRUCT_S 30 // [127:126] -+#define AT91C_CSD_STRUCT_M 0x03 -+ -+///////////////////////////////////////////////////////////////////////////////////////////////////// -+ -+#endif -+ -diff -urN romboot.old/init.cpp romboot/init.cpp ---- romboot.old/init.cpp 2004-07-06 13:01:55.000000000 +0200 -+++ romboot/init.cpp 2007-03-21 12:43:39.000000000 +0100 -@@ -35,7 +35,7 @@ - //*---------------------------------------------------------------------------- - void AT91F_SpuriousHandler() - { -- AT91F_DBGU_Printk("-F- Spurious Interrupt detected\n\r"); -+ AT91F_DBGU_Printk("ISI"); - while (1); - } - -@@ -46,7 +46,7 @@ - //*---------------------------------------------------------------------------- - void AT91F_DataAbort() - { -- AT91F_DBGU_Printk("-F- Data Abort detected\n\r"); -+ AT91F_DBGU_Printk("IDA"); - while (1); - } - -@@ -56,7 +56,7 @@ - //*---------------------------------------------------------------------------- - void AT91F_FetchAbort() - { -- AT91F_DBGU_Printk("-F- Prefetch Abort detected\n\r"); -+ AT91F_DBGU_Printk("IPA"); - while (1); - } - -@@ -66,7 +66,7 @@ - //*---------------------------------------------------------------------------- - void AT91F_Undef() - { -- AT91F_DBGU_Printk("-F- Undef detected\n\r"); -+ AT91F_DBGU_Printk("IUD"); - while (1); - } - -@@ -76,7 +76,7 @@ - //*---------------------------------------------------------------------------- - void AT91F_UndefHandler() - { -- AT91F_DBGU_Printk("-F- Undef detected\n\r"); -+ AT91F_DBGU_Printk("IUD"); - while (1); - } - -diff -urN romboot.old/main.cpp romboot/main.cpp ---- romboot.old/main.cpp 2007-03-19 12:44:03.000000000 +0100 -+++ romboot/main.cpp 2007-03-21 19:23:41.000000000 +0100 -@@ -33,18 +33,22 @@ - #define DELAY_MAIN_FREQ 1000 - #define DISP_LINE_LEN 16 - -+#define COMPACT 1 -+ - //* prototypes - extern void AT91F_DBGU_Printk(char *); - extern "C" void AT91F_ST_ASM_Handler(void); - extern "C" void Jump(unsigned int addr); -+extern int mci_main(void); - --const char *menu_separ = "*----------------------------------------*\n\r"; -+//const char *menu_separ = "*----------------------------------------*\n\r"; - - const char *menu_dataflash = { -- "1: Download Dataflash [addr]\n\r" -- "2: Read Dataflash [addr]\n\r" -- "3: Start U-BOOT\n\r" -- "4: Clear bootloader section in Dataflash\n\r" -+ "1: DL DF [ad]\n\r" -+ "2: RD DF [ad]\n\r" -+ "3: CP SD\n\r" -+ "4: U-BOOT\n\r" -+ "5: RM BL in DF\n\r" - }; - - //* Globales variables -@@ -151,12 +155,12 @@ - //*----------------------------------------------------------------------------- - void AT91F_DisplayMenu(void) - { -- printf("\n\rFDL LOADER %s %s %s\n\r", AT91C_VERSION, __DATE__, __TIME__); -- printf(menu_separ); -+ printf("\n\rFDL SD-Card LOADER %s %s %s\n\r", AT91C_VERSION, __DATE__, __TIME__); -+// printf(menu_separ); - AT91F_DataflashPrintInfo(); -- printf(menu_separ); -+// printf(menu_separ); - printf(menu_dataflash); -- printf(menu_separ); -+// printf(menu_separ); - } - - //*----------------------------------------------------------------------------- -@@ -194,6 +198,7 @@ - } - - -+#ifndef COMPACT - //*----------------------------------------------------------------------------- - //* Function Name : AT91F_MemoryDisplay() - //* Object : Display the content of the dataflash -@@ -244,7 +249,7 @@ - } while (nbytes > 0); - return 0; - } -- -+#endif - - //*-------------------------------------------------------------------------------------- - //* Function Name : AT91F_SetPLL -@@ -306,7 +311,7 @@ - AT91F_SetPLL(); - } - --void LedCode(void) -+/*void LedCode(void) - { - int *pRegister; - pRegister = (int *)0xFFFFF800; // Enable port C peripheral reg -@@ -318,15 +323,16 @@ - pRegister = (int *)0xFFFFF834; // Clear bits - *pRegister = 0x2800; - } -+*/ - - void AT91F_StartUboot(unsigned int dummy, void *pvoid) - { -- printf("Load U-BOOT from dataflash[%x] to SDRAM[%x]\n\r", AT91C_UBOOT_DATAFLASH_ADDR, AT91C_UBOOT_ADDR); -+ //printf("Load U-BOOT from dataflash[%x] to SDRAM[%x]\n\r", AT91C_UBOOT_DATAFLASH_ADDR, AT91C_UBOOT_ADDR); - read_dataflash(AT91C_UBOOT_DATAFLASH_ADDR, AT91C_UBOOT_SIZE, (char *)(AT91C_UBOOT_ADDR)); -- printf("Set PLLA to 180Mhz and Master clock to 60Mhz and start U-BOOT\n\r"); -+ //printf("Set PLLA to 180Mhz and Master clock to 60Mhz and start U-BOOT\n\r"); - //* Reset registers - AT91F_ResetRegisters(); -- LedCode(); -+// LedCode(); - Jump(AT91C_UBOOT_ADDR); - while(1); - } -@@ -385,120 +391,124 @@ - // start tempo to start Uboot in a delay of 1 sec if no key pressed - svcUbootTempo.Start(&svcUbootTempo, 1000, 0, AT91F_StartUboot, (void *)0); - -- printf("press any key to enter bootloader\n\r"); -+ printf("press key\n\r"); - getc(); - - // stop tempo - svcUbootTempo.Stop(&svcUbootTempo); - -- while(1) -- { -- while(command == 0) -- { -- AddressToDownload = AT91C_DOWNLOAD_BASE_ADDRESS; -- SizeToDownload = AT91C_DOWNLOAD_MAX_SIZE; -- DeviceAddress = 0; -+ while(1) { -+ while(command == 0) { -+ AddressToDownload = AT91C_DOWNLOAD_BASE_ADDRESS; -+ SizeToDownload = AT91C_DOWNLOAD_MAX_SIZE; -+ DeviceAddress = 0; - -- AT91F_DisplayMenu(); -- message[0] = 0; -- message[2] = 0; -- AT91F_ReadLine("Enter: ", message); -+ AT91F_DisplayMenu(); -+ message[0] = 0; -+ message[2] = 0; -+ AT91F_ReadLine("Enter: ", message); - -- command = message[0]; -- if(command == '1' || command == '2') -- if(AsciiToHex(&message[2], &DeviceAddress) == 0) -- command = 0; -- -- switch(command) -- { -- case '1': -- printf("Download Dataflash [0x%x]\n\r", DeviceAddress); -- -- switch(DeviceAddress & 0xFF000000) -- { -- case CFG_DATAFLASH_LOGIC_ADDR_CS0: -- device = 0; -- break; -+ command = message[0]; -+ if(command == '1' || command == '2') -+ if(AsciiToHex(&message[2], &DeviceAddress) == 0) -+ command = 0; -+ -+ switch(command) { -+ case '1': -+ printf("DL DF [0x%x]\n\r", DeviceAddress); -+ -+ switch(DeviceAddress & 0xFF000000) { -+ case CFG_DATAFLASH_LOGIC_ADDR_CS0: -+ device = 0; -+ break; - -- case CFG_DATAFLASH_LOGIC_ADDR_CS3: -- device = 1; -- break; -+ case CFG_DATAFLASH_LOGIC_ADDR_CS3: -+ device = 1; -+ break; - -- default: -- command = 0; -- break; -- } -- break; -- -- case '2': -- do -- { -- AT91F_MemoryDisplay(DeviceAddress, 4, 64); -- AT91F_ReadLine ((char *)0, message); -- DeviceAddress += 0x100; -+ default: -+ command = 0; -+ break; -+ } -+ break; -+ -+#ifndef COMPACT -+ case '2': -+ do { -+ AT91F_MemoryDisplay(DeviceAddress, 4, 64); -+ AT91F_ReadLine ((char *)0, message); -+ DeviceAddress += 0x100; -+ } while(message[0] == '\0'); -+ command = 0; -+ break; -+#endif -+ -+ case '3': -+ mci_main(); -+ command=0; -+ break; -+ -+ case '4': -+ AT91F_StartUboot(0, (void *)0); -+ command = 0; -+ break; -+ -+ case '5': -+ { -+ int *i; -+ -+ for(i = (int *)0x20000000; i < (int *)0x20004000; i++) -+ *i = 0; -+ } -+ write_dataflash(0xc0000000, 0x20000000, 0x4000); -+ printf("BL CLR\r\n"); -+ command = 0; -+ break; -+ -+ default: -+ command = 0; -+ break; -+ } // switch(command) -+ } // while(command == 0) -+ -+ xmodemPipe.Read(&xmodemPipe, (char *)AddressToDownload, SizeToDownload, XmodemProtocol, 0); -+ while(XmodemComplete !=1); -+ SizeToDownload = (unsigned int)(svcXmodem.pData) - (unsigned int)AddressToDownload; -+ -+ // Modification of vector 6 -+ NbPage = 0; -+ i = dataflash_info[device].Device.pages_number; -+ while(i >>= 1) -+ NbPage++; -+ i = (SizeToDownload / 512) + 1 + (NbPage << 13) + (dataflash_info[device].Device.pages_size << 17); -+ *(int *)(AddressToDownload + AT91C_OFFSET_VECT6) = i; -+ -+// printf("\n\rModification of Arm Vector 6 :%x\n\r", i); -+ -+ printf("\n\rWR %d in DF [0x%x]\n\r",SizeToDownload, DeviceAddress); -+ crc1 = 0; -+ pAT91->CRC32((const unsigned char *)AddressToDownload, SizeToDownload , &crc1); -+ -+ // write the dataflash -+ write_dataflash (DeviceAddress, AddressToDownload, SizeToDownload); -+ // clear the buffer before read -+ for(i=0; i < SizeToDownload; i++) -+ *(unsigned char *)(AddressToDownload + i) = 0; -+ -+ //* Read dataflash page in TestBuffer -+ read_dataflash (DeviceAddress, SizeToDownload, (char *)(AddressToDownload)); -+ -+ printf("Vfy DF: "); -+ crc2 = 0; -+ -+ pAT91->CRC32((const unsigned char *)AddressToDownload, SizeToDownload , &crc2); -+ if (crc1 != crc2) -+ printf("Fail\r\n"); -+ else -+ printf("OK\r\n"); -+ -+ command = 0; -+ XmodemComplete = 0; -+ AT91F_WaitKeyPressed(); - } -- while(message[0] == '\0'); -- command = 0; -- break; -- -- case '3': -- AT91F_StartUboot(0, (void *)0); -- command = 0; -- break; -- case '4': -- { -- int *i; -- for(i = (int *)0x20000000; i < (int *)0x20004000; i++) -- *i = 0; -- } -- write_dataflash(0xc0000000, 0x20000000, 0x4000); -- printf("Bootsection cleared\r\n"); -- command = 0; -- break; -- default: -- command = 0; -- break; -- } - } -- -- xmodemPipe.Read(&xmodemPipe, (char *)AddressToDownload, SizeToDownload, XmodemProtocol, 0); -- while(XmodemComplete !=1); -- SizeToDownload = (unsigned int)(svcXmodem.pData) - (unsigned int)AddressToDownload; -- -- // Modification of vector 6 -- NbPage = 0; -- i = dataflash_info[device].Device.pages_number; -- while(i >>= 1) -- NbPage++; -- i = (SizeToDownload / 512) + 1 + (NbPage << 13) + (dataflash_info[device].Device.pages_size << 17); -- *(int *)(AddressToDownload + AT91C_OFFSET_VECT6) = i; -- -- printf("\n\rModification of Arm Vector 6 :%x\n\r", i); -- -- printf("\n\rWrite %d bytes in DataFlash [0x%x]\n\r",SizeToDownload, DeviceAddress); -- crc1 = 0; -- pAT91->CRC32((const unsigned char *)AddressToDownload, SizeToDownload , &crc1); -- -- // write the dataflash -- write_dataflash (DeviceAddress, AddressToDownload, SizeToDownload); -- // clear the buffer before read -- for(i=0; i < SizeToDownload; i++) -- *(unsigned char *)(AddressToDownload + i) = 0; -- -- //* Read dataflash page in TestBuffer -- read_dataflash (DeviceAddress, SizeToDownload, (char *)(AddressToDownload)); -- -- printf("Verify Dataflash: "); -- crc2 = 0; -- -- pAT91->CRC32((const unsigned char *)AddressToDownload, SizeToDownload , &crc2); -- if (crc1 != crc2) -- printf("Failed\r\n"); -- else -- printf("OK\r\n"); -- -- command = 0; -- XmodemComplete = 0; -- AT91F_WaitKeyPressed(); -- } --} -diff -urN romboot.old/main.h romboot/main.h ---- romboot.old/main.h 2004-07-03 17:41:14.000000000 +0200 -+++ romboot/main.h 2007-03-21 21:48:52.000000000 +0100 -@@ -27,7 +27,7 @@ - - #define AT91C_OFFSET_VECT6 0x14 //* Offset for ARM vector 6 - --#define AT91C_VERSION "VER 1.01" -+#define AT91C_VERSION "VER 1.02" - // Global variables and functions definition - extern unsigned int GetTickCount(void); - #endif -diff -urN romboot.old/Makefile romboot/Makefile ---- romboot.old/Makefile 2007-03-19 12:44:03.000000000 +0100 -+++ romboot/Makefile 2007-03-21 12:29:11.000000000 +0100 -@@ -1,8 +1,8 @@ - LINKFLAGS= -T elf32-littlearm.lds -Ttext 0 - COMPILEFLAGS= -Os - TARGET=romboot --OBJFILES=cstartup_ram.o asm_isr.o jump.o at45.o com.o dataflash.o \ -- init.o main.o stdio.o _udivsi3.o _umodsi3.o div0.o -+OBJFILES=cstartup_ram.o asm_isr.o asm_mci_isr.o jump.o at45.o com.o dataflash.o \ -+ mci_device.o mci_main.o init.o main.o stdio.o _udivsi3.o _umodsi3.o div0.o - LIBRARIES= - INCLUDES= -Iinclude - -@@ -11,10 +11,15 @@ - $(TARGET): $(OBJFILES) - $(LD) $(OBJFILES) -o $(TARGET).out $(LINKFLAGS) -n - $(OBJCOPY) $(TARGET).out -O binary $(TARGET).bin -+ $(OBJDUMP) -h -s $(TARGET).out > $(TARGET).lss -+ $(NM) -n $(TARGET).out | grep -v '\( [aUw] \)\|\(__crc_\)\|\( \$[adt]\)' > $(TARGET).map - - asm_isr.o: asm_isr.S - $(CC) -c -Iinclude -o $@ $< - -+asm_mci_isr.o: asm_mci_isr.S -+ $(CC) -c -Iinclude -o $@ $< -+ - cstartup_ram.o: cstartup_ram.S - $(CC) -c -Iinclude -o $@ $< - -diff -urN romboot.old/mci_device.cpp romboot/mci_device.cpp ---- romboot.old/mci_device.cpp 1970-01-01 01:00:00.000000000 +0100 -+++ romboot/mci_device.cpp 2007-03-22 18:52:48.000000000 +0100 -@@ -0,0 +1,581 @@ -+//*---------------------------------------------------------------------------- -+//* ATMEL Microcontroller Software Support - ROUSSET - -+//*---------------------------------------------------------------------------- -+//* The software is delivered "AS IS" without warranty or condition of any -+//* kind, either express, implied or statutory. This includes without -+//* limitation any warranty or condition with respect to merchantability or -+//* fitness for any particular purpose, or against the infringements of -+//* intellectual property rights of others. -+//*---------------------------------------------------------------------------- -+//* File Name : mci_device.c -+//* Object : TEST DataFlash Functions -+//* Creation : FB 26/11/2002 -+//* -+//*---------------------------------------------------------------------------- -+ -+#include -+#include "com.h" -+ -+#define ENABLE_WRITE 1 -+#undef MMC -+ -+//*---------------------------------------------------------------------------- -+//* \fn AT91F_MCI_SendCommand -+//* \brief Generic function to send a command to the MMC or SDCard -+//*---------------------------------------------------------------------------- -+AT91S_MCIDeviceStatus AT91F_MCI_SendCommand ( -+ AT91PS_MciDevice pMCI_Device, -+ unsigned int Cmd, -+ unsigned int Arg) -+{ -+ unsigned int error,status; -+ //unsigned int tick=0; -+ -+ // Send the command -+ AT91C_BASE_MCI->MCI_ARGR = Arg; -+ AT91C_BASE_MCI->MCI_CMDR = Cmd; -+ -+ // wait for CMDRDY Status flag to read the response -+ do -+ { -+ status = AT91C_BASE_MCI->MCI_SR; -+ //tick++; -+ } -+ while( !(status & AT91C_MCI_CMDRDY) );//&& (tick<100) ); -+ -+ // Test error ==> if crc error and response R3 ==> don't check error -+ error = (AT91C_BASE_MCI->MCI_SR) & AT91C_MCI_SR_ERROR; -+ if(error != 0 ) -+ { -+ // if the command is SEND_OP_COND the CRC error flag is always present (cf : R3 response) -+ if ( (Cmd != AT91C_SDCARD_APP_OP_COND_CMD) && (Cmd != AT91C_MMC_SEND_OP_COND_CMD) ) -+ return ((AT91C_BASE_MCI->MCI_SR) & AT91C_MCI_SR_ERROR); -+ else -+ { -+ if (error != AT91C_MCI_RCRCE) -+ return ((AT91C_BASE_MCI->MCI_SR) & AT91C_MCI_SR_ERROR); -+ } -+ } -+ return AT91C_CMD_SEND_OK; -+} -+ -+//*---------------------------------------------------------------------------- -+//* \fn AT91F_MCI_SDCard_SendAppCommand -+//* \brief Specific function to send a specific command to the SDCard -+//*---------------------------------------------------------------------------- -+AT91S_MCIDeviceStatus AT91F_MCI_SDCard_SendAppCommand ( -+ AT91PS_MciDevice pMCI_Device, -+ unsigned int Cmd_App, -+ unsigned int Arg ) -+{ -+ unsigned int status; -+ //unsigned int tick=0; -+ -+ // Send the CMD55 for application specific command -+ AT91C_BASE_MCI->MCI_ARGR = (pMCI_Device->pMCI_DeviceFeatures->Relative_Card_Address << 16 ); -+ AT91C_BASE_MCI->MCI_CMDR = AT91C_APP_CMD; -+ -+ // wait for CMDRDY Status flag to read the response -+ do -+ { -+ status = AT91C_BASE_MCI->MCI_SR; -+ //tick++; -+ } -+ while( !(status & AT91C_MCI_CMDRDY) );//&& (tick<100) ); -+ -+ // if an error occurs -+ if (((AT91C_BASE_MCI->MCI_SR) & AT91C_MCI_SR_ERROR) != 0 ) -+ return ((AT91C_BASE_MCI->MCI_SR) & AT91C_MCI_SR_ERROR); -+ -+ // check if it is a specific command and then send the command -+ if ( (Cmd_App && AT91C_SDCARD_APP_ALL_CMD) == 0) -+ return AT91C_CMD_SEND_ERROR; -+ -+ return( AT91F_MCI_SendCommand(pMCI_Device,Cmd_App,Arg) ); -+} -+ -+//*---------------------------------------------------------------------------- -+//* \fn AT91F_MCI_GetStatus -+//* \brief Addressed card sends its status register -+//*---------------------------------------------------------------------------- -+AT91S_MCIDeviceStatus AT91F_MCI_GetStatus(AT91PS_MciDevice pMCI_Device,unsigned int relative_card_address) -+{ -+ if (AT91F_MCI_SendCommand(pMCI_Device, -+ AT91C_SEND_STATUS_CMD, -+ relative_card_address <<16) == AT91C_CMD_SEND_OK) -+ return (AT91C_BASE_MCI->MCI_RSPR[0]); -+ -+ return AT91C_CMD_SEND_ERROR; -+} -+ -+//*---------------------------------------------------------------------------- -+//* \fn AT91F_MCI_Device_Handler -+//* \brief MCI C interrupt handler -+//*---------------------------------------------------------------------------- -+extern "C" void AT91F_MCI_Device_Handler(AT91PS_MciDevice, unsigned int); -+ -+void AT91F_MCI_Device_Handler( -+ AT91PS_MciDevice pMCI_Device, -+ unsigned int status) -+{ -+ // If End of Tx Buffer Empty interrupt occurred -+ if ( status & AT91C_MCI_TXBUFE ) -+ { -+ AT91C_BASE_MCI->MCI_IDR = AT91C_MCI_TXBUFE; -+ AT91C_BASE_PDC_MCI->PDC_PTCR = AT91C_PDC_TXTDIS; -+ -+ pMCI_Device->pMCI_DeviceDesc->state = AT91C_MCI_IDLE; -+ } // End of if AT91C_MCI_TXBUFF -+ -+ // If End of Rx Buffer Full interrupt occurred -+ if ( status & AT91C_MCI_RXBUFF ) -+ { -+ AT91C_BASE_MCI->MCI_IDR = AT91C_MCI_RXBUFF; -+ AT91C_BASE_PDC_MCI->PDC_PTCR = AT91C_PDC_RXTDIS; -+ -+ pMCI_Device->pMCI_DeviceDesc->state = AT91C_MCI_IDLE; -+ } // End of if AT91C_MCI_RXBUFF -+ -+} -+ -+//*---------------------------------------------------------------------------- -+//* \fn AT91F_MCI_ReadBlock -+//* \brief Read an ENTIRE block or PARTIAL block -+//*---------------------------------------------------------------------------- -+AT91S_MCIDeviceStatus AT91F_MCI_ReadBlock( -+ AT91PS_MciDevice pMCI_Device, -+ int src, -+ unsigned int *dataBuffer, -+ int sizeToRead ) -+{ -+ //////////////////////////////////////////////////////////////////////////////////////////// -+ if(pMCI_Device->pMCI_DeviceDesc->state != AT91C_MCI_IDLE) -+ return AT91C_READ_ERROR; -+ -+ if( (AT91F_MCI_GetStatus(pMCI_Device,pMCI_Device->pMCI_DeviceFeatures->Relative_Card_Address) & AT91C_SR_READY_FOR_DATA) != AT91C_SR_READY_FOR_DATA) -+ return AT91C_READ_ERROR; -+ -+ if ( (src + sizeToRead) > pMCI_Device->pMCI_DeviceFeatures->Memory_Capacity ) -+ return AT91C_READ_ERROR; -+ -+ // If source does not fit a begin of a block -+ if ( (src % pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length) != 0 ) -+ return AT91C_READ_ERROR; -+ -+ // Test if the MMC supports Partial Read Block -+ // ALWAYS SUPPORTED IN SD Memory Card -+ if( (sizeToRead < pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length) -+ && (pMCI_Device->pMCI_DeviceFeatures->Read_Partial == 0x00) ) -+ return AT91C_READ_ERROR; -+ -+ if( sizeToRead > pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length) -+ return AT91C_READ_ERROR; -+ //////////////////////////////////////////////////////////////////////////////////////////// -+ -+ // Init Mode Register -+ AT91C_BASE_MCI->MCI_MR |= ((pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length << 16) | AT91C_MCI_PDCMODE); -+ -+ if (sizeToRead %4) -+ sizeToRead = (sizeToRead /4)+1; -+ else -+ sizeToRead = sizeToRead/4; -+ -+ AT91C_BASE_PDC_MCI->PDC_PTCR = (AT91C_PDC_TXTDIS | AT91C_PDC_RXTDIS); -+ AT91C_BASE_PDC_MCI->PDC_RPR = (unsigned int)dataBuffer; -+ AT91C_BASE_PDC_MCI->PDC_RCR = sizeToRead; -+ -+ // Send the Read single block command -+ if ( AT91F_MCI_SendCommand(pMCI_Device, AT91C_READ_SINGLE_BLOCK_CMD, src) != AT91C_CMD_SEND_OK ) -+ return AT91C_READ_ERROR; -+ -+ pMCI_Device->pMCI_DeviceDesc->state = AT91C_MCI_RX_SINGLE_BLOCK; -+ -+ // Enable AT91C_MCI_RXBUFF Interrupt -+ AT91C_BASE_MCI->MCI_IER = AT91C_MCI_RXBUFF; -+ -+ // (PDC) Receiver Transfer Enable -+ AT91C_BASE_PDC_MCI->PDC_PTCR = AT91C_PDC_RXTEN; -+ -+ return AT91C_READ_OK; -+} -+ -+ -+#ifdef ENABLE_WRITE -+//*---------------------------------------------------------------------------- -+//* \fn AT91F_MCI_WriteBlock -+//* \brief Write an ENTIRE block but not always PARTIAL block !!! -+//*---------------------------------------------------------------------------- -+AT91S_MCIDeviceStatus AT91F_MCI_WriteBlock( -+ AT91PS_MciDevice pMCI_Device, -+ int dest, -+ unsigned int *dataBuffer, -+ int sizeToWrite ) -+{ -+ //////////////////////////////////////////////////////////////////////////////////////////// -+ if( pMCI_Device->pMCI_DeviceDesc->state != AT91C_MCI_IDLE) -+ return AT91C_WRITE_ERROR; -+ -+ if( (AT91F_MCI_GetStatus(pMCI_Device,pMCI_Device->pMCI_DeviceFeatures->Relative_Card_Address) & AT91C_SR_READY_FOR_DATA) != AT91C_SR_READY_FOR_DATA) -+ return AT91C_WRITE_ERROR; -+ -+ if ( (dest + sizeToWrite) > pMCI_Device->pMCI_DeviceFeatures->Memory_Capacity ) -+ return AT91C_WRITE_ERROR; -+ -+ // If source does not fit a begin of a block -+ if ( (dest % pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length) != 0 ) -+ return AT91C_WRITE_ERROR; -+ -+ // Test if the MMC supports Partial Write Block -+ if( (sizeToWrite < pMCI_Device->pMCI_DeviceFeatures->Max_Write_DataBlock_Length) -+ && (pMCI_Device->pMCI_DeviceFeatures->Write_Partial == 0x00) ) -+ return AT91C_WRITE_ERROR; -+ -+ if( sizeToWrite > pMCI_Device->pMCI_DeviceFeatures->Max_Write_DataBlock_Length ) -+ return AT91C_WRITE_ERROR; -+ //////////////////////////////////////////////////////////////////////////////////////////// -+ -+ // Init Mode Register -+ AT91C_BASE_MCI->MCI_MR |= ((pMCI_Device->pMCI_DeviceFeatures->Max_Write_DataBlock_Length << 16) | AT91C_MCI_PDCMODE); -+ -+ if (sizeToWrite %4) -+ sizeToWrite = (sizeToWrite /4)+1; -+ else -+ sizeToWrite = sizeToWrite/4; -+ -+ // Init PDC for write sequence -+ AT91C_BASE_PDC_MCI->PDC_PTCR = (AT91C_PDC_TXTDIS | AT91C_PDC_RXTDIS); -+ AT91C_BASE_PDC_MCI->PDC_TPR = (unsigned int) dataBuffer; -+ AT91C_BASE_PDC_MCI->PDC_TCR = sizeToWrite; -+ -+ // Send the write single block command -+ if ( AT91F_MCI_SendCommand(pMCI_Device, AT91C_WRITE_BLOCK_CMD, dest) != AT91C_CMD_SEND_OK) -+ return AT91C_WRITE_ERROR; -+ -+ pMCI_Device->pMCI_DeviceDesc->state = AT91C_MCI_TX_SINGLE_BLOCK; -+ -+ // Enable AT91C_MCI_TXBUFE Interrupt -+ AT91C_BASE_MCI->MCI_IER = AT91C_MCI_TXBUFE; -+ -+ // Enables TX for PDC transfert requests -+ AT91C_BASE_PDC_MCI->PDC_PTCR = AT91C_PDC_TXTEN; -+ -+ return AT91C_WRITE_OK; -+} -+#endif -+ -+#ifdef MMC -+//*------------------------------------------------------------------------------------------------------------ -+//* \fn AT91F_MCI_MMC_SelectCard -+//* \brief Toggles a card between the Stand_by and Transfer states or between Programming and Disconnect states -+//*------------------------------------------------------------------------------------------------------------ -+AT91S_MCIDeviceStatus AT91F_MCI_MMC_SelectCard(AT91PS_MciDevice pMCI_Device, unsigned int relative_card_address) -+{ -+ int status; -+ -+ //* Check if the MMC card chosen is already the selected one -+ status = AT91F_MCI_GetStatus(pMCI_Device,relative_card_address); -+ -+ if (status < 0) -+ return AT91C_CARD_SELECTED_ERROR; -+ -+ if ((status & AT91C_SR_CARD_SELECTED) == AT91C_SR_CARD_SELECTED) -+ return AT91C_CARD_SELECTED_OK; -+ -+ //* Search for the MMC Card to be selected, status = the Corresponding Device Number -+ status = 0; -+ while( (pMCI_Device->pMCI_DeviceFeatures[status].Relative_Card_Address != relative_card_address) -+ && (status < AT91C_MAX_MCI_CARDS) ) -+ status++; -+ -+ if (status > AT91C_MAX_MCI_CARDS) -+ return AT91C_CARD_SELECTED_ERROR; -+ -+ if (AT91F_MCI_SendCommand( pMCI_Device, -+ AT91C_SEL_DESEL_CARD_CMD, -+ pMCI_Device->pMCI_DeviceFeatures[status].Relative_Card_Address << 16) == AT91C_CMD_SEND_OK) -+ return AT91C_CARD_SELECTED_OK; -+ return AT91C_CARD_SELECTED_ERROR; -+} -+#endif -+ -+//*---------------------------------------------------------------------------- -+//* \fn AT91F_MCI_GetCSD -+//* \brief Asks to the specified card to send its CSD -+//*---------------------------------------------------------------------------- -+AT91S_MCIDeviceStatus AT91F_MCI_GetCSD (AT91PS_MciDevice pMCI_Device, unsigned int relative_card_address , unsigned int * response) -+{ -+ -+ if(AT91F_MCI_SendCommand(pMCI_Device, -+ AT91C_SEND_CSD_CMD, -+ (relative_card_address << 16)) != AT91C_CMD_SEND_OK) -+ return AT91C_CMD_SEND_ERROR; -+ -+ response[0] = AT91C_BASE_MCI->MCI_RSPR[0]; -+ response[1] = AT91C_BASE_MCI->MCI_RSPR[1]; -+ response[2] = AT91C_BASE_MCI->MCI_RSPR[2]; -+ response[3] = AT91C_BASE_MCI->MCI_RSPR[3]; -+ -+ return AT91C_CMD_SEND_OK; -+} -+ -+//*---------------------------------------------------------------------------- -+//* \fn AT91F_MCI_SetBlocklength -+//* \brief Select a block length for all following block commands (R/W) -+//*---------------------------------------------------------------------------- -+AT91S_MCIDeviceStatus AT91F_MCI_SetBlocklength(AT91PS_MciDevice pMCI_Device,unsigned int length) -+{ -+ return( AT91F_MCI_SendCommand(pMCI_Device, AT91C_SET_BLOCKLEN_CMD, length) ); -+} -+ -+#ifdef MMC -+//*---------------------------------------------------------------------------- -+//* \fn AT91F_MCI_MMC_GetAllOCR -+//* \brief Asks to all cards to send their operations conditions -+//*---------------------------------------------------------------------------- -+AT91S_MCIDeviceStatus AT91F_MCI_MMC_GetAllOCR (AT91PS_MciDevice pMCI_Device) -+{ -+ unsigned int response =0x0; -+ -+ while(1) -+ { -+ response = AT91F_MCI_SendCommand(pMCI_Device, -+ AT91C_MMC_SEND_OP_COND_CMD, -+ AT91C_MMC_HOST_VOLTAGE_RANGE); -+ if (response != AT91C_CMD_SEND_OK) -+ return AT91C_INIT_ERROR; -+ -+ response = AT91C_BASE_MCI->MCI_RSPR[0]; -+ -+ if ( (response & AT91C_CARD_POWER_UP_BUSY) == AT91C_CARD_POWER_UP_BUSY) -+ return(response); -+ } -+} -+#endif -+ -+#ifdef MMC -+//*---------------------------------------------------------------------------- -+//* \fn AT91F_MCI_MMC_GetAllCID -+//* \brief Asks to the MMC on the chosen slot to send its CID -+//*---------------------------------------------------------------------------- -+AT91S_MCIDeviceStatus AT91F_MCI_MMC_GetAllCID (AT91PS_MciDevice pMCI_Device, unsigned int *response) -+{ -+ int Nb_Cards_Found=-1; -+ -+ while(1) -+ { -+ if(AT91F_MCI_SendCommand(pMCI_Device, -+ AT91C_MMC_ALL_SEND_CID_CMD, -+ AT91C_NO_ARGUMENT) != AT91C_CMD_SEND_OK) -+ return Nb_Cards_Found; -+ else -+ { -+ Nb_Cards_Found = 0; -+ //* Assignation of the relative address to the MMC CARD -+ pMCI_Device->pMCI_DeviceFeatures[Nb_Cards_Found].Relative_Card_Address = Nb_Cards_Found + AT91C_FIRST_RCA; -+ //* Set the insert flag -+ pMCI_Device->pMCI_DeviceFeatures[Nb_Cards_Found].Card_Inserted = AT91C_MMC_CARD_INSERTED; -+ -+ if (AT91F_MCI_SendCommand(pMCI_Device, -+ AT91C_MMC_SET_RELATIVE_ADDR_CMD, -+ (Nb_Cards_Found + AT91C_FIRST_RCA) << 16) != AT91C_CMD_SEND_OK) -+ return AT91C_CMD_SEND_ERROR; -+ -+ //* If no error during assignation address ==> Increment Nb_cards_Found -+ Nb_Cards_Found++ ; -+ } -+ } -+} -+#endif -+#ifdef MMC -+//*---------------------------------------------------------------------------- -+//* \fn AT91F_MCI_MMC_Init -+//* \brief Return the MMC initialisation status -+//*---------------------------------------------------------------------------- -+AT91S_MCIDeviceStatus AT91F_MCI_MMC_Init (AT91PS_MciDevice pMCI_Device) -+{ -+ unsigned int tab_response[4]; -+ unsigned int mult,blocknr; -+ unsigned int i,Nb_Cards_Found=0; -+ -+ //* Resets all MMC Cards in Idle state -+ AT91F_MCI_SendCommand(pMCI_Device, AT91C_MMC_GO_IDLE_STATE_CMD, AT91C_NO_ARGUMENT); -+ -+ if(AT91F_MCI_MMC_GetAllOCR(pMCI_Device) == AT91C_INIT_ERROR) -+ return AT91C_INIT_ERROR; -+ -+ Nb_Cards_Found = AT91F_MCI_MMC_GetAllCID(pMCI_Device,tab_response); -+ if (Nb_Cards_Found != AT91C_CMD_SEND_ERROR) -+ { -+ //* Set the Mode Register -+ AT91C_BASE_MCI->MCI_MR = AT91C_MCI_MR_PDCMODE; -+ -+ for(i = 0; i < Nb_Cards_Found; i++) -+ { -+ if (AT91F_MCI_GetCSD(pMCI_Device, -+ pMCI_Device->pMCI_DeviceFeatures[i].Relative_Card_Address, -+ tab_response) != AT91C_CMD_SEND_OK) -+ pMCI_Device->pMCI_DeviceFeatures[i].Relative_Card_Address = 0; -+ else -+ { -+ pMCI_Device->pMCI_DeviceFeatures[i].Max_Read_DataBlock_Length = 1 << ((tab_response[1] >> AT91C_CSD_RD_B_LEN_S) & AT91C_CSD_RD_B_LEN_M ); -+ pMCI_Device->pMCI_DeviceFeatures[i].Max_Write_DataBlock_Length = 1 << ((tab_response[3] >> AT91C_CSD_WBLEN_S) & AT91C_CSD_WBLEN_M ); -+ pMCI_Device->pMCI_DeviceFeatures[i].Sector_Size = 1 + ((tab_response[2] >> AT91C_CSD_v22_SECT_SIZE_S) & AT91C_CSD_v22_SECT_SIZE_M ); -+ pMCI_Device->pMCI_DeviceFeatures[i].Read_Partial = (tab_response[1] >> AT91C_CSD_RD_B_PAR_S) & AT91C_CSD_RD_B_PAR_M; -+ pMCI_Device->pMCI_DeviceFeatures[i].Write_Partial = (tab_response[3] >> AT91C_CSD_WBLOCK_P_S) & AT91C_CSD_WBLOCK_P_M; -+ -+ // None in MMC specification version 2.2 -+ pMCI_Device->pMCI_DeviceFeatures[i].Erase_Block_Enable = 0; -+ -+ pMCI_Device->pMCI_DeviceFeatures[i].Read_Block_Misalignment = (tab_response[1] >> AT91C_CSD_RD_B_MIS_S) & AT91C_CSD_RD_B_MIS_M; -+ pMCI_Device->pMCI_DeviceFeatures[i].Write_Block_Misalignment = (tab_response[1] >> AT91C_CSD_WR_B_MIS_S) & AT91C_CSD_WR_B_MIS_M; -+ -+ //// Compute Memory Capacity -+ // compute MULT -+ mult = 1 << ( ((tab_response[2] >> AT91C_CSD_C_SIZE_M_S) & AT91C_CSD_C_SIZE_M_M) + 2 ); -+ // compute MSB of C_SIZE -+ blocknr = ((tab_response[1] >> AT91C_CSD_CSIZE_H_S) & AT91C_CSD_CSIZE_H_M) << 2; -+ // compute MULT * (LSB of C-SIZE + MSB already computed + 1) = BLOCKNR -+ blocknr = mult * ( ( blocknr + ( (tab_response[2] >> AT91C_CSD_CSIZE_L_S) & AT91C_CSD_CSIZE_L_M) ) + 1 ); -+ -+ pMCI_Device->pMCI_DeviceFeatures[i].Memory_Capacity = pMCI_Device->pMCI_DeviceFeatures[i].Max_Read_DataBlock_Length * blocknr; -+ //// End of Compute Memory Capacity -+ -+ } // end of else -+ } // end of for -+ -+ return AT91C_INIT_OK; -+ } // end of if -+ -+ return AT91C_INIT_ERROR; -+} -+#endif -+ -+//*---------------------------------------------------------------------------- -+//* \fn AT91F_MCI_SDCard_GetOCR -+//* \brief Asks to all cards to send their operations conditions -+//*---------------------------------------------------------------------------- -+AT91S_MCIDeviceStatus AT91F_MCI_SDCard_GetOCR (AT91PS_MciDevice pMCI_Device) -+{ -+ unsigned int response =0x0; -+ -+ // The RCA to be used for CMD55 in Idle state shall be the card's default RCA=0x0000. -+ pMCI_Device->pMCI_DeviceFeatures->Relative_Card_Address = 0x0; -+ -+ while( (response & AT91C_CARD_POWER_UP_BUSY) != AT91C_CARD_POWER_UP_BUSY ) -+ { -+ response = AT91F_MCI_SDCard_SendAppCommand(pMCI_Device, -+ AT91C_SDCARD_APP_OP_COND_CMD, -+ AT91C_MMC_HOST_VOLTAGE_RANGE); -+ if (response != AT91C_CMD_SEND_OK) -+ return AT91C_INIT_ERROR; -+ -+ response = AT91C_BASE_MCI->MCI_RSPR[0]; -+ } -+ -+ return(AT91C_BASE_MCI->MCI_RSPR[0]); -+} -+ -+//*---------------------------------------------------------------------------- -+//* \fn AT91F_MCI_SDCard_GetCID -+//* \brief Asks to the SDCard on the chosen slot to send its CID -+//*---------------------------------------------------------------------------- -+AT91S_MCIDeviceStatus AT91F_MCI_SDCard_GetCID (AT91PS_MciDevice pMCI_Device, unsigned int *response) -+{ -+ if(AT91F_MCI_SendCommand(pMCI_Device, -+ AT91C_ALL_SEND_CID_CMD, -+ AT91C_NO_ARGUMENT) != AT91C_CMD_SEND_OK) -+ return AT91C_CMD_SEND_ERROR; -+ -+ response[0] = AT91C_BASE_MCI->MCI_RSPR[0]; -+ response[1] = AT91C_BASE_MCI->MCI_RSPR[1]; -+ response[2] = AT91C_BASE_MCI->MCI_RSPR[2]; -+ response[3] = AT91C_BASE_MCI->MCI_RSPR[3]; -+ -+ return AT91C_CMD_SEND_OK; -+} -+ -+//*---------------------------------------------------------------------------- -+//* \fn AT91F_MCI_SDCard_SetBusWidth -+//* \brief Set bus width for SDCard -+//*---------------------------------------------------------------------------- -+AT91S_MCIDeviceStatus AT91F_MCI_SDCard_SetBusWidth(AT91PS_MciDevice pMCI_Device) -+{ -+ volatile int ret_value; -+ char bus_width; -+ -+ do -+ { -+ ret_value =AT91F_MCI_GetStatus(pMCI_Device,pMCI_Device->pMCI_DeviceFeatures->Relative_Card_Address); -+ } -+ while((ret_value > 0) && ((ret_value & AT91C_SR_READY_FOR_DATA) == 0)); -+ -+ // Select Card -+ AT91F_MCI_SendCommand(pMCI_Device, -+ AT91C_SEL_DESEL_CARD_CMD, -+ (pMCI_Device->pMCI_DeviceFeatures->Relative_Card_Address)<<16); -+ -+ // Set bus width for Sdcard -+ if(pMCI_Device->pMCI_DeviceDesc->SDCard_bus_width == AT91C_MCI_SCDBUS) -+ bus_width = AT91C_BUS_WIDTH_4BITS; -+ else bus_width = AT91C_BUS_WIDTH_1BIT; -+ -+ if (AT91F_MCI_SDCard_SendAppCommand(pMCI_Device,AT91C_SDCARD_SET_BUS_WIDTH_CMD,bus_width) != AT91C_CMD_SEND_OK) -+ return AT91C_CMD_SEND_ERROR; -+ -+ return AT91C_CMD_SEND_OK; -+} -+ -+//*---------------------------------------------------------------------------- -+//* \fn AT91F_MCI_SDCard_Init -+//* \brief Return the SDCard initialisation status -+//*---------------------------------------------------------------------------- -+AT91S_MCIDeviceStatus AT91F_MCI_SDCard_Init (AT91PS_MciDevice pMCI_Device) -+{ -+ unsigned int tab_response[4]; -+ unsigned int mult,blocknr; -+ -+ AT91F_MCI_SendCommand(pMCI_Device, AT91C_GO_IDLE_STATE_CMD, AT91C_NO_ARGUMENT); -+ -+ if(AT91F_MCI_SDCard_GetOCR(pMCI_Device) == AT91C_INIT_ERROR) -+ return AT91C_INIT_ERROR; -+ -+ if (AT91F_MCI_SDCard_GetCID(pMCI_Device,tab_response) == AT91C_CMD_SEND_OK) -+ { -+ pMCI_Device->pMCI_DeviceFeatures->Card_Inserted = AT91C_SD_CARD_INSERTED; -+ -+ if (AT91F_MCI_SendCommand(pMCI_Device, AT91C_SET_RELATIVE_ADDR_CMD, 0) == AT91C_CMD_SEND_OK) -+ { -+ pMCI_Device->pMCI_DeviceFeatures->Relative_Card_Address = (AT91C_BASE_MCI->MCI_RSPR[0] >> 16); -+ if (AT91F_MCI_GetCSD(pMCI_Device,pMCI_Device->pMCI_DeviceFeatures->Relative_Card_Address,tab_response) == AT91C_CMD_SEND_OK) -+ { -+ pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length = 1 << ((tab_response[1] >> AT91C_CSD_RD_B_LEN_S) & AT91C_CSD_RD_B_LEN_M ); -+ pMCI_Device->pMCI_DeviceFeatures->Max_Write_DataBlock_Length = 1 << ((tab_response[3] >> AT91C_CSD_WBLEN_S) & AT91C_CSD_WBLEN_M ); -+ pMCI_Device->pMCI_DeviceFeatures->Sector_Size = 1 + ((tab_response[2] >> AT91C_CSD_v21_SECT_SIZE_S) & AT91C_CSD_v21_SECT_SIZE_M ); -+ pMCI_Device->pMCI_DeviceFeatures->Read_Partial = (tab_response[1] >> AT91C_CSD_RD_B_PAR_S) & AT91C_CSD_RD_B_PAR_M; -+ pMCI_Device->pMCI_DeviceFeatures->Write_Partial = (tab_response[3] >> AT91C_CSD_WBLOCK_P_S) & AT91C_CSD_WBLOCK_P_M; -+ pMCI_Device->pMCI_DeviceFeatures->Erase_Block_Enable = (tab_response[3] >> AT91C_CSD_v21_ER_BLEN_EN_S) & AT91C_CSD_v21_ER_BLEN_EN_M; -+ pMCI_Device->pMCI_DeviceFeatures->Read_Block_Misalignment = (tab_response[1] >> AT91C_CSD_RD_B_MIS_S) & AT91C_CSD_RD_B_MIS_M; -+ pMCI_Device->pMCI_DeviceFeatures->Write_Block_Misalignment = (tab_response[1] >> AT91C_CSD_WR_B_MIS_S) & AT91C_CSD_WR_B_MIS_M; -+ -+ //// Compute Memory Capacity -+ // compute MULT -+ mult = 1 << ( ((tab_response[2] >> AT91C_CSD_C_SIZE_M_S) & AT91C_CSD_C_SIZE_M_M) + 2 ); -+ // compute MSB of C_SIZE -+ blocknr = ((tab_response[1] >> AT91C_CSD_CSIZE_H_S) & AT91C_CSD_CSIZE_H_M) << 2; -+ // compute MULT * (LSB of C-SIZE + MSB already computed + 1) = BLOCKNR -+ blocknr = mult * ( ( blocknr + ( (tab_response[2] >> AT91C_CSD_CSIZE_L_S) & AT91C_CSD_CSIZE_L_M) ) + 1 ); -+ -+ pMCI_Device->pMCI_DeviceFeatures->Memory_Capacity = pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length * blocknr; -+ //// End of Compute Memory Capacity -+ printf("BLK 0x%x", pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length); -+ -+ if( AT91F_MCI_SDCard_SetBusWidth(pMCI_Device) == AT91C_CMD_SEND_OK ) -+ { -+ if (AT91F_MCI_SetBlocklength(pMCI_Device,pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length) == AT91C_CMD_SEND_OK) -+ return AT91C_INIT_OK; -+ } -+ } -+ } -+ } -+ return AT91C_INIT_ERROR; -+} -diff -urN romboot.old/mci_main.cpp romboot/mci_main.cpp ---- romboot.old/mci_main.cpp 1970-01-01 01:00:00.000000000 +0100 -+++ romboot/mci_main.cpp 2007-03-22 18:52:58.000000000 +0100 -@@ -0,0 +1,317 @@ -+//*---------------------------------------------------------------------------- -+//* ATMEL Microcontroller Software Support - ROUSSET - -+//*---------------------------------------------------------------------------- -+//* The software is delivered "AS IS" without warranty or condition of any -+//* kind, either express, implied or statutory. This includes without -+//* limitation any warranty or condition with respect to merchantability or -+//* fitness for any particular purpose, or against the infringements of -+//* intellectual property rights of others. -+//*---------------------------------------------------------------------------- -+//* File Name : main.c -+//* Object : main application written in C -+//* Creation : FB 21/11/2002 -+//* -+//*---------------------------------------------------------------------------- -+#include "com.h" -+#include "dataflash.h" -+#include -+ -+#define AT91C_MCI_TIMEOUT 1000000 /* For AT91F_MCIDeviceWaitReady */ -+#define BUFFER_SIZE_MCI_DEVICE 512 -+#define MASTER_CLOCK 60000000 -+#define FALSE -1 -+#define TRUE 1 -+ -+//* External Functions -+extern "C" void AT91F_ASM_MCI_Handler(void); -+extern "C" void AT91F_MCI_Device_Handler(AT91PS_MciDevice,unsigned int); -+extern AT91S_MCIDeviceStatus AT91F_MCI_SDCard_Init (AT91PS_MciDevice); -+extern AT91S_MCIDeviceStatus AT91F_MCI_SetBlocklength(AT91PS_MciDevice,unsigned int); -+extern AT91S_MCIDeviceStatus AT91F_MCI_ReadBlock(AT91PS_MciDevice,int,unsigned int *,int); -+extern AT91S_MCIDeviceStatus AT91F_MCI_WriteBlock(AT91PS_MciDevice,int,unsigned int *,int); -+//* Global Variables -+AT91S_MciDeviceFeatures MCI_Device_Features; -+AT91S_MciDeviceDesc MCI_Device_Desc; -+AT91S_MciDevice MCI_Device; -+ -+unsigned int dlBuffer = 0x20000000; -+#undef MCI_TEST -+#ifdef MCI_TEST -+char TestString[] = "\r\nHello Hamish\r\n"; -+#endif -+ -+//*---------------------------------------------------------------------------- -+//* \fn AT91F_MCIDeviceWaitReady -+//* \brief Wait for MCI Device ready -+//*---------------------------------------------------------------------------- -+void AT91F_MCIDeviceWaitReady(unsigned int timeout) -+{ -+ volatile int status; -+ -+ do -+ { -+ status = AT91C_BASE_MCI->MCI_SR; -+ timeout--; -+ } -+ while( !(status & AT91C_MCI_NOTBUSY) && (timeout>0) ); -+} -+ -+unsigned int swab32(unsigned int data) -+{ -+ unsigned int res = 0; -+ -+ res = (data & 0x000000ff) << 24 | -+ (data & 0x0000ff00) << 8 | -+ (data & 0x00ff0000) >> 8 | -+ (data & 0xff000000) >> 24; -+ -+ return res; -+} -+ -+AT91S_MCIDeviceStatus readblock( -+ AT91PS_MciDevice pMCI_Device, -+ int src, -+ unsigned int *databuffer, -+ int sizeToRead) -+{ -+ int i; -+ unsigned char *buf = (unsigned char *)databuffer; -+ -+ //* Read Block 1 -+ for(i=0;i 0); -+ } -+#endif -+//extern char message[40]; -+ -+int notnull(int bufpos, unsigned int len) -+{ -+ int i; -+ unsigned char * bp = (unsigned char *)bufpos; -+ -+ for (i=0; iMax_Read_DataBlock_Length; -+ -+ //* ReadBlock & WriteBlock Test -> Entire Block -+ -+ //* Wait MCI Device Ready -+ AT91F_MCIDeviceWaitReady(AT91C_MCI_TIMEOUT); -+ -+#ifdef MCI_TEST -+ //* Read Block 1 -+ for(i=0;i>=1) -+ NbPage++; -+ i = lastvalid + (NbPage << 13) + (dataflash_info[0].Device.pages_size << 17); -+ *(int *)(dlBuffer + 0x14) = i; -+ -+ for(i=0; i<4688; i++) { -+ readblock(&MCI_Device, block*Max_Read_DataBlock_Length, (unsigned int *)bufpos, Max_Read_DataBlock_Length); -+ block++; -+ bufpos += 512; -+ } -+ write_dataflash(0xc0000000, dlBuffer, 512 * block); -+ //* End Of Test -+ printf("DONE %d\n\r", lastvalid); -+ -+// printf(Buffer); -+ -+ return TRUE; -+} -+ -+//*---------------------------------------------------------------------------- -+//* \fn AT91F_CfgDevice -+//* \brief This function is used to initialise MMC or SDCard Features -+//*---------------------------------------------------------------------------- -+void AT91F_CfgDevice(void) -+{ -+ // Init Device Structure -+ -+ MCI_Device_Features.Relative_Card_Address = 0; -+ MCI_Device_Features.Card_Inserted = AT91C_CARD_REMOVED; -+ MCI_Device_Features.Max_Read_DataBlock_Length = 0; -+ MCI_Device_Features.Max_Write_DataBlock_Length = 0; -+ MCI_Device_Features.Read_Partial = 0; -+ MCI_Device_Features.Write_Partial = 0; -+ MCI_Device_Features.Erase_Block_Enable = 0; -+ MCI_Device_Features.Sector_Size = 0; -+ MCI_Device_Features.Memory_Capacity = 0; -+ -+ MCI_Device_Desc.state = AT91C_MCI_IDLE; -+ MCI_Device_Desc.SDCard_bus_width = AT91C_MCI_SCDBUS; -+ -+ // Init AT91S_DataFlash Global Structure, by default AT45DB choosen !!! -+ MCI_Device.pMCI_DeviceDesc = &MCI_Device_Desc; -+ MCI_Device.pMCI_DeviceFeatures = &MCI_Device_Features; -+ -+} -+ -+//*---------------------------------------------------------------------------- -+//* \fn AT91F_Test_SDCard -+//* \brief Configure MCI for SDCard and complete SDCard init, then jump to Test Functions -+//*---------------------------------------------------------------------------- -+int AT91F_Test_SDCard(void) -+{ -+ ////////////////////////////////////////////////////////// -+ //* For SDCard Init -+ ////////////////////////////////////////////////////////// -+ -+ AT91F_MCI_Configure(AT91C_BASE_MCI, -+ AT91C_MCI_DTOR_1MEGA_CYCLES, -+ AT91C_MCI_MR_PDCMODE, // 15MHz for MCK = 60MHz (CLKDIV = 1) -+ AT91C_MCI_SDCARD_4BITS_SLOTA); -+ -+ if(AT91F_MCI_SDCard_Init(&MCI_Device) != AT91C_INIT_OK) -+ return FALSE; -+ -+ printf("\n\rINI OK: TST\n\r"); -+ -+ // Enter Main Tests -+ return(AT91F_Test()); -+} -+ -+//*---------------------------------------------------------------------------- -+//* \fn AT91F_MCI_Handler -+//* \brief MCI Handler -+//*---------------------------------------------------------------------------- -+extern "C" void AT91F_MCI_Handler(void); -+ -+void AT91F_MCI_Handler(void) -+{ -+ int status; -+ -+ status = ( AT91C_BASE_MCI->MCI_SR & AT91C_BASE_MCI->MCI_IMR ); -+ -+ AT91F_MCI_Device_Handler(&MCI_Device,status); -+} -+ -+//*---------------------------------------------------------------------------- -+//* \fn main -+//* \brief main function -+//*---------------------------------------------------------------------------- -+int mci_main(void) -+{ -+// printf("MCI Test\n\r"); -+ -+/////////////////////////////////////////////////////////////////////////////////////////// -+// MCI Init : common to MMC and SDCard -+/////////////////////////////////////////////////////////////////////////////////////////// -+ -+// printf("\n\rInit MCI Interface\n\r"); -+ -+ // Set up PIO SDC_TYPE to switch on MMC/SDCard and not DataFlash Card -+ AT91F_PIO_CfgOutput(AT91C_BASE_PIOB,AT91C_PIO_PB7); -+ AT91F_PIO_SetOutput(AT91C_BASE_PIOB,AT91C_PIO_PB7); -+ -+ // Init MCI for MMC and SDCard interface -+ AT91F_MCI_CfgPIO(); -+ AT91F_MCI_CfgPMC(); -+ AT91F_PDC_Open(AT91C_BASE_PDC_MCI); -+ -+ // Disable all the interrupts -+ AT91C_BASE_MCI->MCI_IDR = 0xFFFFFFFF; -+ -+ // Init MCI Device Structures -+ AT91F_CfgDevice(); -+ -+ // Configure MCI interrupt -+ AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, -+ AT91C_ID_MCI, -+ AT91C_AIC_PRIOR_HIGHEST, -+ AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE, -+ AT91F_ASM_MCI_Handler); -+ -+ // Enable MCI interrupt -+ AT91F_AIC_EnableIt(AT91C_BASE_AIC,AT91C_ID_MCI); -+ -+/////////////////////////////////////////////////////////////////////////////////////////// -+// Enter Test Menu -+/////////////////////////////////////////////////////////////////////////////////////////// -+ -+ // Enable Receiver -+ AT91F_US_EnableRx((AT91PS_USART) AT91C_BASE_DBGU); -+ -+ if(AT91F_Test_SDCard() == TRUE) -+ printf("\n\rTST OK\n\r"); -+ else -+ printf("\n\rTST Fail\n\r"); -+ return(1); -+} diff --git a/target/linux/at91-2.6/image/romboot/patches/003-SD-reflash.patch b/target/linux/at91-2.6/image/romboot/patches/003-SD-reflash.patch deleted file mode 100644 index b0d5baf03f..0000000000 --- a/target/linux/at91-2.6/image/romboot/patches/003-SD-reflash.patch +++ /dev/null @@ -1,948 +0,0 @@ -diff -urN romboot.old/init.cpp romboot/init.cpp ---- romboot.old/init.cpp 2007-03-24 13:34:19.000000000 +0100 -+++ romboot/init.cpp 2007-03-24 12:23:19.000000000 +0100 -@@ -207,9 +207,10 @@ - AT91F_US_EnableRx((AT91PS_USART)AT91C_BASE_DBGU); - - /* Enable PIO to access the LEDs */ -- AT91C_BASE_PIOB->PIO_PER = AT91C_PIO_PB2; -- AT91C_BASE_PIOB->PIO_OER = AT91C_PIO_PB2; -- AT91C_BASE_PIOB->PIO_CODR = AT91C_PIO_PB2; -+ AT91C_BASE_PIOC->PIO_PER = AT91C_PIO_PC7 | AT91C_PIO_PC8 | AT91C_PIO_PC14 | AT91C_PIO_PC15; -+ AT91C_BASE_PIOC->PIO_OER = AT91C_PIO_PC7 | AT91C_PIO_PC8 | AT91C_PIO_PC14 | AT91C_PIO_PC15; -+ AT91C_BASE_PIOC->PIO_CODR = AT91C_PIO_PC7 | AT91C_PIO_PC15; -+ AT91C_BASE_PIOC->PIO_SODR = AT91C_PIO_PC8 | AT91C_PIO_PC14; - - // AT91F_DBGU_Printk("\n\rAT91F_LowLevelInit(): Debug channel initialized\n\r"); - } -diff -urN romboot.old/main.cpp romboot/main.cpp ---- romboot.old/main.cpp 2007-03-24 13:34:19.000000000 +0100 -+++ romboot/main.cpp 2007-03-24 12:28:55.000000000 +0100 -@@ -13,6 +13,7 @@ - //*---------------------------------------------------------------------------- - #include - #include -+#include - - #include "com.h" - #include "main.h" -@@ -39,16 +40,31 @@ - extern void AT91F_DBGU_Printk(char *); - extern "C" void AT91F_ST_ASM_Handler(void); - extern "C" void Jump(unsigned int addr); --extern int mci_main(void); -+extern int AT91F_MCI_Init(void); -+#define TRUE 1 -+#define FALSE 0 -+ -+/* from trxhdr.h */ -+ -+#define TRX_MAGIC 0x30524448 /* "HDR0" */ -+#define TRX_VERSION 1 -+ -+struct trx_header { -+ unsigned int magic; -+ unsigned int len; -+ unsigned int crc32; -+ unsigned int flag_version; -+ unsigned int offsets[3]; -+}; - - //const char *menu_separ = "*----------------------------------------*\n\r"; - - const char *menu_dataflash = { -- "1: DL DF [ad]\n\r" -- "2: RD DF [ad]\n\r" -- "3: CP SD\n\r" -- "4: U-BOOT\n\r" -- "5: RM BL in DF\n\r" -+ "1: Download DF [addr]\n\r" -+ "2: Read DF [addr]\n\r" -+ "3: Copy SD-Card\n\r" -+ "4: Start U-BOOT\n\r" -+ "5: Clear bootloder\n\r" - }; - - //* Globales variables -@@ -155,14 +171,15 @@ - //*----------------------------------------------------------------------------- - void AT91F_DisplayMenu(void) - { -- printf("\n\rFDL SD-Card LOADER %s %s %s\n\r", AT91C_VERSION, __DATE__, __TIME__); --// printf(menu_separ); -- AT91F_DataflashPrintInfo(); --// printf(menu_separ); - printf(menu_dataflash); --// printf(menu_separ); - } - -+void AT91F_DisplayIntro(void) -+{ -+ printf("\n\rFDL LOADER %s %s %s\n\r", AT91C_VERSION, __DATE__, __TIME__); -+ AT91F_DataflashPrintInfo(); -+} -+ - //*----------------------------------------------------------------------------- - //* Function Name : AsciiToHex() - //* Object : ascii to hexa conversion -@@ -311,23 +328,24 @@ - AT91F_SetPLL(); - } - --/*void LedCode(void) -+/* -+void LedCode(void) - { - int *pRegister; - pRegister = (int *)0xFFFFF800; // Enable port C peripheral reg -- *pRegister = 0x3c00; -+ *pRegister = (AT91C_PIO_PC7 | AT91C_PIO_PC8 | AT91C_PIO_PC14 | AT91C_PIO_PC15); - pRegister = (int *)0xFFFFF810; // Output Enable reg -- *pRegister = 0x3c00; -+ *pRegister = (AT91C_PIO_PC7 | AT91C_PIO_PC8 | AT91C_PIO_PC14 | AT91C_PIO_PC15); - pRegister = (int *)0xFFFFF830; // Set data -- *pRegister = 0x1400; -+ *pRegister = AT91C_PIO_PC7 | AT91C_PIO_PC15; - pRegister = (int *)0xFFFFF834; // Clear bits -- *pRegister = 0x2800; -+ *pRegister = AT91C_PIO_PC8 | AT91C_PIO_PC14; - } - */ - -+ - void AT91F_StartUboot(unsigned int dummy, void *pvoid) - { -- //printf("Load U-BOOT from dataflash[%x] to SDRAM[%x]\n\r", AT91C_UBOOT_DATAFLASH_ADDR, AT91C_UBOOT_ADDR); - read_dataflash(AT91C_UBOOT_DATAFLASH_ADDR, AT91C_UBOOT_SIZE, (char *)(AT91C_UBOOT_ADDR)); - //printf("Set PLLA to 180Mhz and Master clock to 60Mhz and start U-BOOT\n\r"); - //* Reset registers -@@ -337,6 +355,67 @@ - while(1); - } - -+#define AT91C_MCI_TIMEOUT 1000000 -+ -+extern AT91S_MciDevice MCI_Device; -+ -+extern void AT91F_MCIDeviceWaitReady(unsigned int); -+extern int AT91F_MCI_ReadBlockSwab(AT91PS_MciDevice, int, unsigned int *, int); -+ -+ -+int Program_From_MCI(void) -+{ -+ int i; -+ unsigned int Max_Read_DataBlock_Length; -+ int block = 0; -+ int buffer = AT91C_DOWNLOAD_BASE_ADDRESS; -+ int bufpos = AT91C_DOWNLOAD_BASE_ADDRESS; -+ int NbPage = 0; -+ struct trx_header *p; -+ unsigned int data; -+ -+ p = (struct trx_header *)bufpos; -+ -+ Max_Read_DataBlock_Length = MCI_Device.pMCI_DeviceFeatures->Max_Read_DataBlock_Length; -+ -+ AT91F_MCIDeviceWaitReady(AT91C_MCI_TIMEOUT); -+ -+ AT91F_MCI_ReadBlockSwab(&MCI_Device, block*Max_Read_DataBlock_Length, (unsigned int *)bufpos, Max_Read_DataBlock_Length); -+ -+ if (p->magic != TRX_MAGIC) -+ return FALSE; -+ -+ printf("Read SD-Card\n\r"); -+ AT91C_BASE_PIOC->PIO_CODR = AT91C_PIO_PC7 | AT91C_PIO_PC15 | AT91C_PIO_PC8 | AT91C_PIO_PC14; -+ for (i=0; i<(p->len/512); i++) { -+ AT91F_MCI_ReadBlockSwab(&MCI_Device, block*Max_Read_DataBlock_Length, (unsigned int *)bufpos, Max_Read_DataBlock_Length); -+ block++; -+ bufpos += Max_Read_DataBlock_Length; -+ } -+ -+ NbPage = 0; -+ i = dataflash_info[0].Device.pages_number; -+ while(i >>= 1) -+ NbPage++; -+ i = ((p->offsets[1] - p->offsets[0])/ 512) + 1 + (NbPage << 13) + (dataflash_info[0].Device.pages_size << 17); -+ *(int *)(buffer + p->offsets[0] + AT91C_OFFSET_VECT6) = i; -+ -+ printf("Write romboot\n\r"); -+ AT91C_BASE_PIOC->PIO_CODR = AT91C_PIO_PC7 | AT91C_PIO_PC15 | AT91C_PIO_PC14; -+ AT91C_BASE_PIOC->PIO_SODR = AT91C_PIO_PC8; -+ write_dataflash(0xc0000000, buffer + p->offsets[0], p->offsets[1] - p->offsets[0]); -+ printf("Write u-boot\n\r"); -+ AT91C_BASE_PIOC->PIO_CODR = AT91C_PIO_PC7 | AT91C_PIO_PC15; -+ AT91C_BASE_PIOC->PIO_SODR = AT91C_PIO_PC8 | AT91C_PIO_PC14; -+ write_dataflash(0xc0008000, buffer + p->offsets[1], p->offsets[2] - p->offsets[1]); -+ printf("Write knl/root\n\r"); -+ AT91C_BASE_PIOC->PIO_CODR = AT91C_PIO_PC8 | AT91C_PIO_PC15; -+ AT91C_BASE_PIOC->PIO_SODR = AT91C_PIO_PC7 | AT91C_PIO_PC14; -+ write_dataflash(0xc0042000, buffer + p->offsets[2], p->len - p->offsets[2]); -+ AT91C_BASE_PIOC->PIO_CODR = AT91C_PIO_PC8 | AT91C_PIO_PC14; -+ AT91C_BASE_PIOC->PIO_SODR = AT91C_PIO_PC7 | AT91C_PIO_PC15; -+ return TRUE; -+ } - - //*---------------------------------------------------------------------------- - //* Function Name : main -@@ -357,6 +436,7 @@ - unsigned int crc1 = 0, crc2 = 0; - volatile int device; - int NbPage; -+ int mci_present; - - stdin = fopen(0, at91_dbgu_getc); - stdout = fopen(at91_dbgu_putc, 0); -@@ -387,6 +467,15 @@ - - // DataFlash on SPI Configuration - AT91F_DataflashInit (); -+ AT91F_DisplayIntro(); -+ mci_present = AT91F_MCI_Init(); -+ -+#ifdef PRODTEST -+ if (mci_present) { -+ Program_From_MCI(); -+ AT91F_StartUboot(0, (void *)0); -+ } -+#endif - - // start tempo to start Uboot in a delay of 1 sec if no key pressed - svcUbootTempo.Start(&svcUbootTempo, 1000, 0, AT91F_StartUboot, (void *)0); -@@ -396,7 +485,7 @@ - - // stop tempo - svcUbootTempo.Stop(&svcUbootTempo); -- -+ - while(1) { - while(command == 0) { - AddressToDownload = AT91C_DOWNLOAD_BASE_ADDRESS; -@@ -444,7 +533,8 @@ - #endif - - case '3': -- mci_main(); -+ if (mci_present) -+ Program_From_MCI(); - command=0; - break; - -@@ -461,7 +551,6 @@ - *i = 0; - } - write_dataflash(0xc0000000, 0x20000000, 0x4000); -- printf("BL CLR\r\n"); - command = 0; - break; - -diff -urN romboot.old/main.h romboot/main.h ---- romboot.old/main.h 2007-03-24 13:34:19.000000000 +0100 -+++ romboot/main.h 2007-03-23 19:06:52.000000000 +0100 -@@ -27,7 +27,7 @@ - - #define AT91C_OFFSET_VECT6 0x14 //* Offset for ARM vector 6 - --#define AT91C_VERSION "VER 1.02" -+#define AT91C_VERSION "VER 1.03" - // Global variables and functions definition - extern unsigned int GetTickCount(void); - #endif -diff -urN romboot.old/Makefile romboot/Makefile ---- romboot.old/Makefile 2007-03-24 13:34:19.000000000 +0100 -+++ romboot/Makefile 2007-03-24 10:45:38.000000000 +0100 -@@ -1,12 +1,17 @@ - LINKFLAGS= -T elf32-littlearm.lds -Ttext 0 - COMPILEFLAGS= -Os - TARGET=romboot -+TARGET2=rbptest -+ - OBJFILES=cstartup_ram.o asm_isr.o asm_mci_isr.o jump.o at45.o com.o dataflash.o \ -- mci_device.o mci_main.o init.o main.o stdio.o _udivsi3.o _umodsi3.o div0.o -+ mci_device.o init.o main.o stdio.o _udivsi3.o _umodsi3.o div0.o -+OBJFILES2=cstartup_ram.o asm_isr.o asm_mci_isr.o jump.o at45.o com.o dataflash.o \ -+ mci_device.o init.o ptmain.o stdio.o _udivsi3.o _umodsi3.o div0.o -+ - LIBRARIES= - INCLUDES= -Iinclude - --all:$(TARGET) -+all:$(TARGET) $(TARGET2) - - $(TARGET): $(OBJFILES) - $(LD) $(OBJFILES) -o $(TARGET).out $(LINKFLAGS) -n -@@ -14,6 +19,12 @@ - $(OBJDUMP) -h -s $(TARGET).out > $(TARGET).lss - $(NM) -n $(TARGET).out | grep -v '\( [aUw] \)\|\(__crc_\)\|\( \$[adt]\)' > $(TARGET).map - -+$(TARGET2): $(OBJFILES2) -+ $(LD) $(OBJFILES2) -o $(TARGET2).out $(LINKFLAGS) -n -+ $(OBJCOPY) $(TARGET2).out -O binary $(TARGET2).bin -+ $(OBJDUMP) -h -s $(TARGET2).out > $(TARGET2).lss -+ $(NM) -n $(TARGET2).out | grep -v '\( [aUw] \)\|\(__crc_\)\|\( \$[adt]\)' > $(TARGET2).map -+ - asm_isr.o: asm_isr.S - $(CC) -c -Iinclude -o $@ $< - -@@ -32,6 +43,12 @@ - _umodsi3.o: _umodsi3.S - $(CC) -c $< - -+main.o: main.cpp -+ $(CC) -c $(COMPILEFLAGS) $(INCLUDES) -o main.o $< -+ -+ptmain.o: main.cpp -+ $(CC) -c $(COMPILEFLAGS) $(INCLUDES) -D PRODTEST -o ptmain.o $< -+ - #%.o: %.S - # $(CC) -c $(INCLUDES) -o $@ $< - -diff -urN romboot.old/mci_device.cpp romboot/mci_device.cpp ---- romboot.old/mci_device.cpp 2007-03-24 13:34:19.000000000 +0100 -+++ romboot/mci_device.cpp 2007-03-24 11:23:38.000000000 +0100 -@@ -16,14 +16,28 @@ - #include - #include "com.h" - --#define ENABLE_WRITE 1 -+#define AT91C_MCI_TIMEOUT 1000000 /* For AT91F_MCIDeviceWaitReady */ -+#define BUFFER_SIZE_MCI_DEVICE 512 -+#define MASTER_CLOCK 60000000 -+#define FALSE 0 -+#define TRUE 1 -+ -+//* External Functions -+extern "C" void AT91F_ASM_MCI_Handler(void); -+extern "C" void AT91F_MCI_Device_Handler(AT91PS_MciDevice,unsigned int); -+//* Global Variables -+AT91S_MciDeviceFeatures MCI_Device_Features; -+AT91S_MciDeviceDesc MCI_Device_Desc; -+AT91S_MciDevice MCI_Device; -+ -+#undef ENABLE_WRITE - #undef MMC - - //*---------------------------------------------------------------------------- - //* \fn AT91F_MCI_SendCommand - //* \brief Generic function to send a command to the MMC or SDCard - //*---------------------------------------------------------------------------- --AT91S_MCIDeviceStatus AT91F_MCI_SendCommand ( -+int AT91F_MCI_SendCommand ( - AT91PS_MciDevice pMCI_Device, - unsigned int Cmd, - unsigned int Arg) -@@ -63,7 +77,7 @@ - //* \fn AT91F_MCI_SDCard_SendAppCommand - //* \brief Specific function to send a specific command to the SDCard - //*---------------------------------------------------------------------------- --AT91S_MCIDeviceStatus AT91F_MCI_SDCard_SendAppCommand ( -+int AT91F_MCI_SDCard_SendAppCommand ( - AT91PS_MciDevice pMCI_Device, - unsigned int Cmd_App, - unsigned int Arg ) -@@ -98,7 +112,7 @@ - //* \fn AT91F_MCI_GetStatus - //* \brief Addressed card sends its status register - //*---------------------------------------------------------------------------- --AT91S_MCIDeviceStatus AT91F_MCI_GetStatus(AT91PS_MciDevice pMCI_Device,unsigned int relative_card_address) -+int AT91F_MCI_GetStatus(AT91PS_MciDevice pMCI_Device,unsigned int relative_card_address) - { - if (AT91F_MCI_SendCommand(pMCI_Device, - AT91C_SEND_STATUS_CMD, -@@ -139,10 +153,25 @@ - } - - //*---------------------------------------------------------------------------- -+//* \fn AT91F_MCI_Handler -+//* \brief MCI Handler -+//*---------------------------------------------------------------------------- -+extern "C" void AT91F_MCI_Handler(void); -+ -+void AT91F_MCI_Handler(void) -+{ -+ int status; -+ -+ status = ( AT91C_BASE_MCI->MCI_SR & AT91C_BASE_MCI->MCI_IMR ); -+ -+ AT91F_MCI_Device_Handler(&MCI_Device,status); -+} -+ -+//*---------------------------------------------------------------------------- - //* \fn AT91F_MCI_ReadBlock - //* \brief Read an ENTIRE block or PARTIAL block - //*---------------------------------------------------------------------------- --AT91S_MCIDeviceStatus AT91F_MCI_ReadBlock( -+int AT91F_MCI_ReadBlock( - AT91PS_MciDevice pMCI_Device, - int src, - unsigned int *dataBuffer, -@@ -205,7 +234,7 @@ - //* \fn AT91F_MCI_WriteBlock - //* \brief Write an ENTIRE block but not always PARTIAL block !!! - //*---------------------------------------------------------------------------- --AT91S_MCIDeviceStatus AT91F_MCI_WriteBlock( -+int AT91F_MCI_WriteBlock( - AT91PS_MciDevice pMCI_Device, - int dest, - unsigned int *dataBuffer, -@@ -268,7 +297,7 @@ - //* \fn AT91F_MCI_MMC_SelectCard - //* \brief Toggles a card between the Stand_by and Transfer states or between Programming and Disconnect states - //*------------------------------------------------------------------------------------------------------------ --AT91S_MCIDeviceStatus AT91F_MCI_MMC_SelectCard(AT91PS_MciDevice pMCI_Device, unsigned int relative_card_address) -+int AT91F_MCI_MMC_SelectCard(AT91PS_MciDevice pMCI_Device, unsigned int relative_card_address) - { - int status; - -@@ -302,7 +331,7 @@ - //* \fn AT91F_MCI_GetCSD - //* \brief Asks to the specified card to send its CSD - //*---------------------------------------------------------------------------- --AT91S_MCIDeviceStatus AT91F_MCI_GetCSD (AT91PS_MciDevice pMCI_Device, unsigned int relative_card_address , unsigned int * response) -+int AT91F_MCI_GetCSD (AT91PS_MciDevice pMCI_Device, unsigned int relative_card_address , unsigned int * response) - { - - if(AT91F_MCI_SendCommand(pMCI_Device, -@@ -322,7 +351,7 @@ - //* \fn AT91F_MCI_SetBlocklength - //* \brief Select a block length for all following block commands (R/W) - //*---------------------------------------------------------------------------- --AT91S_MCIDeviceStatus AT91F_MCI_SetBlocklength(AT91PS_MciDevice pMCI_Device,unsigned int length) -+int AT91F_MCI_SetBlocklength(AT91PS_MciDevice pMCI_Device,unsigned int length) - { - return( AT91F_MCI_SendCommand(pMCI_Device, AT91C_SET_BLOCKLEN_CMD, length) ); - } -@@ -332,7 +361,7 @@ - //* \fn AT91F_MCI_MMC_GetAllOCR - //* \brief Asks to all cards to send their operations conditions - //*---------------------------------------------------------------------------- --AT91S_MCIDeviceStatus AT91F_MCI_MMC_GetAllOCR (AT91PS_MciDevice pMCI_Device) -+int AT91F_MCI_MMC_GetAllOCR (AT91PS_MciDevice pMCI_Device) - { - unsigned int response =0x0; - -@@ -357,7 +386,7 @@ - //* \fn AT91F_MCI_MMC_GetAllCID - //* \brief Asks to the MMC on the chosen slot to send its CID - //*---------------------------------------------------------------------------- --AT91S_MCIDeviceStatus AT91F_MCI_MMC_GetAllCID (AT91PS_MciDevice pMCI_Device, unsigned int *response) -+int AT91F_MCI_MMC_GetAllCID (AT91PS_MciDevice pMCI_Device, unsigned int *response) - { - int Nb_Cards_Found=-1; - -@@ -391,7 +420,7 @@ - //* \fn AT91F_MCI_MMC_Init - //* \brief Return the MMC initialisation status - //*---------------------------------------------------------------------------- --AT91S_MCIDeviceStatus AT91F_MCI_MMC_Init (AT91PS_MciDevice pMCI_Device) -+int AT91F_MCI_MMC_Init (AT91PS_MciDevice pMCI_Device) - { - unsigned int tab_response[4]; - unsigned int mult,blocknr; -@@ -454,7 +483,7 @@ - //* \fn AT91F_MCI_SDCard_GetOCR - //* \brief Asks to all cards to send their operations conditions - //*---------------------------------------------------------------------------- --AT91S_MCIDeviceStatus AT91F_MCI_SDCard_GetOCR (AT91PS_MciDevice pMCI_Device) -+int AT91F_MCI_SDCard_GetOCR (AT91PS_MciDevice pMCI_Device) - { - unsigned int response =0x0; - -@@ -479,7 +508,7 @@ - //* \fn AT91F_MCI_SDCard_GetCID - //* \brief Asks to the SDCard on the chosen slot to send its CID - //*---------------------------------------------------------------------------- --AT91S_MCIDeviceStatus AT91F_MCI_SDCard_GetCID (AT91PS_MciDevice pMCI_Device, unsigned int *response) -+int AT91F_MCI_SDCard_GetCID (AT91PS_MciDevice pMCI_Device, unsigned int *response) - { - if(AT91F_MCI_SendCommand(pMCI_Device, - AT91C_ALL_SEND_CID_CMD, -@@ -498,7 +527,7 @@ - //* \fn AT91F_MCI_SDCard_SetBusWidth - //* \brief Set bus width for SDCard - //*---------------------------------------------------------------------------- --AT91S_MCIDeviceStatus AT91F_MCI_SDCard_SetBusWidth(AT91PS_MciDevice pMCI_Device) -+int AT91F_MCI_SDCard_SetBusWidth(AT91PS_MciDevice pMCI_Device) - { - volatile int ret_value; - char bus_width; -@@ -529,7 +558,7 @@ - //* \fn AT91F_MCI_SDCard_Init - //* \brief Return the SDCard initialisation status - //*---------------------------------------------------------------------------- --AT91S_MCIDeviceStatus AT91F_MCI_SDCard_Init (AT91PS_MciDevice pMCI_Device) -+int AT91F_MCI_SDCard_Init (AT91PS_MciDevice pMCI_Device) - { - unsigned int tab_response[4]; - unsigned int mult,blocknr; -@@ -567,7 +596,7 @@ - - pMCI_Device->pMCI_DeviceFeatures->Memory_Capacity = pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length * blocknr; - //// End of Compute Memory Capacity -- printf("BLK 0x%x", pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length); -+ printf("SD-Card: %d Bytes\n\r", pMCI_Device->pMCI_DeviceFeatures->Memory_Capacity); - - if( AT91F_MCI_SDCard_SetBusWidth(pMCI_Device) == AT91C_CMD_SEND_OK ) - { -@@ -579,3 +608,141 @@ - } - return AT91C_INIT_ERROR; - } -+ -+//*---------------------------------------------------------------------------- -+//* \fn AT91F_CfgDevice -+//* \brief This function is used to initialise MMC or SDCard Features -+//*---------------------------------------------------------------------------- -+void AT91F_CfgDevice(void) -+{ -+ // Init Device Structure -+ -+ MCI_Device_Features.Relative_Card_Address = 0; -+ MCI_Device_Features.Card_Inserted = AT91C_CARD_REMOVED; -+ MCI_Device_Features.Max_Read_DataBlock_Length = 0; -+ MCI_Device_Features.Max_Write_DataBlock_Length = 0; -+ MCI_Device_Features.Read_Partial = 0; -+ MCI_Device_Features.Write_Partial = 0; -+ MCI_Device_Features.Erase_Block_Enable = 0; -+ MCI_Device_Features.Sector_Size = 0; -+ MCI_Device_Features.Memory_Capacity = 0; -+ -+ MCI_Device_Desc.state = AT91C_MCI_IDLE; -+ MCI_Device_Desc.SDCard_bus_width = AT91C_MCI_SCDBUS; -+ -+ // Init AT91S_DataFlash Global Structure, by default AT45DB choosen !!! -+ MCI_Device.pMCI_DeviceDesc = &MCI_Device_Desc; -+ MCI_Device.pMCI_DeviceFeatures = &MCI_Device_Features; -+ -+} -+ -+//*---------------------------------------------------------------------------- -+//* \fn AT91F_MCI_Init -+//* \brief Initialsise Card -+//*---------------------------------------------------------------------------- -+int AT91F_MCI_Init(void) -+{ -+ -+/////////////////////////////////////////////////////////////////////////////////////////// -+// MCI Init : common to MMC and SDCard -+/////////////////////////////////////////////////////////////////////////////////////////// -+ -+ // Set up PIO SDC_TYPE to switch on MMC/SDCard and not DataFlash Card -+ AT91F_PIO_CfgOutput(AT91C_BASE_PIOB,AT91C_PIO_PB7); -+ AT91F_PIO_SetOutput(AT91C_BASE_PIOB,AT91C_PIO_PB7); -+ -+ // Init MCI for MMC and SDCard interface -+ AT91F_MCI_CfgPIO(); -+ AT91F_MCI_CfgPMC(); -+ AT91F_PDC_Open(AT91C_BASE_PDC_MCI); -+ -+ // Disable all the interrupts -+ AT91C_BASE_MCI->MCI_IDR = 0xFFFFFFFF; -+ -+ // Init MCI Device Structures -+ AT91F_CfgDevice(); -+ -+ // Configure MCI interrupt -+ AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, -+ AT91C_ID_MCI, -+ AT91C_AIC_PRIOR_HIGHEST, -+ AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE, -+ AT91F_ASM_MCI_Handler); -+ -+ // Enable MCI interrupt -+ AT91F_AIC_EnableIt(AT91C_BASE_AIC,AT91C_ID_MCI); -+ -+ // Enable Receiver -+ AT91F_US_EnableRx((AT91PS_USART) AT91C_BASE_DBGU); -+ -+ AT91F_MCI_Configure(AT91C_BASE_MCI, -+ AT91C_MCI_DTOR_1MEGA_CYCLES, -+ AT91C_MCI_MR_PDCMODE, // 15MHz for MCK = 60MHz (CLKDIV = 1) -+ AT91C_MCI_SDCARD_4BITS_SLOTA); -+ -+ if(AT91F_MCI_SDCard_Init(&MCI_Device) != AT91C_INIT_OK) -+ return FALSE; -+ else -+ return TRUE; -+ -+} -+ -+//*---------------------------------------------------------------------------- -+//* \fn AT91F_MCIDeviceWaitReady -+//* \brief Wait for MCI Device ready -+//*---------------------------------------------------------------------------- -+void AT91F_MCIDeviceWaitReady(unsigned int timeout) -+{ -+ volatile int status; -+ -+ do -+ { -+ status = AT91C_BASE_MCI->MCI_SR; -+ timeout--; -+ } -+ while( !(status & AT91C_MCI_NOTBUSY) && (timeout>0) ); -+} -+ -+unsigned int swab32(unsigned int data) -+{ -+ unsigned int res = 0; -+ -+ res = (data & 0x000000ff) << 24 | -+ (data & 0x0000ff00) << 8 | -+ (data & 0x00ff0000) >> 8 | -+ (data & 0xff000000) >> 24; -+ -+ return res; -+} -+ -+//*-------------------------------------------------------------------- -+//* \fn AT91F_MCI_ReadBlockSwab -+//* \brief Read Block and swap byte order -+//*-------------------------------------------------------------------- -+int AT91F_MCI_ReadBlockSwab( -+ AT91PS_MciDevice pMCI_Device, -+ int src, -+ unsigned int *databuffer, -+ int sizeToRead) -+{ -+ int i; -+ unsigned char *buf = (unsigned char *)databuffer; -+ -+ //* Read Block 1 -+ for(i=0;i -- --#define AT91C_MCI_TIMEOUT 1000000 /* For AT91F_MCIDeviceWaitReady */ --#define BUFFER_SIZE_MCI_DEVICE 512 --#define MASTER_CLOCK 60000000 --#define FALSE -1 --#define TRUE 1 -- --//* External Functions --extern "C" void AT91F_ASM_MCI_Handler(void); --extern "C" void AT91F_MCI_Device_Handler(AT91PS_MciDevice,unsigned int); --extern AT91S_MCIDeviceStatus AT91F_MCI_SDCard_Init (AT91PS_MciDevice); --extern AT91S_MCIDeviceStatus AT91F_MCI_SetBlocklength(AT91PS_MciDevice,unsigned int); --extern AT91S_MCIDeviceStatus AT91F_MCI_ReadBlock(AT91PS_MciDevice,int,unsigned int *,int); --extern AT91S_MCIDeviceStatus AT91F_MCI_WriteBlock(AT91PS_MciDevice,int,unsigned int *,int); --//* Global Variables --AT91S_MciDeviceFeatures MCI_Device_Features; --AT91S_MciDeviceDesc MCI_Device_Desc; --AT91S_MciDevice MCI_Device; -- --unsigned int dlBuffer = 0x20000000; --#undef MCI_TEST --#ifdef MCI_TEST --char TestString[] = "\r\nHello Hamish\r\n"; --#endif -- --//*---------------------------------------------------------------------------- --//* \fn AT91F_MCIDeviceWaitReady --//* \brief Wait for MCI Device ready --//*---------------------------------------------------------------------------- --void AT91F_MCIDeviceWaitReady(unsigned int timeout) --{ -- volatile int status; -- -- do -- { -- status = AT91C_BASE_MCI->MCI_SR; -- timeout--; -- } -- while( !(status & AT91C_MCI_NOTBUSY) && (timeout>0) ); --} -- --unsigned int swab32(unsigned int data) --{ -- unsigned int res = 0; -- -- res = (data & 0x000000ff) << 24 | -- (data & 0x0000ff00) << 8 | -- (data & 0x00ff0000) >> 8 | -- (data & 0xff000000) >> 24; -- -- return res; --} -- --AT91S_MCIDeviceStatus readblock( -- AT91PS_MciDevice pMCI_Device, -- int src, -- unsigned int *databuffer, -- int sizeToRead) --{ -- int i; -- unsigned char *buf = (unsigned char *)databuffer; -- -- //* Read Block 1 -- for(i=0;i 0); -- } --#endif --//extern char message[40]; -- --int notnull(int bufpos, unsigned int len) --{ -- int i; -- unsigned char * bp = (unsigned char *)bufpos; -- -- for (i=0; iMax_Read_DataBlock_Length; -- -- //* ReadBlock & WriteBlock Test -> Entire Block -- -- //* Wait MCI Device Ready -- AT91F_MCIDeviceWaitReady(AT91C_MCI_TIMEOUT); -- --#ifdef MCI_TEST -- //* Read Block 1 -- for(i=0;i>=1) -- NbPage++; -- i = lastvalid + (NbPage << 13) + (dataflash_info[0].Device.pages_size << 17); -- *(int *)(dlBuffer + 0x14) = i; -- -- for(i=0; i<4688; i++) { -- readblock(&MCI_Device, block*Max_Read_DataBlock_Length, (unsigned int *)bufpos, Max_Read_DataBlock_Length); -- block++; -- bufpos += 512; -- } -- write_dataflash(0xc0000000, dlBuffer, 512 * block); -- //* End Of Test -- printf("DONE %d\n\r", lastvalid); -- --// printf(Buffer); -- -- return TRUE; --} -- --//*---------------------------------------------------------------------------- --//* \fn AT91F_CfgDevice --//* \brief This function is used to initialise MMC or SDCard Features --//*---------------------------------------------------------------------------- --void AT91F_CfgDevice(void) --{ -- // Init Device Structure -- -- MCI_Device_Features.Relative_Card_Address = 0; -- MCI_Device_Features.Card_Inserted = AT91C_CARD_REMOVED; -- MCI_Device_Features.Max_Read_DataBlock_Length = 0; -- MCI_Device_Features.Max_Write_DataBlock_Length = 0; -- MCI_Device_Features.Read_Partial = 0; -- MCI_Device_Features.Write_Partial = 0; -- MCI_Device_Features.Erase_Block_Enable = 0; -- MCI_Device_Features.Sector_Size = 0; -- MCI_Device_Features.Memory_Capacity = 0; -- -- MCI_Device_Desc.state = AT91C_MCI_IDLE; -- MCI_Device_Desc.SDCard_bus_width = AT91C_MCI_SCDBUS; -- -- // Init AT91S_DataFlash Global Structure, by default AT45DB choosen !!! -- MCI_Device.pMCI_DeviceDesc = &MCI_Device_Desc; -- MCI_Device.pMCI_DeviceFeatures = &MCI_Device_Features; -- --} -- --//*---------------------------------------------------------------------------- --//* \fn AT91F_Test_SDCard --//* \brief Configure MCI for SDCard and complete SDCard init, then jump to Test Functions --//*---------------------------------------------------------------------------- --int AT91F_Test_SDCard(void) --{ -- ////////////////////////////////////////////////////////// -- //* For SDCard Init -- ////////////////////////////////////////////////////////// -- -- AT91F_MCI_Configure(AT91C_BASE_MCI, -- AT91C_MCI_DTOR_1MEGA_CYCLES, -- AT91C_MCI_MR_PDCMODE, // 15MHz for MCK = 60MHz (CLKDIV = 1) -- AT91C_MCI_SDCARD_4BITS_SLOTA); -- -- if(AT91F_MCI_SDCard_Init(&MCI_Device) != AT91C_INIT_OK) -- return FALSE; -- -- printf("\n\rINI OK: TST\n\r"); -- -- // Enter Main Tests -- return(AT91F_Test()); --} -- --//*---------------------------------------------------------------------------- --//* \fn AT91F_MCI_Handler --//* \brief MCI Handler --//*---------------------------------------------------------------------------- --extern "C" void AT91F_MCI_Handler(void); -- --void AT91F_MCI_Handler(void) --{ -- int status; -- -- status = ( AT91C_BASE_MCI->MCI_SR & AT91C_BASE_MCI->MCI_IMR ); -- -- AT91F_MCI_Device_Handler(&MCI_Device,status); --} -- --//*---------------------------------------------------------------------------- --//* \fn main --//* \brief main function --//*---------------------------------------------------------------------------- --int mci_main(void) --{ --// printf("MCI Test\n\r"); -- --/////////////////////////////////////////////////////////////////////////////////////////// --// MCI Init : common to MMC and SDCard --/////////////////////////////////////////////////////////////////////////////////////////// -- --// printf("\n\rInit MCI Interface\n\r"); -- -- // Set up PIO SDC_TYPE to switch on MMC/SDCard and not DataFlash Card -- AT91F_PIO_CfgOutput(AT91C_BASE_PIOB,AT91C_PIO_PB7); -- AT91F_PIO_SetOutput(AT91C_BASE_PIOB,AT91C_PIO_PB7); -- -- // Init MCI for MMC and SDCard interface -- AT91F_MCI_CfgPIO(); -- AT91F_MCI_CfgPMC(); -- AT91F_PDC_Open(AT91C_BASE_PDC_MCI); -- -- // Disable all the interrupts -- AT91C_BASE_MCI->MCI_IDR = 0xFFFFFFFF; -- -- // Init MCI Device Structures -- AT91F_CfgDevice(); -- -- // Configure MCI interrupt -- AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, -- AT91C_ID_MCI, -- AT91C_AIC_PRIOR_HIGHEST, -- AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE, -- AT91F_ASM_MCI_Handler); -- -- // Enable MCI interrupt -- AT91F_AIC_EnableIt(AT91C_BASE_AIC,AT91C_ID_MCI); -- --/////////////////////////////////////////////////////////////////////////////////////////// --// Enter Test Menu --/////////////////////////////////////////////////////////////////////////////////////////// -- -- // Enable Receiver -- AT91F_US_EnableRx((AT91PS_USART) AT91C_BASE_DBGU); -- -- if(AT91F_Test_SDCard() == TRUE) -- printf("\n\rTST OK\n\r"); -- else -- printf("\n\rTST Fail\n\r"); -- return(1); --} diff --git a/target/linux/at91-2.6/image/romboot/patches/004-code-cleanup.patch b/target/linux/at91-2.6/image/romboot/patches/004-code-cleanup.patch deleted file mode 100644 index 1a0f9c559f..0000000000 --- a/target/linux/at91-2.6/image/romboot/patches/004-code-cleanup.patch +++ /dev/null @@ -1,423 +0,0 @@ -diff -urN romboot.old/com.cpp romboot/com.cpp ---- romboot.old/com.cpp 2004-07-04 21:37:05.000000000 +0200 -+++ romboot/com.cpp 2007-04-04 04:30:12.000000000 +0200 -@@ -27,7 +27,7 @@ - //*----------------------------------------------------------------------------- - void AT91F_ClrScr(void) - { -- puts(CLRSCREEN); -+ putstr(CLRSCREEN); - } - - -@@ -47,12 +47,12 @@ - - if (*(--p) == '\t') { /* will retype the whole line */ - while (*colp > plen) { -- puts(erase_seq); -+ putstr(erase_seq); - (*colp)--; - } - for (s=buffer; s plen) - { -- puts(erase_seq); -+ putstr(erase_seq); - --col; - } - p = console_buffer; -@@ -152,7 +152,7 @@ - void AT91F_WaitKeyPressed(void) - { - int c; -- puts("Hit a Key!"); -+ putstr("Hit a Key!"); - c = getc(); - } - -diff -urN romboot.old/main.cpp romboot/main.cpp ---- romboot.old/main.cpp 2007-04-03 12:12:33.000000000 +0200 -+++ romboot/main.cpp 2007-04-04 05:56:39.000000000 +0200 -@@ -382,8 +382,10 @@ - - AT91F_MCI_ReadBlockSwab(&MCI_Device, block*Max_Read_DataBlock_Length, (unsigned int *)bufpos, Max_Read_DataBlock_Length); - -- if (p->magic != TRX_MAGIC) -+ if (p->magic != TRX_MAGIC) { -+ printf("Invalid Image 0x%08x\n\r"); - return FALSE; -+ } - - printf("Read SD-Card\n\r"); - AT91C_BASE_PIOC->PIO_CODR = AT91C_PIO_PC7 | AT91C_PIO_PC15 | AT91C_PIO_PC8 | AT91C_PIO_PC14; -@@ -438,9 +440,6 @@ - int NbPage; - int mci_present; - -- stdin = fopen(0, at91_dbgu_getc); -- stdout = fopen(at91_dbgu_putc, 0); -- - pAT91 = AT91C_ROM_BOOT_ADDRESS; - - // Tempo Initialisation -@@ -472,16 +471,18 @@ - - #ifdef PRODTEST - if (mci_present) { -- Program_From_MCI(); -- AT91F_StartUboot(0, (void *)0); -+ if (Program_From_MCI()) -+ AT91F_StartUboot(0, (void *)0); - } - #endif - - // start tempo to start Uboot in a delay of 1 sec if no key pressed - svcUbootTempo.Start(&svcUbootTempo, 1000, 0, AT91F_StartUboot, (void *)0); - -+#ifndef PRODTEST - printf("press key\n\r"); - getc(); -+#endif - - // stop tempo - svcUbootTempo.Stop(&svcUbootTempo); -@@ -601,3 +602,10 @@ - AT91F_WaitKeyPressed(); - } - } -+ -+ -+int puts(const char *str) -+{ -+ putstr(str); -+ return 0; -+} -diff -urN romboot.old/stdio.cpp romboot/stdio.cpp ---- romboot.old/stdio.cpp 2004-07-04 22:36:10.000000000 +0200 -+++ romboot/stdio.cpp 2007-04-04 04:29:25.000000000 +0200 -@@ -1,117 +1,32 @@ - #include "stdio.h" - - extern int at91_dbgu_putc(int ch); -+extern int at91_dbgu_getc(); - --FILE *stdout = (FILE *)0; --FILE *stdin = (FILE *)0; -- --FILE __filedesc[FILEDESCS]; -- --FILE *fopen(int (*put)(int), int (*get)()) --{ -- static int init = 1; -- -- if(init != 0) -- { -- for(int i = 0; i < FILEDESCS; i++) -- { -- __filedesc[i].active = false; -- __filedesc[i].put = 0; -- __filedesc[i].get = 0; -- } -- -- init = 0; -- } -- -- for(int i = 0; i < FILEDESCS; i++) -- { -- if(!__filedesc[i].active) -- { -- __filedesc[i].put = put; -- __filedesc[i].get = get; -- -- __filedesc[i].active = true; -- -- return &__filedesc[i]; -- } -- } -- -- return (FILE *)0; --} -- --int fclose(FILE *fp) -+int putstr(const char *str) - { -- for(int i = 0; i < FILEDESCS; i++) -- if(&__filedesc[i] == fp || fp->active) -- { -- fp->active = false; -- -- fp->put = 0; -- fp->get = 0; -- -- return 0; -- } -- -- return -1; --} -- --int fputs(const char *str, FILE *fp) --{ -- if(fp == (FILE *)0) -- return -1; -- -- if(fp->put == (void *)0) -- return -1; -- -- while(*str != 0) -- { -- fp->put(*str); -- str++; -- } -+ while (*str != 0) -+ { -+ putc(*str); -+ str++; -+ } - return 0; - } - --int fputc(int c, FILE *fp) --{ -- if(fp == (FILE *)0) -- return -1; -- -- if(fp->put == (void *)0) -- return -1; -- -- return fp->put(c); --} -- --int fgetc(FILE *fp) --{ -- if(fp == (FILE *)0) -- return -1; -- -- if(fp->get == (void *)0) -- return -1; -- -- return fp->get(); --} -- -- --int puts(const char *str) -+int putchar(int c) - { -- return fputs(str, stdout); -+ return putc(c); - } - - int putc(int c) - { -- return fputc(c, stdout); --} -- --int putchar(int c) --{ -- return fputc(c, stdout); -+ at91_dbgu_putc(c); -+ return 0; - } - - int getc() - { -- return fgetc(stdin); -+ return at91_dbgu_getc(); - } - - int strlen(const char *str) -@@ -139,7 +54,7 @@ - __res; \ - }) - --int number(FILE *fp, int num, int base, int size, int precision, int type) -+int number(int num, int base, int size, int precision, int type) - { - char c, sign, tmp[66]; - const char *digits="0123456789abcdef"; -@@ -173,28 +88,28 @@ - - if(!(type&(ZEROPAD+LEFT))) - while(size-->0) -- fputc(' ', fp); -+ putc(' '); - - if(sign) -- fputc(sign, fp); -+ putc(sign); - - if (!(type & LEFT)) - while (size-- > 0) -- fputc(c, fp); -+ putc(c); - - while (i < precision--) -- fputc('0', fp); -+ putc('0'); - - while (i-- > 0) -- fputc(tmp[i], fp); -+ putc(tmp[i]); - - while (size-- > 0) -- fputc(' ', fp);; -+ putc(' ');; - - return 1; - } - --int vfprintf(FILE *fp, const char *fmt, va_list va) -+int vprintf(const char *fmt, va_list va) - { - char *s; - -@@ -231,33 +146,33 @@ - case 's' : - s = va_arg(va, char *); - if(!s) -- fputs("", fp); -+ putstr(""); - else -- fputs(s, fp); -+ putstr(s); - done = true; - break; - case 'c' : -- fputc(va_arg(va, int), fp); -+ putc(va_arg(va, int)); - done = true; - break; - case 'd' : -- number(fp, va_arg(va, int), 10, 0, precision, type); -+ number(va_arg(va, int), 10, 0, precision, type); - done = true; - break; - case 'x' : -- number(fp, va_arg(va, int), 16, 0, precision, type); -+ number(va_arg(va, int), 16, 0, precision, type); - done = true; - break; - case 'X' : -- number(fp, va_arg(va, int), 16, 0, precision, type | LARGE); -+ number(va_arg(va, int), 16, 0, precision, type | LARGE); - done = true; - break; - case '%' : -- fputc(*fmt, fp); -+ putc(*fmt); - done = true; - default: -- fputc('%', fp); -- fputc(*fmt, fp); -+ putc('%'); -+ putc(*fmt); - done = true; - break; - } -@@ -265,7 +180,7 @@ - while(!done); - } - else -- fputc(*fmt, fp); -+ putc(*fmt); - - fmt++; - } -@@ -274,25 +189,13 @@ - return 0; - } - --int fprintf(FILE *fp, const char *fmt, ...) --{ -- va_list ap; -- int i; -- -- va_start(ap, fmt); -- i = fprintf(fp, fmt, ap); -- va_end(ap); -- -- return i; --} -- - int printf(const char *fmt, ...) - { - va_list ap; - int i; - - va_start(ap, fmt); -- i = vfprintf(stdout, fmt, ap); -+ i = vprintf(fmt, ap); - va_end(ap); - - return i; -diff -urN romboot.old/stdio.h romboot/stdio.h ---- romboot.old/stdio.h 2004-07-04 22:04:27.000000000 +0200 -+++ romboot/stdio.h 2007-04-04 04:29:48.000000000 +0200 -@@ -1,31 +1,12 @@ - #include - --struct FILE --{ -- bool active; -- int (*put)(int); /* function to write one char to device */ -- int (*get)(); /* function to read one char from device */ --}; -- --#define FILEDESCS 8 -- --FILE *fopen(int (*put)(int), int (*get)()); --int fclose(FILE *fp); -- --int puts(const char *str); -+int putstr(const char *str); - int putc(int c); - int putchar(int c); - int getc(); - --int fputs(const char *str, FILE *fp); --int fputc(int c, FILE *fp); --int fgetc(FILE *fp); - int strlen(const char *str); - --int fprintf(FILE *fp, const char *fmt, ...); --int vfprintf(FILE *fp, const char *fmt, va_list ap); -+int vprintf(const char *fmt, va_list ap); - - int printf(const char *fmt, ...); -- --extern FILE *stdout; --extern FILE *stdin; diff --git a/target/linux/at91-2.6/image/romboot/patches/005-erase-flash.patch b/target/linux/at91-2.6/image/romboot/patches/005-erase-flash.patch deleted file mode 100644 index b0ddfe3adc..0000000000 --- a/target/linux/at91-2.6/image/romboot/patches/005-erase-flash.patch +++ /dev/null @@ -1,37 +0,0 @@ ---- romboot.old/main.cpp 2007-04-05 15:51:51.000000000 +0200 -+++ romboot/main.cpp 2007-04-10 10:33:10.000000000 +0200 -@@ -34,7 +34,7 @@ - #define DELAY_MAIN_FREQ 1000 - #define DISP_LINE_LEN 16 - --#define COMPACT 1 -+//#define COMPACT 1 - - //* prototypes - extern void AT91F_DBGU_Printk(char *); -@@ -65,6 +65,7 @@ - "3: Copy SD-Card\n\r" - "4: Start U-BOOT\n\r" - "5: Clear bootloder\n\r" -+ "6: Erase entire flash\n\r" - }; - - //* Globales variables -@@ -555,6 +556,17 @@ - command = 0; - break; - -+ case '6': -+ { -+ int *i; -+ -+ for(i = (int *)0x20000000; i < (int *)0x20840000; i++) -+ *i = 0; -+ } -+ write_dataflash(0xc0000000, 0x20000000, 0x840000); -+ command = 0; -+ break; -+ - default: - command = 0; - break; diff --git a/target/linux/at91-2.6/image/romboot/patches/006-erase-fixup.patch b/target/linux/at91-2.6/image/romboot/patches/006-erase-fixup.patch deleted file mode 100644 index 26ac51f8b2..0000000000 --- a/target/linux/at91-2.6/image/romboot/patches/006-erase-fixup.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- romboot.old/main.cpp 2007-04-10 12:35:02.000000000 +0200 -+++ romboot/main.cpp 2007-04-10 12:35:15.000000000 +0200 -@@ -561,7 +561,7 @@ - int *i; - - for(i = (int *)0x20000000; i < (int *)0x20840000; i++) -- *i = 0; -+ *i = 0xffffffff; - } - write_dataflash(0xc0000000, 0x20000000, 0x840000); - command = 0; diff --git a/target/linux/at91-2.6/image/u-boot/Makefile b/target/linux/at91-2.6/image/u-boot/Makefile deleted file mode 100644 index 35b1e9bff1..0000000000 --- a/target/linux/at91-2.6/image/u-boot/Makefile +++ /dev/null @@ -1,44 +0,0 @@ -# -# Copyright (C) 2006 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# -# $Id$ - -include $(TOPDIR)/rules.mk -include $(INCLUDE_DIR)/kernel.mk - -PKG_NAME:=u-boot -PKG_VERSION:=1.1.4 -PKG_RELEASE:=1 - -PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)-$(PKG_VERSION) -PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 -PKG_SOURCE_URL:=ftp://ftp.denx.de/pub/u-boot -PKG_MD5SUM:= -PKG_CAT:=bzcat - -include $(INCLUDE_DIR)/package.mk - -UBOOT_CONFIG=$(strip $(subst ",, $(CONFIG_UBOOT_TARGET))) - -define Build/Compile - $(MAKE) -C $(PKG_BUILD_DIR) $(UBOOT_CONFIG)_config - export CROSS_COMPILE=$(TARGET_CROSS); \ - $(MAKE) -C $(PKG_BUILD_DIR) - mkdir -p $(PKG_BUILD_DIR)/ubclient - $(CP) ./ubclient/* $(PKG_BUILD_DIR)/ubclient - $(MAKE) -C $(PKG_BUILD_DIR)/ubclient \ - $(TARGET_CONFIGURE_OPTS) \ - CFLAGS="$(TARGET_CFLAGS) -Dtarget_$(BOARD)=1" -endef - -define Build/InstallDev - dd if=$(PKG_BUILD_DIR)/u-boot.bin of=$(PKG_BUILD_DIR)/u-boot.block bs=232k count=1 conv=sync -# $(INSTALL_DIR) $(STAGING_DIR)/ubclient/sbin -# $(INSTALL_BIN) $(PKG_BUILD_DIR)/ubclient/ubpar $(STAGING_DIR)/ubclient/sbin/ - $(CP) $(PKG_BUILD_DIR)/ubclient/ubpar ../../base-files/default/sbin -endef - -$(eval $(call Build/DefaultTargets)) diff --git a/target/linux/at91-2.6/image/u-boot/patches/001-lowlevel-config.patch b/target/linux/at91-2.6/image/u-boot/patches/001-lowlevel-config.patch deleted file mode 100644 index 25f92e4963..0000000000 --- a/target/linux/at91-2.6/image/u-boot/patches/001-lowlevel-config.patch +++ /dev/null @@ -1,91 +0,0 @@ ---- u-boot-1.1.4/cpu/arm920t/config.mk 2005-12-16 17:39:27.000000000 +0100 -+++ u-boot-1.1.4.klaus/cpu/arm920t/config.mk 2006-02-27 19:07:41.000000000 +0100 -@@ -30,5 +30,5 @@ - # Supply options according to compiler version - # - # ========================================================================= --PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) -+PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32) - PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) ---- u-boot-1.1.4/cpu/arm920t/start.S 2005-12-16 17:39:27.000000000 +0100 -+++ u-boot-1.1.4.klaus/cpu/arm920t/start.S 2006-02-22 16:45:24.000000000 +0100 -@@ -237,6 +237,7 @@ - */ - - -+#ifndef CONFIG_SKIP_LOWLEVEL_INIT - cpu_init_crit: - /* - * flush v4 I/D caches -@@ -265,6 +266,7 @@ - mov lr, ip - mov pc, lr - -+#endif - - /* - ************************************************************************* ---- u-boot-1.1.4/examples/Makefile 2005-12-16 17:39:27.000000000 +0100 -+++ u-boot-1.1.4.klaus/examples/Makefile 2006-03-02 02:37:14.000000000 +0100 -@@ -30,7 +30,7 @@ - endif - - ifeq ($(ARCH),arm) --LOAD_ADDR = 0xc100000 -+LOAD_ADDR = 0x21000000 - endif - - ifeq ($(ARCH),mips) ---- u-boot-1.1.4/include/config.h 1970-01-01 01:00:00.000000000 +0100 -+++ u-boot-1.1.4.klaus/include/config.h 2006-02-27 19:04:46.000000000 +0100 -@@ -0,0 +1,2 @@ -+/* Automatically generated - do not edit */ -+#include ---- u-boot-1.1.4/include/config.mk 1970-01-01 01:00:00.000000000 +0100 -+++ u-boot-1.1.4.klaus/include/config.mk 2006-02-27 19:04:46.000000000 +0100 -@@ -0,0 +1,4 @@ -+ARCH = arm -+CPU = arm920t -+BOARD = at91rm9200dk -+SOC = at91rm9200 ---- u-boot-1.1.4/include/configs/at91rm9200dk.h 2005-12-16 17:39:27.000000000 +0100 -+++ u-boot-1.1.4.klaus/include/configs/at91rm9200dk.h 2006-02-26 22:44:17.000000000 +0100 -@@ -25,6 +25,11 @@ - #ifndef __CONFIG_H - #define __CONFIG_H - -+// Added 2 defines to skip re-init lowlevel and relocate HCG HLH -+// -+#define CONFIG_SKIP_LOWLEVEL_INIT -+#define CONFIG_SKIP_RELOCATE_UBOOT -+ - /* ARM asynchronous clock */ - #define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */ - #define AT91C_MASTER_CLOCK 59904000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */ -@@ -165,12 +170,12 @@ - #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */ - #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */ - --#undef CFG_ENV_IS_IN_DATAFLASH -+#define CFG_ENV_IS_IN_DATAFLASH - - #ifdef CFG_ENV_IS_IN_DATAFLASH --#define CFG_ENV_OFFSET 0x20000 -+#define CFG_ENV_OFFSET 0x21000 - #define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET) --#define CFG_ENV_SIZE 0x2000 /* 0x8000 */ -+#define CFG_ENV_SIZE 0x8400 /* 0x8000 */ - #else - #define CFG_ENV_IS_IN_FLASH 1 - #ifdef CONFIG_SKIP_LOWLEVEL_INIT ---- u-boot-1.1.4/Makefile 2005-12-16 17:39:27.000000000 +0100 -+++ u-boot-1.1.4.klaus/Makefile 2006-03-02 02:49:23.000000000 +0100 -@@ -57,7 +57,7 @@ - CROSS_COMPILE = powerpc-linux- - endif - ifeq ($(ARCH),arm) --CROSS_COMPILE = arm-linux- -+CROSS_COMPILE = ../staging_dir/bin/arm-linux- - endif - ifeq ($(ARCH),i386) - ifeq ($(HOSTARCH),i387) diff --git a/target/linux/at91-2.6/image/u-boot/patches/002-dataflash_machine.patch b/target/linux/at91-2.6/image/u-boot/patches/002-dataflash_machine.patch deleted file mode 100644 index cf7648c522..0000000000 --- a/target/linux/at91-2.6/image/u-boot/patches/002-dataflash_machine.patch +++ /dev/null @@ -1,6065 +0,0 @@ -diff -Naur u-boot-1.1.4.org/board/vlink/at45.c u-boot-1.1.4.tmp/board/vlink/at45.c ---- u-boot-1.1.4.org/board/vlink/at45.c 1970-01-01 01:00:00.000000000 +0100 -+++ u-boot-1.1.4.tmp/board/vlink/at45.c 2005-12-16 17:39:27.000000000 +0100 -@@ -0,0 +1,621 @@ -+/* Driver for ATMEL DataFlash support -+ * Author : Hamid Ikdoumi (Atmel) -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ * -+ */ -+ -+#include -+#include -+#include -+ -+#ifdef CONFIG_HAS_DATAFLASH -+#include -+ -+#define AT91C_SPI_CLK 10000000 /* Max Value = 10MHz to be compliant to -+the Continuous Array Read function */ -+ -+/* AC Characteristics */ -+/* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */ -+#define DATAFLASH_TCSS (0xC << 16) -+#define DATAFLASH_TCHS (0x1 << 24) -+ -+#define AT91C_TIMEOUT_WRDY 200000 -+#define AT91C_SPI_PCS0_SERIAL_DATAFLASH 0xE /* Chip Select 0 : NPCS0 %1110 */ -+#define AT91C_SPI_PCS3_DATAFLASH_CARD 0x7 /* Chip Select 3 : NPCS3 %0111 */ -+ -+void AT91F_SpiInit(void) { -+ -+/*-------------------------------------------------------------------*/ -+/* SPI DataFlash Init */ -+/*-------------------------------------------------------------------*/ -+ /* Configure PIOs */ -+ AT91C_BASE_PIOA->PIO_ASR = AT91C_PA3_NPCS0 | AT91C_PA4_NPCS1 | AT91C_PA1_MOSI | AT91C_PA5_NPCS2 | -+ AT91C_PA6_NPCS3 | AT91C_PA0_MISO | AT91C_PA2_SPCK; -+ AT91C_BASE_PIOA->PIO_PDR = AT91C_PA3_NPCS0 | AT91C_PA4_NPCS1 | AT91C_PA1_MOSI | AT91C_PA5_NPCS2 | -+ AT91C_PA6_NPCS3 | AT91C_PA0_MISO | AT91C_PA2_SPCK; -+ /* Enable CLock */ -+ AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SPI; -+ -+ /* Reset the SPI */ -+ AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SWRST; -+ -+ /* Configure SPI in Master Mode with No CS selected !!! */ -+ AT91C_BASE_SPI->SPI_MR = AT91C_SPI_MSTR | AT91C_SPI_MODFDIS | AT91C_SPI_PCS; -+ -+ /* Configure CS0 and CS3 */ -+ *(AT91C_SPI_CSR + 0) = AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) | (AT91C_SPI_DLYBCT & -+ DATAFLASH_TCHS) | ((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8); -+ -+ *(AT91C_SPI_CSR + 3) = AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) | (AT91C_SPI_DLYBCT & -+ DATAFLASH_TCHS) | ((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8); -+ -+} -+ -+void AT91F_SpiEnable(int cs) { -+ switch(cs) { -+ case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */ -+ AT91C_BASE_SPI->SPI_MR &= 0xFFF0FFFF; -+ AT91C_BASE_SPI->SPI_MR |= ((AT91C_SPI_PCS0_SERIAL_DATAFLASH<<16) & AT91C_SPI_PCS); -+ break; -+ case 3: /* Configure SPI CS3 for Serial DataFlash Card */ -+ /* Set up PIO SDC_TYPE to switch on DataFlash Card and not MMC/SDCard */ -+ AT91C_BASE_PIOB->PIO_PER = AT91C_PIO_PB7; /* Set in PIO mode */ -+ AT91C_BASE_PIOB->PIO_OER = AT91C_PIO_PB7; /* Configure in output */ -+ /* Clear Output */ -+ AT91C_BASE_PIOB->PIO_CODR = AT91C_PIO_PB7; -+ /* Configure PCS */ -+ AT91C_BASE_SPI->SPI_MR &= 0xFFF0FFFF; -+ AT91C_BASE_SPI->SPI_MR |= ((AT91C_SPI_PCS3_DATAFLASH_CARD<<16) & AT91C_SPI_PCS); -+ break; -+ } -+ -+ /* SPI_Enable */ -+ AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIEN; -+} -+ -+/*----------------------------------------------------------------------------*/ -+/* \fn AT91F_SpiWrite */ -+/* \brief Set the PDC registers for a transfert */ -+/*----------------------------------------------------------------------------*/ -+unsigned int AT91F_SpiWrite ( AT91PS_DataflashDesc pDesc ) -+{ -+ unsigned int timeout; -+ -+ pDesc->state = BUSY; -+ -+ AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS; -+ -+ /* Initialize the Transmit and Receive Pointer */ -+ AT91C_BASE_SPI->SPI_RPR = (unsigned int)pDesc->rx_cmd_pt ; -+ AT91C_BASE_SPI->SPI_TPR = (unsigned int)pDesc->tx_cmd_pt ; -+ -+ /* Intialize the Transmit and Receive Counters */ -+ AT91C_BASE_SPI->SPI_RCR = pDesc->rx_cmd_size; -+ AT91C_BASE_SPI->SPI_TCR = pDesc->tx_cmd_size; -+ -+ if ( pDesc->tx_data_size != 0 ) { -+ /* Initialize the Next Transmit and Next Receive Pointer */ -+ AT91C_BASE_SPI->SPI_RNPR = (unsigned int)pDesc->rx_data_pt ; -+ AT91C_BASE_SPI->SPI_TNPR = (unsigned int)pDesc->tx_data_pt ; -+ -+ /* Intialize the Next Transmit and Next Receive Counters */ -+ AT91C_BASE_SPI->SPI_RNCR = pDesc->rx_data_size ; -+ AT91C_BASE_SPI->SPI_TNCR = pDesc->tx_data_size ; -+ } -+ -+ /* arm simple, non interrupt dependent timer */ -+ reset_timer_masked(); -+ timeout = 0; -+ -+ AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTEN + AT91C_PDC_RXTEN; -+ while(!(AT91C_BASE_SPI->SPI_SR & AT91C_SPI_RXBUFF) && ((timeout = get_timer_masked() ) < CFG_SPI_WRITE_TOUT)); -+ AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS; -+ pDesc->state = IDLE; -+ -+ if (timeout >= CFG_SPI_WRITE_TOUT){ -+ printf("Error Timeout\n\r"); -+ return DATAFLASH_ERROR; -+ } -+ -+ return DATAFLASH_OK; -+} -+ -+ -+/*----------------------------------------------------------------------*/ -+/* \fn AT91F_DataFlashSendCommand */ -+/* \brief Generic function to send a command to the dataflash */ -+/*----------------------------------------------------------------------*/ -+AT91S_DataFlashStatus AT91F_DataFlashSendCommand( -+ AT91PS_DataFlash pDataFlash, -+ unsigned char OpCode, -+ unsigned int CmdSize, -+ unsigned int DataflashAddress) -+{ -+ unsigned int adr; -+ -+ if ( (pDataFlash->pDataFlashDesc->state) != IDLE) -+ return DATAFLASH_BUSY; -+ -+ /* process the address to obtain page address and byte address */ -+ adr = ((DataflashAddress / (pDataFlash->pDevice->pages_size)) << pDataFlash->pDevice->page_offset) + (DataflashAddress % (pDataFlash->pDevice->pages_size)); -+ -+ /* fill the command buffer */ -+ pDataFlash->pDataFlashDesc->command[0] = OpCode; -+ if (pDataFlash->pDevice->pages_number >= 16384) { -+ pDataFlash->pDataFlashDesc->command[1] = (unsigned char)((adr & 0x0F000000) >> 24); -+ pDataFlash->pDataFlashDesc->command[2] = (unsigned char)((adr & 0x00FF0000) >> 16); -+ pDataFlash->pDataFlashDesc->command[3] = (unsigned char)((adr & 0x0000FF00) >> 8); -+ pDataFlash->pDataFlashDesc->command[4] = (unsigned char)(adr & 0x000000FF); -+ } else { -+ pDataFlash->pDataFlashDesc->command[1] = (unsigned char)((adr & 0x00FF0000) >> 16); -+ pDataFlash->pDataFlashDesc->command[2] = (unsigned char)((adr & 0x0000FF00) >> 8); -+ pDataFlash->pDataFlashDesc->command[3] = (unsigned char)(adr & 0x000000FF) ; -+ pDataFlash->pDataFlashDesc->command[4] = 0; -+ } -+ pDataFlash->pDataFlashDesc->command[5] = 0; -+ pDataFlash->pDataFlashDesc->command[6] = 0; -+ pDataFlash->pDataFlashDesc->command[7] = 0; -+ -+ /* Initialize the SpiData structure for the spi write fuction */ -+ pDataFlash->pDataFlashDesc->tx_cmd_pt = pDataFlash->pDataFlashDesc->command ; -+ pDataFlash->pDataFlashDesc->tx_cmd_size = CmdSize ; -+ pDataFlash->pDataFlashDesc->rx_cmd_pt = pDataFlash->pDataFlashDesc->command ; -+ pDataFlash->pDataFlashDesc->rx_cmd_size = CmdSize ; -+ -+ /* send the command and read the data */ -+ return AT91F_SpiWrite (pDataFlash->pDataFlashDesc); -+} -+ -+ -+/*----------------------------------------------------------------------*/ -+/* \fn AT91F_DataFlashGetStatus */ -+/* \brief Read the status register of the dataflash */ -+/*----------------------------------------------------------------------*/ -+AT91S_DataFlashStatus AT91F_DataFlashGetStatus(AT91PS_DataflashDesc pDesc) -+{ -+ AT91S_DataFlashStatus status; -+ -+ /* if a transfert is in progress ==> return 0 */ -+ if( (pDesc->state) != IDLE) -+ return DATAFLASH_BUSY; -+ -+ /* first send the read status command (D7H) */ -+ pDesc->command[0] = DB_STATUS; -+ pDesc->command[1] = 0; -+ -+ pDesc->DataFlash_state = GET_STATUS; -+ pDesc->tx_data_size = 0 ; /* Transmit the command and receive response */ -+ pDesc->tx_cmd_pt = pDesc->command ; -+ pDesc->rx_cmd_pt = pDesc->command ; -+ pDesc->rx_cmd_size = 2 ; -+ pDesc->tx_cmd_size = 2 ; -+ status = AT91F_SpiWrite (pDesc); -+ -+ pDesc->DataFlash_state = *( (unsigned char *) (pDesc->rx_cmd_pt) +1); -+ -+ return status; -+} -+ -+ -+/*----------------------------------------------------------------------*/ -+/* \fn AT91F_DataFlashWaitReady */ -+/* \brief wait for dataflash ready (bit7 of the status register == 1) */ -+/*----------------------------------------------------------------------*/ -+AT91S_DataFlashStatus AT91F_DataFlashWaitReady(AT91PS_DataflashDesc pDataFlashDesc, unsigned int timeout) -+{ -+ pDataFlashDesc->DataFlash_state = IDLE; -+ -+ do { -+ AT91F_DataFlashGetStatus(pDataFlashDesc); -+ timeout--; -+ } while( ((pDataFlashDesc->DataFlash_state & 0x80) != 0x80) && (timeout > 0) ); -+ -+ if((pDataFlashDesc->DataFlash_state & 0x80) != 0x80) -+ return DATAFLASH_ERROR; -+ -+ return DATAFLASH_OK; -+} -+ -+ -+/*------------------------------------------------------------------------------*/ -+/* Function Name : AT91F_DataFlashContinuousRead */ -+/* Object : Continuous stream Read */ -+/* Input Parameters : DataFlash Service */ -+/* : = dataflash address */ -+/* : <*dataBuffer> = data buffer pointer */ -+/* : = data buffer size */ -+/* Return value : State of the dataflash */ -+/*------------------------------------------------------------------------------*/ -+AT91S_DataFlashStatus AT91F_DataFlashContinuousRead ( -+ AT91PS_DataFlash pDataFlash, -+ int src, -+ unsigned char *dataBuffer, -+ int sizeToRead ) -+{ -+ AT91S_DataFlashStatus status; -+ /* Test the size to read in the device */ -+ if ( (src + sizeToRead) > (pDataFlash->pDevice->pages_size * (pDataFlash->pDevice->pages_number))) -+ return DATAFLASH_MEMORY_OVERFLOW; -+ -+ pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer; -+ pDataFlash->pDataFlashDesc->rx_data_size = sizeToRead; -+ pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer; -+ pDataFlash->pDataFlashDesc->tx_data_size = sizeToRead; -+ -+ status = AT91F_DataFlashSendCommand (pDataFlash, DB_CONTINUOUS_ARRAY_READ, 8, src); -+ /* Send the command to the dataflash */ -+ return(status); -+} -+ -+ -+/*------------------------------------------------------------------------------*/ -+/* Function Name : AT91F_DataFlashPagePgmBuf */ -+/* Object : Main memory page program through buffer 1 or buffer 2 */ -+/* Input Parameters : DataFlash Service */ -+/* : <*src> = Source buffer */ -+/* : = dataflash destination address */ -+/* : = data buffer size */ -+/* Return value : State of the dataflash */ -+/*------------------------------------------------------------------------------*/ -+AT91S_DataFlashStatus AT91F_DataFlashPagePgmBuf( -+ AT91PS_DataFlash pDataFlash, -+ unsigned char *src, -+ unsigned int dest, -+ unsigned int SizeToWrite) -+{ -+ int cmdsize; -+ pDataFlash->pDataFlashDesc->tx_data_pt = src ; -+ pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite ; -+ pDataFlash->pDataFlashDesc->rx_data_pt = src; -+ pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite; -+ -+ cmdsize = 4; -+ /* Send the command to the dataflash */ -+ if (pDataFlash->pDevice->pages_number >= 16384) -+ cmdsize = 5; -+ return(AT91F_DataFlashSendCommand (pDataFlash, DB_PAGE_PGM_BUF1, cmdsize, dest)); -+} -+ -+ -+/*------------------------------------------------------------------------------*/ -+/* Function Name : AT91F_MainMemoryToBufferTransfert */ -+/* Object : Read a page in the SRAM Buffer 1 or 2 */ -+/* Input Parameters : DataFlash Service */ -+/* : Page concerned */ -+/* : */ -+/* Return value : State of the dataflash */ -+/*------------------------------------------------------------------------------*/ -+AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert( -+ AT91PS_DataFlash pDataFlash, -+ unsigned char BufferCommand, -+ unsigned int page) -+{ -+ int cmdsize; -+ /* Test if the buffer command is legal */ -+ if ((BufferCommand != DB_PAGE_2_BUF1_TRF) && (BufferCommand != DB_PAGE_2_BUF2_TRF)) -+ return DATAFLASH_BAD_COMMAND; -+ -+ /* no data to transmit or receive */ -+ pDataFlash->pDataFlashDesc->tx_data_size = 0; -+ cmdsize = 4; -+ if (pDataFlash->pDevice->pages_number >= 16384) -+ cmdsize = 5; -+ return(AT91F_DataFlashSendCommand (pDataFlash, BufferCommand, cmdsize, page*pDataFlash->pDevice->pages_size)); -+} -+ -+ -+/*----------------------------------------------------------------------------- */ -+/* Function Name : AT91F_DataFlashWriteBuffer */ -+/* Object : Write data to the internal sram buffer 1 or 2 */ -+/* Input Parameters : DataFlash Service */ -+/* : = command to write buffer1 or buffer2 */ -+/* : <*dataBuffer> = data buffer to write */ -+/* : = address in the internal buffer */ -+/* : = data buffer size */ -+/* Return value : State of the dataflash */ -+/*------------------------------------------------------------------------------*/ -+AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer ( -+ AT91PS_DataFlash pDataFlash, -+ unsigned char BufferCommand, -+ unsigned char *dataBuffer, -+ unsigned int bufferAddress, -+ int SizeToWrite ) -+{ -+ int cmdsize; -+ /* Test if the buffer command is legal */ -+ if ((BufferCommand != DB_BUF1_WRITE) && (BufferCommand != DB_BUF2_WRITE)) -+ return DATAFLASH_BAD_COMMAND; -+ -+ /* buffer address must be lower than page size */ -+ if (bufferAddress > pDataFlash->pDevice->pages_size) -+ return DATAFLASH_BAD_ADDRESS; -+ -+ if ( (pDataFlash->pDataFlashDesc->state) != IDLE) -+ return DATAFLASH_BUSY; -+ -+ /* Send first Write Command */ -+ pDataFlash->pDataFlashDesc->command[0] = BufferCommand; -+ pDataFlash->pDataFlashDesc->command[1] = 0; -+ if (pDataFlash->pDevice->pages_number >= 16384) { -+ pDataFlash->pDataFlashDesc->command[2] = 0; -+ pDataFlash->pDataFlashDesc->command[3] = (unsigned char)(((unsigned int)(bufferAddress & pDataFlash->pDevice->byte_mask)) >> 8) ; -+ pDataFlash->pDataFlashDesc->command[4] = (unsigned char)((unsigned int)bufferAddress & 0x00FF) ; -+ cmdsize = 5; -+ } else { -+ pDataFlash->pDataFlashDesc->command[2] = (unsigned char)(((unsigned int)(bufferAddress & pDataFlash->pDevice->byte_mask)) >> 8) ; -+ pDataFlash->pDataFlashDesc->command[3] = (unsigned char)((unsigned int)bufferAddress & 0x00FF) ; -+ pDataFlash->pDataFlashDesc->command[4] = 0; -+ cmdsize = 4; -+ } -+ -+ pDataFlash->pDataFlashDesc->tx_cmd_pt = pDataFlash->pDataFlashDesc->command ; -+ pDataFlash->pDataFlashDesc->tx_cmd_size = cmdsize ; -+ pDataFlash->pDataFlashDesc->rx_cmd_pt = pDataFlash->pDataFlashDesc->command ; -+ pDataFlash->pDataFlashDesc->rx_cmd_size = cmdsize ; -+ -+ pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer ; -+ pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer ; -+ pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite ; -+ pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite ; -+ -+ return AT91F_SpiWrite(pDataFlash->pDataFlashDesc); -+} -+ -+/*------------------------------------------------------------------------------*/ -+/* Function Name : AT91F_PageErase */ -+/* Object : Erase a page */ -+/* Input Parameters : DataFlash Service */ -+/* : Page concerned */ -+/* : */ -+/* Return value : State of the dataflash */ -+/*------------------------------------------------------------------------------*/ -+AT91S_DataFlashStatus AT91F_PageErase( -+ AT91PS_DataFlash pDataFlash, -+ unsigned int page) -+{ -+ int cmdsize; -+ /* Test if the buffer command is legal */ -+ /* no data to transmit or receive */ -+ pDataFlash->pDataFlashDesc->tx_data_size = 0; -+ -+ cmdsize = 4; -+ if (pDataFlash->pDevice->pages_number >= 16384) -+ cmdsize = 5; -+ return(AT91F_DataFlashSendCommand (pDataFlash, DB_PAGE_ERASE, cmdsize, page*pDataFlash->pDevice->pages_size)); -+} -+ -+ -+/*------------------------------------------------------------------------------*/ -+/* Function Name : AT91F_BlockErase */ -+/* Object : Erase a Block */ -+/* Input Parameters : DataFlash Service */ -+/* : Page concerned */ -+/* : */ -+/* Return value : State of the dataflash */ -+/*------------------------------------------------------------------------------*/ -+AT91S_DataFlashStatus AT91F_BlockErase( -+ AT91PS_DataFlash pDataFlash, -+ unsigned int block) -+{ -+ int cmdsize; -+ /* Test if the buffer command is legal */ -+ /* no data to transmit or receive */ -+ pDataFlash->pDataFlashDesc->tx_data_size = 0; -+ cmdsize = 4; -+ if (pDataFlash->pDevice->pages_number >= 16384) -+ cmdsize = 5; -+ return(AT91F_DataFlashSendCommand (pDataFlash, DB_BLOCK_ERASE,cmdsize, block*8*pDataFlash->pDevice->pages_size)); -+} -+ -+/*------------------------------------------------------------------------------*/ -+/* Function Name : AT91F_WriteBufferToMain */ -+/* Object : Write buffer to the main memory */ -+/* Input Parameters : DataFlash Service */ -+/* : = command to send to buffer1 or buffer2 */ -+/* : = main memory address */ -+/* Return value : State of the dataflash */ -+/*------------------------------------------------------------------------------*/ -+AT91S_DataFlashStatus AT91F_WriteBufferToMain ( -+ AT91PS_DataFlash pDataFlash, -+ unsigned char BufferCommand, -+ unsigned int dest ) -+{ -+ int cmdsize; -+ /* Test if the buffer command is correct */ -+ if ((BufferCommand != DB_BUF1_PAGE_PGM) && -+ (BufferCommand != DB_BUF1_PAGE_ERASE_PGM) && -+ (BufferCommand != DB_BUF2_PAGE_PGM) && -+ (BufferCommand != DB_BUF2_PAGE_ERASE_PGM) ) -+ return DATAFLASH_BAD_COMMAND; -+ -+ /* no data to transmit or receive */ -+ pDataFlash->pDataFlashDesc->tx_data_size = 0; -+ -+ cmdsize = 4; -+ if (pDataFlash->pDevice->pages_number >= 16384) -+ cmdsize = 5; -+ /* Send the command to the dataflash */ -+ return(AT91F_DataFlashSendCommand (pDataFlash, BufferCommand, cmdsize, dest)); -+} -+ -+ -+/*------------------------------------------------------------------------------*/ -+/* Function Name : AT91F_PartialPageWrite */ -+/* Object : Erase partielly a page */ -+/* Input Parameters : = page number */ -+/* : = adr to begin the fading */ -+/* : = Number of bytes to erase */ -+/*------------------------------------------------------------------------------*/ -+AT91S_DataFlashStatus AT91F_PartialPageWrite ( -+ AT91PS_DataFlash pDataFlash, -+ unsigned char *src, -+ unsigned int dest, -+ unsigned int size) -+{ -+ unsigned int page; -+ unsigned int AdrInPage; -+ -+ page = dest / (pDataFlash->pDevice->pages_size); -+ AdrInPage = dest % (pDataFlash->pDevice->pages_size); -+ -+ /* Read the contents of the page in the Sram Buffer */ -+ AT91F_MainMemoryToBufferTransfert(pDataFlash, DB_PAGE_2_BUF1_TRF, page); -+ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY); -+ /*Update the SRAM buffer */ -+ AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src, AdrInPage, size); -+ -+ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY); -+ -+ /* Erase page if a 128 Mbits device */ -+ if (pDataFlash->pDevice->pages_number >= 16384) { -+ AT91F_PageErase(pDataFlash, page); -+ /* Rewrite the modified Sram Buffer in the main memory */ -+ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY); -+ } -+ -+ /* Rewrite the modified Sram Buffer in the main memory */ -+ return(AT91F_WriteBufferToMain(pDataFlash, DB_BUF1_PAGE_ERASE_PGM, (page*pDataFlash->pDevice->pages_size))); -+} -+ -+ -+/*------------------------------------------------------------------------------*/ -+/* Function Name : AT91F_DataFlashWrite */ -+/* Object : */ -+/* Input Parameters : <*src> = Source buffer */ -+/* : = dataflash adress */ -+/* : = data buffer size */ -+/*------------------------------------------------------------------------------*/ -+AT91S_DataFlashStatus AT91F_DataFlashWrite( -+ AT91PS_DataFlash pDataFlash, -+ unsigned char *src, -+ int dest, -+ int size ) -+{ -+ unsigned int length; -+ unsigned int page; -+ unsigned int status; -+ -+ AT91F_SpiEnable(pDataFlash->pDevice->cs); -+ -+ if ( (dest + size) > (pDataFlash->pDevice->pages_size * (pDataFlash->pDevice->pages_number))) -+ return DATAFLASH_MEMORY_OVERFLOW; -+ -+ /* If destination does not fit a page start address */ -+ if ((dest % ((unsigned int)(pDataFlash->pDevice->pages_size))) != 0 ) { -+ length = pDataFlash->pDevice->pages_size - (dest % ((unsigned int)(pDataFlash->pDevice->pages_size))); -+ -+ if (size < length) -+ length = size; -+ -+ if(!AT91F_PartialPageWrite(pDataFlash,src, dest, length)) -+ return DATAFLASH_ERROR; -+ -+ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY); -+ -+ /* Update size, source and destination pointers */ -+ size -= length; -+ dest += length; -+ src += length; -+ } -+ -+ while (( size - pDataFlash->pDevice->pages_size ) >= 0 ) { -+ /* program dataflash page */ -+ page = (unsigned int)dest / (pDataFlash->pDevice->pages_size); -+ -+ status = AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src, 0, pDataFlash->pDevice->pages_size); -+ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY); -+ -+ status = AT91F_PageErase(pDataFlash, page); -+ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY); -+ if (!status) -+ return DATAFLASH_ERROR; -+ -+ status = AT91F_WriteBufferToMain (pDataFlash, DB_BUF1_PAGE_PGM, dest); -+ if(!status) -+ return DATAFLASH_ERROR; -+ -+ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY); -+ -+ /* Update size, source and destination pointers */ -+ size -= pDataFlash->pDevice->pages_size ; -+ dest += pDataFlash->pDevice->pages_size ; -+ src += pDataFlash->pDevice->pages_size ; -+ } -+ -+ /* If still some bytes to read */ -+ if ( size > 0 ) { -+ /* program dataflash page */ -+ if(!AT91F_PartialPageWrite(pDataFlash, src, dest, size) ) -+ return DATAFLASH_ERROR; -+ -+ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY); -+ } -+ return DATAFLASH_OK; -+} -+ -+ -+/*------------------------------------------------------------------------------*/ -+/* Function Name : AT91F_DataFlashRead */ -+/* Object : Read a block in dataflash */ -+/* Input Parameters : */ -+/* Return value : */ -+/*------------------------------------------------------------------------------*/ -+int AT91F_DataFlashRead( -+ AT91PS_DataFlash pDataFlash, -+ unsigned long addr, -+ unsigned long size, -+ char *buffer) -+{ -+ unsigned long SizeToRead; -+ -+ AT91F_SpiEnable(pDataFlash->pDevice->cs); -+ -+ if(AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY) != DATAFLASH_OK) -+ return -1; -+ -+ while (size) { -+ SizeToRead = (size < 0x8000)? size:0x8000; -+ -+ if (AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY) != DATAFLASH_OK) -+ return -1; -+ -+ if (AT91F_DataFlashContinuousRead (pDataFlash, addr, buffer, SizeToRead) != DATAFLASH_OK) -+ return -1; -+ -+ size -= SizeToRead; -+ addr += SizeToRead; -+ buffer += SizeToRead; -+ } -+ -+ return DATAFLASH_OK; -+} -+ -+ -+/*------------------------------------------------------------------------------*/ -+/* Function Name : AT91F_DataflashProbe */ -+/* Object : */ -+/* Input Parameters : */ -+/* Return value : Dataflash status register */ -+/*------------------------------------------------------------------------------*/ -+int AT91F_DataflashProbe(int cs, AT91PS_DataflashDesc pDesc) -+{ -+ AT91F_SpiEnable(cs); -+ AT91F_DataFlashGetStatus(pDesc); -+ return((pDesc->command[1] == 0xFF)? 0: pDesc->command[1] & 0x3C); -+} -+ -+#endif -diff -Naur u-boot-1.1.4.org/board/vlink/config.mk u-boot-1.1.4.tmp/board/vlink/config.mk ---- u-boot-1.1.4.org/board/vlink/config.mk 1970-01-01 01:00:00.000000000 +0100 -+++ u-boot-1.1.4.tmp/board/vlink/config.mk 2005-12-16 17:39:27.000000000 +0100 -@@ -0,0 +1 @@ -+TEXT_BASE = 0x21f00000 -diff -Naur u-boot-1.1.4.org/board/vlink/flash.c u-boot-1.1.4.tmp/board/vlink/flash.c ---- u-boot-1.1.4.org/board/vlink/flash.c 1970-01-01 01:00:00.000000000 +0100 -+++ u-boot-1.1.4.tmp/board/vlink/flash.c 2006-06-05 02:44:43.000000000 +0200 -@@ -0,0 +1,504 @@ -+/* -+ * (C) Copyright 2002 -+ * Lineo, Inc. -+ * Bernhard Kuhn -+ * -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH -+ * Alex Zuepke -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+ -+ulong myflush(void); -+ -+ -+/* Flash Organization Structure */ -+typedef struct OrgDef -+{ -+ unsigned int sector_number; -+ unsigned int sector_size; -+} OrgDef; -+ -+ -+/* Flash Organizations */ -+OrgDef OrgAT49BV16x4[] = -+{ -+ { 8, 8*1024 }, /* 8 * 8 kBytes sectors */ -+ { 2, 32*1024 }, /* 2 * 32 kBytes sectors */ -+ { 30, 64*1024 }, /* 30 * 64 kBytes sectors */ -+}; -+ -+OrgDef OrgAT49BV16x4A[] = -+{ -+ { 8, 8*1024 }, /* 8 * 8 kBytes sectors */ -+ { 31, 64*1024 }, /* 31 * 64 kBytes sectors */ -+}; -+ -+OrgDef OrgAT49BV6416[] = -+{ -+ { 8, 8*1024 }, /* 8 * 8 kBytes sectors */ -+ { 127, 64*1024 }, /* 127 * 64 kBytes sectors */ -+}; -+ -+flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; -+ -+/* AT49BV1614A Codes */ -+#define FLASH_CODE1 0xAA -+#define FLASH_CODE2 0x55 -+#define ID_IN_CODE 0x90 -+#define ID_OUT_CODE 0xF0 -+ -+ -+#define CMD_READ_ARRAY 0x00F0 -+#define CMD_UNLOCK1 0x00AA -+#define CMD_UNLOCK2 0x0055 -+#define CMD_ERASE_SETUP 0x0080 -+#define CMD_ERASE_CONFIRM 0x0030 -+#define CMD_PROGRAM 0x00A0 -+#define CMD_UNLOCK_BYPASS 0x0020 -+#define CMD_SECTOR_UNLOCK 0x0070 -+ -+#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00005555<<1))) -+#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00002AAA<<1))) -+ -+#define BIT_ERASE_DONE 0x0080 -+#define BIT_RDY_MASK 0x0080 -+#define BIT_PROGRAM_ERROR 0x0020 -+#define BIT_TIMEOUT 0x80000000 /* our flag */ -+ -+#define READY 1 -+#define ERR 2 -+#define TMO 4 -+ -+/*----------------------------------------------------------------------- -+ */ -+void flash_identification (flash_info_t * info) -+{ -+ volatile u16 manuf_code, device_code, add_device_code; -+ -+ MEM_FLASH_ADDR1 = FLASH_CODE1; -+ MEM_FLASH_ADDR2 = FLASH_CODE2; -+ MEM_FLASH_ADDR1 = ID_IN_CODE; -+ -+ manuf_code = *(volatile u16 *) CFG_FLASH_BASE; -+ device_code = *(volatile u16 *) (CFG_FLASH_BASE + 2); -+ add_device_code = *(volatile u16 *) (CFG_FLASH_BASE + (3 << 1)); -+ -+ MEM_FLASH_ADDR1 = FLASH_CODE1; -+ MEM_FLASH_ADDR2 = FLASH_CODE2; -+ MEM_FLASH_ADDR1 = ID_OUT_CODE; -+ -+ /* Vendor type */ -+ info->flash_id = ATM_MANUFACT & FLASH_VENDMASK; -+ printf ("Atmel: "); -+ -+ if ((device_code & FLASH_TYPEMASK) == (ATM_ID_BV1614 & FLASH_TYPEMASK)) { -+ -+ if ((add_device_code & FLASH_TYPEMASK) == -+ (ATM_ID_BV1614A & FLASH_TYPEMASK)) { -+ info->flash_id |= ATM_ID_BV1614A & FLASH_TYPEMASK; -+ printf ("AT49BV1614A (16Mbit)\n"); -+ } else { /* AT49BV1614 Flash */ -+ info->flash_id |= ATM_ID_BV1614 & FLASH_TYPEMASK; -+ printf ("AT49BV1614 (16Mbit)\n"); -+ } -+ -+ } else if ((device_code & FLASH_TYPEMASK) == (ATM_ID_BV6416 & FLASH_TYPEMASK)) { -+ info->flash_id |= ATM_ID_BV6416 & FLASH_TYPEMASK; -+ printf ("AT49BV6416 (64Mbit)\n"); -+ } -+} -+ -+ushort flash_number_sector(OrgDef *pOrgDef, unsigned int nb_blocks) -+{ -+ int i, nb_sectors = 0; -+ -+ for (i=0; istart[sector]); -+ -+ MEM_FLASH_ADDR1 = CMD_UNLOCK1; -+ *addr = CMD_SECTOR_UNLOCK; -+} -+ -+ -+ulong flash_init (void) -+{ -+ int i, j, k; -+ unsigned int flash_nb_blocks, sector; -+ unsigned int start_address; -+ OrgDef *pOrgDef; -+ -+ ulong size = 0; -+ -+ for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { -+ ulong flashbase = 0; -+ -+ flash_identification (&flash_info[i]); -+ -+ if ((flash_info[i].flash_id & FLASH_TYPEMASK) == -+ (ATM_ID_BV1614 & FLASH_TYPEMASK)) { -+ -+ pOrgDef = OrgAT49BV16x4; -+ flash_nb_blocks = sizeof (OrgAT49BV16x4) / sizeof (OrgDef); -+ } else if ((flash_info[i].flash_id & FLASH_TYPEMASK) == -+ (ATM_ID_BV1614A & FLASH_TYPEMASK)){ /* AT49BV1614A Flash */ -+ -+ pOrgDef = OrgAT49BV16x4A; -+ flash_nb_blocks = sizeof (OrgAT49BV16x4A) / sizeof (OrgDef); -+ } else if ((flash_info[i].flash_id & FLASH_TYPEMASK) == -+ (ATM_ID_BV6416 & FLASH_TYPEMASK)){ /* AT49BV6416 Flash */ -+ -+ pOrgDef = OrgAT49BV6416; -+ flash_nb_blocks = sizeof (OrgAT49BV6416) / sizeof (OrgDef); -+ } else { -+ flash_nb_blocks = 0; -+ pOrgDef = OrgAT49BV16x4; -+ } -+ -+ flash_info[i].sector_count = flash_number_sector(pOrgDef, flash_nb_blocks); -+ memset (flash_info[i].protect, 0, flash_info[i].sector_count); -+ -+ if (i == 0) -+ flashbase = PHYS_FLASH_1; -+ else -+ panic ("configured too many flash banks!\n"); -+ -+ sector = 0; -+ start_address = flashbase; -+ flash_info[i].size = 0; -+ -+ for (j = 0; j < flash_nb_blocks; j++) { -+ for (k = 0; k < pOrgDef[j].sector_number; k++) { -+ flash_info[i].start[sector++] = start_address; -+ start_address += pOrgDef[j].sector_size; -+ flash_info[i].size += pOrgDef[j].sector_size; -+ } -+ } -+ -+ size += flash_info[i].size; -+ -+ if ((flash_info[i].flash_id & FLASH_TYPEMASK) == -+ (ATM_ID_BV6416 & FLASH_TYPEMASK)){ /* AT49BV6416 Flash */ -+ -+ /* Unlock all sectors at reset */ -+ for (j=0; jflash_id & FLASH_VENDMASK) { -+ case (ATM_MANUFACT & FLASH_VENDMASK): -+ printf ("Atmel: "); -+ break; -+ default: -+ printf ("Unknown Vendor "); -+ break; -+ } -+ -+ switch (info->flash_id & FLASH_TYPEMASK) { -+ case (ATM_ID_BV1614 & FLASH_TYPEMASK): -+ printf ("AT49BV1614 (16Mbit)\n"); -+ break; -+ case (ATM_ID_BV1614A & FLASH_TYPEMASK): -+ printf ("AT49BV1614A (16Mbit)\n"); -+ break; -+ case (ATM_ID_BV6416 & FLASH_TYPEMASK): -+ printf ("AT49BV6416 (64Mbit)\n"); -+ break; -+ default: -+ printf ("Unknown Chip Type\n"); -+ return; -+ } -+ -+ printf (" Size: %ld MB in %d Sectors\n", -+ info->size >> 20, info->sector_count); -+ -+ printf (" Sector Start Addresses:"); -+ for (i = 0; i < info->sector_count; i++) { -+ if ((i % 5) == 0) { -+ printf ("\n "); -+ } -+ printf (" %08lX%s", info->start[i], -+ info->protect[i] ? " (RO)" : " "); -+ } -+ printf ("\n"); -+} -+ -+/*----------------------------------------------------------------------- -+ */ -+ -+int flash_erase (flash_info_t * info, int s_first, int s_last) -+{ -+ ulong result; -+ int iflag, cflag, prot, sect; -+ int rc = ERR_OK; -+ int chip1; -+ -+ /* first look for protection bits */ -+ -+ if (info->flash_id == FLASH_UNKNOWN) -+ return ERR_UNKNOWN_FLASH_TYPE; -+ -+ if ((s_first < 0) || (s_first > s_last)) { -+ return ERR_INVAL; -+ } -+ -+ if ((info->flash_id & FLASH_VENDMASK) != -+ (ATM_MANUFACT & FLASH_VENDMASK)) { -+ return ERR_UNKNOWN_FLASH_VENDOR; -+ } -+ -+ prot = 0; -+ for (sect = s_first; sect <= s_last; ++sect) { -+ if (info->protect[sect]) { -+ prot++; -+ } -+ } -+ if (prot) -+ return ERR_PROTECTED; -+ -+ /* -+ * Disable interrupts which might cause a timeout -+ * here. Remember that our exception vectors are -+ * at address 0 in the flash, and we don't want a -+ * (ticker) exception to happen while the flash -+ * chip is in programming mode. -+ */ -+ cflag = icache_status (); -+ icache_disable (); -+ iflag = disable_interrupts (); -+ -+ /* Start erase on unprotected sectors */ -+ for (sect = s_first; sect <= s_last && !ctrlc (); sect++) { -+ printf ("Erasing sector %2d ... ", sect); -+ -+ /* arm simple, non interrupt dependent timer */ -+ reset_timer_masked (); -+ -+ if (info->protect[sect] == 0) { /* not protected */ -+ volatile u16 *addr = (volatile u16 *) (info->start[sect]); -+ -+ MEM_FLASH_ADDR1 = CMD_UNLOCK1; -+ MEM_FLASH_ADDR2 = CMD_UNLOCK2; -+ MEM_FLASH_ADDR1 = CMD_ERASE_SETUP; -+ -+ MEM_FLASH_ADDR1 = CMD_UNLOCK1; -+ MEM_FLASH_ADDR2 = CMD_UNLOCK2; -+ *addr = CMD_ERASE_CONFIRM; -+ -+ /* wait until flash is ready */ -+ chip1 = 0; -+ -+ do { -+ result = *addr; -+ -+ /* check timeout */ -+ if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) { -+ MEM_FLASH_ADDR1 = CMD_READ_ARRAY; -+ chip1 = TMO; -+ break; -+ } -+ -+ if (!chip1 && (result & 0xFFFF) & BIT_ERASE_DONE) -+ chip1 = READY; -+ -+ } while (!chip1); -+ -+ MEM_FLASH_ADDR1 = CMD_READ_ARRAY; -+ -+ if (chip1 == ERR) { -+ rc = ERR_PROG_ERROR; -+ goto outahere; -+ } -+ if (chip1 == TMO) { -+ rc = ERR_TIMOUT; -+ goto outahere; -+ } -+ -+ printf ("ok.\n"); -+ } else { /* it was protected */ -+ printf ("protected!\n"); -+ } -+ } -+ -+ if (ctrlc ()) -+ printf ("User Interrupt!\n"); -+ -+outahere: -+ /* allow flash to settle - wait 10 ms */ -+ udelay_masked (10000); -+ -+ if (iflag) -+ enable_interrupts (); -+ -+ if (cflag) -+ icache_enable (); -+ -+ return rc; -+} -+ -+/*----------------------------------------------------------------------- -+ * Copy memory to flash -+ */ -+ -+volatile static int write_word (flash_info_t * info, ulong dest, -+ ulong data) -+{ -+ volatile u16 *addr = (volatile u16 *) dest; -+ ulong result; -+ int rc = ERR_OK; -+ int cflag, iflag; -+ int chip1; -+ -+ /* -+ * Check if Flash is (sufficiently) erased -+ */ -+ result = *addr; -+ if ((result & data) != data) -+ return ERR_NOT_ERASED; -+ -+ -+ /* -+ * Disable interrupts which might cause a timeout -+ * here. Remember that our exception vectors are -+ * at address 0 in the flash, and we don't want a -+ * (ticker) exception to happen while the flash -+ * chip is in programming mode. -+ */ -+ cflag = icache_status (); -+ icache_disable (); -+ iflag = disable_interrupts (); -+ -+ MEM_FLASH_ADDR1 = CMD_UNLOCK1; -+ MEM_FLASH_ADDR2 = CMD_UNLOCK2; -+ MEM_FLASH_ADDR1 = CMD_PROGRAM; -+ *addr = data; -+ -+ /* arm simple, non interrupt dependent timer */ -+ reset_timer_masked (); -+ -+ /* wait until flash is ready */ -+ chip1 = 0; -+ do { -+ result = *addr; -+ -+ /* check timeout */ -+ if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) { -+ chip1 = ERR | TMO; -+ break; -+ } -+ if (!chip1 && ((result & 0x80) == (data & 0x80))) -+ chip1 = READY; -+ -+ } while (!chip1); -+ -+ *addr = CMD_READ_ARRAY; -+ -+ if (chip1 == ERR || *addr != data) -+ rc = ERR_PROG_ERROR; -+ -+ if (iflag) -+ enable_interrupts (); -+ -+ if (cflag) -+ icache_enable (); -+ -+ return rc; -+} -+ -+/*----------------------------------------------------------------------- -+ * Copy memory to flash. -+ */ -+ -+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) -+{ -+ ulong wp, data; -+ int rc; -+ -+ if (addr & 1) { -+ printf ("unaligned destination not supported\n"); -+ return ERR_ALIGN; -+ }; -+ -+ if ((int) src & 1) { -+ printf ("unaligned source not supported\n"); -+ return ERR_ALIGN; -+ }; -+ -+ wp = addr; -+ -+ while (cnt >= 2) { -+ data = *((volatile u16 *) src); -+ if ((rc = write_word (info, wp, data)) != 0) { -+ return (rc); -+ } -+ src += 2; -+ wp += 2; -+ cnt -= 2; -+ } -+ -+ if (cnt == 1) { -+ data = (*((volatile u8 *) src)) | (*((volatile u8 *) (wp + 1)) << -+ 8); -+ if ((rc = write_word (info, wp, data)) != 0) { -+ return (rc); -+ } -+ src += 1; -+ wp += 1; -+ cnt -= 1; -+ }; -+ -+ return ERR_OK; -+} -diff -Naur u-boot-1.1.4.org/board/vlink/Makefile u-boot-1.1.4.tmp/board/vlink/Makefile ---- u-boot-1.1.4.org/board/vlink/Makefile 1970-01-01 01:00:00.000000000 +0100 -+++ u-boot-1.1.4.tmp/board/vlink/Makefile 2006-06-05 02:48:33.000000000 +0200 -@@ -0,0 +1,46 @@ -+# -+# (C) Copyright 2003 -+# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -+# -+# See file CREDITS for list of people who contributed to this -+# project. -+# -+# This program is free software; you can redistribute it and/or -+# modify it under the terms of the GNU General Public License as -+# published by the Free Software Foundation; either version 2 of -+# the License, or (at your option) any later version. -+# -+# This program is distributed in the hope that it will be useful, -+# but WITHOUT ANY WARRANTY; without even the implied warranty of -+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+# GNU General Public License for more details. -+# -+# You should have received a copy of the GNU General Public License -+# along with this program; if not, write to the Free Software -+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+# MA 02111-1307 USA -+# -+ -+include $(TOPDIR)/config.mk -+ -+LIB = lib$(BOARD).a -+ -+OBJS := vlink.o at45.o flash.o -+ -+$(LIB): $(OBJS) $(SOBJS) -+ $(AR) crv $@ $(OBJS) $(SOBJS) -+ -+clean: -+ rm -f $(SOBJS) $(OBJS) -+ -+distclean: clean -+ rm -f $(LIB) core *.bak .depend -+ -+######################################################################### -+ -+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) -+ $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ -+ -+-include .depend -+ -+######################################################################### -diff -Naur u-boot-1.1.4.org/board/vlink/u-boot.lds u-boot-1.1.4.tmp/board/vlink/u-boot.lds ---- u-boot-1.1.4.org/board/vlink/u-boot.lds 1970-01-01 01:00:00.000000000 +0100 -+++ u-boot-1.1.4.tmp/board/vlink/u-boot.lds 2005-12-16 17:39:27.000000000 +0100 -@@ -0,0 +1,57 @@ -+/* -+ * (C) Copyright 2002 -+ * Gary Jennejohn, DENX Software Engineering, -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -+/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ -+OUTPUT_ARCH(arm) -+ENTRY(_start) -+SECTIONS -+{ -+ . = 0x00000000; -+ -+ . = ALIGN(4); -+ .text : -+ { -+ cpu/arm920t/start.o (.text) -+ *(.text) -+ } -+ -+ . = ALIGN(4); -+ .rodata : { *(.rodata) } -+ -+ . = ALIGN(4); -+ .data : { *(.data) } -+ -+ . = ALIGN(4); -+ .got : { *(.got) } -+ -+ . = .; -+ __u_boot_cmd_start = .; -+ .u_boot_cmd : { *(.u_boot_cmd) } -+ __u_boot_cmd_end = .; -+ -+ . = ALIGN(4); -+ __bss_start = .; -+ .bss : { *(.bss) } -+ _end = .; -+} -diff -Naur u-boot-1.1.4.org/board/vlink/vlink.c u-boot-1.1.4.tmp/board/vlink/vlink.c ---- u-boot-1.1.4.org/board/vlink/vlink.c 1970-01-01 01:00:00.000000000 +0100 -+++ u-boot-1.1.4.tmp/board/vlink/vlink.c 2006-06-05 03:10:22.000000000 +0200 -@@ -0,0 +1,89 @@ -+/* -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH -+ * Marius Groeger -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+/* ------------------------------------------------------------------------- */ -+/* -+ * Miscelaneous platform dependent initialisations -+ */ -+ -+int board_init (void) -+{ -+ DECLARE_GLOBAL_DATA_PTR; -+ -+ /* Enable Ctrlc */ -+ console_init_f (); -+ -+ /* Correct IRDA resistor problem */ -+ /* Set PA23_TXD in Output */ -+ (AT91PS_PIO) AT91C_BASE_PIOA->PIO_OER = AT91C_PA23_TXD2; -+ -+ /* memory and cpu-speed are setup before relocation */ -+ /* so we do _nothing_ here */ -+ -+ /* arch number of Versalink-Board */ -+ gd->bd->bi_arch_number = MACH_TYPE_VLINK; -+ /* adress of boot parameters */ -+ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; -+ -+ return 0; -+} -+ -+int dram_init (void) -+{ -+ DECLARE_GLOBAL_DATA_PTR; -+ -+ gd->bd->bi_dram[0].start = PHYS_SDRAM; -+ gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; -+ return 0; -+} -+ -+#ifdef CONFIG_DRIVER_ETHER -+#if (CONFIG_COMMANDS & CFG_CMD_NET) -+ -+/* -+ * Name: -+ * at91rm9200_GetPhyInterface -+ * Description: -+ * Initialise the interface functions to the PHY -+ * Arguments: -+ * None -+ * Return value: -+ * None -+ */ -+void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops) -+{ -+ p_phyops->Init = dm9161_InitPhy; -+ p_phyops->IsPhyConnected = dm9161_IsPhyConnected; -+ p_phyops->GetLinkSpeed = dm9161_GetLinkSpeed; -+ p_phyops->AutoNegotiate = dm9161_AutoNegotiate; -+} -+ -+#endif /* CONFIG_COMMANDS & CFG_CMD_NET */ -+#endif /* CONFIG_DRIVER_ETHER */ -diff -Naur u-boot-1.1.4.org/include/asm-arm/mach-types.h u-boot-1.1.4.tmp/include/asm-arm/mach-types.h ---- u-boot-1.1.4.org/include/asm-arm/mach-types.h 2005-12-16 17:39:27.000000000 +0100 -+++ u-boot-1.1.4.tmp/include/asm-arm/mach-types.h 2006-06-05 01:29:25.000000000 +0200 -@@ -424,7 +424,7 @@ - #define MACH_TYPE_MPORT3S 411 - #define MACH_TYPE_RA_ALPHA 412 - #define MACH_TYPE_XCEP 413 --#define MACH_TYPE_ARCOM_MERCURY 414 -+#define MACH_TYPE_ARCOM_VULCAN 414 - #define MACH_TYPE_STARGATE 415 - #define MACH_TYPE_ARMADILLOJ 416 - #define MACH_TYPE_ELROY_JACK 417 -@@ -457,7 +457,7 @@ - #define MACH_TYPE_XM250 444 - #define MACH_TYPE_T6TC1XB 445 - #define MACH_TYPE_ESS710 446 --#define MACH_TYPE_MX3ADS 447 -+#define MACH_TYPE_MX31ADS 447 - #define MACH_TYPE_HIMALAYA 448 - #define MACH_TYPE_BOLFENK 449 - #define MACH_TYPE_AT91RM9200KR 450 -@@ -563,8 +563,8 @@ - #define MACH_TYPE_ENS_CMU 550 - #define MACH_TYPE_MM6_SDB 551 - #define MACH_TYPE_SATURN 552 --#define MACH_TYPE_ARGONPLUSEVB 553 --#define MACH_TYPE_SCMA11EVB 554 -+#define MACH_TYPE_I30030EVB 553 -+#define MACH_TYPE_MXC27530EVB 554 - #define MACH_TYPE_SMDK2800 555 - #define MACH_TYPE_MTWILSON 556 - #define MACH_TYPE_ZITI 557 -@@ -644,7 +644,7 @@ - #define MACH_TYPE_MX2JAZZ 631 - #define MACH_TYPE_MULTIIO 632 - #define MACH_TYPE_HRDISPLAY 633 --#define MACH_TYPE_SCMA11BB 634 -+#define MACH_TYPE_MXC27530ADS 634 - #define MACH_TYPE_TRIZEPS3 635 - #define MACH_TYPE_ZEFEERDZA 636 - #define MACH_TYPE_ZEFEERDZB 637 -@@ -718,7 +718,7 @@ - #define MACH_TYPE_GEM 707 - #define MACH_TYPE_I858 708 - #define MACH_TYPE_HX2750 709 --#define MACH_TYPE_ZEUSEVB 710 -+#define MACH_TYPE_MXC91131EVB 710 - #define MACH_TYPE_P700 711 - #define MACH_TYPE_CPE 712 - #define MACH_TYPE_SPITZ 713 -@@ -736,6 +736,331 @@ - #define MACH_TYPE_LN2410SBC 725 - #define MACH_TYPE_CB3RUFC 726 - #define MACH_TYPE_MP2USB 727 -+#define MACH_TYPE_NTNP425C 728 -+#define MACH_TYPE_COLIBRI 729 -+#define MACH_TYPE_PCM7220 730 -+#define MACH_TYPE_GATEWAY7001 731 -+#define MACH_TYPE_PCM027 732 -+#define MACH_TYPE_CMPXA 733 -+#define MACH_TYPE_ANUBIS 734 -+#define MACH_TYPE_ITE8152 735 -+#define MACH_TYPE_LPC3XXX 736 -+#define MACH_TYPE_PUPPETEER 737 -+#define MACH_TYPE_MACH_VADATECH 738 -+#define MACH_TYPE_E570 739 -+#define MACH_TYPE_X50 740 -+#define MACH_TYPE_RECON 741 -+#define MACH_TYPE_XBOARDGP8 742 -+#define MACH_TYPE_FPIC2 743 -+#define MACH_TYPE_AKITA 744 -+#define MACH_TYPE_A81 745 -+#define MACH_TYPE_SVM_SC25X 746 -+#define MACH_TYPE_VADATECH020 747 -+#define MACH_TYPE_TLI 748 -+#define MACH_TYPE_EDB9315LC 749 -+#define MACH_TYPE_PASSEC 750 -+#define MACH_TYPE_DS_TIGER 751 -+#define MACH_TYPE_E310 752 -+#define MACH_TYPE_E330 753 -+#define MACH_TYPE_RT3000 754 -+#define MACH_TYPE_NOKIA770 755 -+#define MACH_TYPE_PNX0106 756 -+#define MACH_TYPE_HX21XX 757 -+#define MACH_TYPE_FARADAY 758 -+#define MACH_TYPE_SBC9312 759 -+#define MACH_TYPE_BATMAN 760 -+#define MACH_TYPE_JPD201 761 -+#define MACH_TYPE_MIPSA 762 -+#define MACH_TYPE_KACOM 763 -+#define MACH_TYPE_SWARCOCPU 764 -+#define MACH_TYPE_SWARCODSL 765 -+#define MACH_TYPE_BLUEANGEL 766 -+#define MACH_TYPE_HAIRYGRAMA 767 -+#define MACH_TYPE_BANFF 768 -+#define MACH_TYPE_CARMEVA 769 -+#define MACH_TYPE_SAM255 770 -+#define MACH_TYPE_PPM10 771 -+#define MACH_TYPE_EDB9315A 772 -+#define MACH_TYPE_SUNSET 773 -+#define MACH_TYPE_STARGATE2 774 -+#define MACH_TYPE_INTELMOTE2 775 -+#define MACH_TYPE_TRIZEPS4 776 -+#define MACH_TYPE_MAINSTONE2 777 -+#define MACH_TYPE_EZ_IXP42X 778 -+#define MACH_TYPE_TAPWAVE_ZODIAC 779 -+#define MACH_TYPE_UNIVERSALMETER 780 -+#define MACH_TYPE_HICOARM9 781 -+#define MACH_TYPE_PNX4008 782 -+#define MACH_TYPE_KWS6000 783 -+#define MACH_TYPE_PORTUX920T 784 -+#define MACH_TYPE_EZ_X5 785 -+#define MACH_TYPE_OMAP_RUDOLPH 786 -+#define MACH_TYPE_CPUAT91 787 -+#define MACH_TYPE_REA9200 788 -+#define MACH_TYPE_ACTS_PUNE_SA1110 789 -+#define MACH_TYPE_IXP425 790 -+#define MACH_TYPE_I30030ADS 791 -+#define MACH_TYPE_PERCH 792 -+#define MACH_TYPE_EIS05R1 793 -+#define MACH_TYPE_PEPPERPAD 794 -+#define MACH_TYPE_SB3010 795 -+#define MACH_TYPE_RM9200 796 -+#define MACH_TYPE_DMA03 797 -+#define MACH_TYPE_ROAD_S101 798 -+#define MACH_TYPE_IQ_NEXTGEN_A 799 -+#define MACH_TYPE_IQ_NEXTGEN_B 800 -+#define MACH_TYPE_IQ_NEXTGEN_C 801 -+#define MACH_TYPE_IQ_NEXTGEN_D 802 -+#define MACH_TYPE_IQ_NEXTGEN_E 803 -+#define MACH_TYPE_MALLOW_AT91 804 -+#define MACH_TYPE_CYBERTRACKER_I 805 -+#define MACH_TYPE_GESBC931X 806 -+#define MACH_TYPE_CENTIPAD 807 -+#define MACH_TYPE_ARMSOC 808 -+#define MACH_TYPE_SE4200 809 -+#define MACH_TYPE_EMS197A 810 -+#define MACH_TYPE_MICRO9 811 -+#define MACH_TYPE_MICRO9L 812 -+#define MACH_TYPE_UC5471DSP 813 -+#define MACH_TYPE_SJ5471ENG 814 -+#define MACH_TYPE_CMPXA26X 815 -+#define MACH_TYPE_NC 816 -+#define MACH_TYPE_OMAP_PALMTE 817 -+#define MACH_TYPE_AJAX52X 818 -+#define MACH_TYPE_SIRIUSTAR 819 -+#define MACH_TYPE_IODATA_HDLG 820 -+#define MACH_TYPE_AT91RM9200UTL 821 -+#define MACH_TYPE_BIOSAFE 822 -+#define MACH_TYPE_MP1000 823 -+#define MACH_TYPE_PARSY 824 -+#define MACH_TYPE_CCXP 825 -+#define MACH_TYPE_OMAP_GSAMPLE 826 -+#define MACH_TYPE_REALVIEW_EB 827 -+#define MACH_TYPE_SAMOA 828 -+#define MACH_TYPE_T3XSCALE 829 -+#define MACH_TYPE_I878 830 -+#define MACH_TYPE_BORZOI 831 -+#define MACH_TYPE_GECKO 832 -+#define MACH_TYPE_DS101 833 -+#define MACH_TYPE_OMAP_PALMTT2 834 -+#define MACH_TYPE_XSCALE_PALMLD 835 -+#define MACH_TYPE_CC9C 836 -+#define MACH_TYPE_SBC1670 837 -+#define MACH_TYPE_IXDP28X5 838 -+#define MACH_TYPE_OMAP_PALMTT 839 -+#define MACH_TYPE_ML696K 840 -+#define MACH_TYPE_ARCOM_ZEUS 841 -+#define MACH_TYPE_OSIRIS 842 -+#define MACH_TYPE_MAESTRO 843 -+#define MACH_TYPE_TUNGE2 844 -+#define MACH_TYPE_IXBBM 845 -+#define MACH_TYPE_MX27 846 -+#define MACH_TYPE_AX8004 847 -+#define MACH_TYPE_AT91SAM9261EK 848 -+#define MACH_TYPE_LOFT 849 -+#define MACH_TYPE_MAGPIE 850 -+#define MACH_TYPE_MX21 851 -+#define MACH_TYPE_MB87M3400 852 -+#define MACH_TYPE_MGUARD_DELTA 853 -+#define MACH_TYPE_DAVINCI_DVDP 854 -+#define MACH_TYPE_HTCUNIVERSAL 855 -+#define MACH_TYPE_TPAD 856 -+#define MACH_TYPE_ROVERP3 857 -+#define MACH_TYPE_JORNADA928 858 -+#define MACH_TYPE_MV88FXX81 859 -+#define MACH_TYPE_STMP36XX 860 -+#define MACH_TYPE_SXNI79524 861 -+#define MACH_TYPE_AMS_DELTA 862 -+#define MACH_TYPE_URANIUM 863 -+#define MACH_TYPE_UCON 864 -+#define MACH_TYPE_NAS100D 865 -+#define MACH_TYPE_L083_1000 866 -+#define MACH_TYPE_EZX 867 -+#define MACH_TYPE_PNX5220 868 -+#define MACH_TYPE_BUTTE 869 -+#define MACH_TYPE_SRM2 870 -+#define MACH_TYPE_DSBR 871 -+#define MACH_TYPE_CRYSTALBALL 872 -+#define MACH_TYPE_TINYPXA27X 873 -+#define MACH_TYPE_HERBIE 874 -+#define MACH_TYPE_MAGICIAN 875 -+#define MACH_TYPE_CM4002 876 -+#define MACH_TYPE_B4 877 -+#define MACH_TYPE_MAUI 878 -+#define MACH_TYPE_CYBERTRACKER_G 879 -+#define MACH_TYPE_NXDKN 880 -+#define MACH_TYPE_MIO8390 881 -+#define MACH_TYPE_OMI_BOARD 882 -+#define MACH_TYPE_MX21CIV 883 -+#define MACH_TYPE_MAHI_CDAC 884 -+#define MACH_TYPE_XSCALE_PALMTX 885 -+#define MACH_TYPE_S3C2413 887 -+#define MACH_TYPE_SAMSYS_EP0 888 -+#define MACH_TYPE_WG302V1 889 -+#define MACH_TYPE_WG302V2 890 -+#define MACH_TYPE_EB42X 891 -+#define MACH_TYPE_IQ331ES 892 -+#define MACH_TYPE_COSYDSP 893 -+#define MACH_TYPE_UPLAT7D 894 -+#define MACH_TYPE_PTDAVINCI 895 -+#define MACH_TYPE_MBUS 896 -+#define MACH_TYPE_NADIA2VB 897 -+#define MACH_TYPE_R1000 898 -+#define MACH_TYPE_HW90250 899 -+#define MACH_TYPE_OMAP_2430SDP 900 -+#define MACH_TYPE_DAVINCI_EVM 901 -+#define MACH_TYPE_OMAP_TORNADO 902 -+#define MACH_TYPE_OLOCREEK 903 -+#define MACH_TYPE_PALMZ72 904 -+#define MACH_TYPE_NXDB500 905 -+#define MACH_TYPE_APF9328 906 -+#define MACH_TYPE_OMAP_WIPOQ 907 -+#define MACH_TYPE_OMAP_TWIP 908 -+#define MACH_TYPE_XSCALE_PALMTREO650 909 -+#define MACH_TYPE_ACUMEN 910 -+#define MACH_TYPE_XP100 911 -+#define MACH_TYPE_FS2410 912 -+#define MACH_TYPE_PXA270_CERF 913 -+#define MACH_TYPE_SQ2FTLPALM 914 -+#define MACH_TYPE_BSEMSERVER 915 -+#define MACH_TYPE_NETCLIENT 916 -+#define MACH_TYPE_XSCALE_PALMTT5 917 -+#define MACH_TYPE_OMAP_PALMTC 918 -+#define MACH_TYPE_OMAP_APOLLON 919 -+#define MACH_TYPE_MXC30030EVB 920 -+#define MACH_TYPE_REA_2D 921 -+#define MACH_TYPE_TI3E524 922 -+#define MACH_TYPE_ATEB9200 923 -+#define MACH_TYPE_AUCKLAND 924 -+#define MACH_TYPE_AK3320M 925 -+#define MACH_TYPE_DURAMAX 926 -+#define MACH_TYPE_N35 927 -+#define MACH_TYPE_PRONGHORN 928 -+#define MACH_TYPE_FUNDY 929 -+#define MACH_TYPE_LOGICPD_PXA270 930 -+#define MACH_TYPE_CPU777 931 -+#define MACH_TYPE_SIMICON9201 932 -+#define MACH_TYPE_LEAP2_HPM 933 -+#define MACH_TYPE_CM922TXA10 934 -+#define MACH_TYPE_PXA 935 -+#define MACH_TYPE_SANDGATE2 936 -+#define MACH_TYPE_SANDGATE2G 937 -+#define MACH_TYPE_SANDGATE2P 938 -+#define MACH_TYPE_FRED_JACK 939 -+#define MACH_TYPE_TTG_COLOR1 940 -+#define MACH_TYPE_NXEB500HMI 941 -+#define MACH_TYPE_NETDCU8 942 -+#define MACH_TYPE_ML675050_CPU_BOA 943 -+#define MACH_TYPE_NG_FVX538 944 -+#define MACH_TYPE_NG_FVS338 945 -+#define MACH_TYPE_PNX4103 946 -+#define MACH_TYPE_HESDB 947 -+#define MACH_TYPE_XSILO 948 -+#define MACH_TYPE_ESPRESSO 949 -+#define MACH_TYPE_EMLC 950 -+#define MACH_TYPE_SISTERON 951 -+#define MACH_TYPE_RX1950 952 -+#define MACH_TYPE_TSC_VENUS 953 -+#define MACH_TYPE_DS101J 954 -+#define MACH_TYPE_MXC30030ADS 955 -+#define MACH_TYPE_FUJITSU_WIMAXSOC 956 -+#define MACH_TYPE_DUALPCMODEM 957 -+#define MACH_TYPE_GESBC9312 958 -+#define MACH_TYPE_HTCAPACHE 959 -+#define MACH_TYPE_IXDP435 960 -+#define MACH_TYPE_CATPROVT100 961 -+#define MACH_TYPE_PICOTUX1XX 962 -+#define MACH_TYPE_PICOTUX2XX 963 -+#define MACH_TYPE_DSMG600 964 -+#define MACH_TYPE_EMPC2 965 -+#define MACH_TYPE_VENTURA 966 -+#define MACH_TYPE_PHIDGET_SBC 967 -+#define MACH_TYPE_IJ3K 968 -+#define MACH_TYPE_PISGAH 969 -+#define MACH_TYPE_OMAP_FSAMPLE 970 -+#define MACH_TYPE_SG720 971 -+#define MACH_TYPE_REDFOX 972 -+#define MACH_TYPE_MYSH_EP9315_1 973 -+#define MACH_TYPE_TPF106 974 -+#define MACH_TYPE_AT91RM9200KG 975 -+#define MACH_TYPE_SLEDB 976 -+#define MACH_TYPE_ONTRACK 977 -+#define MACH_TYPE_PM1200 978 -+#define MACH_TYPE_ESS24XXX 979 -+#define MACH_TYPE_COREMP7 980 -+#define MACH_TYPE_NEXCODER_6446 981 -+#define MACH_TYPE_STVC8380 982 -+#define MACH_TYPE_TEKLYNX 983 -+#define MACH_TYPE_CARBONADO 984 -+#define MACH_TYPE_SYSMOS_MP730 985 -+#define MACH_TYPE_SNAPPER_CL15 986 -+#define MACH_TYPE_PGIGIM 987 -+#define MACH_TYPE_PTX9160P2 988 -+#define MACH_TYPE_DCORE1 989 -+#define MACH_TYPE_VICTORPXA 990 -+#define MACH_TYPE_MX2DTB 991 -+#define MACH_TYPE_PXA_IREX_ER0100 992 -+#define MACH_TYPE_OMAP_PALMZ71 993 -+#define MACH_TYPE_BARTEC_DEG 994 -+#define MACH_TYPE_HW50251 995 -+#define MACH_TYPE_IBOX 996 -+#define MACH_TYPE_ATLASLH7A404 997 -+#define MACH_TYPE_PT2026 998 -+#define MACH_TYPE_HTCALPINE 999 -+#define MACH_TYPE_BARTEC_VTU 1000 -+#define MACH_TYPE_VCOREII 1001 -+#define MACH_TYPE_PDNB3 1002 -+#define MACH_TYPE_HTCBEETLES 1003 -+#define MACH_TYPE_S3C6400 1004 -+#define MACH_TYPE_S3C2443 1005 -+#define MACH_TYPE_OMAP_LDK 1006 -+#define MACH_TYPE_SMDK2460 1007 -+#define MACH_TYPE_SMDK2440 1008 -+#define MACH_TYPE_SMDK2412 1009 -+#define MACH_TYPE_WEBBOX 1010 -+#define MACH_TYPE_CWWNDP 1011 -+#define MACH_TYPE_DRAGON 1012 -+#define MACH_TYPE_OPENDO_CPU_BOARD 1013 -+#define MACH_TYPE_CCM2200 1014 -+#define MACH_TYPE_ETWARM 1015 -+#define MACH_TYPE_M93030 1016 -+#define MACH_TYPE_CC7U 1017 -+#define MACH_TYPE_MTT_RANGER 1018 -+#define MACH_TYPE_NEXUS 1019 -+#define MACH_TYPE_DESMAN 1020 -+#define MACH_TYPE_BKDE303 1021 -+#define MACH_TYPE_SMDK2413 1022 -+#define MACH_TYPE_AML_M7200 1023 -+#define MACH_TYPE_AML_M5900 1024 -+#define MACH_TYPE_SG640 1025 -+#define MACH_TYPE_EDG79524 1026 -+#define MACH_TYPE_AI2410 1027 -+#define MACH_TYPE_IXP465 1028 -+#define MACH_TYPE_BALLOON3 1029 -+#define MACH_TYPE_HEINS 1030 -+#define MACH_TYPE_MPLUSEVA 1031 -+#define MACH_TYPE_RT042 1032 -+#define MACH_TYPE_CWIEM 1033 -+#define MACH_TYPE_CM_X270 1034 -+#define MACH_TYPE_CM_X255 1035 -+#define MACH_TYPE_ESH_AT91 1036 -+#define MACH_TYPE_SANDGATE3 1037 -+#define MACH_TYPE_PRIMO 1038 -+#define MACH_TYPE_GEMSTONE 1039 -+#define MACH_TYPE_PRONGHORNMETRO 1040 -+#define MACH_TYPE_SIDEWINDER 1041 -+#define MACH_TYPE_PICOMOD1 1042 -+#define MACH_TYPE_SG590 1043 -+#define MACH_TYPE_AKAI9307 1044 -+#define MACH_TYPE_FONTAINE 1045 -+#define MACH_TYPE_WOMBAT 1046 -+#define MACH_TYPE_ACQ300 1047 -+#define MACH_TYPE_MOD_270 1048 -+#define MACH_TYPE_VC0820 1049 -+#define MACH_TYPE_ANI_AIM 1050 -+#define MACH_TYPE_JELLYFISH 1051 -+#define MACH_TYPE_AMANITA 1052 -+#define MACH_TYPE_VLINK 1053 - - #ifdef CONFIG_ARCH_EBSA110 - # ifdef machine_arch_type -@@ -3540,9 +3865,9 @@ - # else - # define machine_arch_type MACH_TYPE_RAMSES - # endif --# define machine_is_ramses() (machine_arch_type == MACH_TYPE_RAMSES) -+# define machine_is_mnci() (machine_arch_type == MACH_TYPE_RAMSES) - #else --# define machine_is_ramses() (0) -+# define machine_is_mnci() (0) - #endif - - #ifdef CONFIG_ARCH_S28X -@@ -4500,9 +4825,9 @@ - # else - # define machine_arch_type MACH_TYPE_M825XX - # endif --# define machine_is_m825xx() (machine_arch_type == MACH_TYPE_M825XX) -+# define machine_is_comcerto() (machine_arch_type == MACH_TYPE_M825XX) - #else --# define machine_is_m825xx() (0) -+# define machine_is_comcerto() (0) - #endif - - #ifdef CONFIG_SA1100_M7100 -@@ -5657,16 +5982,16 @@ - # define machine_is_xcep() (0) - #endif - --#ifdef CONFIG_MACH_ARCOM_MERCURY -+#ifdef CONFIG_MACH_ARCOM_VULCAN - # ifdef machine_arch_type - # undef machine_arch_type - # define machine_arch_type __machine_arch_type - # else --# define machine_arch_type MACH_TYPE_ARCOM_MERCURY -+# define machine_arch_type MACH_TYPE_ARCOM_VULCAN - # endif --# define machine_is_arcom_mercury() (machine_arch_type == MACH_TYPE_ARCOM_MERCURY) -+# define machine_is_arcom_vulcan() (machine_arch_type == MACH_TYPE_ARCOM_VULCAN) - #else --# define machine_is_arcom_mercury() (0) -+# define machine_is_arcom_vulcan() (0) - #endif - - #ifdef CONFIG_MACH_STARGATE -@@ -6053,16 +6378,16 @@ - # define machine_is_ess710() (0) - #endif - --#ifdef CONFIG_MACH_MX3ADS -+#ifdef CONFIG_MACH_MX31ADS - # ifdef machine_arch_type - # undef machine_arch_type - # define machine_arch_type __machine_arch_type - # else --# define machine_arch_type MACH_TYPE_MX3ADS -+# define machine_arch_type MACH_TYPE_MX31ADS - # endif --# define machine_is_mx3ads() (machine_arch_type == MACH_TYPE_MX3ADS) -+# define machine_is_mx31ads() (machine_arch_type == MACH_TYPE_MX31ADS) - #else --# define machine_is_mx3ads() (0) -+# define machine_is_mx31ads() (0) - #endif - - #ifdef CONFIG_MACH_HIMALAYA -@@ -7325,28 +7650,28 @@ - # define machine_is_saturn() (0) - #endif - --#ifdef CONFIG_MACH_ARGONPLUSEVB -+#ifdef CONFIG_MACH_I30030EVB - # ifdef machine_arch_type - # undef machine_arch_type - # define machine_arch_type __machine_arch_type - # else --# define machine_arch_type MACH_TYPE_ARGONPLUSEVB -+# define machine_arch_type MACH_TYPE_I30030EVB - # endif --# define machine_is_argonplusevb() (machine_arch_type == MACH_TYPE_ARGONPLUSEVB) -+# define machine_is_i30030evb() (machine_arch_type == MACH_TYPE_I30030EVB) - #else --# define machine_is_argonplusevb() (0) -+# define machine_is_i30030evb() (0) - #endif - --#ifdef CONFIG_MACH_SCMA11EVB -+#ifdef CONFIG_MACH_MXC27530EVB - # ifdef machine_arch_type - # undef machine_arch_type - # define machine_arch_type __machine_arch_type - # else --# define machine_arch_type MACH_TYPE_SCMA11EVB -+# define machine_arch_type MACH_TYPE_MXC27530EVB - # endif --# define machine_is_scma11evb() (machine_arch_type == MACH_TYPE_SCMA11EVB) -+# define machine_is_mxc27530evb() (machine_arch_type == MACH_TYPE_MXC27530EVB) - #else --# define machine_is_scma11evb() (0) -+# define machine_is_mxc27530evb() (0) - #endif - - #ifdef CONFIG_MACH_SMDK2800 -@@ -8297,16 +8622,16 @@ - # define machine_is_hrdisplay() (0) - #endif - --#ifdef CONFIG_MACH_SCMA11BB -+#ifdef CONFIG_MACH_MXC27530ADS - # ifdef machine_arch_type - # undef machine_arch_type - # define machine_arch_type __machine_arch_type - # else --# define machine_arch_type MACH_TYPE_SCMA11BB -+# define machine_arch_type MACH_TYPE_MXC27530ADS - # endif --# define machine_is_scma11bb() (machine_arch_type == MACH_TYPE_SCMA11BB) -+# define machine_is_mxc27530ads() (machine_arch_type == MACH_TYPE_MXC27530ADS) - #else --# define machine_is_scma11bb() (0) -+# define machine_is_mxc27530ads() (0) - #endif - - #ifdef CONFIG_MACH_TRIZEPS3 -@@ -9185,16 +9510,16 @@ - # define machine_is_hx2750() (0) - #endif - --#ifdef CONFIG_MACH_ZEUSEVB -+#ifdef CONFIG_MACH_MXC91131EVB - # ifdef machine_arch_type - # undef machine_arch_type - # define machine_arch_type __machine_arch_type - # else --# define machine_arch_type MACH_TYPE_ZEUSEVB -+# define machine_arch_type MACH_TYPE_MXC91131EVB - # endif --# define machine_is_zeusevb() (machine_arch_type == MACH_TYPE_ZEUSEVB) -+# define machine_is_mxc91131evb() (machine_arch_type == MACH_TYPE_MXC91131EVB) - #else --# define machine_is_zeusevb() (0) -+# define machine_is_mxc91131evb() (0) - #endif - - #ifdef CONFIG_MACH_P700 -@@ -9401,6 +9726,3906 @@ - # define machine_is_mp2usb() (0) - #endif - -+#ifdef CONFIG_MACH_NTNP425C -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_NTNP425C -+# endif -+# define machine_is_ntnp425c() (machine_arch_type == MACH_TYPE_NTNP425C) -+#else -+# define machine_is_ntnp425c() (0) -+#endif -+ -+#ifdef CONFIG_MACH_COLIBRI -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_COLIBRI -+# endif -+# define machine_is_colibri() (machine_arch_type == MACH_TYPE_COLIBRI) -+#else -+# define machine_is_colibri() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PCM7220 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PCM7220 -+# endif -+# define machine_is_pcm7220() (machine_arch_type == MACH_TYPE_PCM7220) -+#else -+# define machine_is_pcm7220() (0) -+#endif -+ -+#ifdef CONFIG_MACH_GATEWAY7001 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_GATEWAY7001 -+# endif -+# define machine_is_gateway7001() (machine_arch_type == MACH_TYPE_GATEWAY7001) -+#else -+# define machine_is_gateway7001() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PCM027 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PCM027 -+# endif -+# define machine_is_pcm027() (machine_arch_type == MACH_TYPE_PCM027) -+#else -+# define machine_is_pcm027() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CMPXA -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CMPXA -+# endif -+# define machine_is_cmpxa() (machine_arch_type == MACH_TYPE_CMPXA) -+#else -+# define machine_is_cmpxa() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ANUBIS -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ANUBIS -+# endif -+# define machine_is_anubis() (machine_arch_type == MACH_TYPE_ANUBIS) -+#else -+# define machine_is_anubis() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ITE8152 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ITE8152 -+# endif -+# define machine_is_ite8152() (machine_arch_type == MACH_TYPE_ITE8152) -+#else -+# define machine_is_ite8152() (0) -+#endif -+ -+#ifdef CONFIG_MACH_LPC3XXX -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_LPC3XXX -+# endif -+# define machine_is_lpc3xxx() (machine_arch_type == MACH_TYPE_LPC3XXX) -+#else -+# define machine_is_lpc3xxx() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PUPPETEER -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PUPPETEER -+# endif -+# define machine_is_puppeteer() (machine_arch_type == MACH_TYPE_PUPPETEER) -+#else -+# define machine_is_puppeteer() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MACH_VADATECH -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MACH_VADATECH -+# endif -+# define machine_is_vt001() (machine_arch_type == MACH_TYPE_MACH_VADATECH) -+#else -+# define machine_is_vt001() (0) -+#endif -+ -+#ifdef CONFIG_MACH_E570 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_E570 -+# endif -+# define machine_is_e570() (machine_arch_type == MACH_TYPE_E570) -+#else -+# define machine_is_e570() (0) -+#endif -+ -+#ifdef CONFIG_MACH_X50 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_X50 -+# endif -+# define machine_is_x50() (machine_arch_type == MACH_TYPE_X50) -+#else -+# define machine_is_x50() (0) -+#endif -+ -+#ifdef CONFIG_MACH_RECON -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_RECON -+# endif -+# define machine_is_recon() (machine_arch_type == MACH_TYPE_RECON) -+#else -+# define machine_is_recon() (0) -+#endif -+ -+#ifdef CONFIG_MACH_XBOARDGP8 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_XBOARDGP8 -+# endif -+# define machine_is_xboardgp8() (machine_arch_type == MACH_TYPE_XBOARDGP8) -+#else -+# define machine_is_xboardgp8() (0) -+#endif -+ -+#ifdef CONFIG_MACH_FPIC2 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_FPIC2 -+# endif -+# define machine_is_fpic2() (machine_arch_type == MACH_TYPE_FPIC2) -+#else -+# define machine_is_fpic2() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AKITA -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AKITA -+# endif -+# define machine_is_akita() (machine_arch_type == MACH_TYPE_AKITA) -+#else -+# define machine_is_akita() (0) -+#endif -+ -+#ifdef CONFIG_MACH_A81 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_A81 -+# endif -+# define machine_is_a81() (machine_arch_type == MACH_TYPE_A81) -+#else -+# define machine_is_a81() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SVM_SC25X -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SVM_SC25X -+# endif -+# define machine_is_svm_sc25x() (machine_arch_type == MACH_TYPE_SVM_SC25X) -+#else -+# define machine_is_svm_sc25x() (0) -+#endif -+ -+#ifdef CONFIG_MACH_VADATECH020 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_VADATECH020 -+# endif -+# define machine_is_vt020() (machine_arch_type == MACH_TYPE_VADATECH020) -+#else -+# define machine_is_vt020() (0) -+#endif -+ -+#ifdef CONFIG_MACH_TLI -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_TLI -+# endif -+# define machine_is_tli() (machine_arch_type == MACH_TYPE_TLI) -+#else -+# define machine_is_tli() (0) -+#endif -+ -+#ifdef CONFIG_MACH_EDB9315LC -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_EDB9315LC -+# endif -+# define machine_is_edb9315lc() (machine_arch_type == MACH_TYPE_EDB9315LC) -+#else -+# define machine_is_edb9315lc() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PASSEC -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PASSEC -+# endif -+# define machine_is_passec() (machine_arch_type == MACH_TYPE_PASSEC) -+#else -+# define machine_is_passec() (0) -+#endif -+ -+#ifdef CONFIG_MACH_DS_TIGER -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_DS_TIGER -+# endif -+# define machine_is_ds_tiger() (machine_arch_type == MACH_TYPE_DS_TIGER) -+#else -+# define machine_is_ds_tiger() (0) -+#endif -+ -+#ifdef CONFIG_MACH_E310 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_E310 -+# endif -+# define machine_is_e310() (machine_arch_type == MACH_TYPE_E310) -+#else -+# define machine_is_e310() (0) -+#endif -+ -+#ifdef CONFIG_MACH_E330 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_E330 -+# endif -+# define machine_is_e330() (machine_arch_type == MACH_TYPE_E330) -+#else -+# define machine_is_e330() (0) -+#endif -+ -+#ifdef CONFIG_MACH_RT3000 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_RT3000 -+# endif -+# define machine_is_rt3000() (machine_arch_type == MACH_TYPE_RT3000) -+#else -+# define machine_is_rt3000() (0) -+#endif -+ -+#ifdef CONFIG_MACH_NOKIA770 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_NOKIA770 -+# endif -+# define machine_is_nokia770() (machine_arch_type == MACH_TYPE_NOKIA770) -+#else -+# define machine_is_nokia770() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PNX0106 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PNX0106 -+# endif -+# define machine_is_pnx0106() (machine_arch_type == MACH_TYPE_PNX0106) -+#else -+# define machine_is_pnx0106() (0) -+#endif -+ -+#ifdef CONFIG_MACH_HX21XX -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_HX21XX -+# endif -+# define machine_is_hx21xx() (machine_arch_type == MACH_TYPE_HX21XX) -+#else -+# define machine_is_hx21xx() (0) -+#endif -+ -+#ifdef CONFIG_MACH_FARADAY -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_FARADAY -+# endif -+# define machine_is_faraday() (machine_arch_type == MACH_TYPE_FARADAY) -+#else -+# define machine_is_faraday() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SBC9312 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SBC9312 -+# endif -+# define machine_is_sbc9312() (machine_arch_type == MACH_TYPE_SBC9312) -+#else -+# define machine_is_sbc9312() (0) -+#endif -+ -+#ifdef CONFIG_MACH_BATMAN -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_BATMAN -+# endif -+# define machine_is_batman() (machine_arch_type == MACH_TYPE_BATMAN) -+#else -+# define machine_is_batman() (0) -+#endif -+ -+#ifdef CONFIG_MACH_JPD201 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_JPD201 -+# endif -+# define machine_is_jpd201() (machine_arch_type == MACH_TYPE_JPD201) -+#else -+# define machine_is_jpd201() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MIPSA -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MIPSA -+# endif -+# define machine_is_mipsa() (machine_arch_type == MACH_TYPE_MIPSA) -+#else -+# define machine_is_mipsa() (0) -+#endif -+ -+#ifdef CONFIG_MACH_KACOM -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_KACOM -+# endif -+# define machine_is_kacom() (machine_arch_type == MACH_TYPE_KACOM) -+#else -+# define machine_is_kacom() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SWARCOCPU -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SWARCOCPU -+# endif -+# define machine_is_swarcocpu() (machine_arch_type == MACH_TYPE_SWARCOCPU) -+#else -+# define machine_is_swarcocpu() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SWARCODSL -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SWARCODSL -+# endif -+# define machine_is_swarcodsl() (machine_arch_type == MACH_TYPE_SWARCODSL) -+#else -+# define machine_is_swarcodsl() (0) -+#endif -+ -+#ifdef CONFIG_MACH_BLUEANGEL -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_BLUEANGEL -+# endif -+# define machine_is_blueangel() (machine_arch_type == MACH_TYPE_BLUEANGEL) -+#else -+# define machine_is_blueangel() (0) -+#endif -+ -+#ifdef CONFIG_MACH_HAIRYGRAMA -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_HAIRYGRAMA -+# endif -+# define machine_is_hairygrama() (machine_arch_type == MACH_TYPE_HAIRYGRAMA) -+#else -+# define machine_is_hairygrama() (0) -+#endif -+ -+#ifdef CONFIG_MACH_BANFF -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_BANFF -+# endif -+# define machine_is_banff() (machine_arch_type == MACH_TYPE_BANFF) -+#else -+# define machine_is_banff() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CARMEVA -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CARMEVA -+# endif -+# define machine_is_carmeva() (machine_arch_type == MACH_TYPE_CARMEVA) -+#else -+# define machine_is_carmeva() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SAM255 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SAM255 -+# endif -+# define machine_is_sam255() (machine_arch_type == MACH_TYPE_SAM255) -+#else -+# define machine_is_sam255() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PPM10 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PPM10 -+# endif -+# define machine_is_ppm10() (machine_arch_type == MACH_TYPE_PPM10) -+#else -+# define machine_is_ppm10() (0) -+#endif -+ -+#ifdef CONFIG_MACH_EDB9315A -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_EDB9315A -+# endif -+# define machine_is_edb9315a() (machine_arch_type == MACH_TYPE_EDB9315A) -+#else -+# define machine_is_edb9315a() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SUNSET -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SUNSET -+# endif -+# define machine_is_sunset() (machine_arch_type == MACH_TYPE_SUNSET) -+#else -+# define machine_is_sunset() (0) -+#endif -+ -+#ifdef CONFIG_MACH_STARGATE2 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_STARGATE2 -+# endif -+# define machine_is_stargate2() (machine_arch_type == MACH_TYPE_STARGATE2) -+#else -+# define machine_is_stargate2() (0) -+#endif -+ -+#ifdef CONFIG_MACH_INTELMOTE2 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_INTELMOTE2 -+# endif -+# define machine_is_intelmote2() (machine_arch_type == MACH_TYPE_INTELMOTE2) -+#else -+# define machine_is_intelmote2() (0) -+#endif -+ -+#ifdef CONFIG_MACH_TRIZEPS4 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_TRIZEPS4 -+# endif -+# define machine_is_trizeps4() (machine_arch_type == MACH_TYPE_TRIZEPS4) -+#else -+# define machine_is_trizeps4() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MAINSTONE2 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MAINSTONE2 -+# endif -+# define machine_is_mainstone2() (machine_arch_type == MACH_TYPE_MAINSTONE2) -+#else -+# define machine_is_mainstone2() (0) -+#endif -+ -+#ifdef CONFIG_MACH_EZ_IXP42X -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_EZ_IXP42X -+# endif -+# define machine_is_ez_ixp42x() (machine_arch_type == MACH_TYPE_EZ_IXP42X) -+#else -+# define machine_is_ez_ixp42x() (0) -+#endif -+ -+#ifdef CONFIG_MACH_TAPWAVE_ZODIAC -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_TAPWAVE_ZODIAC -+# endif -+# define machine_is_tapwave_zodiac() (machine_arch_type == MACH_TYPE_TAPWAVE_ZODIAC) -+#else -+# define machine_is_tapwave_zodiac() (0) -+#endif -+ -+#ifdef CONFIG_MACH_UNIVERSALMETER -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_UNIVERSALMETER -+# endif -+# define machine_is_universalmeter() (machine_arch_type == MACH_TYPE_UNIVERSALMETER) -+#else -+# define machine_is_universalmeter() (0) -+#endif -+ -+#ifdef CONFIG_MACH_HICOARM9 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_HICOARM9 -+# endif -+# define machine_is_hicoarm9() (machine_arch_type == MACH_TYPE_HICOARM9) -+#else -+# define machine_is_hicoarm9() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PNX4008 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PNX4008 -+# endif -+# define machine_is_pnx4008() (machine_arch_type == MACH_TYPE_PNX4008) -+#else -+# define machine_is_pnx4008() (0) -+#endif -+ -+#ifdef CONFIG_MACH_KWS6000 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_KWS6000 -+# endif -+# define machine_is_kws6000() (machine_arch_type == MACH_TYPE_KWS6000) -+#else -+# define machine_is_kws6000() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PORTUX920T -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PORTUX920T -+# endif -+# define machine_is_portux920t() (machine_arch_type == MACH_TYPE_PORTUX920T) -+#else -+# define machine_is_portux920t() (0) -+#endif -+ -+#ifdef CONFIG_MACH_EZ_X5 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_EZ_X5 -+# endif -+# define machine_is_ez_x5() (machine_arch_type == MACH_TYPE_EZ_X5) -+#else -+# define machine_is_ez_x5() (0) -+#endif -+ -+#ifdef CONFIG_MACH_OMAP_RUDOLPH -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_OMAP_RUDOLPH -+# endif -+# define machine_is_omap_rudolph() (machine_arch_type == MACH_TYPE_OMAP_RUDOLPH) -+#else -+# define machine_is_omap_rudolph() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CPUAT91 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CPUAT91 -+# endif -+# define machine_is_cpuat91() (machine_arch_type == MACH_TYPE_CPUAT91) -+#else -+# define machine_is_cpuat91() (0) -+#endif -+ -+#ifdef CONFIG_MACH_REA9200 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_REA9200 -+# endif -+# define machine_is_rea9200() (machine_arch_type == MACH_TYPE_REA9200) -+#else -+# define machine_is_rea9200() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ACTS_PUNE_SA1110 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ACTS_PUNE_SA1110 -+# endif -+# define machine_is_acts_pune_sa1110() (machine_arch_type == MACH_TYPE_ACTS_PUNE_SA1110) -+#else -+# define machine_is_acts_pune_sa1110() (0) -+#endif -+ -+#ifdef CONFIG_MACH_IXP425 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_IXP425 -+# endif -+# define machine_is_ixp425() (machine_arch_type == MACH_TYPE_IXP425) -+#else -+# define machine_is_ixp425() (0) -+#endif -+ -+#ifdef CONFIG_MACH_I30030ADS -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_I30030ADS -+# endif -+# define machine_is_i30030ads() (machine_arch_type == MACH_TYPE_I30030ADS) -+#else -+# define machine_is_i30030ads() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PERCH -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PERCH -+# endif -+# define machine_is_perch() (machine_arch_type == MACH_TYPE_PERCH) -+#else -+# define machine_is_perch() (0) -+#endif -+ -+#ifdef CONFIG_MACH_EIS05R1 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_EIS05R1 -+# endif -+# define machine_is_eis05r1() (machine_arch_type == MACH_TYPE_EIS05R1) -+#else -+# define machine_is_eis05r1() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PEPPERPAD -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PEPPERPAD -+# endif -+# define machine_is_pepperpad() (machine_arch_type == MACH_TYPE_PEPPERPAD) -+#else -+# define machine_is_pepperpad() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SB3010 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SB3010 -+# endif -+# define machine_is_sb3010() (machine_arch_type == MACH_TYPE_SB3010) -+#else -+# define machine_is_sb3010() (0) -+#endif -+ -+#ifdef CONFIG_MACH_RM9200 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_RM9200 -+# endif -+# define machine_is_rm9200() (machine_arch_type == MACH_TYPE_RM9200) -+#else -+# define machine_is_rm9200() (0) -+#endif -+ -+#ifdef CONFIG_MACH_DMA03 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_DMA03 -+# endif -+# define machine_is_dma03() (machine_arch_type == MACH_TYPE_DMA03) -+#else -+# define machine_is_dma03() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ROAD_S101 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ROAD_S101 -+# endif -+# define machine_is_road_s101() (machine_arch_type == MACH_TYPE_ROAD_S101) -+#else -+# define machine_is_road_s101() (0) -+#endif -+ -+#ifdef CONFIG_MACH_IQ_NEXTGEN_A -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_IQ_NEXTGEN_A -+# endif -+# define machine_is_iq_nextgen_a() (machine_arch_type == MACH_TYPE_IQ_NEXTGEN_A) -+#else -+# define machine_is_iq_nextgen_a() (0) -+#endif -+ -+#ifdef CONFIG_MACH_IQ_NEXTGEN_B -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_IQ_NEXTGEN_B -+# endif -+# define machine_is_iq_nextgen_b() (machine_arch_type == MACH_TYPE_IQ_NEXTGEN_B) -+#else -+# define machine_is_iq_nextgen_b() (0) -+#endif -+ -+#ifdef CONFIG_MACH_IQ_NEXTGEN_C -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_IQ_NEXTGEN_C -+# endif -+# define machine_is_iq_nextgen_c() (machine_arch_type == MACH_TYPE_IQ_NEXTGEN_C) -+#else -+# define machine_is_iq_nextgen_c() (0) -+#endif -+ -+#ifdef CONFIG_MACH_IQ_NEXTGEN_D -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_IQ_NEXTGEN_D -+# endif -+# define machine_is_iq_nextgen_d() (machine_arch_type == MACH_TYPE_IQ_NEXTGEN_D) -+#else -+# define machine_is_iq_nextgen_d() (0) -+#endif -+ -+#ifdef CONFIG_MACH_IQ_NEXTGEN_E -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_IQ_NEXTGEN_E -+# endif -+# define machine_is_iq_nextgen_e() (machine_arch_type == MACH_TYPE_IQ_NEXTGEN_E) -+#else -+# define machine_is_iq_nextgen_e() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MALLOW_AT91 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MALLOW_AT91 -+# endif -+# define machine_is_mallow_at91() (machine_arch_type == MACH_TYPE_MALLOW_AT91) -+#else -+# define machine_is_mallow_at91() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CYBERTRACKER_I -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CYBERTRACKER_I -+# endif -+# define machine_is_cybertracker_i() (machine_arch_type == MACH_TYPE_CYBERTRACKER_I) -+#else -+# define machine_is_cybertracker_i() (0) -+#endif -+ -+#ifdef CONFIG_MACH_GESBC931X -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_GESBC931X -+# endif -+# define machine_is_gesbc931x() (machine_arch_type == MACH_TYPE_GESBC931X) -+#else -+# define machine_is_gesbc931x() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CENTIPAD -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CENTIPAD -+# endif -+# define machine_is_centipad() (machine_arch_type == MACH_TYPE_CENTIPAD) -+#else -+# define machine_is_centipad() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ARMSOC -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ARMSOC -+# endif -+# define machine_is_armsoc() (machine_arch_type == MACH_TYPE_ARMSOC) -+#else -+# define machine_is_armsoc() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SE4200 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SE4200 -+# endif -+# define machine_is_se4200() (machine_arch_type == MACH_TYPE_SE4200) -+#else -+# define machine_is_se4200() (0) -+#endif -+ -+#ifdef CONFIG_MACH_EMS197A -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_EMS197A -+# endif -+# define machine_is_ems197a() (machine_arch_type == MACH_TYPE_EMS197A) -+#else -+# define machine_is_ems197a() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MICRO9 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MICRO9 -+# endif -+# define machine_is_micro9() (machine_arch_type == MACH_TYPE_MICRO9) -+#else -+# define machine_is_micro9() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MICRO9L -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MICRO9L -+# endif -+# define machine_is_micro9l() (machine_arch_type == MACH_TYPE_MICRO9L) -+#else -+# define machine_is_micro9l() (0) -+#endif -+ -+#ifdef CONFIG_MACH_UC5471DSP -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_UC5471DSP -+# endif -+# define machine_is_uc5471dsp() (machine_arch_type == MACH_TYPE_UC5471DSP) -+#else -+# define machine_is_uc5471dsp() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SJ5471ENG -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SJ5471ENG -+# endif -+# define machine_is_sj5471eng() (machine_arch_type == MACH_TYPE_SJ5471ENG) -+#else -+# define machine_is_sj5471eng() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CMPXA26X -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CMPXA26X -+# endif -+# define machine_is_none() (machine_arch_type == MACH_TYPE_CMPXA26X) -+#else -+# define machine_is_none() (0) -+#endif -+ -+#ifdef CONFIG_MACH_NC -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_NC -+# endif -+# define machine_is_nc1() (machine_arch_type == MACH_TYPE_NC) -+#else -+# define machine_is_nc1() (0) -+#endif -+ -+#ifdef CONFIG_MACH_OMAP_PALMTE -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_OMAP_PALMTE -+# endif -+# define machine_is_omap_palmte() (machine_arch_type == MACH_TYPE_OMAP_PALMTE) -+#else -+# define machine_is_omap_palmte() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AJAX52X -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AJAX52X -+# endif -+# define machine_is_ajax52x() (machine_arch_type == MACH_TYPE_AJAX52X) -+#else -+# define machine_is_ajax52x() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SIRIUSTAR -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SIRIUSTAR -+# endif -+# define machine_is_siriustar() (machine_arch_type == MACH_TYPE_SIRIUSTAR) -+#else -+# define machine_is_siriustar() (0) -+#endif -+ -+#ifdef CONFIG_MACH_IODATA_HDLG -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_IODATA_HDLG -+# endif -+# define machine_is_iodata_hdlg() (machine_arch_type == MACH_TYPE_IODATA_HDLG) -+#else -+# define machine_is_iodata_hdlg() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AT91RM9200UTL -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AT91RM9200UTL -+# endif -+# define machine_is_at91rm9200utl() (machine_arch_type == MACH_TYPE_AT91RM9200UTL) -+#else -+# define machine_is_at91rm9200utl() (0) -+#endif -+ -+#ifdef CONFIG_MACH_BIOSAFE -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_BIOSAFE -+# endif -+# define machine_is_biosafe() (machine_arch_type == MACH_TYPE_BIOSAFE) -+#else -+# define machine_is_biosafe() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MP1000 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MP1000 -+# endif -+# define machine_is_mp1000() (machine_arch_type == MACH_TYPE_MP1000) -+#else -+# define machine_is_mp1000() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PARSY -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PARSY -+# endif -+# define machine_is_parsy() (machine_arch_type == MACH_TYPE_PARSY) -+#else -+# define machine_is_parsy() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CCXP -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CCXP -+# endif -+# define machine_is_ccxp270() (machine_arch_type == MACH_TYPE_CCXP) -+#else -+# define machine_is_ccxp270() (0) -+#endif -+ -+#ifdef CONFIG_MACH_OMAP_GSAMPLE -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_OMAP_GSAMPLE -+# endif -+# define machine_is_omap_gsample() (machine_arch_type == MACH_TYPE_OMAP_GSAMPLE) -+#else -+# define machine_is_omap_gsample() (0) -+#endif -+ -+#ifdef CONFIG_MACH_REALVIEW_EB -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_REALVIEW_EB -+# endif -+# define machine_is_realview_eb() (machine_arch_type == MACH_TYPE_REALVIEW_EB) -+#else -+# define machine_is_realview_eb() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SAMOA -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SAMOA -+# endif -+# define machine_is_samoa() (machine_arch_type == MACH_TYPE_SAMOA) -+#else -+# define machine_is_samoa() (0) -+#endif -+ -+#ifdef CONFIG_MACH_T3XSCALE -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_T3XSCALE -+# endif -+# define machine_is_t3xscale() (machine_arch_type == MACH_TYPE_T3XSCALE) -+#else -+# define machine_is_t3xscale() (0) -+#endif -+ -+#ifdef CONFIG_MACH_I878 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_I878 -+# endif -+# define machine_is_i878() (machine_arch_type == MACH_TYPE_I878) -+#else -+# define machine_is_i878() (0) -+#endif -+ -+#ifdef CONFIG_MACH_BORZOI -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_BORZOI -+# endif -+# define machine_is_borzoi() (machine_arch_type == MACH_TYPE_BORZOI) -+#else -+# define machine_is_borzoi() (0) -+#endif -+ -+#ifdef CONFIG_MACH_GECKO -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_GECKO -+# endif -+# define machine_is_gecko() (machine_arch_type == MACH_TYPE_GECKO) -+#else -+# define machine_is_gecko() (0) -+#endif -+ -+#ifdef CONFIG_MACH_DS101 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_DS101 -+# endif -+# define machine_is_ds101() (machine_arch_type == MACH_TYPE_DS101) -+#else -+# define machine_is_ds101() (0) -+#endif -+ -+#ifdef CONFIG_MACH_OMAP_PALMTT2 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_OMAP_PALMTT2 -+# endif -+# define machine_is_omap_palmtt2() (machine_arch_type == MACH_TYPE_OMAP_PALMTT2) -+#else -+# define machine_is_omap_palmtt2() (0) -+#endif -+ -+#ifdef CONFIG_MACH_XSCALE_PALMLD -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_XSCALE_PALMLD -+# endif -+# define machine_is_xscale_palmld() (machine_arch_type == MACH_TYPE_XSCALE_PALMLD) -+#else -+# define machine_is_xscale_palmld() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CC9C -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CC9C -+# endif -+# define machine_is_cc9c() (machine_arch_type == MACH_TYPE_CC9C) -+#else -+# define machine_is_cc9c() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SBC1670 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SBC1670 -+# endif -+# define machine_is_sbc1670() (machine_arch_type == MACH_TYPE_SBC1670) -+#else -+# define machine_is_sbc1670() (0) -+#endif -+ -+#ifdef CONFIG_MACH_IXDP28X5 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_IXDP28X5 -+# endif -+# define machine_is_ixdp28x5() (machine_arch_type == MACH_TYPE_IXDP28X5) -+#else -+# define machine_is_ixdp28x5() (0) -+#endif -+ -+#ifdef CONFIG_MACH_OMAP_PALMTT -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_OMAP_PALMTT -+# endif -+# define machine_is_omap_palmtt() (machine_arch_type == MACH_TYPE_OMAP_PALMTT) -+#else -+# define machine_is_omap_palmtt() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ML696K -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ML696K -+# endif -+# define machine_is_ml696k() (machine_arch_type == MACH_TYPE_ML696K) -+#else -+# define machine_is_ml696k() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ARCOM_ZEUS -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ARCOM_ZEUS -+# endif -+# define machine_is_arcom_zeus() (machine_arch_type == MACH_TYPE_ARCOM_ZEUS) -+#else -+# define machine_is_arcom_zeus() (0) -+#endif -+ -+#ifdef CONFIG_MACH_OSIRIS -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_OSIRIS -+# endif -+# define machine_is_osiris() (machine_arch_type == MACH_TYPE_OSIRIS) -+#else -+# define machine_is_osiris() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MAESTRO -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MAESTRO -+# endif -+# define machine_is_maestro() (machine_arch_type == MACH_TYPE_MAESTRO) -+#else -+# define machine_is_maestro() (0) -+#endif -+ -+#ifdef CONFIG_MACH_TUNGE2 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_TUNGE2 -+# endif -+# define machine_is_tunge2() (machine_arch_type == MACH_TYPE_TUNGE2) -+#else -+# define machine_is_tunge2() (0) -+#endif -+ -+#ifdef CONFIG_MACH_IXBBM -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_IXBBM -+# endif -+# define machine_is_ixbbm() (machine_arch_type == MACH_TYPE_IXBBM) -+#else -+# define machine_is_ixbbm() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MX27 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MX27 -+# endif -+# define machine_is_mx27ads() (machine_arch_type == MACH_TYPE_MX27) -+#else -+# define machine_is_mx27ads() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AX8004 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AX8004 -+# endif -+# define machine_is_ax8004() (machine_arch_type == MACH_TYPE_AX8004) -+#else -+# define machine_is_ax8004() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AT91SAM9261EK -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AT91SAM9261EK -+# endif -+# define machine_is_at91sam9261ek() (machine_arch_type == MACH_TYPE_AT91SAM9261EK) -+#else -+# define machine_is_at91sam9261ek() (0) -+#endif -+ -+#ifdef CONFIG_MACH_LOFT -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_LOFT -+# endif -+# define machine_is_loft() (machine_arch_type == MACH_TYPE_LOFT) -+#else -+# define machine_is_loft() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MAGPIE -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MAGPIE -+# endif -+# define machine_is_magpie() (machine_arch_type == MACH_TYPE_MAGPIE) -+#else -+# define machine_is_magpie() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MX21 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MX21 -+# endif -+# define machine_is_mx21ads() (machine_arch_type == MACH_TYPE_MX21) -+#else -+# define machine_is_mx21ads() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MB87M3400 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MB87M3400 -+# endif -+# define machine_is_mb87m3400() (machine_arch_type == MACH_TYPE_MB87M3400) -+#else -+# define machine_is_mb87m3400() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MGUARD_DELTA -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MGUARD_DELTA -+# endif -+# define machine_is_mguard_delta() (machine_arch_type == MACH_TYPE_MGUARD_DELTA) -+#else -+# define machine_is_mguard_delta() (0) -+#endif -+ -+#ifdef CONFIG_MACH_DAVINCI_DVDP -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_DAVINCI_DVDP -+# endif -+# define machine_is_davinci_dvdp() (machine_arch_type == MACH_TYPE_DAVINCI_DVDP) -+#else -+# define machine_is_davinci_dvdp() (0) -+#endif -+ -+#ifdef CONFIG_MACH_HTCUNIVERSAL -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_HTCUNIVERSAL -+# endif -+# define machine_is_htcuniversal() (machine_arch_type == MACH_TYPE_HTCUNIVERSAL) -+#else -+# define machine_is_htcuniversal() (0) -+#endif -+ -+#ifdef CONFIG_MACH_TPAD -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_TPAD -+# endif -+# define machine_is_tpad() (machine_arch_type == MACH_TYPE_TPAD) -+#else -+# define machine_is_tpad() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ROVERP3 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ROVERP3 -+# endif -+# define machine_is_roverp3() (machine_arch_type == MACH_TYPE_ROVERP3) -+#else -+# define machine_is_roverp3() (0) -+#endif -+ -+#ifdef CONFIG_MACH_JORNADA928 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_JORNADA928 -+# endif -+# define machine_is_jornada928() (machine_arch_type == MACH_TYPE_JORNADA928) -+#else -+# define machine_is_jornada928() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MV88FXX81 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MV88FXX81 -+# endif -+# define machine_is_mv88fxx81() (machine_arch_type == MACH_TYPE_MV88FXX81) -+#else -+# define machine_is_mv88fxx81() (0) -+#endif -+ -+#ifdef CONFIG_MACH_STMP36XX -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_STMP36XX -+# endif -+# define machine_is_stmp36xx() (machine_arch_type == MACH_TYPE_STMP36XX) -+#else -+# define machine_is_stmp36xx() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SXNI79524 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SXNI79524 -+# endif -+# define machine_is_sxni79524() (machine_arch_type == MACH_TYPE_SXNI79524) -+#else -+# define machine_is_sxni79524() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AMS_DELTA -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AMS_DELTA -+# endif -+# define machine_is_ams_delta() (machine_arch_type == MACH_TYPE_AMS_DELTA) -+#else -+# define machine_is_ams_delta() (0) -+#endif -+ -+#ifdef CONFIG_MACH_URANIUM -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_URANIUM -+# endif -+# define machine_is_uranium() (machine_arch_type == MACH_TYPE_URANIUM) -+#else -+# define machine_is_uranium() (0) -+#endif -+ -+#ifdef CONFIG_MACH_UCON -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_UCON -+# endif -+# define machine_is_ucon() (machine_arch_type == MACH_TYPE_UCON) -+#else -+# define machine_is_ucon() (0) -+#endif -+ -+#ifdef CONFIG_MACH_NAS100D -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_NAS100D -+# endif -+# define machine_is_nas100d() (machine_arch_type == MACH_TYPE_NAS100D) -+#else -+# define machine_is_nas100d() (0) -+#endif -+ -+#ifdef CONFIG_MACH_L083_1000 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_L083_1000 -+# endif -+# define machine_is_l083() (machine_arch_type == MACH_TYPE_L083_1000) -+#else -+# define machine_is_l083() (0) -+#endif -+ -+#ifdef CONFIG_MACH_EZX -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_EZX -+# endif -+# define machine_is_ezx() (machine_arch_type == MACH_TYPE_EZX) -+#else -+# define machine_is_ezx() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PNX5220 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PNX5220 -+# endif -+# define machine_is_pnx5220() (machine_arch_type == MACH_TYPE_PNX5220) -+#else -+# define machine_is_pnx5220() (0) -+#endif -+ -+#ifdef CONFIG_MACH_BUTTE -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_BUTTE -+# endif -+# define machine_is_butte() (machine_arch_type == MACH_TYPE_BUTTE) -+#else -+# define machine_is_butte() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SRM2 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SRM2 -+# endif -+# define machine_is_srm2() (machine_arch_type == MACH_TYPE_SRM2) -+#else -+# define machine_is_srm2() (0) -+#endif -+ -+#ifdef CONFIG_MACH_DSBR -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_DSBR -+# endif -+# define machine_is_dsbr() (machine_arch_type == MACH_TYPE_DSBR) -+#else -+# define machine_is_dsbr() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CRYSTALBALL -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CRYSTALBALL -+# endif -+# define machine_is_crystalball() (machine_arch_type == MACH_TYPE_CRYSTALBALL) -+#else -+# define machine_is_crystalball() (0) -+#endif -+ -+#ifdef CONFIG_MACH_TINYPXA27X -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_TINYPXA27X -+# endif -+# define machine_is_tinypxa27x() (machine_arch_type == MACH_TYPE_TINYPXA27X) -+#else -+# define machine_is_tinypxa27x() (0) -+#endif -+ -+#ifdef CONFIG_MACH_HERBIE -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_HERBIE -+# endif -+# define machine_is_herbie() (machine_arch_type == MACH_TYPE_HERBIE) -+#else -+# define machine_is_herbie() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MAGICIAN -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MAGICIAN -+# endif -+# define machine_is_magician() (machine_arch_type == MACH_TYPE_MAGICIAN) -+#else -+# define machine_is_magician() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CM4002 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CM4002 -+# endif -+# define machine_is_cm4002() (machine_arch_type == MACH_TYPE_CM4002) -+#else -+# define machine_is_cm4002() (0) -+#endif -+ -+#ifdef CONFIG_MACH_B4 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_B4 -+# endif -+# define machine_is_b4() (machine_arch_type == MACH_TYPE_B4) -+#else -+# define machine_is_b4() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MAUI -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MAUI -+# endif -+# define machine_is_maui() (machine_arch_type == MACH_TYPE_MAUI) -+#else -+# define machine_is_maui() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CYBERTRACKER_G -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CYBERTRACKER_G -+# endif -+# define machine_is_cybertracker_g() (machine_arch_type == MACH_TYPE_CYBERTRACKER_G) -+#else -+# define machine_is_cybertracker_g() (0) -+#endif -+ -+#ifdef CONFIG_MACH_NXDKN -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_NXDKN -+# endif -+# define machine_is_nxdkn() (machine_arch_type == MACH_TYPE_NXDKN) -+#else -+# define machine_is_nxdkn() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MIO8390 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MIO8390 -+# endif -+# define machine_is_mio8390() (machine_arch_type == MACH_TYPE_MIO8390) -+#else -+# define machine_is_mio8390() (0) -+#endif -+ -+#ifdef CONFIG_MACH_OMI_BOARD -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_OMI_BOARD -+# endif -+# define machine_is_omi_board() (machine_arch_type == MACH_TYPE_OMI_BOARD) -+#else -+# define machine_is_omi_board() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MX21CIV -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MX21CIV -+# endif -+# define machine_is_mx21civ() (machine_arch_type == MACH_TYPE_MX21CIV) -+#else -+# define machine_is_mx21civ() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MAHI_CDAC -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MAHI_CDAC -+# endif -+# define machine_is_mahi_cdac() (machine_arch_type == MACH_TYPE_MAHI_CDAC) -+#else -+# define machine_is_mahi_cdac() (0) -+#endif -+ -+#ifdef CONFIG_MACH_XSCALE_PALMTX -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_XSCALE_PALMTX -+# endif -+# define machine_is_xscale_palmtx() (machine_arch_type == MACH_TYPE_XSCALE_PALMTX) -+#else -+# define machine_is_xscale_palmtx() (0) -+#endif -+ -+#ifdef CONFIG_MACH_S3C2413 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_S3C2413 -+# endif -+# define machine_is_s3c2413() (machine_arch_type == MACH_TYPE_S3C2413) -+#else -+# define machine_is_s3c2413() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SAMSYS_EP0 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SAMSYS_EP0 -+# endif -+# define machine_is_samsys_ep0() (machine_arch_type == MACH_TYPE_SAMSYS_EP0) -+#else -+# define machine_is_samsys_ep0() (0) -+#endif -+ -+#ifdef CONFIG_MACH_WG302V1 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_WG302V1 -+# endif -+# define machine_is_wg302v1() (machine_arch_type == MACH_TYPE_WG302V1) -+#else -+# define machine_is_wg302v1() (0) -+#endif -+ -+#ifdef CONFIG_MACH_WG302V2 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_WG302V2 -+# endif -+# define machine_is_wg302v2() (machine_arch_type == MACH_TYPE_WG302V2) -+#else -+# define machine_is_wg302v2() (0) -+#endif -+ -+#ifdef CONFIG_MACH_EB42X -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_EB42X -+# endif -+# define machine_is_eb42x() (machine_arch_type == MACH_TYPE_EB42X) -+#else -+# define machine_is_eb42x() (0) -+#endif -+ -+#ifdef CONFIG_MACH_IQ331ES -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_IQ331ES -+# endif -+# define machine_is_iq331es() (machine_arch_type == MACH_TYPE_IQ331ES) -+#else -+# define machine_is_iq331es() (0) -+#endif -+ -+#ifdef CONFIG_MACH_COSYDSP -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_COSYDSP -+# endif -+# define machine_is_cosydsp() (machine_arch_type == MACH_TYPE_COSYDSP) -+#else -+# define machine_is_cosydsp() (0) -+#endif -+ -+#ifdef CONFIG_MACH_UPLAT7D -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_UPLAT7D -+# endif -+# define machine_is_uplat7d_proto() (machine_arch_type == MACH_TYPE_UPLAT7D) -+#else -+# define machine_is_uplat7d_proto() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PTDAVINCI -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PTDAVINCI -+# endif -+# define machine_is_ptdavinci() (machine_arch_type == MACH_TYPE_PTDAVINCI) -+#else -+# define machine_is_ptdavinci() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MBUS -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MBUS -+# endif -+# define machine_is_mbus() (machine_arch_type == MACH_TYPE_MBUS) -+#else -+# define machine_is_mbus() (0) -+#endif -+ -+#ifdef CONFIG_MACH_NADIA2VB -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_NADIA2VB -+# endif -+# define machine_is_nadia2vb() (machine_arch_type == MACH_TYPE_NADIA2VB) -+#else -+# define machine_is_nadia2vb() (0) -+#endif -+ -+#ifdef CONFIG_MACH_R1000 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_R1000 -+# endif -+# define machine_is_r1000() (machine_arch_type == MACH_TYPE_R1000) -+#else -+# define machine_is_r1000() (0) -+#endif -+ -+#ifdef CONFIG_MACH_HW90250 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_HW90250 -+# endif -+# define machine_is_hw90250() (machine_arch_type == MACH_TYPE_HW90250) -+#else -+# define machine_is_hw90250() (0) -+#endif -+ -+#ifdef CONFIG_MACH_OMAP_2430SDP -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_OMAP_2430SDP -+# endif -+# define machine_is_omap_2430sdp() (machine_arch_type == MACH_TYPE_OMAP_2430SDP) -+#else -+# define machine_is_omap_2430sdp() (0) -+#endif -+ -+#ifdef CONFIG_MACH_DAVINCI_EVM -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_DAVINCI_EVM -+# endif -+# define machine_is_davinci_evm() (machine_arch_type == MACH_TYPE_DAVINCI_EVM) -+#else -+# define machine_is_davinci_evm() (0) -+#endif -+ -+#ifdef CONFIG_MACH_OMAP_TORNADO -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_OMAP_TORNADO -+# endif -+# define machine_is_omap_tornado() (machine_arch_type == MACH_TYPE_OMAP_TORNADO) -+#else -+# define machine_is_omap_tornado() (0) -+#endif -+ -+#ifdef CONFIG_MACH_OLOCREEK -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_OLOCREEK -+# endif -+# define machine_is_olocreek() (machine_arch_type == MACH_TYPE_OLOCREEK) -+#else -+# define machine_is_olocreek() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PALMZ72 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PALMZ72 -+# endif -+# define machine_is_palmz72() (machine_arch_type == MACH_TYPE_PALMZ72) -+#else -+# define machine_is_palmz72() (0) -+#endif -+ -+#ifdef CONFIG_MACH_NXDB500 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_NXDB500 -+# endif -+# define machine_is_nxdb500() (machine_arch_type == MACH_TYPE_NXDB500) -+#else -+# define machine_is_nxdb500() (0) -+#endif -+ -+#ifdef CONFIG_MACH_APF9328 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_APF9328 -+# endif -+# define machine_is_apf9328() (machine_arch_type == MACH_TYPE_APF9328) -+#else -+# define machine_is_apf9328() (0) -+#endif -+ -+#ifdef CONFIG_MACH_OMAP_WIPOQ -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_OMAP_WIPOQ -+# endif -+# define machine_is_omap_wipoq() (machine_arch_type == MACH_TYPE_OMAP_WIPOQ) -+#else -+# define machine_is_omap_wipoq() (0) -+#endif -+ -+#ifdef CONFIG_MACH_OMAP_TWIP -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_OMAP_TWIP -+# endif -+# define machine_is_omap_twip() (machine_arch_type == MACH_TYPE_OMAP_TWIP) -+#else -+# define machine_is_omap_twip() (0) -+#endif -+ -+#ifdef CONFIG_MACH_XSCALE_PALMTREO650 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_XSCALE_PALMTREO650 -+# endif -+# define machine_is_xscale_treo650() (machine_arch_type == MACH_TYPE_XSCALE_PALMTREO650) -+#else -+# define machine_is_xscale_treo650() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ACUMEN -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ACUMEN -+# endif -+# define machine_is_acumen() (machine_arch_type == MACH_TYPE_ACUMEN) -+#else -+# define machine_is_acumen() (0) -+#endif -+ -+#ifdef CONFIG_MACH_XP100 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_XP100 -+# endif -+# define machine_is_xp100() (machine_arch_type == MACH_TYPE_XP100) -+#else -+# define machine_is_xp100() (0) -+#endif -+ -+#ifdef CONFIG_MACH_FS2410 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_FS2410 -+# endif -+# define machine_is_fs2410() (machine_arch_type == MACH_TYPE_FS2410) -+#else -+# define machine_is_fs2410() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PXA270_CERF -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PXA270_CERF -+# endif -+# define machine_is_pxa270_cerf() (machine_arch_type == MACH_TYPE_PXA270_CERF) -+#else -+# define machine_is_pxa270_cerf() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SQ2FTLPALM -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SQ2FTLPALM -+# endif -+# define machine_is_sq2ftlpalm() (machine_arch_type == MACH_TYPE_SQ2FTLPALM) -+#else -+# define machine_is_sq2ftlpalm() (0) -+#endif -+ -+#ifdef CONFIG_MACH_BSEMSERVER -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_BSEMSERVER -+# endif -+# define machine_is_bsemserver() (machine_arch_type == MACH_TYPE_BSEMSERVER) -+#else -+# define machine_is_bsemserver() (0) -+#endif -+ -+#ifdef CONFIG_MACH_NETCLIENT -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_NETCLIENT -+# endif -+# define machine_is_netclient() (machine_arch_type == MACH_TYPE_NETCLIENT) -+#else -+# define machine_is_netclient() (0) -+#endif -+ -+#ifdef CONFIG_MACH_XSCALE_PALMTT5 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_XSCALE_PALMTT5 -+# endif -+# define machine_is_xscale_palmtt5() (machine_arch_type == MACH_TYPE_XSCALE_PALMTT5) -+#else -+# define machine_is_xscale_palmtt5() (0) -+#endif -+ -+#ifdef CONFIG_MACH_OMAP_PALMTC -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_OMAP_PALMTC -+# endif -+# define machine_is_xscale_palmtc() (machine_arch_type == MACH_TYPE_OMAP_PALMTC) -+#else -+# define machine_is_xscale_palmtc() (0) -+#endif -+ -+#ifdef CONFIG_MACH_OMAP_APOLLON -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_OMAP_APOLLON -+# endif -+# define machine_is_omap_apollon() (machine_arch_type == MACH_TYPE_OMAP_APOLLON) -+#else -+# define machine_is_omap_apollon() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MXC30030EVB -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MXC30030EVB -+# endif -+# define machine_is_mxc30030evb() (machine_arch_type == MACH_TYPE_MXC30030EVB) -+#else -+# define machine_is_mxc30030evb() (0) -+#endif -+ -+#ifdef CONFIG_MACH_REA_2D -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_REA_2D -+# endif -+# define machine_is_rea_2d() (machine_arch_type == MACH_TYPE_REA_2D) -+#else -+# define machine_is_rea_2d() (0) -+#endif -+ -+#ifdef CONFIG_MACH_TI3E524 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_TI3E524 -+# endif -+# define machine_is_eti3e524() (machine_arch_type == MACH_TYPE_TI3E524) -+#else -+# define machine_is_eti3e524() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ATEB9200 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ATEB9200 -+# endif -+# define machine_is_ateb9200() (machine_arch_type == MACH_TYPE_ATEB9200) -+#else -+# define machine_is_ateb9200() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AUCKLAND -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AUCKLAND -+# endif -+# define machine_is_auckland() (machine_arch_type == MACH_TYPE_AUCKLAND) -+#else -+# define machine_is_auckland() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AK3320M -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AK3320M -+# endif -+# define machine_is_ak3220m() (machine_arch_type == MACH_TYPE_AK3320M) -+#else -+# define machine_is_ak3220m() (0) -+#endif -+ -+#ifdef CONFIG_MACH_DURAMAX -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_DURAMAX -+# endif -+# define machine_is_duramax() (machine_arch_type == MACH_TYPE_DURAMAX) -+#else -+# define machine_is_duramax() (0) -+#endif -+ -+#ifdef CONFIG_MACH_N35 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_N35 -+# endif -+# define machine_is_n35() (machine_arch_type == MACH_TYPE_N35) -+#else -+# define machine_is_n35() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PRONGHORN -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PRONGHORN -+# endif -+# define machine_is_pronghorn() (machine_arch_type == MACH_TYPE_PRONGHORN) -+#else -+# define machine_is_pronghorn() (0) -+#endif -+ -+#ifdef CONFIG_MACH_FUNDY -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_FUNDY -+# endif -+# define machine_is_fundy() (machine_arch_type == MACH_TYPE_FUNDY) -+#else -+# define machine_is_fundy() (0) -+#endif -+ -+#ifdef CONFIG_MACH_LOGICPD_PXA270 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_LOGICPD_PXA270 -+# endif -+# define machine_is_logicpd_pxa270() (machine_arch_type == MACH_TYPE_LOGICPD_PXA270) -+#else -+# define machine_is_logicpd_pxa270() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CPU777 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CPU777 -+# endif -+# define machine_is_cpu777() (machine_arch_type == MACH_TYPE_CPU777) -+#else -+# define machine_is_cpu777() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SIMICON9201 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SIMICON9201 -+# endif -+# define machine_is_simicon9201() (machine_arch_type == MACH_TYPE_SIMICON9201) -+#else -+# define machine_is_simicon9201() (0) -+#endif -+ -+#ifdef CONFIG_MACH_LEAP2_HPM -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_LEAP2_HPM -+# endif -+# define machine_is_leap2_hpm() (machine_arch_type == MACH_TYPE_LEAP2_HPM) -+#else -+# define machine_is_leap2_hpm() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CM922TXA10 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CM922TXA10 -+# endif -+# define machine_is_cm922txa10() (machine_arch_type == MACH_TYPE_CM922TXA10) -+#else -+# define machine_is_cm922txa10() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PXA -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PXA -+# endif -+# define machine_is_sandgate() (machine_arch_type == MACH_TYPE_PXA) -+#else -+# define machine_is_sandgate() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SANDGATE2 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SANDGATE2 -+# endif -+# define machine_is_sandgate2() (machine_arch_type == MACH_TYPE_SANDGATE2) -+#else -+# define machine_is_sandgate2() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SANDGATE2G -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SANDGATE2G -+# endif -+# define machine_is_sandgate2g() (machine_arch_type == MACH_TYPE_SANDGATE2G) -+#else -+# define machine_is_sandgate2g() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SANDGATE2P -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SANDGATE2P -+# endif -+# define machine_is_sandgate2p() (machine_arch_type == MACH_TYPE_SANDGATE2P) -+#else -+# define machine_is_sandgate2p() (0) -+#endif -+ -+#ifdef CONFIG_MACH_FRED_JACK -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_FRED_JACK -+# endif -+# define machine_is_fred_jack() (machine_arch_type == MACH_TYPE_FRED_JACK) -+#else -+# define machine_is_fred_jack() (0) -+#endif -+ -+#ifdef CONFIG_MACH_TTG_COLOR1 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_TTG_COLOR1 -+# endif -+# define machine_is_ttg_color1() (machine_arch_type == MACH_TYPE_TTG_COLOR1) -+#else -+# define machine_is_ttg_color1() (0) -+#endif -+ -+#ifdef CONFIG_MACH_NXEB500HMI -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_NXEB500HMI -+# endif -+# define machine_is_nxeb500hmi() (machine_arch_type == MACH_TYPE_NXEB500HMI) -+#else -+# define machine_is_nxeb500hmi() (0) -+#endif -+ -+#ifdef CONFIG_MACH_NETDCU8 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_NETDCU8 -+# endif -+# define machine_is_netdcu8() (machine_arch_type == MACH_TYPE_NETDCU8) -+#else -+# define machine_is_netdcu8() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ML675050_CPU_BOA -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ML675050_CPU_BOA -+# endif -+# define machine_is_ml675050_cpu_boa() (machine_arch_type == MACH_TYPE_ML675050_CPU_BOA) -+#else -+# define machine_is_ml675050_cpu_boa() (0) -+#endif -+ -+#ifdef CONFIG_MACH_NG_FVX538 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_NG_FVX538 -+# endif -+# define machine_is_ng_fvx538() (machine_arch_type == MACH_TYPE_NG_FVX538) -+#else -+# define machine_is_ng_fvx538() (0) -+#endif -+ -+#ifdef CONFIG_MACH_NG_FVS338 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_NG_FVS338 -+# endif -+# define machine_is_ng_fvs338() (machine_arch_type == MACH_TYPE_NG_FVS338) -+#else -+# define machine_is_ng_fvs338() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PNX4103 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PNX4103 -+# endif -+# define machine_is_pnx4103() (machine_arch_type == MACH_TYPE_PNX4103) -+#else -+# define machine_is_pnx4103() (0) -+#endif -+ -+#ifdef CONFIG_MACH_HESDB -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_HESDB -+# endif -+# define machine_is_hesdb() (machine_arch_type == MACH_TYPE_HESDB) -+#else -+# define machine_is_hesdb() (0) -+#endif -+ -+#ifdef CONFIG_MACH_XSILO -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_XSILO -+# endif -+# define machine_is_xsilo() (machine_arch_type == MACH_TYPE_XSILO) -+#else -+# define machine_is_xsilo() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ESPRESSO -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ESPRESSO -+# endif -+# define machine_is_espresso() (machine_arch_type == MACH_TYPE_ESPRESSO) -+#else -+# define machine_is_espresso() (0) -+#endif -+ -+#ifdef CONFIG_MACH_EMLC -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_EMLC -+# endif -+# define machine_is_emlc() (machine_arch_type == MACH_TYPE_EMLC) -+#else -+# define machine_is_emlc() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SISTERON -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SISTERON -+# endif -+# define machine_is_sisteron() (machine_arch_type == MACH_TYPE_SISTERON) -+#else -+# define machine_is_sisteron() (0) -+#endif -+ -+#ifdef CONFIG_MACH_RX1950 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_RX1950 -+# endif -+# define machine_is_rx1950() (machine_arch_type == MACH_TYPE_RX1950) -+#else -+# define machine_is_rx1950() (0) -+#endif -+ -+#ifdef CONFIG_MACH_TSC_VENUS -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_TSC_VENUS -+# endif -+# define machine_is_tsc_venus() (machine_arch_type == MACH_TYPE_TSC_VENUS) -+#else -+# define machine_is_tsc_venus() (0) -+#endif -+ -+#ifdef CONFIG_MACH_DS101J -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_DS101J -+# endif -+# define machine_is_ds101j() (machine_arch_type == MACH_TYPE_DS101J) -+#else -+# define machine_is_ds101j() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MXC30030ADS -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MXC30030ADS -+# endif -+# define machine_is_mxc30030ads() (machine_arch_type == MACH_TYPE_MXC30030ADS) -+#else -+# define machine_is_mxc30030ads() (0) -+#endif -+ -+#ifdef CONFIG_MACH_FUJITSU_WIMAXSOC -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_FUJITSU_WIMAXSOC -+# endif -+# define machine_is_fujitsu_wimaxsoc() (machine_arch_type == MACH_TYPE_FUJITSU_WIMAXSOC) -+#else -+# define machine_is_fujitsu_wimaxsoc() (0) -+#endif -+ -+#ifdef CONFIG_MACH_DUALPCMODEM -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_DUALPCMODEM -+# endif -+# define machine_is_dualpcmodem() (machine_arch_type == MACH_TYPE_DUALPCMODEM) -+#else -+# define machine_is_dualpcmodem() (0) -+#endif -+ -+#ifdef CONFIG_MACH_GESBC9312 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_GESBC9312 -+# endif -+# define machine_is_gesbc9312() (machine_arch_type == MACH_TYPE_GESBC9312) -+#else -+# define machine_is_gesbc9312() (0) -+#endif -+ -+#ifdef CONFIG_MACH_HTCAPACHE -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_HTCAPACHE -+# endif -+# define machine_is_htcapache() (machine_arch_type == MACH_TYPE_HTCAPACHE) -+#else -+# define machine_is_htcapache() (0) -+#endif -+ -+#ifdef CONFIG_MACH_IXDP435 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_IXDP435 -+# endif -+# define machine_is_ixdp435() (machine_arch_type == MACH_TYPE_IXDP435) -+#else -+# define machine_is_ixdp435() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CATPROVT100 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CATPROVT100 -+# endif -+# define machine_is_catprovt100() (machine_arch_type == MACH_TYPE_CATPROVT100) -+#else -+# define machine_is_catprovt100() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PICOTUX1XX -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PICOTUX1XX -+# endif -+# define machine_is_picotux1xx() (machine_arch_type == MACH_TYPE_PICOTUX1XX) -+#else -+# define machine_is_picotux1xx() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PICOTUX2XX -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PICOTUX2XX -+# endif -+# define machine_is_picotux2xx() (machine_arch_type == MACH_TYPE_PICOTUX2XX) -+#else -+# define machine_is_picotux2xx() (0) -+#endif -+ -+#ifdef CONFIG_MACH_DSMG600 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_DSMG600 -+# endif -+# define machine_is_dsmg600() (machine_arch_type == MACH_TYPE_DSMG600) -+#else -+# define machine_is_dsmg600() (0) -+#endif -+ -+#ifdef CONFIG_MACH_EMPC2 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_EMPC2 -+# endif -+# define machine_is_empc2() (machine_arch_type == MACH_TYPE_EMPC2) -+#else -+# define machine_is_empc2() (0) -+#endif -+ -+#ifdef CONFIG_MACH_VENTURA -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_VENTURA -+# endif -+# define machine_is_ventura() (machine_arch_type == MACH_TYPE_VENTURA) -+#else -+# define machine_is_ventura() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PHIDGET_SBC -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PHIDGET_SBC -+# endif -+# define machine_is_phidget_sbc() (machine_arch_type == MACH_TYPE_PHIDGET_SBC) -+#else -+# define machine_is_phidget_sbc() (0) -+#endif -+ -+#ifdef CONFIG_MACH_IJ3K -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_IJ3K -+# endif -+# define machine_is_ij3k() (machine_arch_type == MACH_TYPE_IJ3K) -+#else -+# define machine_is_ij3k() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PISGAH -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PISGAH -+# endif -+# define machine_is_pisgah() (machine_arch_type == MACH_TYPE_PISGAH) -+#else -+# define machine_is_pisgah() (0) -+#endif -+ -+#ifdef CONFIG_MACH_OMAP_FSAMPLE -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_OMAP_FSAMPLE -+# endif -+# define machine_is_omap_fsample() (machine_arch_type == MACH_TYPE_OMAP_FSAMPLE) -+#else -+# define machine_is_omap_fsample() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SG720 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SG720 -+# endif -+# define machine_is_sg720() (machine_arch_type == MACH_TYPE_SG720) -+#else -+# define machine_is_sg720() (0) -+#endif -+ -+#ifdef CONFIG_MACH_REDFOX -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_REDFOX -+# endif -+# define machine_is_redfox() (machine_arch_type == MACH_TYPE_REDFOX) -+#else -+# define machine_is_redfox() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MYSH_EP9315_1 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MYSH_EP9315_1 -+# endif -+# define machine_is_mysh_ep9315_1() (machine_arch_type == MACH_TYPE_MYSH_EP9315_1) -+#else -+# define machine_is_mysh_ep9315_1() (0) -+#endif -+ -+#ifdef CONFIG_MACH_TPF106 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_TPF106 -+# endif -+# define machine_is_tpf106() (machine_arch_type == MACH_TYPE_TPF106) -+#else -+# define machine_is_tpf106() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AT91RM9200KG -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AT91RM9200KG -+# endif -+# define machine_is_at91rm9200kg() (machine_arch_type == MACH_TYPE_AT91RM9200KG) -+#else -+# define machine_is_at91rm9200kg() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SLEDB -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SLEDB -+# endif -+# define machine_is_racemt2() (machine_arch_type == MACH_TYPE_SLEDB) -+#else -+# define machine_is_racemt2() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ONTRACK -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ONTRACK -+# endif -+# define machine_is_ontrack() (machine_arch_type == MACH_TYPE_ONTRACK) -+#else -+# define machine_is_ontrack() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PM1200 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PM1200 -+# endif -+# define machine_is_pm1200() (machine_arch_type == MACH_TYPE_PM1200) -+#else -+# define machine_is_pm1200() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ESS24XXX -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ESS24XXX -+# endif -+# define machine_is_ess24562() (machine_arch_type == MACH_TYPE_ESS24XXX) -+#else -+# define machine_is_ess24562() (0) -+#endif -+ -+#ifdef CONFIG_MACH_COREMP7 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_COREMP7 -+# endif -+# define machine_is_coremp7() (machine_arch_type == MACH_TYPE_COREMP7) -+#else -+# define machine_is_coremp7() (0) -+#endif -+ -+#ifdef CONFIG_MACH_NEXCODER_6446 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_NEXCODER_6446 -+# endif -+# define machine_is_nexcoder_6446() (machine_arch_type == MACH_TYPE_NEXCODER_6446) -+#else -+# define machine_is_nexcoder_6446() (0) -+#endif -+ -+#ifdef CONFIG_MACH_STVC8380 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_STVC8380 -+# endif -+# define machine_is_stvc8380() (machine_arch_type == MACH_TYPE_STVC8380) -+#else -+# define machine_is_stvc8380() (0) -+#endif -+ -+#ifdef CONFIG_MACH_TEKLYNX -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_TEKLYNX -+# endif -+# define machine_is_teklynx() (machine_arch_type == MACH_TYPE_TEKLYNX) -+#else -+# define machine_is_teklynx() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CARBONADO -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CARBONADO -+# endif -+# define machine_is_carbonado() (machine_arch_type == MACH_TYPE_CARBONADO) -+#else -+# define machine_is_carbonado() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SYSMOS_MP730 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SYSMOS_MP730 -+# endif -+# define machine_is_sysmos_mp730() (machine_arch_type == MACH_TYPE_SYSMOS_MP730) -+#else -+# define machine_is_sysmos_mp730() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SNAPPER_CL15 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SNAPPER_CL15 -+# endif -+# define machine_is_snapper_cl15() (machine_arch_type == MACH_TYPE_SNAPPER_CL15) -+#else -+# define machine_is_snapper_cl15() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PGIGIM -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PGIGIM -+# endif -+# define machine_is_pgigim() (machine_arch_type == MACH_TYPE_PGIGIM) -+#else -+# define machine_is_pgigim() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PTX9160P2 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PTX9160P2 -+# endif -+# define machine_is_ptx9160p2() (machine_arch_type == MACH_TYPE_PTX9160P2) -+#else -+# define machine_is_ptx9160p2() (0) -+#endif -+ -+#ifdef CONFIG_MACH_DCORE1 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_DCORE1 -+# endif -+# define machine_is_dcore1() (machine_arch_type == MACH_TYPE_DCORE1) -+#else -+# define machine_is_dcore1() (0) -+#endif -+ -+#ifdef CONFIG_MACH_VICTORPXA -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_VICTORPXA -+# endif -+# define machine_is_victorpxa() (machine_arch_type == MACH_TYPE_VICTORPXA) -+#else -+# define machine_is_victorpxa() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MX2DTB -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MX2DTB -+# endif -+# define machine_is_mx2dtb() (machine_arch_type == MACH_TYPE_MX2DTB) -+#else -+# define machine_is_mx2dtb() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PXA_IREX_ER0100 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PXA_IREX_ER0100 -+# endif -+# define machine_is_pxa_irex_er0100() (machine_arch_type == MACH_TYPE_PXA_IREX_ER0100) -+#else -+# define machine_is_pxa_irex_er0100() (0) -+#endif -+ -+#ifdef CONFIG_MACH_OMAP_PALMZ71 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_OMAP_PALMZ71 -+# endif -+# define machine_is_omap_palmz71() (machine_arch_type == MACH_TYPE_OMAP_PALMZ71) -+#else -+# define machine_is_omap_palmz71() (0) -+#endif -+ -+#ifdef CONFIG_MACH_BARTEC_DEG -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_BARTEC_DEG -+# endif -+# define machine_is_bartec_deg() (machine_arch_type == MACH_TYPE_BARTEC_DEG) -+#else -+# define machine_is_bartec_deg() (0) -+#endif -+ -+#ifdef CONFIG_MACH_HW50251 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_HW50251 -+# endif -+# define machine_is_hw50251() (machine_arch_type == MACH_TYPE_HW50251) -+#else -+# define machine_is_hw50251() (0) -+#endif -+ -+#ifdef CONFIG_MACH_IBOX -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_IBOX -+# endif -+# define machine_is_ibox() (machine_arch_type == MACH_TYPE_IBOX) -+#else -+# define machine_is_ibox() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ATLASLH7A404 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ATLASLH7A404 -+# endif -+# define machine_is_atlaslh7a404() (machine_arch_type == MACH_TYPE_ATLASLH7A404) -+#else -+# define machine_is_atlaslh7a404() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PT2026 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PT2026 -+# endif -+# define machine_is_pt2026() (machine_arch_type == MACH_TYPE_PT2026) -+#else -+# define machine_is_pt2026() (0) -+#endif -+ -+#ifdef CONFIG_MACH_HTCALPINE -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_HTCALPINE -+# endif -+# define machine_is_htcalpine() (machine_arch_type == MACH_TYPE_HTCALPINE) -+#else -+# define machine_is_htcalpine() (0) -+#endif -+ -+#ifdef CONFIG_MACH_BARTEC_VTU -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_BARTEC_VTU -+# endif -+# define machine_is_bartec_vtu() (machine_arch_type == MACH_TYPE_BARTEC_VTU) -+#else -+# define machine_is_bartec_vtu() (0) -+#endif -+ -+#ifdef CONFIG_MACH_VCOREII -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_VCOREII -+# endif -+# define machine_is_vcoreii() (machine_arch_type == MACH_TYPE_VCOREII) -+#else -+# define machine_is_vcoreii() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PDNB3 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PDNB3 -+# endif -+# define machine_is_pdnb3() (machine_arch_type == MACH_TYPE_PDNB3) -+#else -+# define machine_is_pdnb3() (0) -+#endif -+ -+#ifdef CONFIG_MACH_HTCBEETLES -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_HTCBEETLES -+# endif -+# define machine_is_htcbeetles() (machine_arch_type == MACH_TYPE_HTCBEETLES) -+#else -+# define machine_is_htcbeetles() (0) -+#endif -+ -+#ifdef CONFIG_MACH_S3C6400 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_S3C6400 -+# endif -+# define machine_is_s3c6400() (machine_arch_type == MACH_TYPE_S3C6400) -+#else -+# define machine_is_s3c6400() (0) -+#endif -+ -+#ifdef CONFIG_MACH_S3C2443 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_S3C2443 -+# endif -+# define machine_is_s3c2443() (machine_arch_type == MACH_TYPE_S3C2443) -+#else -+# define machine_is_s3c2443() (0) -+#endif -+ -+#ifdef CONFIG_MACH_OMAP_LDK -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_OMAP_LDK -+# endif -+# define machine_is_omap_ldk() (machine_arch_type == MACH_TYPE_OMAP_LDK) -+#else -+# define machine_is_omap_ldk() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SMDK2460 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SMDK2460 -+# endif -+# define machine_is_smdk2460() (machine_arch_type == MACH_TYPE_SMDK2460) -+#else -+# define machine_is_smdk2460() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SMDK2440 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SMDK2440 -+# endif -+# define machine_is_smdk2440() (machine_arch_type == MACH_TYPE_SMDK2440) -+#else -+# define machine_is_smdk2440() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SMDK2412 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SMDK2412 -+# endif -+# define machine_is_smdk2412() (machine_arch_type == MACH_TYPE_SMDK2412) -+#else -+# define machine_is_smdk2412() (0) -+#endif -+ -+#ifdef CONFIG_MACH_WEBBOX -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_WEBBOX -+# endif -+# define machine_is_webbox() (machine_arch_type == MACH_TYPE_WEBBOX) -+#else -+# define machine_is_webbox() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CWWNDP -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CWWNDP -+# endif -+# define machine_is_cwwndp() (machine_arch_type == MACH_TYPE_CWWNDP) -+#else -+# define machine_is_cwwndp() (0) -+#endif -+ -+#ifdef CONFIG_MACH_DRAGON -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_DRAGON -+# endif -+# define machine_is_dragon() (machine_arch_type == MACH_TYPE_DRAGON) -+#else -+# define machine_is_dragon() (0) -+#endif -+ -+#ifdef CONFIG_MACH_OPENDO_CPU_BOARD -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_OPENDO_CPU_BOARD -+# endif -+# define machine_is_opendo_cpu_board() (machine_arch_type == MACH_TYPE_OPENDO_CPU_BOARD) -+#else -+# define machine_is_opendo_cpu_board() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CCM2200 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CCM2200 -+# endif -+# define machine_is_ccm2200() (machine_arch_type == MACH_TYPE_CCM2200) -+#else -+# define machine_is_ccm2200() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ETWARM -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ETWARM -+# endif -+# define machine_is_etwarm() (machine_arch_type == MACH_TYPE_ETWARM) -+#else -+# define machine_is_etwarm() (0) -+#endif -+ -+#ifdef CONFIG_MACH_M93030 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_M93030 -+# endif -+# define machine_is_m93030() (machine_arch_type == MACH_TYPE_M93030) -+#else -+# define machine_is_m93030() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CC7U -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CC7U -+# endif -+# define machine_is_cc7u() (machine_arch_type == MACH_TYPE_CC7U) -+#else -+# define machine_is_cc7u() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MTT_RANGER -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MTT_RANGER -+# endif -+# define machine_is_mtt_ranger() (machine_arch_type == MACH_TYPE_MTT_RANGER) -+#else -+# define machine_is_mtt_ranger() (0) -+#endif -+ -+#ifdef CONFIG_MACH_NEXUS -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_NEXUS -+# endif -+# define machine_is_nexus() (machine_arch_type == MACH_TYPE_NEXUS) -+#else -+# define machine_is_nexus() (0) -+#endif -+ -+#ifdef CONFIG_MACH_DESMAN -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_DESMAN -+# endif -+# define machine_is_desman() (machine_arch_type == MACH_TYPE_DESMAN) -+#else -+# define machine_is_desman() (0) -+#endif -+ -+#ifdef CONFIG_MACH_BKDE303 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_BKDE303 -+# endif -+# define machine_is_bkde303() (machine_arch_type == MACH_TYPE_BKDE303) -+#else -+# define machine_is_bkde303() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SMDK2413 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SMDK2413 -+# endif -+# define machine_is_smdk2413() (machine_arch_type == MACH_TYPE_SMDK2413) -+#else -+# define machine_is_smdk2413() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AML_M7200 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AML_M7200 -+# endif -+# define machine_is_aml_m7200() (machine_arch_type == MACH_TYPE_AML_M7200) -+#else -+# define machine_is_aml_m7200() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AML_M5900 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AML_M5900 -+# endif -+# define machine_is_aml_m5900() (machine_arch_type == MACH_TYPE_AML_M5900) -+#else -+# define machine_is_aml_m5900() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SG640 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SG640 -+# endif -+# define machine_is_sg640() (machine_arch_type == MACH_TYPE_SG640) -+#else -+# define machine_is_sg640() (0) -+#endif -+ -+#ifdef CONFIG_MACH_EDG79524 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_EDG79524 -+# endif -+# define machine_is_edg79524() (machine_arch_type == MACH_TYPE_EDG79524) -+#else -+# define machine_is_edg79524() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AI2410 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AI2410 -+# endif -+# define machine_is_ai2410() (machine_arch_type == MACH_TYPE_AI2410) -+#else -+# define machine_is_ai2410() (0) -+#endif -+ -+#ifdef CONFIG_MACH_IXP465 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_IXP465 -+# endif -+# define machine_is_ixp465() (machine_arch_type == MACH_TYPE_IXP465) -+#else -+# define machine_is_ixp465() (0) -+#endif -+ -+#ifdef CONFIG_MACH_BALLOON3 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_BALLOON3 -+# endif -+# define machine_is_balloon3() (machine_arch_type == MACH_TYPE_BALLOON3) -+#else -+# define machine_is_balloon3() (0) -+#endif -+ -+#ifdef CONFIG_MACH_HEINS -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_HEINS -+# endif -+# define machine_is_heins() (machine_arch_type == MACH_TYPE_HEINS) -+#else -+# define machine_is_heins() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MPLUSEVA -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MPLUSEVA -+# endif -+# define machine_is_mpluseva() (machine_arch_type == MACH_TYPE_MPLUSEVA) -+#else -+# define machine_is_mpluseva() (0) -+#endif -+ -+#ifdef CONFIG_MACH_RT042 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_RT042 -+# endif -+# define machine_is_rt042() (machine_arch_type == MACH_TYPE_RT042) -+#else -+# define machine_is_rt042() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CWIEM -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CWIEM -+# endif -+# define machine_is_cwiem() (machine_arch_type == MACH_TYPE_CWIEM) -+#else -+# define machine_is_cwiem() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CM_X270 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CM_X270 -+# endif -+# define machine_is_cm_x270() (machine_arch_type == MACH_TYPE_CM_X270) -+#else -+# define machine_is_cm_x270() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CM_X255 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CM_X255 -+# endif -+# define machine_is_cm_x255() (machine_arch_type == MACH_TYPE_CM_X255) -+#else -+# define machine_is_cm_x255() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ESH_AT91 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ESH_AT91 -+# endif -+# define machine_is_esh_at91() (machine_arch_type == MACH_TYPE_ESH_AT91) -+#else -+# define machine_is_esh_at91() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SANDGATE3 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SANDGATE3 -+# endif -+# define machine_is_sandgate3() (machine_arch_type == MACH_TYPE_SANDGATE3) -+#else -+# define machine_is_sandgate3() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PRIMO -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PRIMO -+# endif -+# define machine_is_primo() (machine_arch_type == MACH_TYPE_PRIMO) -+#else -+# define machine_is_primo() (0) -+#endif -+ -+#ifdef CONFIG_MACH_GEMSTONE -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_GEMSTONE -+# endif -+# define machine_is_gemstone() (machine_arch_type == MACH_TYPE_GEMSTONE) -+#else -+# define machine_is_gemstone() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PRONGHORNMETRO -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PRONGHORNMETRO -+# endif -+# define machine_is_pronghorn_metro() (machine_arch_type == MACH_TYPE_PRONGHORNMETRO) -+#else -+# define machine_is_pronghorn_metro() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SIDEWINDER -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SIDEWINDER -+# endif -+# define machine_is_sidewinder() (machine_arch_type == MACH_TYPE_SIDEWINDER) -+#else -+# define machine_is_sidewinder() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PICOMOD1 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PICOMOD1 -+# endif -+# define machine_is_picomod1() (machine_arch_type == MACH_TYPE_PICOMOD1) -+#else -+# define machine_is_picomod1() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SG590 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SG590 -+# endif -+# define machine_is_sg590() (machine_arch_type == MACH_TYPE_SG590) -+#else -+# define machine_is_sg590() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AKAI9307 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AKAI9307 -+# endif -+# define machine_is_akai9307() (machine_arch_type == MACH_TYPE_AKAI9307) -+#else -+# define machine_is_akai9307() (0) -+#endif -+ -+#ifdef CONFIG_MACH_FONTAINE -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_FONTAINE -+# endif -+# define machine_is_fontaine() (machine_arch_type == MACH_TYPE_FONTAINE) -+#else -+# define machine_is_fontaine() (0) -+#endif -+ -+#ifdef CONFIG_MACH_WOMBAT -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_WOMBAT -+# endif -+# define machine_is_wombat() (machine_arch_type == MACH_TYPE_WOMBAT) -+#else -+# define machine_is_wombat() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ACQ300 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ACQ300 -+# endif -+# define machine_is_acq300() (machine_arch_type == MACH_TYPE_ACQ300) -+#else -+# define machine_is_acq300() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MOD_270 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MOD_270 -+# endif -+# define machine_is_mod_270() (machine_arch_type == MACH_TYPE_MOD_270) -+#else -+# define machine_is_mod_270() (0) -+#endif -+ -+#ifdef CONFIG_MACH_VC0820 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_VC0820 -+# endif -+# define machine_is_vmc_vc0820() (machine_arch_type == MACH_TYPE_VC0820) -+#else -+# define machine_is_vmc_vc0820() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ANI_AIM -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ANI_AIM -+# endif -+# define machine_is_ani_aim() (machine_arch_type == MACH_TYPE_ANI_AIM) -+#else -+# define machine_is_ani_aim() (0) -+#endif -+ -+#ifdef CONFIG_MACH_JELLYFISH -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_JELLYFISH -+# endif -+# define machine_is_jellyfish() (machine_arch_type == MACH_TYPE_JELLYFISH) -+#else -+# define machine_is_jellyfish() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AMANITA -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AMANITA -+# endif -+# define machine_is_amanita() (machine_arch_type == MACH_TYPE_AMANITA) -+#else -+# define machine_is_amanita() (0) -+#endif -+ -+#ifdef CONFIG_MACH_VLINK -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_VLINK -+# endif -+# define machine_is_vlink() (machine_arch_type == MACH_TYPE_VLINK) -+#else -+# define machine_is_vlink() (0) -+#endif -+ - /* - * These have not yet been registered - */ -diff -Naur u-boot-1.1.4.org/include/config.h u-boot-1.1.4.tmp/include/config.h ---- u-boot-1.1.4.org/include/config.h 2006-06-05 05:04:25.000000000 +0200 -+++ u-boot-1.1.4.tmp/include/config.h 2006-06-05 05:03:47.000000000 +0200 -@@ -1,2 +1,2 @@ - /* Automatically generated - do not edit */ --#include -+#include -diff -Naur u-boot-1.1.4.org/include/config.mk u-boot-1.1.4.tmp/include/config.mk ---- u-boot-1.1.4.org/include/config.mk 2006-06-05 05:04:25.000000000 +0200 -+++ u-boot-1.1.4.tmp/include/config.mk 2006-06-05 05:03:47.000000000 +0200 -@@ -1,4 +1,4 @@ - ARCH = arm - CPU = arm920t --BOARD = at91rm9200dk -+BOARD = vlink - SOC = at91rm9200 -diff -Naur u-boot-1.1.4.org/include/configs/vlink.h u-boot-1.1.4.tmp/include/configs/vlink.h ---- u-boot-1.1.4.org/include/configs/vlink.h 1970-01-01 01:00:00.000000000 +0100 -+++ u-boot-1.1.4.tmp/include/configs/vlink.h 2006-06-05 03:37:15.000000000 +0200 -@@ -0,0 +1,244 @@ -+/* -+ * Hamish Guthrie -+ * -+ * Configuation settings for the Figment Designs Versalink board. -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#ifndef __CONFIG_H -+#define __CONFIG_H -+ -+// Added 2 defines to skip re-init lowlevel and relocate HCG HLH -+// -+#define CONFIG_SKIP_LOWLEVEL_INIT -+#define CONFIG_SKIP_RELOCATE_UBOOT -+ -+/* ARM asynchronous clock */ -+#define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */ -+#define AT91C_MASTER_CLOCK 59904000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */ -+/* #define AT91C_MASTER_CLOCK 44928000 */ /* peripheral clock (AT91C_MASTER_CLOCK / 4) */ -+ -+#define AT91_SLOW_CLOCK 32768 /* slow clock */ -+ -+#define CONFIG_ARM920T 1 /* This is an ARM920T Core */ -+#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */ -+#define CONFIG_VLINK 1 /* on a Versalink Board */ -+#define CONFIG_IDENT_STRING " FDL Versalink" -+#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ -+#define USE_920T_MMU 1 -+ -+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -+#define CONFIG_SETUP_MEMORY_TAGS 1 -+#define CONFIG_INITRD_TAG 1 -+ -+#ifndef CONFIG_SKIP_LOWLEVEL_INIT -+#define CFG_USE_MAIN_OSCILLATOR 1 -+/* flash */ -+#define MC_PUIA_VAL 0x00000000 -+#define MC_PUP_VAL 0x00000000 -+#define MC_PUER_VAL 0x00000000 -+#define MC_ASR_VAL 0x00000000 -+#define MC_AASR_VAL 0x00000000 -+#define EBI_CFGR_VAL 0x00000000 -+#define SMC2_CSR_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ -+ -+/* clocks */ -+#define PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */ -+#define PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */ -+#define MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */ -+ -+/* sdram */ -+#define PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ -+#define PIOC_BSR_VAL 0x00000000 -+#define PIOC_PDR_VAL 0xFFFF0000 -+#define EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */ -+#define SDRC_CR_VAL 0x2188c155 /* set up the SDRAM */ -+#define SDRAM 0x20000000 /* address of the SDRAM */ -+#define SDRAM1 0x20000080 /* address of the SDRAM */ -+#define SDRAM_VAL 0x00000000 /* value written to SDRAM */ -+#define SDRC_MR_VAL 0x00000002 /* Precharge All */ -+#define SDRC_MR_VAL1 0x00000004 /* refresh */ -+#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ -+#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ -+#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ -+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ -+/* -+ * Size of malloc() pool -+ */ -+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) -+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ -+ -+#define CONFIG_BAUDRATE 115200 -+ -+/* -+ * Hardware drivers -+ */ -+ -+/* define one of these to choose the DBGU, USART0 or USART1 as console */ -+#define CONFIG_DBGU -+#undef CONFIG_USART0 -+#undef CONFIG_USART1 -+ -+#undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */ -+ -+#undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */ -+ -+#define CONFIG_BOOTDELAY 3 -+/* #define CONFIG_ENV_OVERWRITE 1 */ -+ -+#define CONFIG_COMMANDS \ -+ ((CONFIG_CMD_DFL | CFG_CMD_MII |\ -+ CFG_CMD_DHCP ) & \ -+ ~(CFG_CMD_BDI | \ -+ CFG_CMD_IMI | \ -+ CFG_CMD_AUTOSCRIPT | \ -+ CFG_CMD_FPGA | \ -+ CFG_CMD_MISC | \ -+ CFG_CMD_LOADS )) -+ -+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ -+#include -+ -+#ifndef CONFIG_VLINK -+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -+#define SECTORSIZE 512 -+ -+#define ADDR_COLUMN 1 -+#define ADDR_PAGE 2 -+#define ADDR_COLUMN_PAGE 3 -+ -+#define NAND_ChipID_UNKNOWN 0x00 -+#define NAND_MAX_FLOORS 1 -+#define NAND_MAX_CHIPS 1 -+ -+#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */ -+#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */ -+ -+#define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0) -+#define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0) -+ -+#define NAND_WAIT_READY(nand) while (!(*AT91C_PIOC_PDSR & AT91C_PIO_PC2)) -+ -+#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_CLE) = (__u8)(d); } while(0) -+#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_ALE) = (__u8)(d); } while(0) -+#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0) -+#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr)) -+/* the following are NOP's in our implementation */ -+#define NAND_CTL_CLRALE(nandptr) -+#define NAND_CTL_SETALE(nandptr) -+#define NAND_CTL_CLRCLE(nandptr) -+#define NAND_CTL_SETCLE(nandptr) -+#endif -+ -+#define CONFIG_NR_DRAM_BANKS 1 -+#define PHYS_SDRAM 0x20000000 -+#define PHYS_SDRAM_SIZE 0x2000000 /* 32 megs */ -+ -+#define CFG_MEMTEST_START PHYS_SDRAM -+#define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 262144 -+ -+#define CONFIG_DRIVER_ETHER -+#define CONFIG_NET_RETRY_COUNT 20 -+#define CONFIG_AT91C_USE_RMII -+ -+#define CONFIG_HAS_DATAFLASH 1 -+#define CFG_SPI_WRITE_TOUT (5*CFG_HZ) -+#define CFG_MAX_DATAFLASH_BANKS 2 -+#define CFG_MAX_DATAFLASH_PAGES 16384 -+#define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS0 */ -+#define CFG_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* Logical adress for CS3 */ -+ -+#ifdef CONFIG_VLINK -+#define PHYS_FLASH_1 0x10000000 -+#define PHYS_FLASH_SIZE 0x200000 /* 2 megs main flash */ -+#define CFG_FLASH_BASE PHYS_FLASH_1 -+#define CFG_MAX_FLASH_BANKS 1 -+#define CFG_MAX_FLASH_SECT 256 -+#define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */ -+#define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */ -+#endif -+ -+#define CFG_ENV_IS_IN_DATAFLASH -+ -+#ifdef CFG_ENV_IS_IN_DATAFLASH -+#define CFG_ENV_OFFSET 0x21000 -+#define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET) -+#define CFG_ENV_SIZE 0x8400 /* 0x8000 */ -+#else -+#define CFG_ENV_IS_IN_FLASH 1 -+#ifdef CONFIG_SKIP_LOWLEVEL_INIT -+#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) /* after u-boot.bin */ -+#define CFG_ENV_SIZE 0x10000 /* sectors are 64K here */ -+#else -+#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0xe000) /* between boot.bin and u-boot.bin.gz */ -+#define CFG_ENV_SIZE 0x2000 /* 0x8000 */ -+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ -+#endif /* CFG_ENV_IS_IN_DATAFLASH */ -+ -+ -+#define CFG_LOAD_ADDR 0x21000000 /* default load address */ -+ -+#ifdef CONFIG_SKIP_LOWLEVEL_INIT -+#define CFG_BOOT_SIZE 0x00 /* 0 KBytes */ -+#define CFG_U_BOOT_BASE PHYS_FLASH_1 -+#define CFG_U_BOOT_SIZE 0x60000 /* 384 KBytes */ -+#else -+#define CFG_BOOT_SIZE 0x6000 /* 24 KBytes */ -+#define CFG_U_BOOT_BASE (PHYS_FLASH_1 + 0x10000) -+#define CFG_U_BOOT_SIZE 0x10000 /* 64 KBytes */ -+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ -+ -+#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } -+ -+#define CFG_PROMPT "U-Boot> " /* Monitor Command Prompt */ -+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ -+#define CFG_MAXARGS 16 /* max number of command args */ -+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ -+ -+#ifndef __ASSEMBLY__ -+/*----------------------------------------------------------------------- -+ * Board specific extension for bd_info -+ * -+ * This structure is embedded in the global bd_info (bd_t) structure -+ * and can be used by the board specific code (eg board/...) -+ */ -+ -+struct bd_info_ext { -+ /* helper variable for board environment handling -+ * -+ * env_crc_valid == 0 => uninitialised -+ * env_crc_valid > 0 => environment crc in flash is valid -+ * env_crc_valid < 0 => environment crc in flash is invalid -+ */ -+ int env_crc_valid; -+}; -+#endif -+ -+#define CFG_HZ 1000 -+#define CFG_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */ -+ /* AT91C_TC_TIMER_DIV1_CLOCK */ -+ -+#define CONFIG_STACKSIZE (32*1024) /* regular stack */ -+ -+#ifdef CONFIG_USE_IRQ -+#error CONFIG_USE_IRQ not supported -+#endif -+ -+#endif -diff -Naur u-boot-1.1.4.org/MAKEALL u-boot-1.1.4.tmp/MAKEALL ---- u-boot-1.1.4.org/MAKEALL 2005-12-16 17:39:27.000000000 +0100 -+++ u-boot-1.1.4.tmp/MAKEALL 2006-06-05 02:44:24.000000000 +0200 -@@ -180,7 +180,7 @@ - mx1ads mx1fs2 omap1510inn omap1610h2 \ - omap1610inn omap730p2 scb9328 smdk2400 \ - smdk2410 trab VCMA9 versatile \ -- versatileab versatilepb voiceblue -+ versatileab versatilepb voiceblue vlink - " - - ######################################################################### -diff -Naur u-boot-1.1.4.org/Makefile u-boot-1.1.4.tmp/Makefile ---- u-boot-1.1.4.org/Makefile 2006-06-02 15:58:57.000000000 +0200 -+++ u-boot-1.1.4.tmp/Makefile 2006-06-05 04:40:45.000000000 +0200 -@@ -1419,6 +1419,9 @@ - mp2usb_config : unconfig - @./mkconfig $(@:_config=) arm arm920t mp2usb NULL at91rm9200 - -+vlink_config : unconfig -+ @./mkconfig $(@:_config=) arm arm920t vlink NULL at91rm9200 -+ - - ######################################################################## - ## ARM Integrator boards - see doc/README-integrator for more info. diff --git a/target/linux/at91-2.6/image/u-boot/patches/003-mac_init.patch b/target/linux/at91-2.6/image/u-boot/patches/003-mac_init.patch deleted file mode 100644 index ec5dffa0cb..0000000000 --- a/target/linux/at91-2.6/image/u-boot/patches/003-mac_init.patch +++ /dev/null @@ -1,14 +0,0 @@ ---- u-boot-1.1.4.org/lib_arm/board.c 2006-06-05 12:36:22.000000000 +0200 -+++ u-boot-1.1.4.tmp/lib_arm/board.c 2006-06-05 12:36:44.000000000 +0200 -@@ -332,6 +332,11 @@ - } - #endif /* CONFIG_DRIVER_SMC91111 || CONFIG_DRIVER_LAN91C96 */ - -+#ifdef CONFIG_MACH_VLINK -+ printf("Initialising MAC address\n\r"); -+ eth_init(gd->bd); -+#endif -+ - /* Initialize from environment */ - if ((s = getenv ("loadaddr")) != NULL) { - load_addr = simple_strtoul (s, NULL, 16); diff --git a/target/linux/at91-2.6/image/u-boot/patches/004-mac_config.patch b/target/linux/at91-2.6/image/u-boot/patches/004-mac_config.patch deleted file mode 100644 index 73a8260d68..0000000000 --- a/target/linux/at91-2.6/image/u-boot/patches/004-mac_config.patch +++ /dev/null @@ -1,15 +0,0 @@ ---- u-boot-1.1.4.ttt/include/configs/vlink.h 2006-06-05 15:57:37.000000000 +0200 -+++ u-boot-1.1.4/include/configs/vlink.h 2006-06-07 13:11:01.000000000 +0200 -@@ -105,9 +105,9 @@ - - #define CONFIG_COMMANDS \ - ((CONFIG_CMD_DFL | CFG_CMD_MII |\ -- CFG_CMD_DHCP ) & \ -- ~(CFG_CMD_BDI | \ -- CFG_CMD_IMI | \ -+ CFG_CMD_DHCP | \ -+ CFG_CMD_BDI ) & \ -+ ~(CFG_CMD_IMI | \ - CFG_CMD_AUTOSCRIPT | \ - CFG_CMD_FPGA | \ - CFG_CMD_MISC | \ diff --git a/target/linux/at91-2.6/image/u-boot/patches/005-remove_float.patch b/target/linux/at91-2.6/image/u-boot/patches/005-remove_float.patch deleted file mode 100644 index 802c963396..0000000000 --- a/target/linux/at91-2.6/image/u-boot/patches/005-remove_float.patch +++ /dev/null @@ -1,13 +0,0 @@ -diff -urN u-boot-1.1.4.old/cpu/arm920t/config.mk u-boot-1.1.4/cpu/arm920t/config.mk ---- u-boot-1.1.4.old/cpu/arm920t/config.mk 2007-03-19 12:44:39.000000000 +0100 -+++ u-boot-1.1.4/cpu/arm920t/config.mk 2007-03-20 09:23:54.000000000 +0100 -@@ -21,8 +21,7 @@ - # MA 02111-1307 USA - # - --PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -ffixed-r8 \ -- -msoft-float -+PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -ffixed-r8 - - PLATFORM_CPPFLAGS += -march=armv4 - # ========================================================================= diff --git a/target/linux/at91-2.6/image/u-boot/patches/006-generate_params.patch b/target/linux/at91-2.6/image/u-boot/patches/006-generate_params.patch deleted file mode 100644 index d278cfb2da..0000000000 --- a/target/linux/at91-2.6/image/u-boot/patches/006-generate_params.patch +++ /dev/null @@ -1,115 +0,0 @@ ---- u-boot-1.1.4.old/tools/Makefile 2007-03-22 18:17:25.000000000 +0100 -+++ u-boot-1.1.4/tools/Makefile 2007-03-22 17:08:46.000000000 +0100 -@@ -21,9 +21,9 @@ - # MA 02111-1307 USA - # - --BINS = img2srec$(SFX) mkimage$(SFX) envcrc$(SFX) gen_eth_addr$(SFX) bmp_logo$(SFX) -+BINS = img2srec$(SFX) mkimage$(SFX) envcrc$(SFX) gen_eth_addr$(SFX) bmp_logo$(SFX) ubparams$(SFX) - --OBJS = environment.o img2srec.o mkimage.o crc32.o envcrc.o gen_eth_addr.o bmp_logo.o -+OBJS = environment.o img2srec.o mkimage.o crc32.o envcrc.o gen_eth_addr.o bmp_logo.o ubparams.o - - ifeq ($(ARCH),mips) - BINS += inca-swap-bytes$(SFX) -@@ -118,6 +118,9 @@ - - all: .depend $(BINS) $(LOGO_H) subdirs - -+ubparams$(SFX): ubparams.o crc32.o -+ $(CC) $(CFLAGS) -o $@ $^ -+ - envcrc$(SFX): envcrc.o crc32.o environment.o - $(CC) $(CFLAGS) -o $@ $^ - -@@ -149,6 +152,9 @@ - $(CC) $(CFLAGS) $(HOST_LDFLAGS) -o $@ $^ - $(STRIP) $@ - -+ubparams.o: ubparams.c -+ $(CC) -g $(CFLAGS) -c $< -+ - envcrc.o: envcrc.c - $(CC) -g $(CFLAGS) -c $< - ---- u-boot-1.1.4.old/tools/ubparams.c 1970-01-01 01:00:00.000000000 +0100 -+++ u-boot-1.1.4/tools/ubparams.c 2007-03-22 18:09:52.000000000 +0100 -@@ -0,0 +1,78 @@ -+/* -+ * ubparams.c -+ * -+ * Generate a u-boot parameter block with correct crc -+ * -+ * (C) 1007 Guthrie Consulting -+ * hamish@prodigi.ch -+ * -+ */ -+ -+#include -+#include -+#include -+ -+#ifndef __ASSEMBLY__ -+#define __ASSEMBLY__ -+#endif -+#define __ASM_STUB_PROCESSOR_H__ -+#include -+#undef __ASSEMBLY__ -+#include "environment.h" -+ -+#define XMK_STR(x) #x -+#define MK_STR(x) XMK_STR(x) -+ -+extern unsigned long crc32 (unsigned long, const unsigned char *, unsigned int); -+ -+#if !defined(ENV_CRC) -+#define ENV_CRC ~0 -+#endif -+ -+unsigned int env_size = 0x8400; -+env_t environment = { -+ ENV_CRC, -+ "bootdelay=3\0" -+ "baudrate=115200\0" -+ "stdin=serial\0" -+ "stdout=serial\0" -+ "stderr=serial\0" -+ "partitions=mtdparts=AT45DB642.spi0:132k(bootloader),33k(ubparams),99k(spare),1056k(linux),2112k(rootfs),33k(nvram),-(rootfs_data)\0" -+ "fbargs=setenv bootargs mtdparts=AT45DB642.spi0:132k(bootloader),33k(ubparams),99k(spare),1056k(linux),2112k(rootfs),33k(nvram),-(rootfs_data) root=/dev/mtdblock4 ro init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0" -+ "rdba=setenv bootargs mtdparts=AT45DB642.spi0:132k(bootloader),33k(ubparams),99k(spare),1056k(linux),2112k(rootfs),33k(nvram),-(rootfs_data) root=/dev/ram rw initrd=0x21200000,6000000 ramdisk_size=20000 init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0" -+ "rdram=run rdba; tftp 21000000 vImage; tftp 21200000 root.squashfs; bootm 21000000\0" -+ "flash=run fbargs; bootm 0xc0042000\0" -+ "bootargs=setenv bootargs mtdparts=AT45DB642.spi0:132k(bootloader),33k(ubparams),99k(spare),1056k(linux),2112k(rootfs),33k(nvram),-(rootfs_data) root=/dev/mtdblock4 ro init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0" -+ "bootcmd=bootm 0xc0042000\0" -+ "ethaddr=00:30:49:00:00:01\0" -+ "ipaddr=10.0.1.73\0" -+ "serverip=10.0.1.210\0" -+ "serial#=MX070205484\0" -+ "\0" -+ }; -+ -+int main(void) { -+ env_t *envptr, *source; -+ unsigned char *dataptr; -+ FILE *params; -+ -+ source = &environment; -+ envptr = (env_t *)malloc(CFG_ENV_SIZE); -+ dataptr = (unsigned char *)envptr + ENV_HEADER_SIZE; -+ -+ printf("Make u-boot params\n"); -+ printf("Params size is %d\n", CFG_ENV_SIZE); -+ -+ memset(envptr, 0, CFG_ENV_SIZE); -+ memcpy(envptr, source, sizeof(environment)); -+ -+ envptr->crc = crc32(0, envptr->data, ENV_SIZE); -+ -+ params = fopen("params", "w"); -+ fwrite(envptr, CFG_ENV_SIZE, 1, params); -+ fclose(params); -+ -+ free(envptr); -+ } -+ -+ diff --git a/target/linux/at91-2.6/image/u-boot/patches/007-ubparams_bugfix.patch b/target/linux/at91-2.6/image/u-boot/patches/007-ubparams_bugfix.patch deleted file mode 100644 index 3d069e4d39..0000000000 --- a/target/linux/at91-2.6/image/u-boot/patches/007-ubparams_bugfix.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- u-boot-1.1.4.old/tools/ubparams.c 2007-03-22 18:09:52.000000000 +0100 -+++ u-boot-1.1.4/tools/ubparams.c 2007-03-22 18:29:32.000000000 +0100 -@@ -18,7 +18,7 @@ - #define __ASM_STUB_PROCESSOR_H__ - #include - #undef __ASSEMBLY__ --#include "environment.h" -+#include - - #define XMK_STR(x) #x - #define MK_STR(x) XMK_STR(x) diff --git a/target/linux/at91-2.6/image/u-boot/patches/008-ubparams_bugfix.patch b/target/linux/at91-2.6/image/u-boot/patches/008-ubparams_bugfix.patch deleted file mode 100644 index 9a16e1998f..0000000000 --- a/target/linux/at91-2.6/image/u-boot/patches/008-ubparams_bugfix.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- u-boot-1.1.4.old/tools/ubparams.c 2007-03-23 10:51:17.000000000 +0100 -+++ u-boot-1.1.4/tools/ubparams.c 2007-03-23 10:49:37.000000000 +0100 -@@ -73,6 +73,7 @@ - fclose(params); - - free(envptr); -+ return 0; - } - - diff --git a/target/linux/at91-2.6/image/u-boot/patches/009-mac_init_bugfix.patch b/target/linux/at91-2.6/image/u-boot/patches/009-mac_init_bugfix.patch deleted file mode 100644 index a36ebe3251..0000000000 --- a/target/linux/at91-2.6/image/u-boot/patches/009-mac_init_bugfix.patch +++ /dev/null @@ -1,12 +0,0 @@ -diff -urN u-boot-1.1.4.old/lib_arm/board.c u-boot-1.1.4/lib_arm/board.c ---- u-boot-1.1.4.old/lib_arm/board.c 2007-03-23 10:53:52.000000000 +0100 -+++ u-boot-1.1.4/lib_arm/board.c 2007-03-24 13:17:12.000000000 +0100 -@@ -332,7 +332,7 @@ - } - #endif /* CONFIG_DRIVER_SMC91111 || CONFIG_DRIVER_LAN91C96 */ - --#ifdef CONFIG_MACH_VLINK -+#ifdef CONFIG_VLINK - printf("Initialising MAC address\n\r"); - eth_init(gd->bd); - #endif diff --git a/target/linux/at91-2.6/image/u-boot/patches/010-irda-patch-remove.patch b/target/linux/at91-2.6/image/u-boot/patches/010-irda-patch-remove.patch deleted file mode 100644 index 2f23f5b38b..0000000000 --- a/target/linux/at91-2.6/image/u-boot/patches/010-irda-patch-remove.patch +++ /dev/null @@ -1,13 +0,0 @@ ---- u-boot-1.1.4.old/board/vlink/vlink.c 2007-04-03 11:42:39.000000000 +0200 -+++ u-boot-1.1.4/board/vlink/vlink.c 2007-04-03 11:48:33.000000000 +0200 -@@ -40,10 +40,6 @@ - /* Enable Ctrlc */ - console_init_f (); - -- /* Correct IRDA resistor problem */ -- /* Set PA23_TXD in Output */ -- (AT91PS_PIO) AT91C_BASE_PIOA->PIO_OER = AT91C_PA23_TXD2; -- - /* memory and cpu-speed are setup before relocation */ - /* so we do _nothing_ here */ - diff --git a/target/linux/at91-2.6/image/u-boot/patches/011-ubparams_update.patch b/target/linux/at91-2.6/image/u-boot/patches/011-ubparams_update.patch deleted file mode 100644 index 267903efe4..0000000000 --- a/target/linux/at91-2.6/image/u-boot/patches/011-ubparams_update.patch +++ /dev/null @@ -1,19 +0,0 @@ -diff -urN u-boot-1.1.4.old/tools/ubparams.c u-boot-1.1.4/tools/ubparams.c ---- u-boot-1.1.4.old/tools/ubparams.c 2007-05-01 13:20:17.000000000 +0200 -+++ u-boot-1.1.4/tools/ubparams.c 2007-05-04 10:13:34.000000000 +0200 -@@ -37,12 +37,11 @@ - "stdin=serial\0" - "stdout=serial\0" - "stderr=serial\0" -- "partitions=mtdparts=AT45DB642.spi0:132k(bootloader),33k(ubparams),99k(spare),1056k(linux),2112k(rootfs),33k(nvram),-(rootfs_data)\0" -- "fbargs=setenv bootargs mtdparts=AT45DB642.spi0:132k(bootloader),33k(ubparams),99k(spare),1056k(linux),2112k(rootfs),33k(nvram),-(rootfs_data) root=/dev/mtdblock4 ro init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0" -- "rdba=setenv bootargs mtdparts=AT45DB642.spi0:132k(bootloader),33k(ubparams),99k(spare),1056k(linux),2112k(rootfs),33k(nvram),-(rootfs_data) root=/dev/ram rw initrd=0x21200000,6000000 ramdisk_size=20000 init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0" -+ "fbargs=setenv bootargs root=/dev/mtdblock3 ro init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0" -+ "rdba=setenv bootargs root=/dev/ram rw initrd=0x21200000,6000000 ramdisk_size=20000 init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0" - "rdram=run rdba; tftp 21000000 vImage; tftp 21200000 root.squashfs; bootm 21000000\0" - "flash=run fbargs; bootm 0xc0042000\0" -- "bootargs=setenv bootargs mtdparts=AT45DB642.spi0:132k(bootloader),33k(ubparams),99k(spare),1056k(linux),2112k(rootfs),33k(nvram),-(rootfs_data) root=/dev/mtdblock4 ro init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0" -+ "bootargs=setenv bootargs root=/dev/mtdblock3 ro init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0" - "bootcmd=bootm 0xc0042000\0" - "ethaddr=00:30:49:00:00:01\0" - "ipaddr=10.0.1.73\0" diff --git a/target/linux/at91-2.6/image/u-boot/ubclient/Makefile b/target/linux/at91-2.6/image/u-boot/ubclient/Makefile deleted file mode 100644 index c79260e450..0000000000 --- a/target/linux/at91-2.6/image/u-boot/ubclient/Makefile +++ /dev/null @@ -1,15 +0,0 @@ -# - -all: ubpar - -crc32.c: - ln -s ../lib_generic/crc32.c ./ - -%.o: %.c - $(CC) -I ../include $(CFLAGS) $(EXTRA_FLAGS) -c -o $@ $^ - -ubpar: ubpar.o crc32.o - $(CC) -o $@ $^ - -clean: - rm -f *.o ubpar diff --git a/target/linux/at91-2.6/image/u-boot/ubclient/ubpar.c b/target/linux/at91-2.6/image/u-boot/ubclient/ubpar.c deleted file mode 100644 index 103d4fd217..0000000000 --- a/target/linux/at91-2.6/image/u-boot/ubclient/ubpar.c +++ /dev/null @@ -1,124 +0,0 @@ -/* - * ubparams.c - * - * Generate a u-boot parameter block with correct crc - * - * (C) 1007 Guthrie Consulting - * hamish@prodigi.ch - * - */ - -#include -#include -#include - -#ifndef __ASSEMBLY__ -#define __ASSEMBLY__ -#endif -#define __ASM_STUB_PROCESSOR_H__ -#include -#undef __ASSEMBLY__ -#include - -#define XMK_STR(x) #x -#define MK_STR(x) XMK_STR(x) - -extern unsigned long crc32 (unsigned long, const unsigned char *, unsigned int); - -#if !defined(ENV_CRC) -#define ENV_CRC ~0 -#endif - -static char *environment[] = { - "bootdelay=3\0" - "baudrate=115200\0" - "stdin=serial\0" - "stdout=serial\0" - "stderr=serial\0" - "fbargs=setenv bootargs root=/dev/mtdblock3 ro init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0" - "rdba=setenv bootargs root=/dev/ram rw initrd=0x21200000,6000000 ramdisk_size=20000 init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0" - "rdram=run rdba; tftp 21000000 vImage; tftp 21200000 root.squashfs; bootm 21000000\0" - "flash=run fbargs; bootm 0xc0042000\0" - "bootargs=setenv bootargs root=/dev/mtdblock3 ro init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0" - "bootcmd=bootm 0xc0042000\0" - "ipaddr=10.0.1.73\0" - "serverip=10.0.1.210\0" - "\0" - }; - -int main(int argc, char *argv[]) { - env_t *envptr; - char *src, *srcptr; - char *dataptr; - FILE *params; - int argfail = 1; - char newmac[30]; - char newser[30]; - int paramlen = 0; - int progmac = 0; - int progser = 0; - - if (argc < 3) { - printf ("Invalid arguments\n"); - return 1; - } - - switch (argc) { - case 5: - if (strcmp(argv[3], "--serial") == 0) { - argfail = 0; - sprintf(newser, "serial#=%s", argv[4]); - progser = 1; - } - case 3: - if (strcmp(argv[1], "--mac") == 0) { - argfail = 0; - sprintf(newmac, "ethaddr=%s", argv[2]); - progmac = 1; - } - else - argfail = 1; - } - - if (argfail) { - printf("Invalid arguments\n"); - return 1; - } - - - src = srcptr = *environment; - envptr = (env_t *)malloc(CFG_ENV_SIZE); - dataptr = (char *)envptr + ENV_HEADER_SIZE; - - while(*srcptr) { - //printf("%d, %s\n", strlen(srcptr), srcptr); - paramlen += strlen(srcptr) + 1; - srcptr += strlen(srcptr) + 1; - } - - printf("Make u-boot params\n"); - printf("Params size is %d\n", CFG_ENV_SIZE); - - memset(envptr, 0, CFG_ENV_SIZE); - memcpy(dataptr, src, paramlen); - dataptr += paramlen; - - if (progmac) { - memcpy(dataptr, newmac, strlen(newmac)); - dataptr += strlen(newmac) + 1; - } - - if (progser) { - memcpy(dataptr, newser, strlen(newser)); - dataptr += strlen(newser) + 1; - } - - envptr->crc = crc32(0, envptr->data, ENV_SIZE); - - params = fopen("params", "w"); - fwrite(envptr, CFG_ENV_SIZE, 1, params); - fclose(params); - - free(envptr); - return 0; -} diff --git a/target/linux/at91-2.6/patches/000-at91patches.patch b/target/linux/at91-2.6/patches/000-at91patches.patch deleted file mode 100644 index a5581d2178..0000000000 --- a/target/linux/at91-2.6/patches/000-at91patches.patch +++ /dev/null @@ -1,19066 +0,0 @@ -diff -urN -x CVS linux-2.6.19-final/arch/arm/Kconfig linux-2.6.19/arch/arm/Kconfig ---- linux-2.6.19-final/arch/arm/Kconfig Mon Dec 4 16:39:27 2006 -+++ linux-2.6.19/arch/arm/Kconfig Thu Nov 30 09:08:02 2006 -@@ -583,7 +591,7 @@ - ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ - ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ - ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ -- ARCH_AT91RM9200 || MACH_TRIZEPS4 -+ ARCH_AT91 || MACH_TRIZEPS4 - help - If you say Y here, the LEDs on your machine will be used - to provide useful information about your current system status. -diff -urN -x CVS linux-2.6.19-final/arch/arm/configs/at91rm9200dk_defconfig linux-2.6.19/arch/arm/configs/at91rm9200dk_defconfig ---- linux-2.6.19-final/arch/arm/configs/at91rm9200dk_defconfig Mon Dec 4 16:39:28 2006 -+++ linux-2.6.19/arch/arm/configs/at91rm9200dk_defconfig Mon Nov 20 10:46:02 2006 -@@ -357,9 +357,9 @@ - # - # CONFIG_MTD_COMPLEX_MAPPINGS is not set - CONFIG_MTD_PHYSMAP=y --CONFIG_MTD_PHYSMAP_START=0x10000000 --CONFIG_MTD_PHYSMAP_LEN=0x200000 --CONFIG_MTD_PHYSMAP_BANKWIDTH=2 -+CONFIG_MTD_PHYSMAP_START=0 -+CONFIG_MTD_PHYSMAP_LEN=0 -+CONFIG_MTD_PHYSMAP_BANKWIDTH=0 - # CONFIG_MTD_ARM_INTEGRATOR is not set - # CONFIG_MTD_IMPA7 is not set - # CONFIG_MTD_PLATRAM is not set -@@ -585,7 +585,9 @@ - # CONFIG_USBPCWATCHDOG is not set - # CONFIG_NVRAM is not set - # CONFIG_RTC is not set --CONFIG_AT91_RTC=y -+CONFIG_RTC_LIB=y -+CONFIG_RTC_CLASS=y -+CONFIG_RTC_DRV_AT91RM9200=y - # CONFIG_DTLK is not set - # CONFIG_R3964 is not set - -diff -urN -x CVS linux-2.6.19-final/arch/arm/configs/at91rm9200ek_defconfig linux-2.6.19/arch/arm/configs/at91rm9200ek_defconfig ---- linux-2.6.19-final/arch/arm/configs/at91rm9200ek_defconfig Mon Dec 4 16:39:28 2006 -+++ linux-2.6.19/arch/arm/configs/at91rm9200ek_defconfig Mon Nov 20 10:45:49 2006 -@@ -348,9 +348,9 @@ - # - # CONFIG_MTD_COMPLEX_MAPPINGS is not set - CONFIG_MTD_PHYSMAP=y --CONFIG_MTD_PHYSMAP_START=0x10000000 --CONFIG_MTD_PHYSMAP_LEN=0x800000 --CONFIG_MTD_PHYSMAP_BANKWIDTH=2 -+CONFIG_MTD_PHYSMAP_START=0 -+CONFIG_MTD_PHYSMAP_LEN=0 -+CONFIG_MTD_PHYSMAP_BANKWIDTH=0 - # CONFIG_MTD_ARM_INTEGRATOR is not set - # CONFIG_MTD_IMPA7 is not set - # CONFIG_MTD_PLATRAM is not set -@@ -566,7 +566,9 @@ - # CONFIG_USBPCWATCHDOG is not set - # CONFIG_NVRAM is not set - # CONFIG_RTC is not set --CONFIG_AT91_RTC=y -+CONFIG_RTC_LIB=y -+CONFIG_RTC_CLASS=y -+CONFIG_RTC_DRV_AT91RM9200=y - # CONFIG_DTLK is not set - # CONFIG_R3964 is not set - -diff -urN -x CVS linux-2.6.19-final/arch/arm/configs/at91sam9260ek_defconfig linux-2.6.19/arch/arm/configs/at91sam9260ek_defconfig ---- linux-2.6.19-final/arch/arm/configs/at91sam9260ek_defconfig Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/arch/arm/configs/at91sam9260ek_defconfig Mon Nov 20 10:51:08 2006 -@@ -0,0 +1,950 @@ -+# -+# Automatically generated make config: don't edit -+# Linux kernel version: 2.6.19-rc6 -+# Fri Nov 17 18:42:21 2006 -+# -+CONFIG_ARM=y -+# CONFIG_GENERIC_TIME is not set -+CONFIG_MMU=y -+CONFIG_GENERIC_HARDIRQS=y -+CONFIG_TRACE_IRQFLAGS_SUPPORT=y -+CONFIG_HARDIRQS_SW_RESEND=y -+CONFIG_GENERIC_IRQ_PROBE=y -+CONFIG_RWSEM_GENERIC_SPINLOCK=y -+CONFIG_GENERIC_HWEIGHT=y -+CONFIG_GENERIC_CALIBRATE_DELAY=y -+CONFIG_VECTORS_BASE=0xffff0000 -+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -+ -+# -+# Code maturity level options -+# -+CONFIG_EXPERIMENTAL=y -+CONFIG_BROKEN_ON_SMP=y -+CONFIG_INIT_ENV_ARG_LIMIT=32 -+ -+# -+# General setup -+# -+CONFIG_LOCALVERSION="" -+# CONFIG_LOCALVERSION_AUTO is not set -+# CONFIG_SWAP is not set -+CONFIG_SYSVIPC=y -+# CONFIG_IPC_NS is not set -+# CONFIG_POSIX_MQUEUE is not set -+# CONFIG_BSD_PROCESS_ACCT is not set -+# CONFIG_TASKSTATS is not set -+# CONFIG_UTS_NS is not set -+# CONFIG_AUDIT is not set -+# CONFIG_IKCONFIG is not set -+# CONFIG_RELAY is not set -+CONFIG_INITRAMFS_SOURCE="" -+CONFIG_CC_OPTIMIZE_FOR_SIZE=y -+CONFIG_SYSCTL=y -+# CONFIG_EMBEDDED is not set -+CONFIG_UID16=y -+CONFIG_SYSCTL_SYSCALL=y -+CONFIG_KALLSYMS=y -+# CONFIG_KALLSYMS_ALL is not set -+# CONFIG_KALLSYMS_EXTRA_PASS is not set -+CONFIG_HOTPLUG=y -+CONFIG_PRINTK=y -+CONFIG_BUG=y -+CONFIG_ELF_CORE=y -+CONFIG_BASE_FULL=y -+CONFIG_FUTEX=y -+CONFIG_EPOLL=y -+CONFIG_SHMEM=y -+CONFIG_SLAB=y -+CONFIG_VM_EVENT_COUNTERS=y -+CONFIG_RT_MUTEXES=y -+# CONFIG_TINY_SHMEM is not set -+CONFIG_BASE_SMALL=0 -+# CONFIG_SLOB is not set -+ -+# -+# Loadable module support -+# -+CONFIG_MODULES=y -+CONFIG_MODULE_UNLOAD=y -+# CONFIG_MODULE_FORCE_UNLOAD is not set -+# CONFIG_MODVERSIONS is not set -+# CONFIG_MODULE_SRCVERSION_ALL is not set -+CONFIG_KMOD=y -+ -+# -+# Block layer -+# -+CONFIG_BLOCK=y -+# CONFIG_BLK_DEV_IO_TRACE is not set -+ -+# -+# IO Schedulers -+# -+CONFIG_IOSCHED_NOOP=y -+CONFIG_IOSCHED_AS=y -+# CONFIG_IOSCHED_DEADLINE is not set -+# CONFIG_IOSCHED_CFQ is not set -+CONFIG_DEFAULT_AS=y -+# CONFIG_DEFAULT_DEADLINE is not set -+# CONFIG_DEFAULT_CFQ is not set -+# CONFIG_DEFAULT_NOOP is not set -+CONFIG_DEFAULT_IOSCHED="anticipatory" -+ -+# -+# System Type -+# -+# CONFIG_ARCH_AAEC2000 is not set -+# CONFIG_ARCH_INTEGRATOR is not set -+# CONFIG_ARCH_REALVIEW is not set -+# CONFIG_ARCH_VERSATILE is not set -+CONFIG_ARCH_AT91=y -+# CONFIG_ARCH_CLPS7500 is not set -+# CONFIG_ARCH_CLPS711X is not set -+# CONFIG_ARCH_CO285 is not set -+# CONFIG_ARCH_EBSA110 is not set -+# CONFIG_ARCH_EP93XX is not set -+# CONFIG_ARCH_FOOTBRIDGE is not set -+# CONFIG_ARCH_NETX is not set -+# CONFIG_ARCH_H720X is not set -+# CONFIG_ARCH_IMX is not set -+# CONFIG_ARCH_IOP32X is not set -+# CONFIG_ARCH_IOP33X is not set -+# CONFIG_ARCH_IXP4XX is not set -+# CONFIG_ARCH_IXP2000 is not set -+# CONFIG_ARCH_IXP23XX is not set -+# CONFIG_ARCH_L7200 is not set -+# CONFIG_ARCH_PNX4008 is not set -+# CONFIG_ARCH_PXA is not set -+# CONFIG_ARCH_RPC is not set -+# CONFIG_ARCH_SA1100 is not set -+# CONFIG_ARCH_S3C2410 is not set -+# CONFIG_ARCH_SHARK is not set -+# CONFIG_ARCH_LH7A40X is not set -+# CONFIG_ARCH_OMAP is not set -+ -+# -+# Atmel AT91 System-on-Chip -+# -+# CONFIG_ARCH_AT91RM9200 is not set -+CONFIG_ARCH_AT91SAM9260=y -+# CONFIG_ARCH_AT91SAM9261 is not set -+ -+# -+# AT91SAM9260 Board Type -+# -+CONFIG_MACH_AT91SAM9260EK=y -+ -+# -+# AT91 Board Options -+# -+# CONFIG_MTD_NAND_AT91_BUSWIDTH_16 is not set -+ -+# -+# AT91 Feature Selections -+# -+# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set -+ -+# -+# Processor Type -+# -+CONFIG_CPU_32=y -+CONFIG_CPU_ARM926T=y -+CONFIG_CPU_32v5=y -+CONFIG_CPU_ABRT_EV5TJ=y -+CONFIG_CPU_CACHE_VIVT=y -+CONFIG_CPU_COPY_V4WB=y -+CONFIG_CPU_TLB_V4WBI=y -+CONFIG_CPU_CP15=y -+CONFIG_CPU_CP15_MMU=y -+ -+# -+# Processor Features -+# -+# CONFIG_ARM_THUMB is not set -+# CONFIG_CPU_ICACHE_DISABLE is not set -+# CONFIG_CPU_DCACHE_DISABLE is not set -+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set -+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set -+ -+# -+# Bus support -+# -+ -+# -+# PCCARD (PCMCIA/CardBus) support -+# -+# CONFIG_PCCARD is not set -+ -+# -+# Kernel Features -+# -+# CONFIG_PREEMPT is not set -+# CONFIG_NO_IDLE_HZ is not set -+CONFIG_HZ=100 -+# CONFIG_AEABI is not set -+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set -+CONFIG_SELECT_MEMORY_MODEL=y -+CONFIG_FLATMEM_MANUAL=y -+# CONFIG_DISCONTIGMEM_MANUAL is not set -+# CONFIG_SPARSEMEM_MANUAL is not set -+CONFIG_FLATMEM=y -+CONFIG_FLAT_NODE_MEM_MAP=y -+# CONFIG_SPARSEMEM_STATIC is not set -+CONFIG_SPLIT_PTLOCK_CPUS=4096 -+# CONFIG_RESOURCES_64BIT is not set -+# CONFIG_LEDS is not set -+CONFIG_ALIGNMENT_TRAP=y -+ -+# -+# Boot options -+# -+CONFIG_ZBOOT_ROM_TEXT=0x0 -+CONFIG_ZBOOT_ROM_BSS=0x0 -+CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw" -+# CONFIG_XIP_KERNEL is not set -+ -+# -+# Floating point emulation -+# -+ -+# -+# At least one emulation must be selected -+# -+CONFIG_FPE_NWFPE=y -+# CONFIG_FPE_NWFPE_XP is not set -+# CONFIG_FPE_FASTFPE is not set -+# CONFIG_VFP is not set -+ -+# -+# Userspace binary formats -+# -+CONFIG_BINFMT_ELF=y -+# CONFIG_BINFMT_AOUT is not set -+# CONFIG_BINFMT_MISC is not set -+# CONFIG_ARTHUR is not set -+ -+# -+# Power management options -+# -+# CONFIG_PM is not set -+# CONFIG_APM is not set -+ -+# -+# Networking -+# -+CONFIG_NET=y -+ -+# -+# Networking options -+# -+# CONFIG_NETDEBUG is not set -+CONFIG_PACKET=y -+# CONFIG_PACKET_MMAP is not set -+CONFIG_UNIX=y -+CONFIG_XFRM=y -+# CONFIG_XFRM_USER is not set -+# CONFIG_XFRM_SUB_POLICY is not set -+# CONFIG_NET_KEY is not set -+CONFIG_INET=y -+# CONFIG_IP_MULTICAST is not set -+# CONFIG_IP_ADVANCED_ROUTER is not set -+CONFIG_IP_FIB_HASH=y -+CONFIG_IP_PNP=y -+# CONFIG_IP_PNP_DHCP is not set -+CONFIG_IP_PNP_BOOTP=y -+# CONFIG_IP_PNP_RARP is not set -+# CONFIG_NET_IPIP is not set -+# CONFIG_NET_IPGRE is not set -+# CONFIG_ARPD is not set -+# CONFIG_SYN_COOKIES is not set -+# CONFIG_INET_AH is not set -+# CONFIG_INET_ESP is not set -+# CONFIG_INET_IPCOMP is not set -+# CONFIG_INET_XFRM_TUNNEL is not set -+# CONFIG_INET_TUNNEL is not set -+CONFIG_INET_XFRM_MODE_TRANSPORT=y -+CONFIG_INET_XFRM_MODE_TUNNEL=y -+CONFIG_INET_XFRM_MODE_BEET=y -+CONFIG_INET_DIAG=y -+CONFIG_INET_TCP_DIAG=y -+# CONFIG_TCP_CONG_ADVANCED is not set -+CONFIG_TCP_CONG_CUBIC=y -+CONFIG_DEFAULT_TCP_CONG="cubic" -+# CONFIG_IPV6 is not set -+# CONFIG_INET6_XFRM_TUNNEL is not set -+# CONFIG_INET6_TUNNEL is not set -+# CONFIG_NETWORK_SECMARK is not set -+# CONFIG_NETFILTER is not set -+ -+# -+# DCCP Configuration (EXPERIMENTAL) -+# -+# CONFIG_IP_DCCP is not set -+ -+# -+# SCTP Configuration (EXPERIMENTAL) -+# -+# CONFIG_IP_SCTP is not set -+ -+# -+# TIPC Configuration (EXPERIMENTAL) -+# -+# CONFIG_TIPC is not set -+# CONFIG_ATM is not set -+# CONFIG_BRIDGE is not set -+# CONFIG_VLAN_8021Q is not set -+# CONFIG_DECNET is not set -+# CONFIG_LLC2 is not set -+# CONFIG_IPX is not set -+# CONFIG_ATALK is not set -+# CONFIG_X25 is not set -+# CONFIG_LAPB is not set -+# CONFIG_ECONET is not set -+# CONFIG_WAN_ROUTER is not set -+ -+# -+# QoS and/or fair queueing -+# -+# CONFIG_NET_SCHED is not set -+ -+# -+# Network testing -+# -+# CONFIG_NET_PKTGEN is not set -+# CONFIG_HAMRADIO is not set -+# CONFIG_IRDA is not set -+# CONFIG_BT is not set -+# CONFIG_IEEE80211 is not set -+ -+# -+# Device Drivers -+# -+ -+# -+# Generic Driver Options -+# -+CONFIG_STANDALONE=y -+CONFIG_PREVENT_FIRMWARE_BUILD=y -+# CONFIG_FW_LOADER is not set -+# CONFIG_DEBUG_DRIVER is not set -+# CONFIG_SYS_HYPERVISOR is not set -+ -+# -+# Connector - unified userspace <-> kernelspace linker -+# -+# CONFIG_CONNECTOR is not set -+ -+# -+# Memory Technology Devices (MTD) -+# -+# CONFIG_MTD is not set -+ -+# -+# Parallel port support -+# -+# CONFIG_PARPORT is not set -+ -+# -+# Plug and Play support -+# -+ -+# -+# Block devices -+# -+# CONFIG_BLK_DEV_COW_COMMON is not set -+# CONFIG_BLK_DEV_LOOP is not set -+# CONFIG_BLK_DEV_NBD is not set -+# CONFIG_BLK_DEV_UB is not set -+CONFIG_BLK_DEV_RAM=y -+CONFIG_BLK_DEV_RAM_COUNT=16 -+CONFIG_BLK_DEV_RAM_SIZE=8192 -+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 -+CONFIG_BLK_DEV_INITRD=y -+# CONFIG_CDROM_PKTCDVD is not set -+# CONFIG_ATA_OVER_ETH is not set -+ -+# -+# SCSI device support -+# -+# CONFIG_RAID_ATTRS is not set -+CONFIG_SCSI=y -+# CONFIG_SCSI_NETLINK is not set -+CONFIG_SCSI_PROC_FS=y -+ -+# -+# SCSI support type (disk, tape, CD-ROM) -+# -+CONFIG_BLK_DEV_SD=y -+# CONFIG_CHR_DEV_ST is not set -+# CONFIG_CHR_DEV_OSST is not set -+# CONFIG_BLK_DEV_SR is not set -+# CONFIG_CHR_DEV_SG is not set -+# CONFIG_CHR_DEV_SCH is not set -+ -+# -+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -+# -+CONFIG_SCSI_MULTI_LUN=y -+# CONFIG_SCSI_CONSTANTS is not set -+# CONFIG_SCSI_LOGGING is not set -+ -+# -+# SCSI Transports -+# -+# CONFIG_SCSI_SPI_ATTRS is not set -+# CONFIG_SCSI_FC_ATTRS is not set -+# CONFIG_SCSI_ISCSI_ATTRS is not set -+# CONFIG_SCSI_SAS_ATTRS is not set -+# CONFIG_SCSI_SAS_LIBSAS is not set -+ -+# -+# SCSI low-level drivers -+# -+# CONFIG_ISCSI_TCP is not set -+# CONFIG_SCSI_DEBUG is not set -+ -+# -+# Multi-device support (RAID and LVM) -+# -+# CONFIG_MD is not set -+ -+# -+# Fusion MPT device support -+# -+# CONFIG_FUSION is not set -+ -+# -+# IEEE 1394 (FireWire) support -+# -+ -+# -+# I2O device support -+# -+ -+# -+# Network device support -+# -+# CONFIG_NETDEVICES is not set -+# CONFIG_NETPOLL is not set -+# CONFIG_NET_POLL_CONTROLLER is not set -+ -+# -+# ISDN subsystem -+# -+# CONFIG_ISDN is not set -+ -+# -+# Input device support -+# -+CONFIG_INPUT=y -+# CONFIG_INPUT_FF_MEMLESS is not set -+ -+# -+# Userland interfaces -+# -+CONFIG_INPUT_MOUSEDEV=y -+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -+# CONFIG_INPUT_JOYDEV is not set -+# CONFIG_INPUT_TSDEV is not set -+# CONFIG_INPUT_EVDEV is not set -+# CONFIG_INPUT_EVBUG is not set -+ -+# -+# Input Device Drivers -+# -+# CONFIG_INPUT_KEYBOARD is not set -+# CONFIG_INPUT_MOUSE is not set -+# CONFIG_INPUT_JOYSTICK is not set -+# CONFIG_INPUT_TOUCHSCREEN is not set -+# CONFIG_INPUT_MISC is not set -+ -+# -+# Hardware I/O ports -+# -+# CONFIG_SERIO is not set -+# CONFIG_GAMEPORT is not set -+ -+# -+# Character devices -+# -+CONFIG_VT=y -+CONFIG_VT_CONSOLE=y -+CONFIG_HW_CONSOLE=y -+# CONFIG_VT_HW_CONSOLE_BINDING is not set -+# CONFIG_SERIAL_NONSTANDARD is not set -+ -+# -+# Serial drivers -+# -+# CONFIG_SERIAL_8250 is not set -+ -+# -+# Non-8250 serial port support -+# -+CONFIG_SERIAL_ATMEL=y -+CONFIG_SERIAL_ATMEL_CONSOLE=y -+# CONFIG_SERIAL_ATMEL_TTYAT is not set -+CONFIG_SERIAL_CORE=y -+CONFIG_SERIAL_CORE_CONSOLE=y -+CONFIG_UNIX98_PTYS=y -+CONFIG_LEGACY_PTYS=y -+CONFIG_LEGACY_PTY_COUNT=256 -+ -+# -+# IPMI -+# -+# CONFIG_IPMI_HANDLER is not set -+ -+# -+# Watchdog Cards -+# -+CONFIG_WATCHDOG=y -+CONFIG_WATCHDOG_NOWAYOUT=y -+ -+# -+# Watchdog Device Drivers -+# -+# CONFIG_SOFT_WATCHDOG is not set -+ -+# -+# USB-based Watchdog Cards -+# -+# CONFIG_USBPCWATCHDOG is not set -+CONFIG_HW_RANDOM=y -+# CONFIG_NVRAM is not set -+# CONFIG_DTLK is not set -+# CONFIG_R3964 is not set -+ -+# -+# Ftape, the floppy tape device driver -+# -+# CONFIG_RAW_DRIVER is not set -+ -+# -+# TPM devices -+# -+# CONFIG_TCG_TPM is not set -+ -+# -+# I2C support -+# -+# CONFIG_I2C is not set -+ -+# -+# SPI support -+# -+# CONFIG_SPI is not set -+# CONFIG_SPI_MASTER is not set -+ -+# -+# Dallas's 1-wire bus -+# -+# CONFIG_W1 is not set -+ -+# -+# Hardware Monitoring support -+# -+# CONFIG_HWMON is not set -+# CONFIG_HWMON_VID is not set -+ -+# -+# Misc devices -+# -+# CONFIG_TIFM_CORE is not set -+ -+# -+# LED devices -+# -+# CONFIG_NEW_LEDS is not set -+ -+# -+# LED drivers -+# -+ -+# -+# LED Triggers -+# -+ -+# -+# Multimedia devices -+# -+# CONFIG_VIDEO_DEV is not set -+ -+# -+# Digital Video Broadcasting Devices -+# -+# CONFIG_DVB is not set -+# CONFIG_USB_DABUSB is not set -+ -+# -+# Graphics support -+# -+# CONFIG_FIRMWARE_EDID is not set -+# CONFIG_FB is not set -+ -+# -+# Console display driver support -+# -+# CONFIG_VGA_CONSOLE is not set -+CONFIG_DUMMY_CONSOLE=y -+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -+ -+# -+# Sound -+# -+# CONFIG_SOUND is not set -+ -+# -+# USB support -+# -+CONFIG_USB_ARCH_HAS_HCD=y -+CONFIG_USB_ARCH_HAS_OHCI=y -+# CONFIG_USB_ARCH_HAS_EHCI is not set -+CONFIG_USB=y -+# CONFIG_USB_DEBUG is not set -+ -+# -+# Miscellaneous USB options -+# -+CONFIG_USB_DEVICEFS=y -+# CONFIG_USB_BANDWIDTH is not set -+# CONFIG_USB_DYNAMIC_MINORS is not set -+# CONFIG_USB_OTG is not set -+ -+# -+# USB Host Controller Drivers -+# -+# CONFIG_USB_ISP116X_HCD is not set -+CONFIG_USB_OHCI_HCD=y -+# CONFIG_USB_OHCI_BIG_ENDIAN is not set -+CONFIG_USB_OHCI_LITTLE_ENDIAN=y -+# CONFIG_USB_SL811_HCD is not set -+ -+# -+# USB Device Class drivers -+# -+# CONFIG_USB_ACM is not set -+# CONFIG_USB_PRINTER is not set -+ -+# -+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -+# -+ -+# -+# may also be needed; see USB_STORAGE Help for more information -+# -+CONFIG_USB_STORAGE=y -+CONFIG_USB_STORAGE_DEBUG=y -+# CONFIG_USB_STORAGE_DATAFAB is not set -+# CONFIG_USB_STORAGE_FREECOM is not set -+# CONFIG_USB_STORAGE_DPCM is not set -+# CONFIG_USB_STORAGE_USBAT is not set -+# CONFIG_USB_STORAGE_SDDR09 is not set -+# CONFIG_USB_STORAGE_SDDR55 is not set -+# CONFIG_USB_STORAGE_JUMPSHOT is not set -+# CONFIG_USB_STORAGE_ALAUDA is not set -+# CONFIG_USB_STORAGE_KARMA is not set -+# CONFIG_USB_LIBUSUAL is not set -+ -+# -+# USB Input Devices -+# -+# CONFIG_USB_HID is not set -+ -+# -+# USB HID Boot Protocol drivers -+# -+# CONFIG_USB_KBD is not set -+# CONFIG_USB_MOUSE is not set -+# CONFIG_USB_AIPTEK is not set -+# CONFIG_USB_WACOM is not set -+# CONFIG_USB_ACECAD is not set -+# CONFIG_USB_KBTAB is not set -+# CONFIG_USB_POWERMATE is not set -+# CONFIG_USB_TOUCHSCREEN is not set -+# CONFIG_USB_YEALINK is not set -+# CONFIG_USB_XPAD is not set -+# CONFIG_USB_ATI_REMOTE is not set -+# CONFIG_USB_ATI_REMOTE2 is not set -+# CONFIG_USB_KEYSPAN_REMOTE is not set -+# CONFIG_USB_APPLETOUCH is not set -+ -+# -+# USB Imaging devices -+# -+# CONFIG_USB_MDC800 is not set -+# CONFIG_USB_MICROTEK is not set -+ -+# -+# USB Network Adapters -+# -+# CONFIG_USB_CATC is not set -+# CONFIG_USB_KAWETH is not set -+# CONFIG_USB_PEGASUS is not set -+# CONFIG_USB_RTL8150 is not set -+# CONFIG_USB_USBNET_MII is not set -+# CONFIG_USB_USBNET is not set -+CONFIG_USB_MON=y -+ -+# -+# USB port drivers -+# -+ -+# -+# USB Serial Converter support -+# -+# CONFIG_USB_SERIAL is not set -+ -+# -+# USB Miscellaneous drivers -+# -+# CONFIG_USB_EMI62 is not set -+# CONFIG_USB_EMI26 is not set -+# CONFIG_USB_ADUTUX is not set -+# CONFIG_USB_AUERSWALD is not set -+# CONFIG_USB_RIO500 is not set -+# CONFIG_USB_LEGOTOWER is not set -+# CONFIG_USB_LCD is not set -+# CONFIG_USB_LED is not set -+# CONFIG_USB_CYPRESS_CY7C63 is not set -+# CONFIG_USB_CYTHERM is not set -+# CONFIG_USB_PHIDGET is not set -+# CONFIG_USB_IDMOUSE is not set -+# CONFIG_USB_FTDI_ELAN is not set -+# CONFIG_USB_APPLEDISPLAY is not set -+# CONFIG_USB_LD is not set -+# CONFIG_USB_TRANCEVIBRATOR is not set -+# CONFIG_USB_TEST is not set -+ -+# -+# USB DSL modem support -+# -+ -+# -+# USB Gadget Support -+# -+CONFIG_USB_GADGET=y -+# CONFIG_USB_GADGET_DEBUG_FILES is not set -+CONFIG_USB_GADGET_SELECTED=y -+# CONFIG_USB_GADGET_NET2280 is not set -+# CONFIG_USB_GADGET_PXA2XX is not set -+# CONFIG_USB_GADGET_GOKU is not set -+# CONFIG_USB_GADGET_LH7A40X is not set -+# CONFIG_USB_GADGET_OMAP is not set -+CONFIG_USB_GADGET_AT91=y -+CONFIG_USB_AT91=y -+# CONFIG_USB_GADGET_DUMMY_HCD is not set -+# CONFIG_USB_GADGET_DUALSPEED is not set -+CONFIG_USB_ZERO=m -+# CONFIG_USB_ETH is not set -+CONFIG_USB_GADGETFS=m -+CONFIG_USB_FILE_STORAGE=m -+# CONFIG_USB_FILE_STORAGE_TEST is not set -+CONFIG_USB_G_SERIAL=m -+# CONFIG_USB_MIDI_GADGET is not set -+ -+# -+# MMC/SD Card support -+# -+# CONFIG_MMC is not set -+ -+# -+# Real Time Clock -+# -+CONFIG_RTC_LIB=y -+# CONFIG_RTC_CLASS is not set -+ -+# -+# File systems -+# -+CONFIG_EXT2_FS=y -+# CONFIG_EXT2_FS_XATTR is not set -+# CONFIG_EXT2_FS_XIP is not set -+# CONFIG_EXT3_FS is not set -+# CONFIG_EXT4DEV_FS is not set -+# CONFIG_REISERFS_FS is not set -+# CONFIG_JFS_FS is not set -+# CONFIG_FS_POSIX_ACL is not set -+# CONFIG_XFS_FS is not set -+# CONFIG_GFS2_FS is not set -+# CONFIG_OCFS2_FS is not set -+# CONFIG_MINIX_FS is not set -+# CONFIG_ROMFS_FS is not set -+CONFIG_INOTIFY=y -+CONFIG_INOTIFY_USER=y -+# CONFIG_QUOTA is not set -+CONFIG_DNOTIFY=y -+# CONFIG_AUTOFS_FS is not set -+# CONFIG_AUTOFS4_FS is not set -+# CONFIG_FUSE_FS is not set -+ -+# -+# CD-ROM/DVD Filesystems -+# -+# CONFIG_ISO9660_FS is not set -+# CONFIG_UDF_FS is not set -+ -+# -+# DOS/FAT/NT Filesystems -+# -+CONFIG_FAT_FS=y -+# CONFIG_MSDOS_FS is not set -+CONFIG_VFAT_FS=y -+CONFIG_FAT_DEFAULT_CODEPAGE=437 -+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -+# CONFIG_NTFS_FS is not set -+ -+# -+# Pseudo filesystems -+# -+CONFIG_PROC_FS=y -+CONFIG_PROC_SYSCTL=y -+CONFIG_SYSFS=y -+CONFIG_TMPFS=y -+# CONFIG_TMPFS_POSIX_ACL is not set -+# CONFIG_HUGETLB_PAGE is not set -+CONFIG_RAMFS=y -+# CONFIG_CONFIGFS_FS is not set -+ -+# -+# Miscellaneous filesystems -+# -+# CONFIG_ADFS_FS is not set -+# CONFIG_AFFS_FS is not set -+# CONFIG_HFS_FS is not set -+# CONFIG_HFSPLUS_FS is not set -+# CONFIG_BEFS_FS is not set -+# CONFIG_BFS_FS is not set -+# CONFIG_EFS_FS is not set -+CONFIG_CRAMFS=y -+# CONFIG_VXFS_FS is not set -+# CONFIG_HPFS_FS is not set -+# CONFIG_QNX4FS_FS is not set -+# CONFIG_SYSV_FS is not set -+# CONFIG_UFS_FS is not set -+ -+# -+# Network File Systems -+# -+# CONFIG_NFS_FS is not set -+# CONFIG_NFSD is not set -+# CONFIG_SMB_FS is not set -+# CONFIG_CIFS is not set -+# CONFIG_NCP_FS is not set -+# CONFIG_CODA_FS is not set -+# CONFIG_AFS_FS is not set -+# CONFIG_9P_FS is not set -+ -+# -+# Partition Types -+# -+# CONFIG_PARTITION_ADVANCED is not set -+CONFIG_MSDOS_PARTITION=y -+ -+# -+# Native Language Support -+# -+CONFIG_NLS=y -+CONFIG_NLS_DEFAULT="iso8859-1" -+CONFIG_NLS_CODEPAGE_437=y -+# CONFIG_NLS_CODEPAGE_737 is not set -+# CONFIG_NLS_CODEPAGE_775 is not set -+CONFIG_NLS_CODEPAGE_850=y -+# CONFIG_NLS_CODEPAGE_852 is not set -+# CONFIG_NLS_CODEPAGE_855 is not set -+# CONFIG_NLS_CODEPAGE_857 is not set -+# CONFIG_NLS_CODEPAGE_860 is not set -+# CONFIG_NLS_CODEPAGE_861 is not set -+# CONFIG_NLS_CODEPAGE_862 is not set -+# CONFIG_NLS_CODEPAGE_863 is not set -+# CONFIG_NLS_CODEPAGE_864 is not set -+# CONFIG_NLS_CODEPAGE_865 is not set -+# CONFIG_NLS_CODEPAGE_866 is not set -+# CONFIG_NLS_CODEPAGE_869 is not set -+# CONFIG_NLS_CODEPAGE_936 is not set -+# CONFIG_NLS_CODEPAGE_950 is not set -+# CONFIG_NLS_CODEPAGE_932 is not set -+# CONFIG_NLS_CODEPAGE_949 is not set -+# CONFIG_NLS_CODEPAGE_874 is not set -+# CONFIG_NLS_ISO8859_8 is not set -+# CONFIG_NLS_CODEPAGE_1250 is not set -+# CONFIG_NLS_CODEPAGE_1251 is not set -+# CONFIG_NLS_ASCII is not set -+CONFIG_NLS_ISO8859_1=y -+# CONFIG_NLS_ISO8859_2 is not set -+# CONFIG_NLS_ISO8859_3 is not set -+# CONFIG_NLS_ISO8859_4 is not set -+# CONFIG_NLS_ISO8859_5 is not set -+# CONFIG_NLS_ISO8859_6 is not set -+# CONFIG_NLS_ISO8859_7 is not set -+# CONFIG_NLS_ISO8859_9 is not set -+# CONFIG_NLS_ISO8859_13 is not set -+# CONFIG_NLS_ISO8859_14 is not set -+# CONFIG_NLS_ISO8859_15 is not set -+# CONFIG_NLS_KOI8_R is not set -+# CONFIG_NLS_KOI8_U is not set -+# CONFIG_NLS_UTF8 is not set -+ -+# -+# Profiling support -+# -+# CONFIG_PROFILING is not set -+ -+# -+# Kernel hacking -+# -+# CONFIG_PRINTK_TIME is not set -+CONFIG_ENABLE_MUST_CHECK=y -+# CONFIG_MAGIC_SYSRQ is not set -+# CONFIG_UNUSED_SYMBOLS is not set -+CONFIG_DEBUG_KERNEL=y -+CONFIG_LOG_BUF_SHIFT=14 -+CONFIG_DETECT_SOFTLOCKUP=y -+# CONFIG_SCHEDSTATS is not set -+# CONFIG_DEBUG_SLAB is not set -+# CONFIG_DEBUG_RT_MUTEXES is not set -+# CONFIG_RT_MUTEX_TESTER is not set -+# CONFIG_DEBUG_SPINLOCK is not set -+# CONFIG_DEBUG_MUTEXES is not set -+# CONFIG_DEBUG_RWSEMS is not set -+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -+# CONFIG_DEBUG_KOBJECT is not set -+CONFIG_DEBUG_BUGVERBOSE=y -+# CONFIG_DEBUG_INFO is not set -+# CONFIG_DEBUG_FS is not set -+# CONFIG_DEBUG_VM is not set -+# CONFIG_DEBUG_LIST is not set -+CONFIG_FRAME_POINTER=y -+CONFIG_FORCED_INLINING=y -+# CONFIG_HEADERS_CHECK is not set -+# CONFIG_RCU_TORTURE_TEST is not set -+CONFIG_DEBUG_USER=y -+# CONFIG_DEBUG_WAITQ is not set -+# CONFIG_DEBUG_ERRORS is not set -+CONFIG_DEBUG_LL=y -+# CONFIG_DEBUG_ICEDCC is not set -+ -+# -+# Security options -+# -+# CONFIG_KEYS is not set -+# CONFIG_SECURITY is not set -+ -+# -+# Cryptographic options -+# -+# CONFIG_CRYPTO is not set -+ -+# -+# Library routines -+# -+# CONFIG_CRC_CCITT is not set -+# CONFIG_CRC16 is not set -+CONFIG_CRC32=y -+# CONFIG_LIBCRC32C is not set -+CONFIG_ZLIB_INFLATE=y -+CONFIG_PLIST=y -diff -urN -x CVS linux-2.6.19-final/arch/arm/configs/at91sam9261ek_defconfig linux-2.6.19/arch/arm/configs/at91sam9261ek_defconfig ---- linux-2.6.19-final/arch/arm/configs/at91sam9261ek_defconfig Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/arch/arm/configs/at91sam9261ek_defconfig Mon Nov 20 10:51:08 2006 -@@ -0,0 +1,1106 @@ -+# -+# Automatically generated make config: don't edit -+# Linux kernel version: 2.6.19-rc6 -+# Fri Nov 17 18:00:38 2006 -+# -+CONFIG_ARM=y -+# CONFIG_GENERIC_TIME is not set -+CONFIG_MMU=y -+CONFIG_GENERIC_HARDIRQS=y -+CONFIG_TRACE_IRQFLAGS_SUPPORT=y -+CONFIG_HARDIRQS_SW_RESEND=y -+CONFIG_GENERIC_IRQ_PROBE=y -+CONFIG_RWSEM_GENERIC_SPINLOCK=y -+CONFIG_GENERIC_HWEIGHT=y -+CONFIG_GENERIC_CALIBRATE_DELAY=y -+CONFIG_VECTORS_BASE=0xffff0000 -+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -+ -+# -+# Code maturity level options -+# -+CONFIG_EXPERIMENTAL=y -+CONFIG_BROKEN_ON_SMP=y -+CONFIG_INIT_ENV_ARG_LIMIT=32 -+ -+# -+# General setup -+# -+CONFIG_LOCALVERSION="" -+# CONFIG_LOCALVERSION_AUTO is not set -+# CONFIG_SWAP is not set -+CONFIG_SYSVIPC=y -+# CONFIG_IPC_NS is not set -+# CONFIG_POSIX_MQUEUE is not set -+# CONFIG_BSD_PROCESS_ACCT is not set -+# CONFIG_TASKSTATS is not set -+# CONFIG_UTS_NS is not set -+# CONFIG_AUDIT is not set -+# CONFIG_IKCONFIG is not set -+# CONFIG_RELAY is not set -+CONFIG_INITRAMFS_SOURCE="" -+CONFIG_CC_OPTIMIZE_FOR_SIZE=y -+CONFIG_SYSCTL=y -+# CONFIG_EMBEDDED is not set -+CONFIG_UID16=y -+CONFIG_SYSCTL_SYSCALL=y -+CONFIG_KALLSYMS=y -+# CONFIG_KALLSYMS_ALL is not set -+# CONFIG_KALLSYMS_EXTRA_PASS is not set -+CONFIG_HOTPLUG=y -+CONFIG_PRINTK=y -+CONFIG_BUG=y -+CONFIG_ELF_CORE=y -+CONFIG_BASE_FULL=y -+CONFIG_FUTEX=y -+CONFIG_EPOLL=y -+CONFIG_SHMEM=y -+CONFIG_SLAB=y -+CONFIG_VM_EVENT_COUNTERS=y -+CONFIG_RT_MUTEXES=y -+# CONFIG_TINY_SHMEM is not set -+CONFIG_BASE_SMALL=0 -+# CONFIG_SLOB is not set -+ -+# -+# Loadable module support -+# -+CONFIG_MODULES=y -+CONFIG_MODULE_UNLOAD=y -+# CONFIG_MODULE_FORCE_UNLOAD is not set -+# CONFIG_MODVERSIONS is not set -+# CONFIG_MODULE_SRCVERSION_ALL is not set -+CONFIG_KMOD=y -+ -+# -+# Block layer -+# -+CONFIG_BLOCK=y -+# CONFIG_BLK_DEV_IO_TRACE is not set -+ -+# -+# IO Schedulers -+# -+CONFIG_IOSCHED_NOOP=y -+CONFIG_IOSCHED_AS=y -+# CONFIG_IOSCHED_DEADLINE is not set -+# CONFIG_IOSCHED_CFQ is not set -+CONFIG_DEFAULT_AS=y -+# CONFIG_DEFAULT_DEADLINE is not set -+# CONFIG_DEFAULT_CFQ is not set -+# CONFIG_DEFAULT_NOOP is not set -+CONFIG_DEFAULT_IOSCHED="anticipatory" -+ -+# -+# System Type -+# -+# CONFIG_ARCH_AAEC2000 is not set -+# CONFIG_ARCH_INTEGRATOR is not set -+# CONFIG_ARCH_REALVIEW is not set -+# CONFIG_ARCH_VERSATILE is not set -+CONFIG_ARCH_AT91=y -+# CONFIG_ARCH_CLPS7500 is not set -+# CONFIG_ARCH_CLPS711X is not set -+# CONFIG_ARCH_CO285 is not set -+# CONFIG_ARCH_EBSA110 is not set -+# CONFIG_ARCH_EP93XX is not set -+# CONFIG_ARCH_FOOTBRIDGE is not set -+# CONFIG_ARCH_NETX is not set -+# CONFIG_ARCH_H720X is not set -+# CONFIG_ARCH_IMX is not set -+# CONFIG_ARCH_IOP32X is not set -+# CONFIG_ARCH_IOP33X is not set -+# CONFIG_ARCH_IXP4XX is not set -+# CONFIG_ARCH_IXP2000 is not set -+# CONFIG_ARCH_IXP23XX is not set -+# CONFIG_ARCH_L7200 is not set -+# CONFIG_ARCH_PNX4008 is not set -+# CONFIG_ARCH_PXA is not set -+# CONFIG_ARCH_RPC is not set -+# CONFIG_ARCH_SA1100 is not set -+# CONFIG_ARCH_S3C2410 is not set -+# CONFIG_ARCH_SHARK is not set -+# CONFIG_ARCH_LH7A40X is not set -+# CONFIG_ARCH_OMAP is not set -+ -+# -+# Atmel AT91 System-on-Chip -+# -+# CONFIG_ARCH_AT91RM9200 is not set -+# CONFIG_ARCH_AT91SAM9260 is not set -+CONFIG_ARCH_AT91SAM9261=y -+ -+# -+# AT91SAM9261 Board Type -+# -+CONFIG_MACH_AT91SAM9261EK=y -+ -+# -+# AT91 Board Options -+# -+# CONFIG_MTD_NAND_AT91_BUSWIDTH_16 is not set -+ -+# -+# AT91 Feature Selections -+# -+# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set -+ -+# -+# Processor Type -+# -+CONFIG_CPU_32=y -+CONFIG_CPU_ARM926T=y -+CONFIG_CPU_32v5=y -+CONFIG_CPU_ABRT_EV5TJ=y -+CONFIG_CPU_CACHE_VIVT=y -+CONFIG_CPU_COPY_V4WB=y -+CONFIG_CPU_TLB_V4WBI=y -+CONFIG_CPU_CP15=y -+CONFIG_CPU_CP15_MMU=y -+ -+# -+# Processor Features -+# -+# CONFIG_ARM_THUMB is not set -+# CONFIG_CPU_ICACHE_DISABLE is not set -+# CONFIG_CPU_DCACHE_DISABLE is not set -+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set -+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set -+ -+# -+# Bus support -+# -+ -+# -+# PCCARD (PCMCIA/CardBus) support -+# -+# CONFIG_PCCARD is not set -+ -+# -+# Kernel Features -+# -+# CONFIG_PREEMPT is not set -+# CONFIG_NO_IDLE_HZ is not set -+CONFIG_HZ=100 -+# CONFIG_AEABI is not set -+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set -+CONFIG_SELECT_MEMORY_MODEL=y -+CONFIG_FLATMEM_MANUAL=y -+# CONFIG_DISCONTIGMEM_MANUAL is not set -+# CONFIG_SPARSEMEM_MANUAL is not set -+CONFIG_FLATMEM=y -+CONFIG_FLAT_NODE_MEM_MAP=y -+# CONFIG_SPARSEMEM_STATIC is not set -+CONFIG_SPLIT_PTLOCK_CPUS=4096 -+# CONFIG_RESOURCES_64BIT is not set -+# CONFIG_LEDS is not set -+CONFIG_ALIGNMENT_TRAP=y -+ -+# -+# Boot options -+# -+CONFIG_ZBOOT_ROM_TEXT=0x0 -+CONFIG_ZBOOT_ROM_BSS=0x0 -+CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw" -+# CONFIG_XIP_KERNEL is not set -+ -+# -+# Floating point emulation -+# -+ -+# -+# At least one emulation must be selected -+# -+CONFIG_FPE_NWFPE=y -+# CONFIG_FPE_NWFPE_XP is not set -+# CONFIG_FPE_FASTFPE is not set -+# CONFIG_VFP is not set -+ -+# -+# Userspace binary formats -+# -+CONFIG_BINFMT_ELF=y -+# CONFIG_BINFMT_AOUT is not set -+# CONFIG_BINFMT_MISC is not set -+# CONFIG_ARTHUR is not set -+ -+# -+# Power management options -+# -+# CONFIG_PM is not set -+# CONFIG_APM is not set -+ -+# -+# Networking -+# -+CONFIG_NET=y -+ -+# -+# Networking options -+# -+# CONFIG_NETDEBUG is not set -+CONFIG_PACKET=y -+# CONFIG_PACKET_MMAP is not set -+CONFIG_UNIX=y -+CONFIG_XFRM=y -+# CONFIG_XFRM_USER is not set -+# CONFIG_XFRM_SUB_POLICY is not set -+# CONFIG_NET_KEY is not set -+CONFIG_INET=y -+# CONFIG_IP_MULTICAST is not set -+# CONFIG_IP_ADVANCED_ROUTER is not set -+CONFIG_IP_FIB_HASH=y -+CONFIG_IP_PNP=y -+# CONFIG_IP_PNP_DHCP is not set -+CONFIG_IP_PNP_BOOTP=y -+# CONFIG_IP_PNP_RARP is not set -+# CONFIG_NET_IPIP is not set -+# CONFIG_NET_IPGRE is not set -+# CONFIG_ARPD is not set -+# CONFIG_SYN_COOKIES is not set -+# CONFIG_INET_AH is not set -+# CONFIG_INET_ESP is not set -+# CONFIG_INET_IPCOMP is not set -+# CONFIG_INET_XFRM_TUNNEL is not set -+# CONFIG_INET_TUNNEL is not set -+CONFIG_INET_XFRM_MODE_TRANSPORT=y -+CONFIG_INET_XFRM_MODE_TUNNEL=y -+CONFIG_INET_XFRM_MODE_BEET=y -+CONFIG_INET_DIAG=y -+CONFIG_INET_TCP_DIAG=y -+# CONFIG_TCP_CONG_ADVANCED is not set -+CONFIG_TCP_CONG_CUBIC=y -+CONFIG_DEFAULT_TCP_CONG="cubic" -+# CONFIG_IPV6 is not set -+# CONFIG_INET6_XFRM_TUNNEL is not set -+# CONFIG_INET6_TUNNEL is not set -+# CONFIG_NETWORK_SECMARK is not set -+# CONFIG_NETFILTER is not set -+ -+# -+# DCCP Configuration (EXPERIMENTAL) -+# -+# CONFIG_IP_DCCP is not set -+ -+# -+# SCTP Configuration (EXPERIMENTAL) -+# -+# CONFIG_IP_SCTP is not set -+ -+# -+# TIPC Configuration (EXPERIMENTAL) -+# -+# CONFIG_TIPC is not set -+# CONFIG_ATM is not set -+# CONFIG_BRIDGE is not set -+# CONFIG_VLAN_8021Q is not set -+# CONFIG_DECNET is not set -+# CONFIG_LLC2 is not set -+# CONFIG_IPX is not set -+# CONFIG_ATALK is not set -+# CONFIG_X25 is not set -+# CONFIG_LAPB is not set -+# CONFIG_ECONET is not set -+# CONFIG_WAN_ROUTER is not set -+ -+# -+# QoS and/or fair queueing -+# -+# CONFIG_NET_SCHED is not set -+ -+# -+# Network testing -+# -+# CONFIG_NET_PKTGEN is not set -+# CONFIG_HAMRADIO is not set -+# CONFIG_IRDA is not set -+# CONFIG_BT is not set -+# CONFIG_IEEE80211 is not set -+ -+# -+# Device Drivers -+# -+ -+# -+# Generic Driver Options -+# -+CONFIG_STANDALONE=y -+CONFIG_PREVENT_FIRMWARE_BUILD=y -+# CONFIG_FW_LOADER is not set -+# CONFIG_DEBUG_DRIVER is not set -+# CONFIG_SYS_HYPERVISOR is not set -+ -+# -+# Connector - unified userspace <-> kernelspace linker -+# -+# CONFIG_CONNECTOR is not set -+ -+# -+# Memory Technology Devices (MTD) -+# -+CONFIG_MTD=y -+# CONFIG_MTD_DEBUG is not set -+# CONFIG_MTD_CONCAT is not set -+CONFIG_MTD_PARTITIONS=y -+# CONFIG_MTD_REDBOOT_PARTS is not set -+CONFIG_MTD_CMDLINE_PARTS=y -+# CONFIG_MTD_AFS_PARTS is not set -+ -+# -+# User Modules And Translation Layers -+# -+# CONFIG_MTD_CHAR is not set -+CONFIG_MTD_BLOCK=y -+# CONFIG_FTL is not set -+# CONFIG_NFTL is not set -+# CONFIG_INFTL is not set -+# CONFIG_RFD_FTL is not set -+# CONFIG_SSFDC is not set -+ -+# -+# RAM/ROM/Flash chip drivers -+# -+# CONFIG_MTD_CFI is not set -+# CONFIG_MTD_JEDECPROBE is not set -+CONFIG_MTD_MAP_BANK_WIDTH_1=y -+CONFIG_MTD_MAP_BANK_WIDTH_2=y -+CONFIG_MTD_MAP_BANK_WIDTH_4=y -+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -+CONFIG_MTD_CFI_I1=y -+CONFIG_MTD_CFI_I2=y -+# CONFIG_MTD_CFI_I4 is not set -+# CONFIG_MTD_CFI_I8 is not set -+# CONFIG_MTD_RAM is not set -+# CONFIG_MTD_ROM is not set -+# CONFIG_MTD_ABSENT is not set -+# CONFIG_MTD_OBSOLETE_CHIPS is not set -+ -+# -+# Mapping drivers for chip access -+# -+# CONFIG_MTD_COMPLEX_MAPPINGS is not set -+# CONFIG_MTD_PLATRAM is not set -+ -+# -+# Self-contained MTD device drivers -+# -+# CONFIG_MTD_SLRAM is not set -+# CONFIG_MTD_PHRAM is not set -+# CONFIG_MTD_MTDRAM is not set -+# CONFIG_MTD_BLOCK2MTD is not set -+ -+# -+# Disk-On-Chip Device Drivers -+# -+# CONFIG_MTD_DOC2000 is not set -+# CONFIG_MTD_DOC2001 is not set -+# CONFIG_MTD_DOC2001PLUS is not set -+ -+# -+# NAND Flash Device Drivers -+# -+CONFIG_MTD_NAND=y -+# CONFIG_MTD_NAND_VERIFY_WRITE is not set -+# CONFIG_MTD_NAND_ECC_SMC is not set -+CONFIG_MTD_NAND_IDS=y -+# CONFIG_MTD_NAND_DISKONCHIP is not set -+CONFIG_MTD_NAND_AT91=y -+# CONFIG_MTD_NAND_NANDSIM is not set -+ -+# -+# OneNAND Flash Device Drivers -+# -+# CONFIG_MTD_ONENAND is not set -+ -+# -+# Parallel port support -+# -+# CONFIG_PARPORT is not set -+ -+# -+# Plug and Play support -+# -+ -+# -+# Block devices -+# -+# CONFIG_BLK_DEV_COW_COMMON is not set -+# CONFIG_BLK_DEV_LOOP is not set -+# CONFIG_BLK_DEV_NBD is not set -+# CONFIG_BLK_DEV_UB is not set -+CONFIG_BLK_DEV_RAM=y -+CONFIG_BLK_DEV_RAM_COUNT=16 -+CONFIG_BLK_DEV_RAM_SIZE=8192 -+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 -+CONFIG_BLK_DEV_INITRD=y -+# CONFIG_CDROM_PKTCDVD is not set -+# CONFIG_ATA_OVER_ETH is not set -+ -+# -+# SCSI device support -+# -+# CONFIG_RAID_ATTRS is not set -+CONFIG_SCSI=y -+# CONFIG_SCSI_NETLINK is not set -+CONFIG_SCSI_PROC_FS=y -+ -+# -+# SCSI support type (disk, tape, CD-ROM) -+# -+CONFIG_BLK_DEV_SD=y -+# CONFIG_CHR_DEV_ST is not set -+# CONFIG_CHR_DEV_OSST is not set -+# CONFIG_BLK_DEV_SR is not set -+# CONFIG_CHR_DEV_SG is not set -+# CONFIG_CHR_DEV_SCH is not set -+ -+# -+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -+# -+CONFIG_SCSI_MULTI_LUN=y -+# CONFIG_SCSI_CONSTANTS is not set -+# CONFIG_SCSI_LOGGING is not set -+ -+# -+# SCSI Transports -+# -+# CONFIG_SCSI_SPI_ATTRS is not set -+# CONFIG_SCSI_FC_ATTRS is not set -+# CONFIG_SCSI_ISCSI_ATTRS is not set -+# CONFIG_SCSI_SAS_ATTRS is not set -+# CONFIG_SCSI_SAS_LIBSAS is not set -+ -+# -+# SCSI low-level drivers -+# -+# CONFIG_ISCSI_TCP is not set -+# CONFIG_SCSI_DEBUG is not set -+ -+# -+# Multi-device support (RAID and LVM) -+# -+# CONFIG_MD is not set -+ -+# -+# Fusion MPT device support -+# -+# CONFIG_FUSION is not set -+ -+# -+# IEEE 1394 (FireWire) support -+# -+ -+# -+# I2O device support -+# -+ -+# -+# Network device support -+# -+CONFIG_NETDEVICES=y -+# CONFIG_DUMMY is not set -+# CONFIG_BONDING is not set -+# CONFIG_EQUALIZER is not set -+# CONFIG_TUN is not set -+ -+# -+# PHY device support -+# -+# CONFIG_PHYLIB is not set -+ -+# -+# Ethernet (10 or 100Mbit) -+# -+CONFIG_NET_ETHERNET=y -+CONFIG_MII=y -+# CONFIG_SMC91X is not set -+CONFIG_DM9000=y -+ -+# -+# Ethernet (1000 Mbit) -+# -+ -+# -+# Ethernet (10000 Mbit) -+# -+ -+# -+# Token Ring devices -+# -+ -+# -+# Wireless LAN (non-hamradio) -+# -+# CONFIG_NET_RADIO is not set -+ -+# -+# Wan interfaces -+# -+# CONFIG_WAN is not set -+# CONFIG_PPP is not set -+# CONFIG_SLIP is not set -+# CONFIG_SHAPER is not set -+# CONFIG_NETCONSOLE is not set -+# CONFIG_NETPOLL is not set -+# CONFIG_NET_POLL_CONTROLLER is not set -+ -+# -+# ISDN subsystem -+# -+# CONFIG_ISDN is not set -+ -+# -+# Input device support -+# -+CONFIG_INPUT=y -+# CONFIG_INPUT_FF_MEMLESS is not set -+ -+# -+# Userland interfaces -+# -+CONFIG_INPUT_MOUSEDEV=y -+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -+# CONFIG_INPUT_JOYDEV is not set -+# CONFIG_INPUT_TSDEV is not set -+# CONFIG_INPUT_EVDEV is not set -+# CONFIG_INPUT_EVBUG is not set -+ -+# -+# Input Device Drivers -+# -+# CONFIG_INPUT_KEYBOARD is not set -+# CONFIG_INPUT_MOUSE is not set -+# CONFIG_INPUT_JOYSTICK is not set -+# CONFIG_INPUT_TOUCHSCREEN is not set -+# CONFIG_INPUT_MISC is not set -+ -+# -+# Hardware I/O ports -+# -+# CONFIG_SERIO is not set -+# CONFIG_GAMEPORT is not set -+ -+# -+# Character devices -+# -+CONFIG_VT=y -+CONFIG_VT_CONSOLE=y -+CONFIG_HW_CONSOLE=y -+# CONFIG_VT_HW_CONSOLE_BINDING is not set -+# CONFIG_SERIAL_NONSTANDARD is not set -+ -+# -+# Serial drivers -+# -+# CONFIG_SERIAL_8250 is not set -+ -+# -+# Non-8250 serial port support -+# -+CONFIG_SERIAL_ATMEL=y -+CONFIG_SERIAL_ATMEL_CONSOLE=y -+# CONFIG_SERIAL_ATMEL_TTYAT is not set -+CONFIG_SERIAL_CORE=y -+CONFIG_SERIAL_CORE_CONSOLE=y -+CONFIG_UNIX98_PTYS=y -+CONFIG_LEGACY_PTYS=y -+CONFIG_LEGACY_PTY_COUNT=256 -+ -+# -+# IPMI -+# -+# CONFIG_IPMI_HANDLER is not set -+ -+# -+# Watchdog Cards -+# -+CONFIG_WATCHDOG=y -+CONFIG_WATCHDOG_NOWAYOUT=y -+ -+# -+# Watchdog Device Drivers -+# -+# CONFIG_SOFT_WATCHDOG is not set -+ -+# -+# USB-based Watchdog Cards -+# -+# CONFIG_USBPCWATCHDOG is not set -+CONFIG_HW_RANDOM=y -+# CONFIG_NVRAM is not set -+# CONFIG_DTLK is not set -+# CONFIG_R3964 is not set -+ -+# -+# Ftape, the floppy tape device driver -+# -+# CONFIG_RAW_DRIVER is not set -+ -+# -+# TPM devices -+# -+# CONFIG_TCG_TPM is not set -+ -+# -+# I2C support -+# -+CONFIG_I2C=y -+CONFIG_I2C_CHARDEV=y -+ -+# -+# I2C Algorithms -+# -+# CONFIG_I2C_ALGOBIT is not set -+# CONFIG_I2C_ALGOPCF is not set -+# CONFIG_I2C_ALGOPCA is not set -+ -+# -+# I2C Hardware Bus support -+# -+CONFIG_I2C_AT91=y -+# CONFIG_I2C_OCORES is not set -+# CONFIG_I2C_PARPORT_LIGHT is not set -+# CONFIG_I2C_STUB is not set -+# CONFIG_I2C_PCA is not set -+# CONFIG_I2C_PCA_ISA is not set -+ -+# -+# Miscellaneous I2C Chip support -+# -+# CONFIG_SENSORS_DS1337 is not set -+# CONFIG_SENSORS_DS1374 is not set -+# CONFIG_SENSORS_EEPROM is not set -+# CONFIG_SENSORS_PCF8574 is not set -+# CONFIG_SENSORS_PCA9539 is not set -+# CONFIG_SENSORS_PCF8591 is not set -+# CONFIG_SENSORS_MAX6875 is not set -+# CONFIG_I2C_DEBUG_CORE is not set -+# CONFIG_I2C_DEBUG_ALGO is not set -+# CONFIG_I2C_DEBUG_BUS is not set -+# CONFIG_I2C_DEBUG_CHIP is not set -+ -+# -+# SPI support -+# -+# CONFIG_SPI is not set -+# CONFIG_SPI_MASTER is not set -+ -+# -+# Dallas's 1-wire bus -+# -+# CONFIG_W1 is not set -+ -+# -+# Hardware Monitoring support -+# -+# CONFIG_HWMON is not set -+# CONFIG_HWMON_VID is not set -+ -+# -+# Misc devices -+# -+# CONFIG_TIFM_CORE is not set -+ -+# -+# LED devices -+# -+# CONFIG_NEW_LEDS is not set -+ -+# -+# LED drivers -+# -+ -+# -+# LED Triggers -+# -+ -+# -+# Multimedia devices -+# -+# CONFIG_VIDEO_DEV is not set -+ -+# -+# Digital Video Broadcasting Devices -+# -+# CONFIG_DVB is not set -+# CONFIG_USB_DABUSB is not set -+ -+# -+# Graphics support -+# -+# CONFIG_FIRMWARE_EDID is not set -+# CONFIG_FB is not set -+ -+# -+# Console display driver support -+# -+# CONFIG_VGA_CONSOLE is not set -+CONFIG_DUMMY_CONSOLE=y -+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -+ -+# -+# Sound -+# -+# CONFIG_SOUND is not set -+ -+# -+# USB support -+# -+CONFIG_USB_ARCH_HAS_HCD=y -+CONFIG_USB_ARCH_HAS_OHCI=y -+# CONFIG_USB_ARCH_HAS_EHCI is not set -+CONFIG_USB=y -+# CONFIG_USB_DEBUG is not set -+ -+# -+# Miscellaneous USB options -+# -+CONFIG_USB_DEVICEFS=y -+# CONFIG_USB_BANDWIDTH is not set -+# CONFIG_USB_DYNAMIC_MINORS is not set -+# CONFIG_USB_OTG is not set -+ -+# -+# USB Host Controller Drivers -+# -+# CONFIG_USB_ISP116X_HCD is not set -+CONFIG_USB_OHCI_HCD=y -+# CONFIG_USB_OHCI_BIG_ENDIAN is not set -+CONFIG_USB_OHCI_LITTLE_ENDIAN=y -+# CONFIG_USB_SL811_HCD is not set -+ -+# -+# USB Device Class drivers -+# -+# CONFIG_USB_ACM is not set -+# CONFIG_USB_PRINTER is not set -+ -+# -+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -+# -+ -+# -+# may also be needed; see USB_STORAGE Help for more information -+# -+CONFIG_USB_STORAGE=y -+CONFIG_USB_STORAGE_DEBUG=y -+# CONFIG_USB_STORAGE_DATAFAB is not set -+# CONFIG_USB_STORAGE_FREECOM is not set -+# CONFIG_USB_STORAGE_DPCM is not set -+# CONFIG_USB_STORAGE_USBAT is not set -+# CONFIG_USB_STORAGE_SDDR09 is not set -+# CONFIG_USB_STORAGE_SDDR55 is not set -+# CONFIG_USB_STORAGE_JUMPSHOT is not set -+# CONFIG_USB_STORAGE_ALAUDA is not set -+# CONFIG_USB_STORAGE_KARMA is not set -+# CONFIG_USB_LIBUSUAL is not set -+ -+# -+# USB Input Devices -+# -+# CONFIG_USB_HID is not set -+ -+# -+# USB HID Boot Protocol drivers -+# -+# CONFIG_USB_KBD is not set -+# CONFIG_USB_MOUSE is not set -+# CONFIG_USB_AIPTEK is not set -+# CONFIG_USB_WACOM is not set -+# CONFIG_USB_ACECAD is not set -+# CONFIG_USB_KBTAB is not set -+# CONFIG_USB_POWERMATE is not set -+# CONFIG_USB_TOUCHSCREEN is not set -+# CONFIG_USB_YEALINK is not set -+# CONFIG_USB_XPAD is not set -+# CONFIG_USB_ATI_REMOTE is not set -+# CONFIG_USB_ATI_REMOTE2 is not set -+# CONFIG_USB_KEYSPAN_REMOTE is not set -+# CONFIG_USB_APPLETOUCH is not set -+ -+# -+# USB Imaging devices -+# -+# CONFIG_USB_MDC800 is not set -+# CONFIG_USB_MICROTEK is not set -+ -+# -+# USB Network Adapters -+# -+# CONFIG_USB_CATC is not set -+# CONFIG_USB_KAWETH is not set -+# CONFIG_USB_PEGASUS is not set -+# CONFIG_USB_RTL8150 is not set -+# CONFIG_USB_USBNET_MII is not set -+# CONFIG_USB_USBNET is not set -+CONFIG_USB_MON=y -+ -+# -+# USB port drivers -+# -+ -+# -+# USB Serial Converter support -+# -+# CONFIG_USB_SERIAL is not set -+ -+# -+# USB Miscellaneous drivers -+# -+# CONFIG_USB_EMI62 is not set -+# CONFIG_USB_EMI26 is not set -+# CONFIG_USB_ADUTUX is not set -+# CONFIG_USB_AUERSWALD is not set -+# CONFIG_USB_RIO500 is not set -+# CONFIG_USB_LEGOTOWER is not set -+# CONFIG_USB_LCD is not set -+# CONFIG_USB_LED is not set -+# CONFIG_USB_CYPRESS_CY7C63 is not set -+# CONFIG_USB_CYTHERM is not set -+# CONFIG_USB_PHIDGET is not set -+# CONFIG_USB_IDMOUSE is not set -+# CONFIG_USB_FTDI_ELAN is not set -+# CONFIG_USB_APPLEDISPLAY is not set -+# CONFIG_USB_LD is not set -+# CONFIG_USB_TRANCEVIBRATOR is not set -+# CONFIG_USB_TEST is not set -+ -+# -+# USB DSL modem support -+# -+ -+# -+# USB Gadget Support -+# -+CONFIG_USB_GADGET=y -+# CONFIG_USB_GADGET_DEBUG_FILES is not set -+CONFIG_USB_GADGET_SELECTED=y -+# CONFIG_USB_GADGET_NET2280 is not set -+# CONFIG_USB_GADGET_PXA2XX is not set -+# CONFIG_USB_GADGET_GOKU is not set -+# CONFIG_USB_GADGET_LH7A40X is not set -+# CONFIG_USB_GADGET_OMAP is not set -+CONFIG_USB_GADGET_AT91=y -+CONFIG_USB_AT91=y -+# CONFIG_USB_GADGET_DUMMY_HCD is not set -+# CONFIG_USB_GADGET_DUALSPEED is not set -+CONFIG_USB_ZERO=m -+# CONFIG_USB_ETH is not set -+CONFIG_USB_GADGETFS=m -+CONFIG_USB_FILE_STORAGE=m -+# CONFIG_USB_FILE_STORAGE_TEST is not set -+CONFIG_USB_G_SERIAL=m -+# CONFIG_USB_MIDI_GADGET is not set -+ -+# -+# MMC/SD Card support -+# -+CONFIG_MMC=y -+# CONFIG_MMC_DEBUG is not set -+CONFIG_MMC_BLOCK=y -+CONFIG_MMC_AT91=m -+# CONFIG_MMC_TIFM_SD is not set -+ -+# -+# Real Time Clock -+# -+CONFIG_RTC_LIB=y -+# CONFIG_RTC_CLASS is not set -+ -+# -+# File systems -+# -+CONFIG_EXT2_FS=y -+# CONFIG_EXT2_FS_XATTR is not set -+# CONFIG_EXT2_FS_XIP is not set -+# CONFIG_EXT3_FS is not set -+# CONFIG_EXT4DEV_FS is not set -+# CONFIG_REISERFS_FS is not set -+# CONFIG_JFS_FS is not set -+# CONFIG_FS_POSIX_ACL is not set -+# CONFIG_XFS_FS is not set -+# CONFIG_GFS2_FS is not set -+# CONFIG_OCFS2_FS is not set -+# CONFIG_MINIX_FS is not set -+# CONFIG_ROMFS_FS is not set -+CONFIG_INOTIFY=y -+CONFIG_INOTIFY_USER=y -+# CONFIG_QUOTA is not set -+CONFIG_DNOTIFY=y -+# CONFIG_AUTOFS_FS is not set -+# CONFIG_AUTOFS4_FS is not set -+# CONFIG_FUSE_FS is not set -+ -+# -+# CD-ROM/DVD Filesystems -+# -+# CONFIG_ISO9660_FS is not set -+# CONFIG_UDF_FS is not set -+ -+# -+# DOS/FAT/NT Filesystems -+# -+CONFIG_FAT_FS=y -+# CONFIG_MSDOS_FS is not set -+CONFIG_VFAT_FS=y -+CONFIG_FAT_DEFAULT_CODEPAGE=437 -+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -+# CONFIG_NTFS_FS is not set -+ -+# -+# Pseudo filesystems -+# -+CONFIG_PROC_FS=y -+CONFIG_PROC_SYSCTL=y -+CONFIG_SYSFS=y -+CONFIG_TMPFS=y -+# CONFIG_TMPFS_POSIX_ACL is not set -+# CONFIG_HUGETLB_PAGE is not set -+CONFIG_RAMFS=y -+# CONFIG_CONFIGFS_FS is not set -+ -+# -+# Miscellaneous filesystems -+# -+# CONFIG_ADFS_FS is not set -+# CONFIG_AFFS_FS is not set -+# CONFIG_HFS_FS is not set -+# CONFIG_HFSPLUS_FS is not set -+# CONFIG_BEFS_FS is not set -+# CONFIG_BFS_FS is not set -+# CONFIG_EFS_FS is not set -+# CONFIG_JFFS_FS is not set -+# CONFIG_JFFS2_FS is not set -+CONFIG_CRAMFS=y -+# CONFIG_VXFS_FS is not set -+# CONFIG_HPFS_FS is not set -+# CONFIG_QNX4FS_FS is not set -+# CONFIG_SYSV_FS is not set -+# CONFIG_UFS_FS is not set -+ -+# -+# Network File Systems -+# -+# CONFIG_NFS_FS is not set -+# CONFIG_NFSD is not set -+# CONFIG_SMB_FS is not set -+# CONFIG_CIFS is not set -+# CONFIG_NCP_FS is not set -+# CONFIG_CODA_FS is not set -+# CONFIG_AFS_FS is not set -+# CONFIG_9P_FS is not set -+ -+# -+# Partition Types -+# -+# CONFIG_PARTITION_ADVANCED is not set -+CONFIG_MSDOS_PARTITION=y -+ -+# -+# Native Language Support -+# -+CONFIG_NLS=y -+CONFIG_NLS_DEFAULT="iso8859-1" -+CONFIG_NLS_CODEPAGE_437=y -+# CONFIG_NLS_CODEPAGE_737 is not set -+# CONFIG_NLS_CODEPAGE_775 is not set -+CONFIG_NLS_CODEPAGE_850=y -+# CONFIG_NLS_CODEPAGE_852 is not set -+# CONFIG_NLS_CODEPAGE_855 is not set -+# CONFIG_NLS_CODEPAGE_857 is not set -+# CONFIG_NLS_CODEPAGE_860 is not set -+# CONFIG_NLS_CODEPAGE_861 is not set -+# CONFIG_NLS_CODEPAGE_862 is not set -+# CONFIG_NLS_CODEPAGE_863 is not set -+# CONFIG_NLS_CODEPAGE_864 is not set -+# CONFIG_NLS_CODEPAGE_865 is not set -+# CONFIG_NLS_CODEPAGE_866 is not set -+# CONFIG_NLS_CODEPAGE_869 is not set -+# CONFIG_NLS_CODEPAGE_936 is not set -+# CONFIG_NLS_CODEPAGE_950 is not set -+# CONFIG_NLS_CODEPAGE_932 is not set -+# CONFIG_NLS_CODEPAGE_949 is not set -+# CONFIG_NLS_CODEPAGE_874 is not set -+# CONFIG_NLS_ISO8859_8 is not set -+# CONFIG_NLS_CODEPAGE_1250 is not set -+# CONFIG_NLS_CODEPAGE_1251 is not set -+# CONFIG_NLS_ASCII is not set -+CONFIG_NLS_ISO8859_1=y -+# CONFIG_NLS_ISO8859_2 is not set -+# CONFIG_NLS_ISO8859_3 is not set -+# CONFIG_NLS_ISO8859_4 is not set -+# CONFIG_NLS_ISO8859_5 is not set -+# CONFIG_NLS_ISO8859_6 is not set -+# CONFIG_NLS_ISO8859_7 is not set -+# CONFIG_NLS_ISO8859_9 is not set -+# CONFIG_NLS_ISO8859_13 is not set -+# CONFIG_NLS_ISO8859_14 is not set -+# CONFIG_NLS_ISO8859_15 is not set -+# CONFIG_NLS_KOI8_R is not set -+# CONFIG_NLS_KOI8_U is not set -+# CONFIG_NLS_UTF8 is not set -+ -+# -+# Profiling support -+# -+# CONFIG_PROFILING is not set -+ -+# -+# Kernel hacking -+# -+# CONFIG_PRINTK_TIME is not set -+CONFIG_ENABLE_MUST_CHECK=y -+# CONFIG_MAGIC_SYSRQ is not set -+# CONFIG_UNUSED_SYMBOLS is not set -+CONFIG_DEBUG_KERNEL=y -+CONFIG_LOG_BUF_SHIFT=14 -+CONFIG_DETECT_SOFTLOCKUP=y -+# CONFIG_SCHEDSTATS is not set -+# CONFIG_DEBUG_SLAB is not set -+# CONFIG_DEBUG_RT_MUTEXES is not set -+# CONFIG_RT_MUTEX_TESTER is not set -+# CONFIG_DEBUG_SPINLOCK is not set -+# CONFIG_DEBUG_MUTEXES is not set -+# CONFIG_DEBUG_RWSEMS is not set -+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -+# CONFIG_DEBUG_KOBJECT is not set -+CONFIG_DEBUG_BUGVERBOSE=y -+# CONFIG_DEBUG_INFO is not set -+# CONFIG_DEBUG_FS is not set -+# CONFIG_DEBUG_VM is not set -+# CONFIG_DEBUG_LIST is not set -+CONFIG_FRAME_POINTER=y -+CONFIG_FORCED_INLINING=y -+# CONFIG_HEADERS_CHECK is not set -+# CONFIG_RCU_TORTURE_TEST is not set -+CONFIG_DEBUG_USER=y -+# CONFIG_DEBUG_WAITQ is not set -+# CONFIG_DEBUG_ERRORS is not set -+CONFIG_DEBUG_LL=y -+# CONFIG_DEBUG_ICEDCC is not set -+ -+# -+# Security options -+# -+# CONFIG_KEYS is not set -+# CONFIG_SECURITY is not set -+ -+# -+# Cryptographic options -+# -+# CONFIG_CRYPTO is not set -+ -+# -+# Library routines -+# -+# CONFIG_CRC_CCITT is not set -+# CONFIG_CRC16 is not set -+CONFIG_CRC32=y -+# CONFIG_LIBCRC32C is not set -+CONFIG_ZLIB_INFLATE=y -+CONFIG_PLIST=y -diff -urN -x CVS linux-2.6.19-final/arch/arm/configs/carmeva_defconfig linux-2.6.19/arch/arm/configs/carmeva_defconfig ---- linux-2.6.19-final/arch/arm/configs/carmeva_defconfig Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/configs/carmeva_defconfig Thu Oct 12 17:07:38 2006 -@@ -474,7 +474,7 @@ - # CONFIG_WATCHDOG is not set - # CONFIG_NVRAM is not set - # CONFIG_RTC is not set --# CONFIG_AT91_RTC is not set -+# CONFIG_AT91RM9200_RTC is not set - # CONFIG_DTLK is not set - # CONFIG_R3964 is not set - -diff -urN -x CVS linux-2.6.19-final/arch/arm/configs/csb637_defconfig linux-2.6.19/arch/arm/configs/csb637_defconfig ---- linux-2.6.19-final/arch/arm/configs/csb637_defconfig Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/configs/csb637_defconfig Thu Oct 12 17:07:38 2006 -@@ -623,7 +623,7 @@ - # CONFIG_USBPCWATCHDOG is not set - # CONFIG_NVRAM is not set - CONFIG_RTC=y --# CONFIG_AT91_RTC is not set -+# CONFIG_AT91RM9200_RTC is not set - # CONFIG_DTLK is not set - # CONFIG_R3964 is not set - -diff -urN -x CVS linux-2.6.19-final/arch/arm/configs/kb9202_defconfig linux-2.6.19/arch/arm/configs/kb9202_defconfig ---- linux-2.6.19-final/arch/arm/configs/kb9202_defconfig Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/configs/kb9202_defconfig Thu Oct 12 17:07:38 2006 -@@ -437,7 +437,7 @@ - # CONFIG_WATCHDOG is not set - # CONFIG_NVRAM is not set - # CONFIG_RTC is not set --# CONFIG_AT91_RTC is not set -+# CONFIG_AT91RM9200_RTC is not set - # CONFIG_DTLK is not set - # CONFIG_R3964 is not set - -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/Kconfig linux-2.6.19/arch/arm/mach-at91rm9200/Kconfig ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/Kconfig Mon Dec 4 16:32:44 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/Kconfig Wed Nov 22 09:24:11 2006 -@@ -2,7 +2,8 @@ - - menu "Atmel AT91 System-on-Chip" - --comment "Atmel AT91 Processors" -+choice -+ prompt "Atmel AT91 Processor" - - config ARCH_AT91RM9200 - bool "AT91RM9200" -@@ -13,6 +14,8 @@ - config ARCH_AT91SAM9261 - bool "AT91SAM9261" - -+endchoice -+ - # ---------------------------------------------------------- - - if ARCH_AT91RM9200 -@@ -33,7 +36,6 @@ - Select this if you are using Atmel's AT91RM9200-DK Development board. - (Discontinued) - -- - config MACH_AT91RM9200EK - bool "Atmel AT91RM9200-EK Evaluation Kit" - depends on ARCH_AT91RM9200 -@@ -90,6 +92,13 @@ - - comment "AT91SAM9260 Board Type" - -+config MACH_AT91SAM9260EK -+ bool "Atmel AT91SAM9260-EK Evaluation Kit" -+ depends on ARCH_AT91SAM9260 -+ help -+ Select this if you are using Atmel's AT91SAM9260-EK Evaluation Kit. -+ -+ - endif - - # ---------------------------------------------------------- -@@ -98,8 +107,31 @@ - - comment "AT91SAM9261 Board Type" - -+config MACH_AT91SAM9261EK -+ bool "Atmel AT91SAM9261-EK Evaluation Kit" -+ depends on ARCH_AT91SAM9261 -+ help -+ Select this if you are using Atmel's AT91SAM9261-EK Evaluation Kit. -+ -+ - endif - -+# ---------------------------------------------------------- -+ -+comment "AT91 Board Options" -+ -+config MTD_AT91_DATAFLASH_CARD -+ bool "Enable DataFlash Card support" -+ depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK) -+ help -+ Enable support for the DataFlash card. -+ -+config MTD_NAND_AT91_BUSWIDTH_16 -+ bool "Enable 16-bit data bus interface to NAND flash" -+ depends on (MACH_AT91SAM9261EK || MACH_AT91SAM9260EK) -+ help -+ On AT91SAM926x boards both types of NAND flash can be present -+ (8 and 16 bit data bus width). - - # ---------------------------------------------------------- - -@@ -111,6 +143,13 @@ - Select this if you need to program one or more of the PCK0..PCK3 - programmable clock outputs. - -+config AT91_SLOW_CLOCK -+ bool "Suspend-to-RAM uses slow clock mode (EXPERIMENTAL)" -+ depends on PM && EXPERIMENTAL -+ help -+ Select this if you wish to put the CPU into slow clock mode -+ while in the "Suspend to RAM" state, to save more power. -+ - endmenu - - endif -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/Makefile linux-2.6.19/arch/arm/mach-at91rm9200/Makefile ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/Makefile Mon Dec 4 16:32:44 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/Makefile Thu Nov 16 11:45:54 2006 -@@ -2,19 +2,20 @@ - # Makefile for the linux kernel. - # - --obj-y := clock.o irq.o gpio.o devices.o -+obj-y := clock.o irq.o gpio.o - obj-m := - obj-n := - obj- := - - obj-$(CONFIG_PM) += pm.o -+obj-$(CONFIG_AT91_SLOW_CLOCK) += pm_slowclock.o - - # CPU-specific support --obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o --obj-$(CONFIG_ARCH_AT91SAM9260) += --obj-$(CONFIG_ARCH_AT91SAM9261) += -+obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o -+obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o -+obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o - --# AT91RM9200 Board-specific support -+# AT91RM9200 board-specific support - obj-$(CONFIG_MACH_ONEARM) += board-1arm.o - obj-$(CONFIG_ARCH_AT91RM9200DK) += board-dk.o - obj-$(CONFIG_MACH_AT91RM9200EK) += board-ek.o -@@ -26,8 +27,10 @@ - obj-$(CONFIG_MACH_KAFA) += board-kafa.o - - # AT91SAM9260 board-specific support -+obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o - - # AT91SAM9261 board-specific support -+obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o - - # LEDs support - led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o -@@ -39,7 +42,7 @@ - obj-$(CONFIG_LEDS) += $(led-y) - - # VGA support --#obj-$(CONFIG_FB_S1D13XXX) += ics1523.o -+obj-$(CONFIG_FB_S1D13XXX) += ics1523.o - - - ifeq ($(CONFIG_PM_DEBUG),y) -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91rm9200.c linux-2.6.19/arch/arm/mach-at91rm9200/at91rm9200.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/at91rm9200.c Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/at91rm9200.c Fri Nov 3 19:22:15 2006 -@@ -14,8 +14,10 @@ - - #include - #include -+#include -+#include -+#include - --#include - #include "generic.h" - #include "clock.h" - -@@ -26,32 +28,12 @@ - .length = SZ_4K, - .type = MT_DEVICE, - }, { -- .virtual = AT91_VA_BASE_SPI, -- .pfn = __phys_to_pfn(AT91RM9200_BASE_SPI), -- .length = SZ_16K, -- .type = MT_DEVICE, -- }, { - .virtual = AT91_VA_BASE_EMAC, - .pfn = __phys_to_pfn(AT91RM9200_BASE_EMAC), - .length = SZ_16K, - .type = MT_DEVICE, - }, { -- .virtual = AT91_VA_BASE_TWI, -- .pfn = __phys_to_pfn(AT91RM9200_BASE_TWI), -- .length = SZ_16K, -- .type = MT_DEVICE, -- }, { -- .virtual = AT91_VA_BASE_MCI, -- .pfn = __phys_to_pfn(AT91RM9200_BASE_MCI), -- .length = SZ_16K, -- .type = MT_DEVICE, -- }, { -- .virtual = AT91_VA_BASE_UDP, -- .pfn = __phys_to_pfn(AT91RM9200_BASE_UDP), -- .length = SZ_16K, -- .type = MT_DEVICE, -- }, { -- .virtual = AT91_SRAM_VIRT_BASE, -+ .virtual = AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE, - .pfn = __phys_to_pfn(AT91RM9200_SRAM_BASE), - .length = AT91RM9200_SRAM_SIZE, - .type = MT_DEVICE, -@@ -222,6 +204,16 @@ - } - }; - -+static void at91rm9200_reset(void) -+{ -+ /* -+ * Perform a hardware reset with the use of the Watchdog timer. -+ */ -+ at91_sys_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1); -+ at91_sys_write(AT91_ST_CR, AT91_ST_WDRST); -+} -+ -+ - /* -------------------------------------------------------------------- - * AT91RM9200 processor initialization - * -------------------------------------------------------------------- */ -@@ -230,6 +222,12 @@ - /* Map peripherals */ - iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); - -+ at91_arch_reset = at91rm9200_reset; -+ at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) -+ | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) -+ | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5) -+ | (1 << AT91RM9200_ID_IRQ6); -+ - /* Init clock subsystem */ - at91_clock_init(main_clock); - -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91rm9200_devices.c linux-2.6.19/arch/arm/mach-at91rm9200/at91rm9200_devices.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/at91rm9200_devices.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/at91rm9200_devices.c Fri Dec 1 16:10:47 2006 -@@ -0,0 +1,901 @@ -+/* -+ * arch/arm/mach-at91rm9200/at91rm9200_devices.c -+ * -+ * Copyright (C) 2005 Thibaut VARENE -+ * Copyright (C) 2005 David Brownell -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ */ -+#include -+#include -+ -+#include -+ -+#include -+#include -+#include -+#include -+ -+#include "generic.h" -+ -+#define SZ_512 0x00000200 -+#define SZ_256 0x00000100 -+#define SZ_16 0x00000010 -+ -+/* -------------------------------------------------------------------- -+ * USB Host -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) -+static u64 ohci_dmamask = 0xffffffffUL; -+static struct at91_usbh_data usbh_data; -+ -+static struct resource usbh_resources[] = { -+ [0] = { -+ .start = AT91RM9200_UHP_BASE, -+ .end = AT91RM9200_UHP_BASE + SZ_1M - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91RM9200_ID_UHP, -+ .end = AT91RM9200_ID_UHP, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91rm9200_usbh_device = { -+ .name = "at91_ohci", -+ .id = -1, -+ .dev = { -+ .dma_mask = &ohci_dmamask, -+ .coherent_dma_mask = 0xffffffff, -+ .platform_data = &usbh_data, -+ }, -+ .resource = usbh_resources, -+ .num_resources = ARRAY_SIZE(usbh_resources), -+}; -+ -+void __init at91_add_device_usbh(struct at91_usbh_data *data) -+{ -+ if (!data) -+ return; -+ -+ usbh_data = *data; -+ platform_device_register(&at91rm9200_usbh_device); -+} -+#else -+void __init at91_add_device_usbh(struct at91_usbh_data *data) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * USB Device (Gadget) -+ * -------------------------------------------------------------------- */ -+ -+#ifdef CONFIG_USB_GADGET_AT91 -+static struct at91_udc_data udc_data; -+ -+static struct resource udc_resources[] = { -+ [0] = { -+ .start = AT91RM9200_BASE_UDP, -+ .end = AT91RM9200_BASE_UDP + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91RM9200_ID_UDP, -+ .end = AT91RM9200_ID_UDP, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91rm9200_udc_device = { -+ .name = "at91_udc", -+ .id = -1, -+ .dev = { -+ .platform_data = &udc_data, -+ }, -+ .resource = udc_resources, -+ .num_resources = ARRAY_SIZE(udc_resources), -+}; -+ -+void __init at91_add_device_udc(struct at91_udc_data *data) -+{ -+ if (!data) -+ return; -+ -+ if (data->vbus_pin) { -+ at91_set_gpio_input(data->vbus_pin, 0); -+ at91_set_deglitch(data->vbus_pin, 1); -+ } -+ if (data->pullup_pin) -+ at91_set_gpio_output(data->pullup_pin, 0); -+ -+ udc_data = *data; -+ platform_device_register(&at91rm9200_udc_device); -+} -+#else -+void __init at91_add_device_udc(struct at91_udc_data *data) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * Ethernet -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE) -+static u64 eth_dmamask = 0xffffffffUL; -+static struct eth_platform_data eth_data; -+ -+static struct resource eth_resources[] = { -+ [0] = { -+ .start = AT91_VA_BASE_EMAC, -+ .end = AT91_VA_BASE_EMAC + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91RM9200_ID_EMAC, -+ .end = AT91RM9200_ID_EMAC, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91rm9200_eth_device = { -+ .name = "at91_ether", -+ .id = -1, -+ .dev = { -+ .dma_mask = ð_dmamask, -+ .coherent_dma_mask = 0xffffffff, -+ .platform_data = ð_data, -+ }, -+ .resource = eth_resources, -+ .num_resources = ARRAY_SIZE(eth_resources), -+}; -+ -+void __init at91_add_device_eth(struct eth_platform_data *data) -+{ -+ if (!data) -+ return; -+ -+ if (data->phy_irq_pin) { -+ at91_set_gpio_input(data->phy_irq_pin, 0); -+ at91_set_deglitch(data->phy_irq_pin, 1); -+ } -+ -+ /* Pins used for MII and RMII */ -+ at91_set_A_periph(AT91_PIN_PA16, 0); /* EMDIO */ -+ at91_set_A_periph(AT91_PIN_PA15, 0); /* EMDC */ -+ at91_set_A_periph(AT91_PIN_PA14, 0); /* ERXER */ -+ at91_set_A_periph(AT91_PIN_PA13, 0); /* ERX1 */ -+ at91_set_A_periph(AT91_PIN_PA12, 0); /* ERX0 */ -+ at91_set_A_periph(AT91_PIN_PA11, 0); /* ECRS_ECRSDV */ -+ at91_set_A_periph(AT91_PIN_PA10, 0); /* ETX1 */ -+ at91_set_A_periph(AT91_PIN_PA9, 0); /* ETX0 */ -+ at91_set_A_periph(AT91_PIN_PA8, 0); /* ETXEN */ -+ at91_set_A_periph(AT91_PIN_PA7, 0); /* ETXCK_EREFCK */ -+ -+ if (!data->is_rmii) { -+ at91_set_B_periph(AT91_PIN_PB19, 0); /* ERXCK */ -+ at91_set_B_periph(AT91_PIN_PB18, 0); /* ECOL */ -+ at91_set_B_periph(AT91_PIN_PB17, 0); /* ERXDV */ -+ at91_set_B_periph(AT91_PIN_PB16, 0); /* ERX3 */ -+ at91_set_B_periph(AT91_PIN_PB15, 0); /* ERX2 */ -+ at91_set_B_periph(AT91_PIN_PB14, 0); /* ETXER */ -+ at91_set_B_periph(AT91_PIN_PB13, 0); /* ETX3 */ -+ at91_set_B_periph(AT91_PIN_PB12, 0); /* ETX2 */ -+ } -+ -+ eth_data = *data; -+ platform_device_register(&at91rm9200_eth_device); -+} -+#else -+void __init at91_add_device_eth(struct eth_platform_data *data) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * Compact Flash / PCMCIA -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE) -+static struct at91_cf_data cf_data; -+ -+#define CF_BASE AT91_CHIPSELECT_4 -+ -+static struct resource cf_resources[] = { -+ [0] = { -+ .start = CF_BASE, -+ /* ties up CS4, CS5 and CS6 */ -+ .end = CF_BASE + (0x30000000 - 1), -+ .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT, -+ }, -+}; -+ -+static struct platform_device at91rm9200_cf_device = { -+ .name = "at91_cf", -+ .id = -1, -+ .dev = { -+ .platform_data = &cf_data, -+ }, -+ .resource = cf_resources, -+ .num_resources = ARRAY_SIZE(cf_resources), -+}; -+ -+void __init at91_add_device_cf(struct at91_cf_data *data) -+{ -+ unsigned int csa; -+ -+ if (!data) -+ return; -+ -+ data->chipselect = 4; /* can only use EBI ChipSelect 4 */ -+ -+ /* CF takes over CS4, CS5, CS6 */ -+ csa = at91_sys_read(AT91_EBI_CSA); -+ at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH); -+ -+ /* -+ * Static memory controller timing adjustments. -+ * REVISIT: these timings are in terms of MCK cycles, so -+ * when MCK changes (cpufreq etc) so must these values... -+ */ -+ at91_sys_write(AT91_SMC_CSR(4), -+ AT91_SMC_ACSS_STD -+ | AT91_SMC_DBW_16 -+ | AT91_SMC_BAT -+ | AT91_SMC_WSEN -+ | AT91_SMC_NWS_(32) /* wait states */ -+ | AT91_SMC_RWSETUP_(6) /* setup time */ -+ | AT91_SMC_RWHOLD_(4) /* hold time */ -+ ); -+ -+ /* input/irq */ -+ if (data->irq_pin) { -+ at91_set_gpio_input(data->irq_pin, 1); -+ at91_set_deglitch(data->irq_pin, 1); -+ } -+ at91_set_gpio_input(data->det_pin, 1); -+ at91_set_deglitch(data->det_pin, 1); -+ -+ /* outputs, initially off */ -+ if (data->vcc_pin) -+ at91_set_gpio_output(data->vcc_pin, 0); -+ at91_set_gpio_output(data->rst_pin, 0); -+ -+ /* force poweron defaults for these pins ... */ -+ at91_set_A_periph(AT91_PIN_PC9, 0); /* A25/CFRNW */ -+ at91_set_A_periph(AT91_PIN_PC10, 0); /* NCS4/CFCS */ -+ at91_set_A_periph(AT91_PIN_PC11, 0); /* NCS5/CFCE1 */ -+ at91_set_A_periph(AT91_PIN_PC12, 0); /* NCS6/CFCE2 */ -+ -+ /* nWAIT is _not_ a default setting */ -+ at91_set_A_periph(AT91_PIN_PC6, 1); /* nWAIT */ -+ -+ cf_data = *data; -+ platform_device_register(&at91rm9200_cf_device); -+} -+#else -+void __init at91_add_device_cf(struct at91_cf_data *data) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * MMC / SD -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) -+static u64 mmc_dmamask = 0xffffffffUL; -+static struct at91_mmc_data mmc_data; -+ -+static struct resource mmc_resources[] = { -+ [0] = { -+ .start = AT91RM9200_BASE_MCI, -+ .end = AT91RM9200_BASE_MCI + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91RM9200_ID_MCI, -+ .end = AT91RM9200_ID_MCI, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91rm9200_mmc_device = { -+ .name = "at91_mci", -+ .id = -1, -+ .dev = { -+ .dma_mask = &mmc_dmamask, -+ .coherent_dma_mask = 0xffffffff, -+ .platform_data = &mmc_data, -+ }, -+ .resource = mmc_resources, -+ .num_resources = ARRAY_SIZE(mmc_resources), -+}; -+ -+void __init at91_add_device_mmc(struct at91_mmc_data *data) -+{ -+ if (!data) -+ return; -+ -+ /* input/irq */ -+ if (data->det_pin) { -+ at91_set_gpio_input(data->det_pin, 1); -+ at91_set_deglitch(data->det_pin, 1); -+ } -+ if (data->wp_pin) -+ at91_set_gpio_input(data->wp_pin, 1); -+ if (data->vcc_pin) -+ at91_set_gpio_output(data->vcc_pin, 0); -+ -+ /* CLK */ -+ at91_set_A_periph(AT91_PIN_PA27, 0); -+ -+ if (data->slot_b) { -+ /* CMD */ -+ at91_set_B_periph(AT91_PIN_PA8, 1); -+ -+ /* DAT0, maybe DAT1..DAT3 */ -+ at91_set_B_periph(AT91_PIN_PA9, 1); -+ if (data->wire4) { -+ at91_set_B_periph(AT91_PIN_PA10, 1); -+ at91_set_B_periph(AT91_PIN_PA11, 1); -+ at91_set_B_periph(AT91_PIN_PA12, 1); -+ } -+ } else { -+ /* CMD */ -+ at91_set_A_periph(AT91_PIN_PA28, 1); -+ -+ /* DAT0, maybe DAT1..DAT3 */ -+ at91_set_A_periph(AT91_PIN_PA29, 1); -+ if (data->wire4) { -+ at91_set_B_periph(AT91_PIN_PB3, 1); -+ at91_set_B_periph(AT91_PIN_PB4, 1); -+ at91_set_B_periph(AT91_PIN_PB5, 1); -+ } -+ } -+ -+ mmc_data = *data; -+ platform_device_register(&at91rm9200_mmc_device); -+} -+#else -+void __init at91_add_device_mmc(struct at91_mmc_data *data) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * NAND / SmartMedia -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE) -+static struct at91_nand_data nand_data; -+ -+#define NAND_BASE AT91_CHIPSELECT_3 -+ -+static struct resource nand_resources[] = { -+ { -+ .start = NAND_BASE, -+ .end = NAND_BASE + SZ_8M - 1, -+ .flags = IORESOURCE_MEM, -+ } -+}; -+ -+static struct platform_device at91rm9200_nand_device = { -+ .name = "at91_nand", -+ .id = -1, -+ .dev = { -+ .platform_data = &nand_data, -+ }, -+ .resource = nand_resources, -+ .num_resources = ARRAY_SIZE(nand_resources), -+}; -+ -+void __init at91_add_device_nand(struct at91_nand_data *data) -+{ -+ unsigned int csa; -+ -+ if (!data) -+ return; -+ -+ /* enable the address range of CS3 */ -+ csa = at91_sys_read(AT91_EBI_CSA); -+ at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA); -+ -+ /* set the bus interface characteristics */ -+ at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN -+ | AT91_SMC_NWS_(5) -+ | AT91_SMC_TDF_(1) -+ | AT91_SMC_RWSETUP_(0) /* tDS Data Set up Time 30 - ns */ -+ | AT91_SMC_RWHOLD_(1) /* tDH Data Hold Time 20 - ns */ -+ ); -+ -+ /* enable pin */ -+ if (data->enable_pin) -+ at91_set_gpio_output(data->enable_pin, 1); -+ -+ /* ready/busy pin */ -+ if (data->rdy_pin) -+ at91_set_gpio_input(data->rdy_pin, 1); -+ -+ /* card detect pin */ -+ if (data->det_pin) -+ at91_set_gpio_input(data->det_pin, 1); -+ -+ at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */ -+ at91_set_A_periph(AT91_PIN_PC3, 0); /* SMWE */ -+ -+ nand_data = *data; -+ platform_device_register(&at91rm9200_nand_device); -+} -+#else -+void __init at91_add_device_nand(struct at91_nand_data *data) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * TWI (i2c) -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE) -+ -+static struct resource twi_resources[] = { -+ [0] = { -+ .start = AT91RM9200_BASE_TWI, -+ .end = AT91RM9200_BASE_TWI + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91RM9200_ID_TWI, -+ .end = AT91RM9200_ID_TWI, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91rm9200_twi_device = { -+ .name = "at91_i2c", -+ .id = -1, -+ .resource = twi_resources, -+ .num_resources = ARRAY_SIZE(twi_resources), -+}; -+ -+void __init at91_add_device_i2c(void) -+{ -+ /* pins used for TWI interface */ -+ at91_set_A_periph(AT91_PIN_PA25, 0); /* TWD */ -+ at91_set_multi_drive(AT91_PIN_PA25, 1); -+ -+ at91_set_A_periph(AT91_PIN_PA26, 0); /* TWCK */ -+ at91_set_multi_drive(AT91_PIN_PA26, 1); -+ -+ platform_device_register(&at91rm9200_twi_device); -+} -+#else -+void __init at91_add_device_i2c(void) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * SPI -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) || defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE) -+static u64 spi_dmamask = 0xffffffffUL; -+ -+static struct resource spi_resources[] = { -+ [0] = { -+ .start = AT91RM9200_BASE_SPI, -+ .end = AT91RM9200_BASE_SPI + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91RM9200_ID_SPI, -+ .end = AT91RM9200_ID_SPI, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91rm9200_spi_device = { -+ .name = "at91_spi", -+ .id = 0, -+ .dev = { -+ .dma_mask = &spi_dmamask, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = spi_resources, -+ .num_resources = ARRAY_SIZE(spi_resources), -+}; -+ -+static const unsigned spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 }; -+ -+void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) -+{ -+ int i; -+ unsigned long cs_pin; -+ -+ at91_set_A_periph(AT91_PIN_PA0, 0); /* MISO */ -+ at91_set_A_periph(AT91_PIN_PA1, 0); /* MOSI */ -+ at91_set_A_periph(AT91_PIN_PA2, 0); /* SPCK */ -+ -+ /* Enable SPI chip-selects */ -+ for (i = 0; i < nr_devices; i++) { -+ if (devices[i].controller_data) -+ cs_pin = (unsigned long) devices[i].controller_data; -+ else -+ cs_pin = spi_standard_cs[devices[i].chip_select]; -+ -+#ifdef CONFIG_SPI_AT91_MANUAL_CS -+ at91_set_gpio_output(cs_pin, 1); -+#else -+ at91_set_A_periph(cs_pin, 0); -+#endif -+ -+ /* pass chip-select pin to driver */ -+ devices[i].controller_data = (void *) cs_pin; -+ } -+ -+ spi_register_board_info(devices, nr_devices); -+ at91_clock_associate("spi_clk", &at91rm9200_spi_device.dev, "spi"); -+ platform_device_register(&at91rm9200_spi_device); -+} -+#else -+void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * RTC -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) -+static struct platform_device at91rm9200_rtc_device = { -+ .name = "at91_rtc", -+ .id = -1, -+ .num_resources = 0, -+}; -+ -+static void __init at91_add_device_rtc(void) -+{ -+ platform_device_register(&at91rm9200_rtc_device); -+} -+#else -+static void __init at91_add_device_rtc(void) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * Watchdog -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_AT91RM9200_WATCHDOG) || defined(CONFIG_AT91RM9200_WATCHDOG_MODULE) -+static struct platform_device at91rm9200_wdt_device = { -+ .name = "at91_wdt", -+ .id = -1, -+ .num_resources = 0, -+}; -+ -+static void __init at91_add_device_watchdog(void) -+{ -+ platform_device_register(&at91rm9200_wdt_device); -+} -+#else -+static void __init at91_add_device_watchdog(void) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * LEDs -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_LEDS) -+u8 at91_leds_cpu; -+u8 at91_leds_timer; -+ -+void __init at91_init_leds(u8 cpu_led, u8 timer_led) -+{ -+ at91_leds_cpu = cpu_led; -+ at91_leds_timer = timer_led; -+} -+#else -+void __init at91_init_leds(u8 cpu_led, u8 timer_led) {} -+#endif -+ -+ -+#if defined(CONFIG_NEW_LEDS) -+ -+static struct platform_device at91_leds = { -+ .name = "at91_leds", -+ .id = -1, -+}; -+ -+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) -+{ -+ if (!nr) -+ return; -+ -+ at91_leds.dev.platform_data = leds; -+ -+ for ( ; nr; nr--, leds++) { -+ leds->index = nr; /* first record stores number of leds */ -+ at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0); -+ } -+ -+ platform_device_register(&at91_leds); -+} -+#else -+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * UART -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_SERIAL_ATMEL) -+static struct resource dbgu_resources[] = { -+ [0] = { -+ .start = AT91_VA_BASE_SYS + AT91_DBGU, -+ .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91_ID_SYS, -+ .end = AT91_ID_SYS, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data dbgu_data = { -+ .use_dma_tx = 0, -+ .use_dma_rx = 0, /* DBGU not capable of receive DMA */ -+ .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), -+}; -+ -+static struct platform_device at91rm9200_dbgu_device = { -+ .name = "atmel_usart", -+ .id = 0, -+ .dev = { -+ .platform_data = &dbgu_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = dbgu_resources, -+ .num_resources = ARRAY_SIZE(dbgu_resources), -+}; -+ -+static inline void configure_dbgu_pins(void) -+{ -+ at91_set_A_periph(AT91_PIN_PA30, 0); /* DRXD */ -+ at91_set_A_periph(AT91_PIN_PA31, 1); /* DTXD */ -+} -+ -+static struct resource uart0_resources[] = { -+ [0] = { -+ .start = AT91RM9200_BASE_US0, -+ .end = AT91RM9200_BASE_US0 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91RM9200_ID_US0, -+ .end = AT91RM9200_ID_US0, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data uart0_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+ -+static struct platform_device at91rm9200_uart0_device = { -+ .name = "atmel_usart", -+ .id = 1, -+ .dev = { -+ .platform_data = &uart0_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = uart0_resources, -+ .num_resources = ARRAY_SIZE(uart0_resources), -+}; -+ -+static inline void configure_usart0_pins(void) -+{ -+ at91_set_A_periph(AT91_PIN_PA17, 1); /* TXD0 */ -+ at91_set_A_periph(AT91_PIN_PA18, 0); /* RXD0 */ -+ at91_set_A_periph(AT91_PIN_PA20, 0); /* CTS0 */ -+ -+ /* -+ * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21. -+ * We need to drive the pin manually. Default is off (RTS is active low). -+ */ -+ at91_set_gpio_output(AT91_PIN_PA21, 1); -+} -+ -+static struct resource uart1_resources[] = { -+ [0] = { -+ .start = AT91RM9200_BASE_US1, -+ .end = AT91RM9200_BASE_US1 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91RM9200_ID_US1, -+ .end = AT91RM9200_ID_US1, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data uart1_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+ -+static struct platform_device at91rm9200_uart1_device = { -+ .name = "atmel_usart", -+ .id = 2, -+ .dev = { -+ .platform_data = &uart1_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = uart1_resources, -+ .num_resources = ARRAY_SIZE(uart1_resources), -+}; -+ -+static inline void configure_usart1_pins(void) -+{ -+ at91_set_A_periph(AT91_PIN_PB18, 0); /* RI1 */ -+ at91_set_A_periph(AT91_PIN_PB19, 0); /* DTR1 */ -+ at91_set_A_periph(AT91_PIN_PB20, 1); /* TXD1 */ -+ at91_set_A_periph(AT91_PIN_PB21, 0); /* RXD1 */ -+ at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD1 */ -+ at91_set_A_periph(AT91_PIN_PB24, 0); /* CTS1 */ -+ at91_set_A_periph(AT91_PIN_PB25, 0); /* DSR1 */ -+ at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS1 */ -+} -+ -+static struct resource uart2_resources[] = { -+ [0] = { -+ .start = AT91RM9200_BASE_US2, -+ .end = AT91RM9200_BASE_US2 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91RM9200_ID_US2, -+ .end = AT91RM9200_ID_US2, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data uart2_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+ -+static struct platform_device at91rm9200_uart2_device = { -+ .name = "atmel_usart", -+ .id = 3, -+ .dev = { -+ .platform_data = &uart2_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = uart2_resources, -+ .num_resources = ARRAY_SIZE(uart2_resources), -+}; -+ -+static inline void configure_usart2_pins(void) -+{ -+ at91_set_A_periph(AT91_PIN_PA22, 0); /* RXD2 */ -+ at91_set_A_periph(AT91_PIN_PA23, 1); /* TXD2 */ -+} -+ -+static struct resource uart3_resources[] = { -+ [0] = { -+ .start = AT91RM9200_BASE_US3, -+ .end = AT91RM9200_BASE_US3 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91RM9200_ID_US3, -+ .end = AT91RM9200_ID_US3, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data uart3_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+ -+static struct platform_device at91rm9200_uart3_device = { -+ .name = "atmel_usart", -+ .id = 4, -+ .dev = { -+ .platform_data = &uart3_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = uart3_resources, -+ .num_resources = ARRAY_SIZE(uart3_resources), -+}; -+ -+static inline void configure_usart3_pins(void) -+{ -+ at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */ -+ at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */ -+} -+ -+struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ -+struct platform_device *atmel_default_console_device; /* the serial console device */ -+ -+void __init at91_init_serial(struct at91_uart_config *config) -+{ -+ int i; -+ -+ /* Fill in list of supported UARTs */ -+ for (i = 0; i < config->nr_tty; i++) { -+ switch (config->tty_map[i]) { -+ case 0: -+ configure_usart0_pins(); -+ at91_uarts[i] = &at91rm9200_uart0_device; -+ at91_clock_associate("usart0_clk", &at91rm9200_uart0_device.dev, "usart"); -+ break; -+ case 1: -+ configure_usart1_pins(); -+ at91_uarts[i] = &at91rm9200_uart1_device; -+ at91_clock_associate("usart1_clk", &at91rm9200_uart1_device.dev, "usart"); -+ break; -+ case 2: -+ configure_usart2_pins(); -+ at91_uarts[i] = &at91rm9200_uart2_device; -+ at91_clock_associate("usart2_clk", &at91rm9200_uart2_device.dev, "usart"); -+ break; -+ case 3: -+ configure_usart3_pins(); -+ at91_uarts[i] = &at91rm9200_uart3_device; -+ at91_clock_associate("usart3_clk", &at91rm9200_uart3_device.dev, "usart"); -+ break; -+ case 4: -+ configure_dbgu_pins(); -+ at91_uarts[i] = &at91rm9200_dbgu_device; -+ at91_clock_associate("mck", &at91rm9200_dbgu_device.dev, "usart"); -+ break; -+ default: -+ continue; -+ } -+ at91_uarts[i]->id = i; /* update ID number to mapped ID */ -+ } -+ -+ /* Set serial console device */ -+ if (config->console_tty < ATMEL_MAX_UART) -+ atmel_default_console_device = at91_uarts[config->console_tty]; -+ if (!atmel_default_console_device) -+ printk(KERN_INFO "AT91: No default serial console defined.\n"); -+} -+ -+void __init at91_add_device_serial(void) -+{ -+ int i; -+ -+ for (i = 0; i < ATMEL_MAX_UART; i++) { -+ if (at91_uarts[i]) -+ platform_device_register(at91_uarts[i]); -+ } -+} -+#else -+void __init at91_init_serial(struct at91_uart_config *config) {} -+void __init at91_add_device_serial(void) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- */ -+ -+/* -+ * These devices are always present and don't need any board-specific -+ * setup. -+ */ -+static int __init at91_add_standard_devices(void) -+{ -+ at91_add_device_rtc(); -+ at91_add_device_watchdog(); -+ return 0; -+} -+ -+arch_initcall(at91_add_standard_devices); -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91rm9200_time.c linux-2.6.19/arch/arm/mach-at91rm9200/at91rm9200_time.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/at91rm9200_time.c Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/at91rm9200_time.c Thu Nov 16 11:41:09 2006 -@@ -30,6 +30,8 @@ - #include - #include - -+#include -+ - static unsigned long last_crtr; - - /* -@@ -99,6 +101,9 @@ - /* Set Period Interval timer */ - at91_sys_write(AT91_ST_PIMR, LATCH); - -+ /* Clear any pending interrupts */ -+ (void) at91_sys_read(AT91_ST_SR); -+ - /* Enable Period Interval Timer interrupt */ - at91_sys_write(AT91_ST_IER, AT91_ST_PITS); - } -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9260.c linux-2.6.19/arch/arm/mach-at91rm9200/at91sam9260.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9260.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/at91sam9260.c Mon Nov 20 10:52:16 2006 -@@ -0,0 +1,294 @@ -+/* -+ * arch/arm/mach-at91rm9200/at91sam9260.c -+ * -+ * Copyright (C) 2006 SAN People -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ */ -+ -+#include -+ -+#include -+#include -+#include -+#include -+ -+#include "generic.h" -+#include "clock.h" -+ -+static struct map_desc at91sam9260_io_desc[] __initdata = { -+ { -+ .virtual = AT91_VA_BASE_SYS, -+ .pfn = __phys_to_pfn(AT91_BASE_SYS), -+ .length = SZ_16K, -+ .type = MT_DEVICE, -+ }, { -+ .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE, -+ .pfn = __phys_to_pfn(AT91SAM9260_SRAM0_BASE), -+ .length = AT91SAM9260_SRAM0_SIZE, -+ .type = MT_DEVICE, -+ }, { -+ .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE - AT91SAM9260_SRAM1_SIZE, -+ .pfn = __phys_to_pfn(AT91SAM9260_SRAM1_BASE), -+ .length = AT91SAM9260_SRAM1_SIZE, -+ .type = MT_DEVICE, -+ }, -+}; -+ -+/* -------------------------------------------------------------------- -+ * Clocks -+ * -------------------------------------------------------------------- */ -+ -+/* -+ * The peripheral clocks. -+ */ -+static struct clk pioA_clk = { -+ .name = "pioA_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_PIOA, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk pioB_clk = { -+ .name = "pioB_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_PIOB, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk pioC_clk = { -+ .name = "pioC_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_PIOC, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk adc_clk = { -+ .name = "adc_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_ADC, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk usart0_clk = { -+ .name = "usart0_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_US0, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk usart1_clk = { -+ .name = "usart1_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_US1, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk usart2_clk = { -+ .name = "usart2_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_US2, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk mmc_clk = { -+ .name = "mci_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_MCI, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk udc_clk = { -+ .name = "udc_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_UDP, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk twi_clk = { -+ .name = "twi_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_TWI, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk spi0_clk = { -+ .name = "spi0_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_SPI0, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk spi1_clk = { -+ .name = "spi1_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_SPI1, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk ohci_clk = { -+ .name = "ohci_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_UHP, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk ether_clk = { -+ .name = "ether_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_EMAC, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk isi_clk = { -+ .name = "isi_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_ISI, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk usart3_clk = { -+ .name = "usart3_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_US3, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk usart4_clk = { -+ .name = "usart4_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_US4, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk usart5_clk = { -+ .name = "usart5_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_US5, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+ -+static struct clk *periph_clocks[] __initdata = { -+ &pioA_clk, -+ &pioB_clk, -+ &pioC_clk, -+ &adc_clk, -+ &usart0_clk, -+ &usart1_clk, -+ &usart2_clk, -+ &mmc_clk, -+ &udc_clk, -+ &twi_clk, -+ &spi0_clk, -+ &spi1_clk, -+ // ssc -+ // tc0 .. tc2 -+ &ohci_clk, -+ ðer_clk, -+ &isi_clk, -+ &usart3_clk, -+ &usart4_clk, -+ &usart5_clk, -+ // tc3 .. tc5 -+ // irq0 .. irq2 -+}; -+ -+/* -+ * The two programmable clocks. -+ * You must configure pin multiplexing to bring these signals out. -+ */ -+static struct clk pck0 = { -+ .name = "pck0", -+ .pmc_mask = AT91_PMC_PCK0, -+ .type = CLK_TYPE_PROGRAMMABLE, -+ .id = 0, -+}; -+static struct clk pck1 = { -+ .name = "pck1", -+ .pmc_mask = AT91_PMC_PCK1, -+ .type = CLK_TYPE_PROGRAMMABLE, -+ .id = 1, -+}; -+ -+static void __init at91sam9260_register_clocks(void) -+{ -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) -+ clk_register(periph_clocks[i]); -+ -+ clk_register(&pck0); -+ clk_register(&pck1); -+} -+ -+/* -------------------------------------------------------------------- -+ * GPIO -+ * -------------------------------------------------------------------- */ -+ -+static struct at91_gpio_bank at91sam9260_gpio[] = { -+ { -+ .id = AT91SAM9260_ID_PIOA, -+ .offset = AT91_PIOA, -+ .clock = &pioA_clk, -+ }, { -+ .id = AT91SAM9260_ID_PIOB, -+ .offset = AT91_PIOB, -+ .clock = &pioB_clk, -+ }, { -+ .id = AT91SAM9260_ID_PIOC, -+ .offset = AT91_PIOC, -+ .clock = &pioC_clk, -+ } -+}; -+ -+static void at91sam9260_reset(void) -+{ -+#warning "Implement CPU reset" -+} -+ -+ -+/* -------------------------------------------------------------------- -+ * AT91SAM9260 processor initialization -+ * -------------------------------------------------------------------- */ -+ -+void __init at91sam9260_initialize(unsigned long main_clock) -+{ -+ /* Map peripherals */ -+ iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc)); -+ -+ at91_arch_reset = at91sam9260_reset; -+ at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) -+ | (1 << AT91SAM9260_ID_IRQ2); -+ -+ /* Init clock subsystem */ -+ at91_clock_init(main_clock); -+ -+ /* Register the processor-specific clocks */ -+ at91sam9260_register_clocks(); -+ -+ /* Register GPIO subsystem */ -+ at91_gpio_init(at91sam9260_gpio, 3); -+} -+ -+/* -------------------------------------------------------------------- -+ * Interrupt initialization -+ * -------------------------------------------------------------------- */ -+ -+/* -+ * The default interrupt priority levels (0 = lowest, 7 = highest). -+ */ -+static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = { -+ 7, /* Advanced Interrupt Controller */ -+ 7, /* System Peripherals */ -+ 0, /* Parallel IO Controller A */ -+ 0, /* Parallel IO Controller B */ -+ 0, /* Parallel IO Controller C */ -+ 0, /* Analog-to-Digital Converter */ -+ 6, /* USART 0 */ -+ 6, /* USART 1 */ -+ 6, /* USART 2 */ -+ 0, /* Multimedia Card Interface */ -+ 4, /* USB Device Port */ -+ 0, /* Two-Wire Interface */ -+ 6, /* Serial Peripheral Interface 0 */ -+ 6, /* Serial Peripheral Interface 1 */ -+ 5, /* Serial Synchronous Controller */ -+ 0, -+ 0, -+ 0, /* Timer Counter 0 */ -+ 0, /* Timer Counter 1 */ -+ 0, /* Timer Counter 2 */ -+ 3, /* USB Host port */ -+ 3, /* Ethernet */ -+ 0, /* Image Sensor Interface */ -+ 6, /* USART 3 */ -+ 6, /* USART 4 */ -+ 6, /* USART 5 */ -+ 0, /* Timer Counter 3 */ -+ 0, /* Timer Counter 4 */ -+ 0, /* Timer Counter 5 */ -+ 0, /* Advanced Interrupt Controller */ -+ 0, /* Advanced Interrupt Controller */ -+ 0, /* Advanced Interrupt Controller */ -+}; -+ -+void __init at91sam9260_init_interrupts(unsigned int priority[NR_AIC_IRQS]) -+{ -+ if (!priority) -+ priority = at91sam9260_default_irq_priority; -+ -+ /* Initialize the AIC interrupt controller */ -+ at91_aic_init(priority); -+ -+ /* Enable GPIO interrupts */ -+ at91_gpio_irq_setup(); -+} -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9260_devices.c linux-2.6.19/arch/arm/mach-at91rm9200/at91sam9260_devices.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9260_devices.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/at91sam9260_devices.c Thu Nov 23 16:37:24 2006 -@@ -0,0 +1,892 @@ -+/* -+ * arch/arm/mach-at91rm9200/at91sam9260_devices.c -+ * -+ * Copyright (C) 2006 Atmel -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ */ -+#include -+#include -+ -+#include -+ -+#include -+#include -+#include -+#include -+ -+#include "generic.h" -+ -+#define SZ_512 0x00000200 -+#define SZ_256 0x00000100 -+#define SZ_16 0x00000010 -+ -+/* -------------------------------------------------------------------- -+ * USB Host -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) -+static u64 ohci_dmamask = 0xffffffffUL; -+static struct at91_usbh_data usbh_data; -+ -+static struct resource usbh_resources[] = { -+ [0] = { -+ .start = AT91SAM9260_UHP_BASE, -+ .end = AT91SAM9260_UHP_BASE + SZ_1M - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9260_ID_UHP, -+ .end = AT91SAM9260_ID_UHP, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91_usbh_device = { -+ .name = "at91_ohci", -+ .id = -1, -+ .dev = { -+ .dma_mask = &ohci_dmamask, -+ .coherent_dma_mask = 0xffffffff, -+ .platform_data = &usbh_data, -+ }, -+ .resource = usbh_resources, -+ .num_resources = ARRAY_SIZE(usbh_resources), -+}; -+ -+void __init at91_add_device_usbh(struct at91_usbh_data *data) -+{ -+ if (!data) -+ return; -+ -+ usbh_data = *data; -+ platform_device_register(&at91_usbh_device); -+} -+#else -+void __init at91_add_device_usbh(struct at91_usbh_data *data) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * USB Device (Gadget) -+ * -------------------------------------------------------------------- */ -+ -+#ifdef CONFIG_USB_GADGET_AT91 -+static struct at91_udc_data udc_data; -+ -+static struct resource udc_resources[] = { -+ [0] = { -+ .start = AT91SAM9260_BASE_UDP, -+ .end = AT91SAM9260_BASE_UDP + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9260_ID_UDP, -+ .end = AT91SAM9260_ID_UDP, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91_udc_device = { -+ .name = "at91_udc", -+ .id = -1, -+ .dev = { -+ .platform_data = &udc_data, -+ }, -+ .resource = udc_resources, -+ .num_resources = ARRAY_SIZE(udc_resources), -+}; -+ -+void __init at91_add_device_udc(struct at91_udc_data *data) -+{ -+ if (!data) -+ return; -+ -+ if (data->vbus_pin) { -+ at91_set_gpio_input(data->vbus_pin, 0); -+ at91_set_deglitch(data->vbus_pin, 1); -+ } -+ -+ /* Pullup pin is handled internally by USB device peripheral */ -+ -+ udc_data = *data; -+ platform_device_register(&at91_udc_device); -+} -+#else -+void __init at91_add_device_udc(struct at91_udc_data *data) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * Ethernet -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) -+static u64 eth_dmamask = 0xffffffffUL; -+static struct eth_platform_data eth_data; -+ -+static struct resource eth_resources[] = { -+ [0] = { -+ .start = AT91SAM9260_BASE_EMAC, -+ .end = AT91SAM9260_BASE_EMAC + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9260_ID_EMAC, -+ .end = AT91SAM9260_ID_EMAC, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91sam9260_eth_device = { -+ .name = "macb", -+ .id = -1, -+ .dev = { -+ .dma_mask = ð_dmamask, -+ .coherent_dma_mask = 0xffffffff, -+ .platform_data = ð_data, -+ }, -+ .resource = eth_resources, -+ .num_resources = ARRAY_SIZE(eth_resources), -+}; -+ -+void __init at91_add_device_eth(struct eth_platform_data *data) -+{ -+ if (!data) -+ return; -+ -+ if (data->phy_irq_pin) { -+ at91_set_gpio_input(data->phy_irq_pin, 0); -+ at91_set_deglitch(data->phy_irq_pin, 1); -+ } -+ -+ /* Pins used for MII and RMII */ -+ at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */ -+ at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */ -+ at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */ -+ at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */ -+ at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */ -+ at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */ -+ at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */ -+ at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */ -+ at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */ -+ at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */ -+ -+ if (!data->is_rmii) { -+ at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */ -+ at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */ -+ at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */ -+ at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */ -+ at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */ -+ at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */ -+ at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */ -+ at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */ -+ } -+ -+ eth_data = *data; -+ platform_device_register(&at91sam9260_eth_device); -+} -+#else -+void __init at91_add_device_eth(struct eth_platform_data *data) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * MMC / SD -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) -+static u64 mmc_dmamask = 0xffffffffUL; -+static struct at91_mmc_data mmc_data; -+ -+static struct resource mmc_resources[] = { -+ [0] = { -+ .start = AT91SAM9260_BASE_MCI, -+ .end = AT91SAM9260_BASE_MCI + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9260_ID_MCI, -+ .end = AT91SAM9260_ID_MCI, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91sam9260_mmc_device = { -+ .name = "at91_mci", -+ .id = -1, -+ .dev = { -+ .dma_mask = &mmc_dmamask, -+ .coherent_dma_mask = 0xffffffff, -+ .platform_data = &mmc_data, -+ }, -+ .resource = mmc_resources, -+ .num_resources = ARRAY_SIZE(mmc_resources), -+}; -+ -+void __init at91_add_device_mmc(struct at91_mmc_data *data) -+{ -+ if (!data) -+ return; -+ -+ /* input/irq */ -+ if (data->det_pin) { -+ at91_set_gpio_input(data->det_pin, 1); -+ at91_set_deglitch(data->det_pin, 1); -+ } -+ if (data->wp_pin) -+ at91_set_gpio_input(data->wp_pin, 1); -+ if (data->vcc_pin) -+ at91_set_gpio_output(data->vcc_pin, 0); -+ -+ /* CLK */ -+ at91_set_A_periph(AT91_PIN_PA8, 0); -+ -+ if (data->slot_b) { -+ /* CMD */ -+ at91_set_B_periph(AT91_PIN_PA1, 1); -+ -+ /* DAT0, maybe DAT1..DAT3 */ -+ at91_set_B_periph(AT91_PIN_PA0, 1); -+ if (data->wire4) { -+ at91_set_B_periph(AT91_PIN_PA5, 1); -+ at91_set_B_periph(AT91_PIN_PA4, 1); -+ at91_set_B_periph(AT91_PIN_PA3, 1); -+ } -+ } else { -+ /* CMD */ -+ at91_set_A_periph(AT91_PIN_PA7, 1); -+ -+ /* DAT0, maybe DAT1..DAT3 */ -+ at91_set_A_periph(AT91_PIN_PA6, 1); -+ if (data->wire4) { -+ at91_set_A_periph(AT91_PIN_PA9, 1); -+ at91_set_A_periph(AT91_PIN_PA10, 1); -+ at91_set_A_periph(AT91_PIN_PA11, 1); -+ } -+ } -+ -+ mmc_data = *data; -+ platform_device_register(&at91sam9260_mmc_device); -+} -+#else -+void __init at91_add_device_mmc(struct at91_mmc_data *data) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * NAND / SmartMedia -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE) -+static struct at91_nand_data nand_data; -+ -+#define NAND_BASE AT91_CHIPSELECT_3 -+ -+static struct resource nand_resources[] = { -+ { -+ .start = NAND_BASE, -+ .end = NAND_BASE + SZ_8M - 1, -+ .flags = IORESOURCE_MEM, -+ } -+}; -+ -+static struct platform_device at91sam9260_nand_device = { -+ .name = "at91_nand", -+ .id = -1, -+ .dev = { -+ .platform_data = &nand_data, -+ }, -+ .resource = nand_resources, -+ .num_resources = ARRAY_SIZE(nand_resources), -+}; -+ -+void __init at91_add_device_nand(struct at91_nand_data *data) -+{ -+ unsigned long csa, mode; -+ -+ if (!data) -+ return; -+ -+ csa = at91_sys_read(AT91_MATRIX_EBICSA); -+ at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC); -+ -+ /* set the bus interface characteristics */ -+ at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) -+ | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); -+ -+ at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5) -+ | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5)); -+ -+ at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7)); -+ -+ if (data->bus_width_16) -+ mode = AT91_SMC_DBW_16; -+ else -+ mode = AT91_SMC_DBW_8; -+ at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1)); -+ -+ /* enable pin */ -+ if (data->enable_pin) -+ at91_set_gpio_output(data->enable_pin, 1); -+ -+ /* ready/busy pin */ -+ if (data->rdy_pin) -+ at91_set_gpio_input(data->rdy_pin, 1); -+ -+ /* card detect pin */ -+ if (data->det_pin) -+ at91_set_gpio_input(data->det_pin, 1); -+ -+ nand_data = *data; -+ platform_device_register(&at91sam9260_nand_device); -+} -+#else -+void __init at91_add_device_nand(struct at91_nand_data *data) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * TWI (i2c) -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE) -+ -+static struct resource twi_resources[] = { -+ [0] = { -+ .start = AT91SAM9260_BASE_TWI, -+ .end = AT91SAM9260_BASE_TWI + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9260_ID_TWI, -+ .end = AT91SAM9260_ID_TWI, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91sam9260_twi_device = { -+ .name = "at91_i2c", -+ .id = -1, -+ .resource = twi_resources, -+ .num_resources = ARRAY_SIZE(twi_resources), -+}; -+ -+void __init at91_add_device_i2c(void) -+{ -+ /* pins used for TWI interface */ -+ at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */ -+ at91_set_multi_drive(AT91_PIN_PA23, 1); -+ -+ at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */ -+ at91_set_multi_drive(AT91_PIN_PA24, 1); -+ -+ platform_device_register(&at91sam9260_twi_device); -+} -+#else -+void __init at91_add_device_i2c(void) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * SPI -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) -+static u64 spi_dmamask = 0xffffffffUL; -+ -+static struct resource spi0_resources[] = { -+ [0] = { -+ .start = AT91SAM9260_BASE_SPI0, -+ .end = AT91SAM9260_BASE_SPI0 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9260_ID_SPI0, -+ .end = AT91SAM9260_ID_SPI0, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91sam9260_spi0_device = { -+ .name = "atmel_spi", -+ .id = 0, -+ .dev = { -+ .dma_mask = &spi_dmamask, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = spi0_resources, -+ .num_resources = ARRAY_SIZE(spi0_resources), -+}; -+ -+static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 }; -+ -+static struct resource spi1_resources[] = { -+ [0] = { -+ .start = AT91SAM9260_BASE_SPI1, -+ .end = AT91SAM9260_BASE_SPI1 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9260_ID_SPI1, -+ .end = AT91SAM9260_ID_SPI1, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91sam9260_spi1_device = { -+ .name = "atmel_spi", -+ .id = 1, -+ .dev = { -+ .dma_mask = &spi_dmamask, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = spi1_resources, -+ .num_resources = ARRAY_SIZE(spi1_resources), -+}; -+ -+static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 }; -+ -+void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) -+{ -+ int i; -+ unsigned long cs_pin; -+ short enable_spi0 = 0; -+ short enable_spi1 = 0; -+ -+ /* Choose SPI chip-selects */ -+ for (i = 0; i < nr_devices; i++) { -+ if (devices[i].controller_data) -+ cs_pin = (unsigned long) devices[i].controller_data; -+ else if (devices[i].bus_num == 0) -+ cs_pin = spi0_standard_cs[devices[i].chip_select]; -+ else -+ cs_pin = spi1_standard_cs[devices[i].chip_select]; -+ -+ if (devices[i].bus_num == 0) -+ enable_spi0 = 1; -+ else -+ enable_spi1 = 1; -+ -+ /* enable chip-select pin */ -+ at91_set_gpio_output(cs_pin, 1); -+ -+ /* pass chip-select pin to driver */ -+ devices[i].controller_data = (void *) cs_pin; -+ } -+ -+ spi_register_board_info(devices, nr_devices); -+ -+ /* Configure SPI bus(es) */ -+ if (enable_spi0) { -+ at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ -+ at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ -+ at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI1_SPCK */ -+ -+ at91_clock_associate("spi0_clk", &at91sam9260_spi0_device.dev, "spi_clk"); -+ platform_device_register(&at91sam9260_spi0_device); -+ } -+ if (enable_spi1) { -+ at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */ -+ at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */ -+ at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */ -+ -+ at91_clock_associate("spi1_clk", &at91sam9260_spi1_device.dev, "spi_clk"); -+ platform_device_register(&at91sam9260_spi1_device); -+ } -+} -+#else -+void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * LEDs -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_LEDS) -+u8 at91_leds_cpu; -+u8 at91_leds_timer; -+ -+void __init at91_init_leds(u8 cpu_led, u8 timer_led) -+{ -+ at91_leds_cpu = cpu_led; -+ at91_leds_timer = timer_led; -+} -+#else -+void __init at91_init_leds(u8 cpu_led, u8 timer_led) {} -+#endif -+ -+ -+#if defined(CONFIG_NEW_LEDS) -+ -+static struct platform_device at91_leds = { -+ .name = "at91_leds", -+ .id = -1, -+}; -+ -+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) -+{ -+ if (!nr) -+ return; -+ -+ at91_leds.dev.platform_data = leds; -+ -+ for ( ; nr; nr--, leds++) { -+ leds->index = nr; /* first record stores number of leds */ -+ at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0); -+ } -+ -+ platform_device_register(&at91_leds); -+} -+#else -+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * UART -+ * -------------------------------------------------------------------- */ -+#if defined(CONFIG_SERIAL_ATMEL) -+static struct resource dbgu_resources[] = { -+ [0] = { -+ .start = AT91_VA_BASE_SYS + AT91_DBGU, -+ .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91_ID_SYS, -+ .end = AT91_ID_SYS, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data dbgu_data = { -+ .use_dma_tx = 0, -+ .use_dma_rx = 0, /* DBGU not capable of receive DMA */ -+ .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), -+}; -+ -+static struct platform_device at91sam9260_dbgu_device = { -+ .name = "atmel_usart", -+ .id = 0, -+ .dev = { -+ .platform_data = &dbgu_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = dbgu_resources, -+ .num_resources = ARRAY_SIZE(dbgu_resources), -+}; -+ -+static inline void configure_dbgu_pins(void) -+{ -+ at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */ -+ at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */ -+} -+ -+static struct resource uart0_resources[] = { -+ [0] = { -+ .start = AT91SAM9260_BASE_US0, -+ .end = AT91SAM9260_BASE_US0 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9260_ID_US0, -+ .end = AT91SAM9260_ID_US0, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data uart0_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+ -+static struct platform_device at91sam9260_uart0_device = { -+ .name = "atmel_usart", -+ .id = 1, -+ .dev = { -+ .platform_data = &uart0_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = uart0_resources, -+ .num_resources = ARRAY_SIZE(uart0_resources), -+}; -+ -+static inline void configure_usart0_pins(void) -+{ -+ at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */ -+ at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */ -+ at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS0 */ -+ at91_set_A_periph(AT91_PIN_PB27, 0); /* CTS0 */ -+ at91_set_A_periph(AT91_PIN_PB24, 0); /* DTR0 */ -+ at91_set_A_periph(AT91_PIN_PB22, 0); /* DSR0 */ -+ at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD0 */ -+ at91_set_A_periph(AT91_PIN_PB25, 0); /* RI0 */ -+} -+ -+static struct resource uart1_resources[] = { -+ [0] = { -+ .start = AT91SAM9260_BASE_US1, -+ .end = AT91SAM9260_BASE_US1 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9260_ID_US1, -+ .end = AT91SAM9260_ID_US1, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data uart1_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+ -+static struct platform_device at91sam9260_uart1_device = { -+ .name = "atmel_usart", -+ .id = 2, -+ .dev = { -+ .platform_data = &uart1_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = uart1_resources, -+ .num_resources = ARRAY_SIZE(uart1_resources), -+}; -+ -+static inline void configure_usart1_pins(void) -+{ -+ at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */ -+ at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */ -+ at91_set_A_periph(AT91_PIN_PB28, 0); /* RTS1 */ -+ at91_set_A_periph(AT91_PIN_PB29, 0); /* CTS1 */ -+} -+ -+static struct resource uart2_resources[] = { -+ [0] = { -+ .start = AT91SAM9260_BASE_US2, -+ .end = AT91SAM9260_BASE_US2 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9260_ID_US2, -+ .end = AT91SAM9260_ID_US2, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data uart2_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+ -+static struct platform_device at91sam9260_uart2_device = { -+ .name = "atmel_usart", -+ .id = 3, -+ .dev = { -+ .platform_data = &uart2_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = uart2_resources, -+ .num_resources = ARRAY_SIZE(uart2_resources), -+}; -+ -+static inline void configure_usart2_pins(void) -+{ -+ at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */ -+ at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */ -+} -+ -+static struct resource uart3_resources[] = { -+ [0] = { -+ .start = AT91SAM9260_BASE_US3, -+ .end = AT91SAM9260_BASE_US3 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9260_ID_US3, -+ .end = AT91SAM9260_ID_US3, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data uart3_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+ -+static struct platform_device at91sam9260_uart3_device = { -+ .name = "atmel_usart", -+ .id = 4, -+ .dev = { -+ .platform_data = &uart3_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = uart3_resources, -+ .num_resources = ARRAY_SIZE(uart3_resources), -+}; -+ -+static inline void configure_usart3_pins(void) -+{ -+ at91_set_A_periph(AT91_PIN_PB10, 1); /* TXD3 */ -+ at91_set_A_periph(AT91_PIN_PB11, 0); /* RXD3 */ -+} -+ -+static struct resource uart4_resources[] = { -+ [0] = { -+ .start = AT91SAM9260_BASE_US4, -+ .end = AT91SAM9260_BASE_US4 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9260_ID_US4, -+ .end = AT91SAM9260_ID_US4, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data uart4_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+ -+static struct platform_device at91sam9260_uart4_device = { -+ .name = "atmel_usart", -+ .id = 5, -+ .dev = { -+ .platform_data = &uart4_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = uart4_resources, -+ .num_resources = ARRAY_SIZE(uart4_resources), -+}; -+ -+static inline void configure_usart4_pins(void) -+{ -+ at91_set_B_periph(AT91_PIN_PA31, 1); /* TXD4 */ -+ at91_set_B_periph(AT91_PIN_PA30, 0); /* RXD4 */ -+} -+ -+static struct resource uart5_resources[] = { -+ [0] = { -+ .start = AT91SAM9260_BASE_US5, -+ .end = AT91SAM9260_BASE_US5 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9260_ID_US5, -+ .end = AT91SAM9260_ID_US5, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data uart5_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+ -+static struct platform_device at91sam9260_uart5_device = { -+ .name = "atmel_usart", -+ .id = 6, -+ .dev = { -+ .platform_data = &uart5_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = uart5_resources, -+ .num_resources = ARRAY_SIZE(uart5_resources), -+}; -+ -+static inline void configure_usart5_pins(void) -+{ -+ at91_set_A_periph(AT91_PIN_PB12, 1); /* TXD5 */ -+ at91_set_A_periph(AT91_PIN_PB13, 0); /* RXD5 */ -+} -+ -+struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ -+struct platform_device *atmel_default_console_device; /* the serial console device */ -+ -+void __init at91_init_serial(struct at91_uart_config *config) -+{ -+ int i; -+ -+ /* Fill in list of supported UARTs */ -+ for (i = 0; i < config->nr_tty; i++) { -+ switch (config->tty_map[i]) { -+ case 0: -+ configure_usart0_pins(); -+ at91_uarts[i] = &at91sam9260_uart0_device; -+ at91_clock_associate("usart0_clk", &at91sam9260_uart0_device.dev, "usart"); -+ break; -+ case 1: -+ configure_usart1_pins(); -+ at91_uarts[i] = &at91sam9260_uart1_device; -+ at91_clock_associate("usart1_clk", &at91sam9260_uart1_device.dev, "usart"); -+ break; -+ case 2: -+ configure_usart2_pins(); -+ at91_uarts[i] = &at91sam9260_uart2_device; -+ at91_clock_associate("usart2_clk", &at91sam9260_uart2_device.dev, "usart"); -+ break; -+ case 3: -+ configure_usart3_pins(); -+ at91_uarts[i] = &at91sam9260_uart3_device; -+ at91_clock_associate("usart3_clk", &at91sam9260_uart3_device.dev, "usart"); -+ break; -+ case 4: -+ configure_usart4_pins(); -+ at91_uarts[i] = &at91sam9260_uart4_device; -+ at91_clock_associate("usart4_clk", &at91sam9260_uart4_device.dev, "usart"); -+ break; -+ case 5: -+ configure_usart5_pins(); -+ at91_uarts[i] = &at91sam9260_uart5_device; -+ at91_clock_associate("usart5_clk", &at91sam9260_uart5_device.dev, "usart"); -+ break; -+ case 6: -+ configure_dbgu_pins(); -+ at91_uarts[i] = &at91sam9260_dbgu_device; -+ at91_clock_associate("mck", &at91sam9260_dbgu_device.dev, "usart"); -+ break; -+ default: -+ continue; -+ } -+ at91_uarts[i]->id = i; /* update ID number to mapped ID */ -+ } -+ -+ /* Set serial console device */ -+ if (config->console_tty < ATMEL_MAX_UART) -+ atmel_default_console_device = at91_uarts[config->console_tty]; -+ if (!atmel_default_console_device) -+ printk(KERN_INFO "AT91: No default serial console defined.\n"); -+} -+ -+void __init at91_add_device_serial(void) -+{ -+ int i; -+ -+ for (i = 0; i < ATMEL_MAX_UART; i++) { -+ if (at91_uarts[i]) -+ platform_device_register(at91_uarts[i]); -+ } -+} -+#else -+void __init at91_init_serial(struct at91_uart_config *config) {} -+void __init at91_add_device_serial(void) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- */ -+/* -+ * These devices are always present and don't need any board-specific -+ * setup. -+ */ -+static int __init at91_add_standard_devices(void) -+{ -+ return 0; -+} -+ -+arch_initcall(at91_add_standard_devices); -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261.c linux-2.6.19/arch/arm/mach-at91rm9200/at91sam9261.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/at91sam9261.c Thu Nov 23 15:41:39 2006 -@@ -0,0 +1,289 @@ -+/* -+ * arch/arm/mach-at91rm9200/at91sam9261.c -+ * -+ * Copyright (C) 2005 SAN People -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ */ -+ -+#include -+ -+#include -+#include -+#include -+#include -+ -+#include "generic.h" -+#include "clock.h" -+ -+static struct map_desc at91sam9261_io_desc[] __initdata = { -+ { -+ .virtual = AT91_VA_BASE_SYS, -+ .pfn = __phys_to_pfn(AT91_BASE_SYS), -+ .length = SZ_16K, -+ .type = MT_DEVICE, -+ }, { -+ .virtual = AT91_IO_VIRT_BASE - AT91SAM9261_SRAM_SIZE, -+ .pfn = __phys_to_pfn(AT91SAM9261_SRAM_BASE), -+ .length = AT91SAM9261_SRAM_SIZE, -+ .type = MT_DEVICE, -+ }, -+}; -+ -+/* -------------------------------------------------------------------- -+ * Clocks -+ * -------------------------------------------------------------------- */ -+ -+/* -+ * The peripheral clocks. -+ */ -+static struct clk pioA_clk = { -+ .name = "pioA_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_PIOA, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk pioB_clk = { -+ .name = "pioB_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_PIOB, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk pioC_clk = { -+ .name = "pioC_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_PIOC, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk usart0_clk = { -+ .name = "usart0_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_US0, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk usart1_clk = { -+ .name = "usart1_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_US1, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk usart2_clk = { -+ .name = "usart2_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_US2, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk mmc_clk = { -+ .name = "mci_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_MCI, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk udc_clk = { -+ .name = "udc_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_UDP, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk twi_clk = { -+ .name = "twi_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_TWI, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk spi0_clk = { -+ .name = "spi0_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_SPI0, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk spi1_clk = { -+ .name = "spi1_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_SPI1, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk ohci_clk = { -+ .name = "ohci_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_UHP, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk lcdc_clk = { -+ .name = "lcdc_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_LCDC, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+ -+static struct clk *periph_clocks[] __initdata = { -+ &pioA_clk, -+ &pioB_clk, -+ &pioC_clk, -+ &usart0_clk, -+ &usart1_clk, -+ &usart2_clk, -+ &mmc_clk, -+ &udc_clk, -+ &twi_clk, -+ &spi0_clk, -+ &spi1_clk, -+ // ssc 0 .. ssc2 -+ // tc0 .. tc2 -+ &ohci_clk, -+ &lcdc_clk, -+ // irq0 .. irq2 -+}; -+ -+/* -+ * The four programmable clocks. -+ * You must configure pin multiplexing to bring these signals out. -+ */ -+static struct clk pck0 = { -+ .name = "pck0", -+ .pmc_mask = AT91_PMC_PCK0, -+ .type = CLK_TYPE_PROGRAMMABLE, -+ .id = 0, -+}; -+static struct clk pck1 = { -+ .name = "pck1", -+ .pmc_mask = AT91_PMC_PCK1, -+ .type = CLK_TYPE_PROGRAMMABLE, -+ .id = 1, -+}; -+static struct clk pck2 = { -+ .name = "pck2", -+ .pmc_mask = AT91_PMC_PCK2, -+ .type = CLK_TYPE_PROGRAMMABLE, -+ .id = 2, -+}; -+static struct clk pck3 = { -+ .name = "pck3", -+ .pmc_mask = AT91_PMC_PCK3, -+ .type = CLK_TYPE_PROGRAMMABLE, -+ .id = 3, -+}; -+ -+/* HClocks */ -+static struct clk hck0 = { -+ .name = "hck0", -+ .pmc_mask = AT91_PMC_HCK0, -+ .type = CLK_TYPE_SYSTEM, -+ .id = 0, -+}; -+static struct clk hck1 = { -+ .name = "hck1", -+ .pmc_mask = AT91_PMC_HCK1, -+ .type = CLK_TYPE_SYSTEM, -+ .id = 1, -+}; -+ -+static void __init at91sam9261_register_clocks(void) -+{ -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) -+ clk_register(periph_clocks[i]); -+ -+ clk_register(&pck0); -+ clk_register(&pck1); -+ clk_register(&pck2); -+ clk_register(&pck3); -+ -+ clk_register(&hck0); -+ clk_register(&hck1); -+} -+ -+/* -------------------------------------------------------------------- -+ * GPIO -+ * -------------------------------------------------------------------- */ -+ -+static struct at91_gpio_bank at91sam9261_gpio[] = { -+ { -+ .id = AT91SAM9261_ID_PIOA, -+ .offset = AT91_PIOA, -+ .clock = &pioA_clk, -+ }, { -+ .id = AT91SAM9261_ID_PIOB, -+ .offset = AT91_PIOB, -+ .clock = &pioB_clk, -+ }, { -+ .id = AT91SAM9261_ID_PIOC, -+ .offset = AT91_PIOC, -+ .clock = &pioC_clk, -+ } -+}; -+ -+static void at91sam9261_reset(void) -+{ -+#warning "Implement CPU reset" -+} -+ -+ -+/* -------------------------------------------------------------------- -+ * AT91SAM9261 processor initialization -+ * -------------------------------------------------------------------- */ -+ -+void __init at91sam9261_initialize(unsigned long main_clock) -+{ -+ /* Map peripherals */ -+ iotable_init(at91sam9261_io_desc, ARRAY_SIZE(at91sam9261_io_desc)); -+ -+ at91_arch_reset = at91sam9261_reset; -+ at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) -+ | (1 << AT91SAM9261_ID_IRQ2); -+ -+ /* Init clock subsystem */ -+ at91_clock_init(main_clock); -+ -+ /* Register the processor-specific clocks */ -+ at91sam9261_register_clocks(); -+ -+ /* Register GPIO subsystem */ -+ at91_gpio_init(at91sam9261_gpio, 3); -+} -+ -+/* -------------------------------------------------------------------- -+ * Interrupt initialization -+ * -------------------------------------------------------------------- */ -+ -+/* -+ * The default interrupt priority levels (0 = lowest, 7 = highest). -+ */ -+static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = { -+ 7, /* Advanced Interrupt Controller */ -+ 7, /* System Peripherals */ -+ 0, /* Parallel IO Controller A */ -+ 0, /* Parallel IO Controller B */ -+ 0, /* Parallel IO Controller C */ -+ 0, -+ 6, /* USART 0 */ -+ 6, /* USART 1 */ -+ 6, /* USART 2 */ -+ 0, /* Multimedia Card Interface */ -+ 4, /* USB Device Port */ -+ 0, /* Two-Wire Interface */ -+ 6, /* Serial Peripheral Interface 0 */ -+ 6, /* Serial Peripheral Interface 1 */ -+ 5, /* Serial Synchronous Controller 0 */ -+ 5, /* Serial Synchronous Controller 1 */ -+ 5, /* Serial Synchronous Controller 2 */ -+ 0, /* Timer Counter 0 */ -+ 0, /* Timer Counter 1 */ -+ 0, /* Timer Counter 2 */ -+ 3, /* USB Host port */ -+ 3, /* LCD Controller */ -+ 0, -+ 0, -+ 0, -+ 0, -+ 0, -+ 0, -+ 0, -+ 0, /* Advanced Interrupt Controller */ -+ 0, /* Advanced Interrupt Controller */ -+ 0, /* Advanced Interrupt Controller */ -+}; -+ -+void __init at91sam9261_init_interrupts(unsigned int priority[NR_AIC_IRQS]) -+{ -+ if (!priority) -+ priority = at91sam9261_default_irq_priority; -+ -+ /* Initialize the AIC interrupt controller */ -+ at91_aic_init(priority); -+ -+ /* Enable GPIO interrupts */ -+ at91_gpio_irq_setup(); -+} -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices.c linux-2.6.19/arch/arm/mach-at91rm9200/at91sam9261_devices.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/at91sam9261_devices.c Sat Nov 25 11:14:00 2006 -@@ -0,0 +1,767 @@ -+/* -+ * arch/arm/mach-at91rm9200/at91sam9261_devices.c -+ * -+ * Copyright (C) 2005 Thibaut VARENE -+ * Copyright (C) 2005 David Brownell -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ */ -+#include -+#include -+ -+#include -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include "generic.h" -+ -+#define SZ_512 0x00000200 -+#define SZ_256 0x00000100 -+#define SZ_16 0x00000010 -+ -+/* -------------------------------------------------------------------- -+ * USB Host -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) -+static u64 ohci_dmamask = 0xffffffffUL; -+static struct at91_usbh_data usbh_data; -+ -+static struct resource usbh_resources[] = { -+ [0] = { -+ .start = AT91SAM9261_UHP_BASE, -+ .end = AT91SAM9261_UHP_BASE + SZ_1M - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9261_ID_UHP, -+ .end = AT91SAM9261_ID_UHP, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91sam9261_usbh_device = { -+ .name = "at91_ohci", -+ .id = -1, -+ .dev = { -+ .dma_mask = &ohci_dmamask, -+ .coherent_dma_mask = 0xffffffff, -+ .platform_data = &usbh_data, -+ }, -+ .resource = usbh_resources, -+ .num_resources = ARRAY_SIZE(usbh_resources), -+}; -+ -+void __init at91_add_device_usbh(struct at91_usbh_data *data) -+{ -+ if (!data) -+ return; -+ -+ usbh_data = *data; -+ platform_device_register(&at91sam9261_usbh_device); -+} -+#else -+void __init at91_add_device_usbh(struct at91_usbh_data *data) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * USB Device (Gadget) -+ * -------------------------------------------------------------------- */ -+ -+#ifdef CONFIG_USB_GADGET_AT91 -+static struct at91_udc_data udc_data; -+ -+static struct resource udc_resources[] = { -+ [0] = { -+ .start = AT91SAM9261_BASE_UDP, -+ .end = AT91SAM9261_BASE_UDP + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9261_ID_UDP, -+ .end = AT91SAM9261_ID_UDP, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91sam9261_udc_device = { -+ .name = "at91_udc", -+ .id = -1, -+ .dev = { -+ .platform_data = &udc_data, -+ }, -+ .resource = udc_resources, -+ .num_resources = ARRAY_SIZE(udc_resources), -+}; -+ -+void __init at91_add_device_udc(struct at91_udc_data *data) -+{ -+ unsigned long x; -+ -+ if (!data) -+ return; -+ -+ if (data->vbus_pin) { -+ at91_set_gpio_input(data->vbus_pin, 0); -+ at91_set_deglitch(data->vbus_pin, 1); -+ } -+ -+ /* Pullup pin is handled internally */ -+ x = at91_sys_read(AT91_MATRIX_USBPUCR); -+ at91_sys_write(AT91_MATRIX_USBPUCR, x | AT91_MATRIX_USBPUCR_PUON); -+ -+ udc_data = *data; -+ platform_device_register(&at91sam9261_udc_device); -+} -+#else -+void __init at91_add_device_udc(struct at91_udc_data *data) {} -+#endif -+ -+/* -------------------------------------------------------------------- -+ * MMC / SD -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) -+static u64 mmc_dmamask = 0xffffffffUL; -+static struct at91_mmc_data mmc_data; -+ -+static struct resource mmc_resources[] = { -+ [0] = { -+ .start = AT91SAM9261_BASE_MCI, -+ .end = AT91SAM9261_BASE_MCI + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9261_ID_MCI, -+ .end = AT91SAM9261_ID_MCI, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91sam9261_mmc_device = { -+ .name = "at91_mci", -+ .id = -1, -+ .dev = { -+ .dma_mask = &mmc_dmamask, -+ .coherent_dma_mask = 0xffffffff, -+ .platform_data = &mmc_data, -+ }, -+ .resource = mmc_resources, -+ .num_resources = ARRAY_SIZE(mmc_resources), -+}; -+ -+void __init at91_add_device_mmc(struct at91_mmc_data *data) -+{ -+ if (!data) -+ return; -+ -+ /* input/irq */ -+ if (data->det_pin) { -+ at91_set_gpio_input(data->det_pin, 1); -+ at91_set_deglitch(data->det_pin, 1); -+ } -+ if (data->wp_pin) -+ at91_set_gpio_input(data->wp_pin, 1); -+ if (data->vcc_pin) -+ at91_set_gpio_output(data->vcc_pin, 0); -+ -+ /* CLK */ -+ at91_set_B_periph(AT91_PIN_PA2, 0); -+ -+ /* CMD */ -+ at91_set_B_periph(AT91_PIN_PA1, 1); -+ -+ /* DAT0, maybe DAT1..DAT3 */ -+ at91_set_B_periph(AT91_PIN_PA0, 1); -+ if (data->wire4) { -+ at91_set_B_periph(AT91_PIN_PA4, 1); -+ at91_set_B_periph(AT91_PIN_PA5, 1); -+ at91_set_B_periph(AT91_PIN_PA6, 1); -+ } -+ -+ mmc_data = *data; -+ platform_device_register(&at91sam9261_mmc_device); -+} -+#else -+void __init at91_add_device_mmc(struct at91_mmc_data *data) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * NAND / SmartMedia -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE) -+static struct at91_nand_data nand_data; -+ -+#define NAND_BASE AT91_CHIPSELECT_3 -+ -+static struct resource nand_resources[] = { -+ { -+ .start = NAND_BASE, -+ .end = NAND_BASE + SZ_256M - 1, -+ .flags = IORESOURCE_MEM, -+ } -+}; -+ -+static struct platform_device at91_nand_device = { -+ .name = "at91_nand", -+ .id = -1, -+ .dev = { -+ .platform_data = &nand_data, -+ }, -+ .resource = nand_resources, -+ .num_resources = ARRAY_SIZE(nand_resources), -+}; -+ -+void __init at91_add_device_nand(struct at91_nand_data *data) -+{ -+ unsigned long csa, mode; -+ -+ if (!data) -+ return; -+ -+ csa = at91_sys_read(AT91_MATRIX_EBICSA); -+ at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC); -+ -+ /* set the bus interface characteristics */ -+ at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) -+ | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); -+ -+ at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5) -+ | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5)); -+ -+ at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7)); -+ -+ if (data->bus_width_16) -+ mode = AT91_SMC_DBW_16; -+ else -+ mode = AT91_SMC_DBW_8; -+ at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1)); -+ -+ /* enable pin */ -+ if (data->enable_pin) -+ at91_set_gpio_output(data->enable_pin, 1); -+ -+ /* ready/busy pin */ -+ if (data->rdy_pin) -+ at91_set_gpio_input(data->rdy_pin, 1); -+ -+ /* card detect pin */ -+ if (data->det_pin) -+ at91_set_gpio_input(data->det_pin, 1); -+ -+ at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */ -+ at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */ -+ -+ nand_data = *data; -+ platform_device_register(&at91_nand_device); -+} -+ -+#else -+void __init at91_add_device_nand(struct at91_nand_data *data) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * TWI (i2c) -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE) -+ -+static struct resource twi_resources[] = { -+ [0] = { -+ .start = AT91SAM9261_BASE_TWI, -+ .end = AT91SAM9261_BASE_TWI + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9261_ID_TWI, -+ .end = AT91SAM9261_ID_TWI, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91sam9261_twi_device = { -+ .name = "at91_i2c", -+ .id = -1, -+ .resource = twi_resources, -+ .num_resources = ARRAY_SIZE(twi_resources), -+}; -+ -+void __init at91_add_device_i2c(void) -+{ -+ /* pins used for TWI interface */ -+ at91_set_A_periph(AT91_PIN_PA7, 0); /* TWD */ -+ at91_set_multi_drive(AT91_PIN_PA7, 1); -+ -+ at91_set_A_periph(AT91_PIN_PA8, 0); /* TWCK */ -+ at91_set_multi_drive(AT91_PIN_PA8, 1); -+ -+ platform_device_register(&at91sam9261_twi_device); -+} -+#else -+void __init at91_add_device_i2c(void) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * SPI -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) -+static u64 spi_dmamask = 0xffffffffUL; -+ -+static struct resource spi0_resources[] = { -+ [0] = { -+ .start = AT91SAM9261_BASE_SPI0, -+ .end = AT91SAM9261_BASE_SPI0 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9261_ID_SPI0, -+ .end = AT91SAM9261_ID_SPI0, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91sam9261_spi0_device = { -+ .name = "atmel_spi", -+ .id = 0, -+ .dev = { -+ .dma_mask = &spi_dmamask, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = spi0_resources, -+ .num_resources = ARRAY_SIZE(spi0_resources), -+}; -+ -+static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 }; -+ -+static struct resource spi1_resources[] = { -+ [0] = { -+ .start = AT91SAM9261_BASE_SPI1, -+ .end = AT91SAM9261_BASE_SPI1 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9261_ID_SPI1, -+ .end = AT91SAM9261_ID_SPI1, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91sam9261_spi1_device = { -+ .name = "atmel_spi", -+ .id = 1, -+ .dev = { -+ .dma_mask = &spi_dmamask, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = spi1_resources, -+ .num_resources = ARRAY_SIZE(spi1_resources), -+}; -+ -+static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 }; -+ -+void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) -+{ -+ int i; -+ unsigned long cs_pin; -+ short enable_spi0 = 0; -+ short enable_spi1 = 0; -+ -+ /* Choose SPI chip-selects */ -+ for (i = 0; i < nr_devices; i++) { -+ if (devices[i].controller_data) -+ cs_pin = (unsigned long) devices[i].controller_data; -+ else if (devices[i].bus_num == 0) -+ cs_pin = spi0_standard_cs[devices[i].chip_select]; -+ else -+ cs_pin = spi1_standard_cs[devices[i].chip_select]; -+ -+ if (devices[i].bus_num == 0) -+ enable_spi0 = 1; -+ else -+ enable_spi1 = 1; -+ -+ /* enable chip-select pin */ -+ at91_set_gpio_output(cs_pin, 1); -+ -+ /* pass chip-select pin to driver */ -+ devices[i].controller_data = (void *) cs_pin; -+ } -+ -+ spi_register_board_info(devices, nr_devices); -+ -+ /* Configure SPI bus(es) */ -+ if (enable_spi0) { -+ at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ -+ at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ -+ at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ -+ -+ at91_clock_associate("spi0_clk", &at91sam9261_spi0_device.dev, "spi_clk"); -+ platform_device_register(&at91sam9261_spi0_device); -+ } -+ if (enable_spi1) { -+ at91_set_A_periph(AT91_PIN_PB30, 0); /* SPI1_MISO */ -+ at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */ -+ at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */ -+ -+ at91_clock_associate("spi1_clk", &at91sam9261_spi1_device.dev, "spi_clk"); -+ platform_device_register(&at91sam9261_spi1_device); -+ } -+} -+#else -+void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * LCD Controller -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_FB_AT91) || defined(CONFIG_FB_AT91_MODULE) -+static u64 lcdc_dmamask = 0xffffffffUL; -+static struct at91fb_info lcdc_data; -+ -+static struct resource lcdc_resources[] = { -+ [0] = { -+ .start = AT91SAM9261_LCDC_BASE, -+ .end = AT91SAM9261_LCDC_BASE + SZ_4K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9261_ID_LCDC, -+ .end = AT91SAM9261_ID_LCDC, -+ .flags = IORESOURCE_IRQ, -+ }, -+#if defined(CONFIG_FB_INTSRAM) -+ [2] = { -+ .start = AT91SAM9261_SRAM_BASE, -+ .end = AT91SAM9261_SRAM_BASE + AT91SAM9261_SRAM_SIZE - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+#endif -+}; -+ -+static struct platform_device at91_lcdc_device = { -+ .name = "at91-fb", -+ .id = 0, -+ .dev = { -+ .dma_mask = &lcdc_dmamask, -+ .coherent_dma_mask = 0xffffffff, -+ .platform_data = &lcdc_data, -+ }, -+ .resource = lcdc_resources, -+ .num_resources = ARRAY_SIZE(lcdc_resources), -+}; -+ -+void __init at91_add_device_lcdc(struct at91fb_info *data) -+{ -+ if (!data) { -+ return; -+ } -+ -+ at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */ -+ at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */ -+ at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */ -+ at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */ -+ at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */ -+ at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */ -+ at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */ -+ at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */ -+ at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */ -+ at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */ -+ at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */ -+ at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */ -+ at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */ -+ at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */ -+ at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */ -+ at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */ -+ at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */ -+ at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */ -+ at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */ -+ at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */ -+ at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */ -+ at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */ -+ -+ lcdc_data = *data; -+ platform_device_register(&at91_lcdc_device); -+} -+#else -+void __init at91_add_device_lcdc(struct at91fb_info *data) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * LEDs -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_LEDS) -+u8 at91_leds_cpu; -+u8 at91_leds_timer; -+ -+void __init at91_init_leds(u8 cpu_led, u8 timer_led) -+{ -+ at91_leds_cpu = cpu_led; -+ at91_leds_timer = timer_led; -+} -+#else -+void __init at91_init_leds(u8 cpu_led, u8 timer_led) {} -+#endif -+ -+ -+#if defined(CONFIG_NEW_LEDS) -+ -+static struct platform_device at91_leds = { -+ .name = "at91_leds", -+ .id = -1, -+}; -+ -+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) -+{ -+ if (!nr) -+ return; -+ -+ at91_leds.dev.platform_data = leds; -+ -+ for ( ; nr; nr--, leds++) { -+ leds->index = nr; /* first record stores number of leds */ -+ at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0); -+ } -+ -+ platform_device_register(&at91_leds); -+} -+#else -+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * UART -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_SERIAL_ATMEL) -+static struct resource dbgu_resources[] = { -+ [0] = { -+ .start = AT91_VA_BASE_SYS + AT91_DBGU, -+ .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91_ID_SYS, -+ .end = AT91_ID_SYS, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data dbgu_data = { -+ .use_dma_tx = 0, -+ .use_dma_rx = 0, /* DBGU not capable of receive DMA */ -+ .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), -+}; -+ -+static struct platform_device at91sam9261_dbgu_device = { -+ .name = "atmel_usart", -+ .id = 0, -+ .dev = { -+ .platform_data = &dbgu_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = dbgu_resources, -+ .num_resources = ARRAY_SIZE(dbgu_resources), -+}; -+ -+static inline void configure_dbgu_pins(void) -+{ -+ at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */ -+ at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */ -+} -+ -+static struct resource uart0_resources[] = { -+ [0] = { -+ .start = AT91SAM9261_BASE_US0, -+ .end = AT91SAM9261_BASE_US0 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9261_ID_US0, -+ .end = AT91SAM9261_ID_US0, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data uart0_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+ -+static struct platform_device at91sam9261_uart0_device = { -+ .name = "atmel_usart", -+ .id = 1, -+ .dev = { -+ .platform_data = &uart0_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = uart0_resources, -+ .num_resources = ARRAY_SIZE(uart0_resources), -+}; -+ -+static inline void configure_usart0_pins(void) -+{ -+ at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */ -+ at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */ -+ at91_set_A_periph(AT91_PIN_PC10, 0); /* RTS0 */ -+ at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS0 */ -+} -+ -+static struct resource uart1_resources[] = { -+ [0] = { -+ .start = AT91SAM9261_BASE_US1, -+ .end = AT91SAM9261_BASE_US1 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9261_ID_US1, -+ .end = AT91SAM9261_ID_US1, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data uart1_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+ -+static struct platform_device at91sam9261_uart1_device = { -+ .name = "atmel_usart", -+ .id = 2, -+ .dev = { -+ .platform_data = &uart1_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = uart1_resources, -+ .num_resources = ARRAY_SIZE(uart1_resources), -+}; -+ -+static inline void configure_usart1_pins(void) -+{ -+ at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */ -+ at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */ -+} -+ -+static struct resource uart2_resources[] = { -+ [0] = { -+ .start = AT91SAM9261_BASE_US2, -+ .end = AT91SAM9261_BASE_US2 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9261_ID_US2, -+ .end = AT91SAM9261_ID_US2, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data uart2_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+ -+static struct platform_device at91sam9261_uart2_device = { -+ .name = "atmel_usart", -+ .id = 3, -+ .dev = { -+ .platform_data = &uart2_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = uart2_resources, -+ .num_resources = ARRAY_SIZE(uart2_resources), -+}; -+ -+static inline void configure_usart2_pins(void) -+{ -+ at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */ -+ at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */ -+} -+ -+struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ -+struct platform_device *atmel_default_console_device; /* the serial console device */ -+ -+void __init at91_init_serial(struct at91_uart_config *config) -+{ -+ int i; -+ -+ /* Fill in list of supported UARTs */ -+ for (i = 0; i < config->nr_tty; i++) { -+ switch (config->tty_map[i]) { -+ case 0: -+ configure_usart0_pins(); -+ at91_uarts[i] = &at91sam9261_uart0_device; -+ at91_clock_associate("usart0_clk", &at91sam9261_uart0_device.dev, "usart"); -+ break; -+ case 1: -+ configure_usart1_pins(); -+ at91_uarts[i] = &at91sam9261_uart1_device; -+ at91_clock_associate("usart1_clk", &at91sam9261_uart1_device.dev, "usart"); -+ break; -+ case 2: -+ configure_usart2_pins(); -+ at91_uarts[i] = &at91sam9261_uart2_device; -+ at91_clock_associate("usart2_clk", &at91sam9261_uart2_device.dev, "usart"); -+ break; -+ case 3: -+ configure_dbgu_pins(); -+ at91_uarts[i] = &at91sam9261_dbgu_device; -+ at91_clock_associate("mck", &at91sam9261_dbgu_device.dev, "usart"); -+ break; -+ default: -+ continue; -+ } -+ at91_uarts[i]->id = i; /* update ID number to mapped ID */ -+ } -+ -+ /* Set serial console device */ -+ if (config->console_tty < ATMEL_MAX_UART) -+ atmel_default_console_device = at91_uarts[config->console_tty]; -+ if (!atmel_default_console_device) -+ printk(KERN_INFO "AT91: No default serial console defined.\n"); -+} -+ -+void __init at91_add_device_serial(void) -+{ -+ int i; -+ -+ for (i = 0; i < ATMEL_MAX_UART; i++) { -+ if (at91_uarts[i]) -+ platform_device_register(at91_uarts[i]); -+ } -+} -+#else -+void __init at91_init_serial(struct at91_uart_config *config) {} -+void __init at91_add_device_serial(void) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- */ -+ -+/* -+ * These devices are always present and don't need any board-specific -+ * setup. -+ */ -+static int __init at91_add_standard_devices(void) -+{ -+ return 0; -+} -+ -+arch_initcall(at91_add_standard_devices); -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam926x_time.c linux-2.6.19/arch/arm/mach-at91rm9200/at91sam926x_time.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam926x_time.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/at91sam926x_time.c Mon Nov 20 10:52:16 2006 -@@ -0,0 +1,114 @@ -+/* -+ * linux/arch/arm/mach-at91rm9200/at91sam926x_time.c -+ * -+ * Copyright (C) 2005-2006 M. Amine SAYA, ATMEL Rousset, France -+ * Revision 2005 M. Nicolas Diremdjian, ATMEL Rousset, France -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+#include -+ -+ -+#define PIT_CPIV(x) ((x) & AT91_PIT_CPIV) -+#define PIT_PICNT(x) (((x) & AT91_PIT_PICNT) >> 20) -+ -+/* -+ * Returns number of microseconds since last timer interrupt. Note that interrupts -+ * will have been disabled by do_gettimeofday() -+ * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy. -+ * 'tick' is usecs per jiffy (linux/timex.h). -+ */ -+static unsigned long at91sam926x_gettimeoffset(void) -+{ -+ unsigned long elapsed; -+ unsigned long t = at91_sys_read(AT91_PIT_PIIR); -+ -+ elapsed = (PIT_PICNT(t) * LATCH) + PIT_CPIV(t); /* hardware clock cycles */ -+ -+ return (unsigned long)(elapsed * 1000000) / LATCH; -+} -+ -+/* -+ * IRQ handler for the timer. -+ */ -+static irqreturn_t at91sam926x_timer_interrupt(int irq, void *dev_id) -+{ -+ volatile long nr_ticks; -+ -+ if (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS) { /* This is a shared interrupt */ -+ write_seqlock(&xtime_lock); -+ -+ /* Get number to ticks performed before interrupt and clear PIT interrupt */ -+ nr_ticks = PIT_PICNT(at91_sys_read(AT91_PIT_PIVR)); -+ do { -+ timer_tick(); -+ nr_ticks--; -+ } while (nr_ticks); -+ -+ write_sequnlock(&xtime_lock); -+ return IRQ_HANDLED; -+ } else -+ return IRQ_NONE; /* not handled */ -+} -+ -+static struct irqaction at91sam926x_timer_irq = { -+ .name = "at91_tick", -+ .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER, -+ .handler = at91sam926x_timer_interrupt -+}; -+ -+void at91sam926x_timer_reset(void) -+{ -+ /* Disable timer */ -+ at91_sys_write(AT91_PIT_MR, 0); -+ -+ /* Clear any pending interrupts */ -+ (void) at91_sys_read(AT91_PIT_PIVR); -+ -+ /* Set Period Interval timer and enable its interrupt */ -+ at91_sys_write(AT91_PIT_MR, (LATCH & AT91_PIT_PIV) | AT91_PIT_PITIEN | AT91_PIT_PITEN); -+} -+ -+/* -+ * Set up timer interrupt. -+ */ -+void __init at91sam926x_timer_init(void) -+{ -+ /* Initialize and enable the timer */ -+ at91sam926x_timer_reset(); -+ -+ /* Make IRQs happen for the system timer. */ -+ setup_irq(AT91_ID_SYS, &at91sam926x_timer_irq); -+} -+ -+#ifdef CONFIG_PM -+static void at91sam926x_timer_suspend(void) -+{ -+ /* Disable timer */ -+ at91_sys_write(AT91_PIT_MR, 0); -+} -+#else -+#define at91sam926x_timer_suspend NULL -+#endif -+ -+struct sys_timer at91sam926x_timer = { -+ .init = at91sam926x_timer_init, -+ .offset = at91sam926x_gettimeoffset, -+ .suspend = at91sam926x_timer_suspend, -+ .resume = at91sam926x_timer_reset, -+}; -+ -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-1arm.c linux-2.6.19/arch/arm/mach-at91rm9200/board-1arm.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/board-1arm.c Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/board-1arm.c Thu Nov 23 15:50:12 2006 -@@ -64,7 +64,7 @@ - at91rm9200_init_interrupts(NULL); - } - --static struct at91_eth_data __initdata onearm_eth_data = { -+static struct eth_platform_data __initdata onearm_eth_data = { - .phy_irq_pin = AT91_PIN_PC4, - .is_rmii = 1, - }; -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-carmeva.c linux-2.6.19/arch/arm/mach-at91rm9200/board-carmeva.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/board-carmeva.c Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/board-carmeva.c Thu Nov 23 15:50:12 2006 -@@ -65,8 +65,7 @@ - at91rm9200_init_interrupts(NULL); - } - -- --static struct at91_eth_data __initdata carmeva_eth_data = { -+static struct eth_platform_data __initdata carmeva_eth_data = { - .phy_irq_pin = AT91_PIN_PC4, - .is_rmii = 1, - }; -@@ -89,8 +88,33 @@ - // }; - - static struct at91_mmc_data __initdata carmeva_mmc_data = { -- .is_b = 0, -+ .slot_b = 0, - .wire4 = 1, -+ .det_pin = AT91_PIN_PB10, -+ .wp_pin = AT91_PIN_PC14, -+}; -+ -+static struct spi_board_info carmeva_spi_devices[] = { -+ { /* DataFlash chip */ -+ .modalias = "mtd_dataflash", -+ .chip_select = 0, -+ .max_speed_hz = 10 * 1000 * 1000, -+ }, -+ { /* User accessable spi - cs1 (250KHz) */ -+ .modalias = "spi-cs1", -+ .chip_select = 1, -+ .max_speed_hz = 250 * 1000, -+ }, -+ { /* User accessable spi - cs2 (1MHz) */ -+ .modalias = "spi-cs2", -+ .chip_select = 2, -+ .max_speed_hz = 1 * 1000 * 1000, -+ }, -+ { /* User accessable spi - cs3 (10MHz) */ -+ .modalias = "spi-cs3", -+ .chip_select = 3, -+ .max_speed_hz = 10 * 1000 * 1000, -+ }, - }; - - static void __init carmeva_board_init(void) -@@ -105,10 +129,10 @@ - at91_add_device_udc(&carmeva_udc_data); - /* I2C */ - at91_add_device_i2c(); -+ /* SPI */ -+ at91_add_device_spi(carmeva_spi_devices, ARRAY_SIZE(carmeva_spi_devices)); - /* Compact Flash */ - // at91_add_device_cf(&carmeva_cf_data); -- /* SPI */ --// at91_add_device_spi(NULL, 0); - /* MMC */ - at91_add_device_mmc(&carmeva_mmc_data); - } -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-csb337.c linux-2.6.19/arch/arm/mach-at91rm9200/board-csb337.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/board-csb337.c Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/board-csb337.c Thu Nov 23 15:50:12 2006 -@@ -68,7 +68,7 @@ - at91rm9200_init_interrupts(NULL); - } - --static struct at91_eth_data __initdata csb337_eth_data = { -+static struct eth_platform_data __initdata csb337_eth_data = { - .phy_irq_pin = AT91_PIN_PC2, - .is_rmii = 0, - }; -@@ -99,7 +99,7 @@ - - static struct at91_mmc_data __initdata csb337_mmc_data = { - .det_pin = AT91_PIN_PD5, -- .is_b = 0, -+ .slot_b = 0, - .wire4 = 1, - .wp_pin = AT91_PIN_PD6, - }; -@@ -112,6 +112,23 @@ - }, - }; - -+static struct at91_gpio_led csb337_leds[] = { -+ { -+ .name = "led0", -+ .gpio = AT91_PIN_PB0, -+ .trigger = "heartbeat", -+ }, -+ { -+ .name = "led1", -+ .gpio = AT91_PIN_PB1, -+ .trigger = "timer", -+ }, -+ { -+ .name = "led2", -+ .gpio = AT91_PIN_PB2, -+ } -+}; -+ - static void __init csb337_board_init(void) - { - /* Serial */ -@@ -131,6 +148,8 @@ - at91_add_device_spi(csb337_spi_devices, ARRAY_SIZE(csb337_spi_devices)); - /* MMC */ - at91_add_device_mmc(&csb337_mmc_data); -+ /* LEDS */ -+ at91_gpio_leds(csb337_leds, ARRAY_SIZE(csb337_leds)); - } - - MACHINE_START(CSB337, "Cogent CSB337") -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-csb637.c linux-2.6.19/arch/arm/mach-at91rm9200/board-csb637.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/board-csb637.c Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/board-csb637.c Thu Nov 23 15:50:12 2006 -@@ -67,7 +67,7 @@ - at91rm9200_init_interrupts(NULL); - } - --static struct at91_eth_data __initdata csb637_eth_data = { -+static struct eth_platform_data __initdata csb637_eth_data = { - .phy_irq_pin = AT91_PIN_PC0, - .is_rmii = 0, - }; -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-dk.c linux-2.6.19/arch/arm/mach-at91rm9200/board-dk.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/board-dk.c Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/board-dk.c Thu Nov 23 15:50:12 2006 -@@ -27,6 +27,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -39,6 +40,7 @@ - - #include - #include -+#include - - #include "generic.h" - -@@ -71,7 +73,186 @@ - at91rm9200_init_interrupts(NULL); - } - --static struct at91_eth_data __initdata dk_eth_data = { -+#if defined(CONFIG_FB_S1D13XXX) || defined(CONFIG_FB_S1D13XXX_MODULE) -+#include