uboot-rockchip: add pine rock64

also remove swig exclude as now swig is available in core
arm-trusted-firmware-rockchip is always needed

Signed-off-by: Lucian Cristian <lucian.cristian@gmail.com>

diff --git a/package/boot/uboot-rockchip/Makefile b/package/boot/uboot-rockchip/Makefile
index b886ef01220a297332b9ba34089b4687a8ca2cc4..bb0eafc6969cefaf689629312dc65f2ea34479bd 100644 (file)
--- a/package/boot/uboot-rockchip/Makefile
+++ b/package/boot/uboot-rockchip/Makefile
@@ -15,6 +15,8 @@ PKG_MAINTAINER:=Tobias Maedel <openwrt@tbspace.de>
 include $(INCLUDE_DIR)/u-boot.mk
 include $(INCLUDE_DIR)/package.mk
 
+PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip
+
 define U-Boot/Default
   BUILD_TARGET:=rockchip
   UENV:=default
@@ -29,12 +31,18 @@ define U-Boot/nanopi-r2s-rk3328
   NAME:=NanoPi R2S
   BUILD_DEVICES:= \
     friendlyarm_nanopi-r2s
-  DEPENDS:=+PACKAGE_u-boot-nanopi-r2s-rk3328:arm-trusted-firmware-rockchip
-  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip
   ATF:=rk3328_bl31.elf
   OF_PLATDATA:=$(1)
 endef
 
+define U-Boot/rock64-rk3328
+  BUILD_SUBTARGET:=armv8
+  NAME:=Rock64
+  BUILD_DEVICES:= \
+    pine64_rock64
+  ATF:=rk3328_bl31.elf
+  OF_PLATDATA:=$(1)
+endef
 
 # RK3399 boards
 
@@ -43,8 +51,6 @@ define U-Boot/nanopi-r4s-rk3399
   NAME:=NanoPi R4S
   BUILD_DEVICES:= \
     friendlyarm_nanopi-r4s
-  DEPENDS:=+PACKAGE_u-boot-nanopi-r4s-rk3399:arm-trusted-firmware-rockchip
-  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip
   ATF:=rk3399_bl31.elf
 endef
 
@@ -63,14 +69,13 @@ define U-Boot/rockpro64-rk3399
   NAME:=RockPro64
   BUILD_DEVICES:= \
     pine64_rockpro64
-  DEPENDS:=+PACKAGE_u-boot-rockpro64-rk3399:arm-trusted-firmware-rockchip
-  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip
   ATF:=rk3399_bl31.elf
 endef
 
 UBOOT_TARGETS := \
   nanopi-r4s-rk3399 \
   rock-pi-4-rk3399 \
+  rock64-rk3328 \
   rockpro64-rk3399 \
   nanopi-r2s-rk3328
 
@@ -93,6 +98,7 @@ endif
 
        $(SED) 's#CONFIG_MKIMAGE_DTC_PATH=.*#CONFIG_MKIMAGE_DTC_PATH="$(PKG_BUILD_DIR)/scripts/dtc/dtc"#g' $(PKG_BUILD_DIR)/.config
        echo 'CONFIG_IDENT_STRING=" OpenWrt"' >> $(PKG_BUILD_DIR)/.config
+       echo 'CONFIG_CMD_SETEXPR=y' >> $(PKG_BUILD_DIR)/.config
 endef
 
 define Build/InstallDev

diff --git a/package/boot/uboot-rockchip/patches/001-scripts-remove-dependency-on-swig.patch b/package/boot/uboot-rockchip/patches/001-scripts-remove-dependency-on-swig.patch
deleted file mode 100644 (file)
index 0505589..0000000
--- a/package/boot/uboot-rockchip/patches/001-scripts-remove-dependency-on-swig.patch
+++ /dev/null
@@ -1,24 +0,0 @@
-From b137ca16b54c67d76714ea5a0138741959b0dc29 Mon Sep 17 00:00:00 2001
-From: David Bauer <mail@david-bauer.net>
-Date: Mon, 13 Jul 2020 23:37:37 +0200
-Subject: [PATCH] scripts: remove dependency on swig
-
-Don't build the libfdt tool, as it has a dependency on swig (which
-OpenWrt does not ship).
-
-This requires more hacks, as of-platdata generation does not work
-without it.
-
-Signed-off-by: David Bauer <mail@david-bauer.net>
----
- scripts/dtc/Makefile | 2 --
- 1 file changed, 2 deletions(-)
-
---- a/scripts/dtc/Makefile
-+++ b/scripts/dtc/Makefile
-@@ -18,5 +18,3 @@ HOSTCFLAGS_dtc-parser.tab.o := -I$(src)
- # dependencies on generated files need to be listed explicitly
- $(obj)/dtc-lexer.lex.o: $(obj)/dtc-parser.tab.h
- 
--# Added for U-Boot
--subdir-$(CONFIG_PYLIBFDT) += pylibfdt

diff --git a/package/boot/uboot-rockchip/src/of-platdata/rock64-rk3328/dt-decl.h b/package/boot/uboot-rockchip/src/of-platdata/rock64-rk3328/dt-decl.h
new file mode 100644 (file)
index 0000000..a13aaea
--- /dev/null
+++ b/package/boot/uboot-rockchip/src/of-platdata/rock64-rk3328/dt-decl.h
@@ -0,0 +1,27 @@
+/*
+ * DO NOT MODIFY
+ *
+ * Declares externs for all device/uclass instances.
+ * This was generated by dtoc from a .dtb (device tree binary) file.
+ */
+
+#include <dm/device-internal.h>
+#include <dm/uclass-internal.h>
+
+/* driver declarations - these allow DM_DRIVER_GET() to be used */
+extern U_BOOT_DRIVER(rockchip_rk3328_cru);
+extern U_BOOT_DRIVER(rockchip_rk3328_dmc);
+extern U_BOOT_DRIVER(rockchip_rk3288_dw_mshc);
+extern U_BOOT_DRIVER(rockchip_rk3288_dw_mshc);
+extern U_BOOT_DRIVER(ns16550_serial);
+extern U_BOOT_DRIVER(rockchip_rk3328_spi);
+extern U_BOOT_DRIVER(jedec_spi_nor);
+extern U_BOOT_DRIVER(rockchip_rk3328_grf);
+
+/* uclass driver declarations - needed for DM_UCLASS_DRIVER_REF() */
+extern UCLASS_DRIVER(clk);
+extern UCLASS_DRIVER(mmc);
+extern UCLASS_DRIVER(ram);
+extern UCLASS_DRIVER(serial);
+extern UCLASS_DRIVER(spi_flash);
+extern UCLASS_DRIVER(syscon);

diff --git a/package/boot/uboot-rockchip/src/of-platdata/rock64-rk3328/dt-plat.c b/package/boot/uboot-rockchip/src/of-platdata/rock64-rk3328/dt-plat.c
new file mode 100644 (file)
index 0000000..70a8c00
--- /dev/null
+++ b/package/boot/uboot-rockchip/src/of-platdata/rock64-rk3328/dt-plat.c
@@ -0,0 +1,219 @@
+/*
+ * DO NOT MODIFY
+ *
+ * Declares the U_BOOT_DRIVER() records and platform data.
+ * This was generated by dtoc from a .dtb (device tree binary) file.
+ */
+
+/* Allow use of U_BOOT_DRVINFO() in this file */
+#define DT_PLAT_C
+
+#include <common.h>
+#include <dm.h>
+#include <dt-structs.h>
+
+/*
+ * driver_info declarations, ordered by 'struct driver_info' linker_list idx:
+ *
+ * idx  driver_info          driver
+ * ---  -------------------- --------------------
+ *   0: clock_controller_at_ff440000 rockchip_rk3328_cru
+ *   1: dmc                  rockchip_rk3328_dmc
+ *   2: mmc_at_ff500000      rockchip_rk3288_dw_mshc
+ *   3: mmc_at_ff520000      rockchip_rk3288_dw_mshc
+ *   4: serial_at_ff130000   ns16550_serial
+ *   5: spi_at_ff190000      rockchip_rk3328_spi
+ *   6: spiflash_at_0        jedec_spi_nor
+ *   7: syscon_at_ff100000   rockchip_rk3328_grf
+ * ---  -------------------- --------------------
+ */
+
+/*
+ * Node /clock-controller@ff440000 index 0
+ * driver rockchip_rk3328_cru parent None
+ */
+static struct dtd_rockchip_rk3328_cru dtv_clock_controller_at_ff440000 = {
+       .reg                    = {0xff440000, 0x1000},
+       .rockchip_grf           = 0x3b,
+};
+U_BOOT_DRVINFO(clock_controller_at_ff440000) = {
+       .name           = "rockchip_rk3328_cru",
+       .plat           = &dtv_clock_controller_at_ff440000,
+       .plat_size      = sizeof(dtv_clock_controller_at_ff440000),
+       .parent_idx     = -1,
+};
+
+/*
+ * Node /dmc index 1
+ * driver rockchip_rk3328_dmc parent None
+ */
+static struct dtd_rockchip_rk3328_dmc dtv_dmc = {
+       .reg                    = {0xff400000, 0x1000, 0xff780000, 0x3000, 0xff100000, 0x1000, 0xff440000, 0x1000,
+               0xff720000, 0x1000, 0xff798000, 0x1000},
+       .rockchip_sdram_params  = {0x1, 0xc, 0x3, 0x1, 0x0, 0x0, 0x10, 0x10,
+               0x10, 0x10, 0x0, 0x98899459, 0x0, 0x2e, 0x544, 0x15,
+               0x432, 0xff, 0x320, 0x6, 0x1, 0x0, 0x1, 0x0,
+               0x43041008, 0x64, 0x300054, 0xd0, 0x500002, 0xd4, 0x10000, 0xd8,
+               0xe03, 0xdc, 0x43001a, 0xe0, 0x10000, 0xe4, 0xe0005, 0xf4,
+               0xf011f, 0x100, 0xb141b11, 0x104, 0x3031a, 0x108, 0x3060809, 0x10c,
+               0x606000, 0x110, 0x8020409, 0x114, 0x1010606, 0x118, 0x2020004, 0x120,
+               0x404, 0x138, 0x58, 0x180, 0x900024, 0x184, 0x1400000, 0x190,
+               0x7050002, 0x198, 0x5001100, 0x1a0, 0xc0400003, 0x240, 0xa020b28, 0x244,
+               0x101, 0x250, 0xf00, 0x490, 0x1, 0xffffffff, 0xffffffff, 0xffffffff,
+               0xffffffff, 0xffffffff, 0xffffffff, 0x4, 0xb, 0x28, 0xc, 0x2c,
+               0x0, 0x30, 0x6, 0xffffffff, 0xffffffff, 0x77, 0x88, 0x79,
+               0x79, 0x87, 0x97, 0x87, 0x78, 0x77, 0x78, 0x87,
+               0x88, 0x87, 0x87, 0x77, 0x78, 0x78, 0x78, 0x78,
+               0x78, 0x78, 0x78, 0x78, 0x78, 0x69, 0x9, 0x77,
+               0x78, 0x77, 0x78, 0x77, 0x78, 0x77, 0x78, 0x77,
+               0x79, 0x9, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78,
+               0x78, 0x78, 0x78, 0x69, 0x9, 0x77, 0x78, 0x77,
+               0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x79, 0x9,
+               0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78,
+               0x78, 0x69, 0x9, 0x77, 0x78, 0x77, 0x78, 0x77,
+               0x78, 0x77, 0x78, 0x77, 0x79, 0x9, 0x78, 0x78,
+               0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x69,
+               0x9, 0x77, 0x78, 0x77, 0x77, 0x77, 0x77, 0x77,
+               0x77, 0x77, 0x79, 0x9},
+};
+U_BOOT_DRVINFO(dmc) = {
+       .name           = "rockchip_rk3328_dmc",
+       .plat           = &dtv_dmc,
+       .plat_size      = sizeof(dtv_dmc),
+       .parent_idx     = -1,
+};
+
+/*
+ * Node /mmc@ff500000 index 2
+ * driver rockchip_rk3288_dw_mshc parent None
+ */
+static struct dtd_rockchip_rk3288_dw_mshc dtv_mmc_at_ff500000 = {
+       .bus_width              = 0x4,
+       .cap_mmc_highspeed      = true,
+       .cap_sd_highspeed       = true,
+       .clocks                 = {
+                       {0, {317}},
+                       {0, {33}},
+                       {0, {74}},
+                       {0, {78}},},
+       .disable_wp             = true,
+       .fifo_depth             = 0x100,
+       .interrupts             = {0x0, 0xc, 0x4},
+       .max_frequency          = 0x8f0d180,
+       .pinctrl_0              = {0x4a, 0x4b, 0x4c, 0x4d},
+       .pinctrl_names          = "default",
+       .reg                    = {0xff500000, 0x4000},
+       .u_boot_spl_fifo_mode   = true,
+       .vmmc_supply            = 0x4e,
+};
+U_BOOT_DRVINFO(mmc_at_ff500000) = {
+       .name           = "rockchip_rk3288_dw_mshc",
+       .plat           = &dtv_mmc_at_ff500000,
+       .plat_size      = sizeof(dtv_mmc_at_ff500000),
+       .parent_idx     = -1,
+};
+
+/*
+ * Node /mmc@ff520000 index 3
+ * driver rockchip_rk3288_dw_mshc parent None
+ */
+static struct dtd_rockchip_rk3288_dw_mshc dtv_mmc_at_ff520000 = {
+       .bus_width              = 0x8,
+       .cap_mmc_highspeed      = true,
+       .clocks                 = {
+                       {0, {319}},
+                       {0, {35}},
+                       {0, {76}},
+                       {0, {80}},},
+       .fifo_depth             = 0x100,
+       .interrupts             = {0x0, 0xe, 0x4},
+       .max_frequency          = 0x8f0d180,
+       .mmc_hs200_1_8v         = true,
+       .non_removable          = true,
+       .pinctrl_0              = {0x4f, 0x50, 0x51, 0x0},
+       .pinctrl_names          = "default",
+       .reg                    = {0xff520000, 0x4000},
+       .u_boot_spl_fifo_mode   = true,
+       .vmmc_supply            = 0x1e,
+       .vqmmc_supply           = 0x1f,
+};
+U_BOOT_DRVINFO(mmc_at_ff520000) = {
+       .name           = "rockchip_rk3288_dw_mshc",
+       .plat           = &dtv_mmc_at_ff520000,
+       .plat_size      = sizeof(dtv_mmc_at_ff520000),
+       .parent_idx     = -1,
+};
+
+/*
+ * Node /serial@ff130000 index 4
+ * driver ns16550_serial parent None
+ */
+static struct dtd_ns16550_serial dtv_serial_at_ff130000 = {
+       .clock_frequency        = 0x16e3600,
+       .clocks                 = {
+                       {0, {40}},
+                       {0, {212}},},
+       .dma_names              = {"tx", "rx"},
+       .dmas                   = {0x10, 0x6, 0x10, 0x7},
+       .interrupts             = {0x0, 0x39, 0x4},
+       .pinctrl_0              = 0x27,
+       .pinctrl_names          = "default",
+       .reg                    = {0xff130000, 0x100},
+       .reg_io_width           = 0x4,
+       .reg_shift              = 0x2,
+};
+U_BOOT_DRVINFO(serial_at_ff130000) = {
+       .name           = "ns16550_serial",
+       .plat           = &dtv_serial_at_ff130000,
+       .plat_size      = sizeof(dtv_serial_at_ff130000),
+       .parent_idx     = -1,
+};
+
+/* Node /spi@ff190000 index 5 */
+static struct dtd_rockchip_rk3328_spi dtv_spi_at_ff190000 = {
+       .clocks                 = {
+                       {0, {32}},
+                       {0, {209}},},
+       .dma_names              = {"tx", "rx"},
+       .dmas                   = {0x10, 0x8, 0x10, 0x9},
+       .interrupts             = {0x0, 0x31, 0x4},
+       .pinctrl_0              = {0x2f, 0x30, 0x31, 0x32},
+       .pinctrl_names          = "default",
+       .reg                    = {0xff190000, 0x1000},
+};
+U_BOOT_DRVINFO(spi_at_ff190000) = {
+       .name           = "rockchip_rk3328_spi",
+       .plat           = &dtv_spi_at_ff190000,
+       .plat_size      = sizeof(dtv_spi_at_ff190000),
+       .parent_idx     = -1,
+};
+
+/*
+ * Node /spi@ff190000/spiflash@0 index 6
+ * driver jedec_spi_nor parent None
+ */
+static struct dtd_jedec_spi_nor dtv_spiflash_at_0 = {
+       .reg                    = {0x0},
+       .spi_max_frequency      = 0x2faf080,
+};
+U_BOOT_DRVINFO(spiflash_at_0) = {
+       .name           = "jedec_spi_nor",
+       .plat           = &dtv_spiflash_at_0,
+       .plat_size      = sizeof(dtv_spiflash_at_0),
+       .parent_idx     = 5,
+};
+
+/*
+ * Node /syscon@ff100000 index 7
+ * driver rockchip_rk3328_grf parent None
+ */
+static struct dtd_rockchip_rk3328_grf dtv_syscon_at_ff100000 = {
+       .reg                    = {0xff100000, 0x1000},
+};
+U_BOOT_DRVINFO(syscon_at_ff100000) = {
+       .name           = "rockchip_rk3328_grf",
+       .plat           = &dtv_syscon_at_ff100000,
+       .plat_size      = sizeof(dtv_syscon_at_ff100000),
+       .parent_idx     = -1,
+};
+

diff --git a/package/boot/uboot-rockchip/src/of-platdata/rock64-rk3328/dt-structs-gen.h b/package/boot/uboot-rockchip/src/of-platdata/rock64-rk3328/dt-structs-gen.h
new file mode 100644 (file)
index 0000000..e15d848
--- /dev/null
+++ b/package/boot/uboot-rockchip/src/of-platdata/rock64-rk3328/dt-structs-gen.h
@@ -0,0 +1,63 @@
+/*
+ * DO NOT MODIFY
+ *
+ * Defines the structs used to hold devicetree data.
+ * This was generated by dtoc from a .dtb (device tree binary) file.
+ */
+
+#include <stdbool.h>
+#include <linux/libfdt.h>
+struct dtd_jedec_spi_nor {
+       fdt32_t         reg[1];
+       fdt32_t         spi_max_frequency;
+};
+struct dtd_ns16550_serial {
+       fdt32_t         clock_frequency;
+       struct phandle_1_arg clocks[2];
+       const char *    dma_names[2];
+       fdt32_t         dmas[4];
+       fdt32_t         interrupts[3];
+       fdt32_t         pinctrl_0;
+       const char *    pinctrl_names;
+       fdt64_t         reg[2];
+       fdt32_t         reg_io_width;
+       fdt32_t         reg_shift;
+};
+struct dtd_rockchip_rk3288_dw_mshc {
+       fdt32_t         bus_width;
+       bool            cap_mmc_highspeed;
+       bool            cap_sd_highspeed;
+       struct phandle_1_arg clocks[4];
+       bool            disable_wp;
+       fdt32_t         fifo_depth;
+       fdt32_t         interrupts[3];
+       fdt32_t         max_frequency;
+       bool            mmc_hs200_1_8v;
+       bool            non_removable;
+       fdt32_t         pinctrl_0[4];
+       const char *    pinctrl_names;
+       fdt64_t         reg[2];
+       bool            u_boot_spl_fifo_mode;
+       fdt32_t         vmmc_supply;
+       fdt32_t         vqmmc_supply;
+};
+struct dtd_rockchip_rk3328_cru {
+       fdt64_t         reg[2];
+       fdt32_t         rockchip_grf;
+};
+struct dtd_rockchip_rk3328_dmc {
+       fdt64_t         reg[12];
+       fdt32_t         rockchip_sdram_params[196];
+};
+struct dtd_rockchip_rk3328_grf {
+       fdt64_t         reg[2];
+};
+struct dtd_rockchip_rk3328_spi {
+       struct phandle_1_arg clocks[2];
+       const char *    dma_names[2];
+       fdt32_t         dmas[4];
+       fdt32_t         interrupts[3];
+       fdt32_t         pinctrl_0[4];
+       const char *    pinctrl_names;
+       fdt64_t         reg[2];
+};

diff --git a/target/linux/rockchip/image/Makefile b/target/linux/rockchip/image/Makefile
index e4db1e5d58c62bbacb2382c95d9999f0e4fddb04..4f2705561c5622b50235134cb5722c54ae06ede4 100644 (file)
--- a/target/linux/rockchip/image/Makefile
+++ b/target/linux/rockchip/image/Makefile
@@ -22,10 +22,10 @@ endef
 
 define Build/boot-script
        # Make an U-boot image and copy it to the boot partition
-       mkimage -A arm -O linux -T script -C none -a 0 -e 0 -d $(if $(1),$(1),mmc).bootscript $@.boot/boot.scr
+       mkimage -A arm -O linux -T script -C lzma -a 0 -e 0 -d $(if $(1),$(1),mmc).bootscript $@.boot/boot.scr
 endef
 
-define Build/pine64-img
+define Build/sdcard-img
        # Creates the final SD/eMMC images, 
        # combining boot partition, root partition as well as the u-boot bootloader
 
@@ -48,7 +48,7 @@ endef
 ### Devices ###
 define Device/Default
   PROFILES := Default
-  KERNEL := kernel-bin
+  KERNEL := kernel-bin | lzma
   IMAGES := sysupgrade.img.gz
   DEVICE_DTS = rockchip/$$(SOC)-$(lastword $(subst _, ,$(1)))
 endef

diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk
index 6cc31f1d8c4cbe7a656c31dc4e938cc0d238f67d..c1b3e0577e44d0e9ed9bea34911e2b5dd143db3d 100644 (file)
--- a/target/linux/rockchip/image/armv8.mk
+++ b/target/linux/rockchip/image/armv8.mk
@@ -7,7 +7,7 @@ define Device/friendlyarm_nanopi-r2s
   DEVICE_MODEL := NanoPi R2S
   SOC := rk3328
   UBOOT_DEVICE_NAME := nanopi-r2s-rk3328
-  IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r2s | pine64-img | gzip | append-metadata
+  IMAGE/sysupgrade.img.gz := boot-common | boot-script | sdcard-img | gzip | append-metadata
   DEVICE_PACKAGES := kmod-usb-net-rtl8152
 endef
 TARGET_DEVICES += friendlyarm_nanopi-r2s
@@ -18,7 +18,7 @@ define Device/friendlyarm_nanopi-r4s
   DEVICE_VARIANT := 4GB LPDDR4
   SOC := rk3399
   UBOOT_DEVICE_NAME := nanopi-r4s-rk3399
-  IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r4s | pine64-img | gzip | append-metadata
+  IMAGE/sysupgrade.img.gz := boot-common | boot-script | sdcard-img | gzip | append-metadata
   DEVICE_PACKAGES := kmod-r8169
 endef
 TARGET_DEVICES += friendlyarm_nanopi-r4s
@@ -28,16 +28,26 @@ define Device/pine64_rockpro64
   DEVICE_MODEL := RockPro64
   SOC := rk3399
   UBOOT_DEVICE_NAME := rockpro64-rk3399
-  IMAGE/sysupgrade.img.gz := boot-common | boot-script | pine64-img | gzip | append-metadata
+  IMAGE/sysupgrade.img.gz := boot-common | boot-script | sdcard-img | gzip | append-metadata
 endef
 TARGET_DEVICES += pine64_rockpro64
 
+define Device/pine64_rock64
+  DEVICE_VENDOR := Pine64
+  DEVICE_MODEL := Rock64
+  SOC := rk3328
+  UBOOT_DEVICE_NAME := rock64-rk3328
+  IMAGE/sysupgrade.img.gz := boot-common | boot-script | sdcard-img | gzip | append-metadata
+  DEVICE_PACKAGES := kmod-usb-dwc2
+endef
+TARGET_DEVICES += pine64_rock64
+
 define Device/radxa_rock-pi-4a
   DEVICE_VENDOR := Radxa
   DEVICE_MODEL := ROCK Pi 4A
   SOC := rk3399
   SUPPORTED_DEVICES := radxa,rockpi4a radxa,rockpi4
   UBOOT_DEVICE_NAME := rock-pi-4-rk3399
-  IMAGE/sysupgrade.img.gz := boot-common | boot-script | pine64-img | gzip | append-metadata
+  IMAGE/sysupgrade.img.gz := boot-common | boot-script | sdcard-img | gzip | append-metadata
 endef
 TARGET_DEVICES += radxa_rock-pi-4a

diff --git a/target/linux/rockchip/image/mmc.bootscript b/target/linux/rockchip/image/mmc.bootscript
index b70a62c4c7426f2e9afc6a6f6a3edd7c211af63d..13a55d3ac9bfefcbb39bffe11d59b8fa043ba510 100644 (file)
--- a/target/linux/rockchip/image/mmc.bootscript
+++ b/target/linux/rockchip/image/mmc.bootscript
@@ -1,8 +1,18 @@
 part uuid mmc ${devnum}:2 uuid
 
-setenv bootargs "console=ttyS2,1500000 console=tty1 earlycon=uart8250,mmio32,0xff1a0000 root=PARTUUID=${uuid} rw rootwait"
+if test $stdout = 'serial@ff1a0000' ;
+then serial_addr=',0xff1a0000';
+elif test $stdout = 'serial@ff130000' ;
+then serial_addr=',0xff130000';
+fi;
+
+setenv bootargs "console=ttyS2,1500000 console=tty1 earlycon=uart8250,mmio32${serial_addr} swiotlb=1 root=PARTUUID=${uuid} rw rootwait loglevel=9";
 
 load mmc ${devnum}:1 ${fdt_addr_r} rockchip.dtb
 load mmc ${devnum}:1 ${kernel_addr_r} kernel.img
 
-booti ${kernel_addr_r} - ${fdt_addr_r}
+echo "Uncompress lzma kernel into memmory.."
+setexpr kernel_addr_dec ${filesize} + ${kernel_addr_r} || kernel_addr_dec=0x03000000
+lzmadec ${kernel_addr_r} ${kernel_addr_dec}
+
+booti ${kernel_addr_dec} - ${fdt_addr_r}

diff --git a/target/linux/rockchip/image/nanopi-r2s.bootscript b/target/linux/rockchip/image/nanopi-r2s.bootscript
deleted file mode 100644 (file)
index 5198881..0000000
--- a/target/linux/rockchip/image/nanopi-r2s.bootscript
+++ /dev/null
@@ -1,8 +0,0 @@
-part uuid mmc ${devnum}:2 uuid
-
-setenv bootargs "console=ttyS2,1500000 earlycon=uart8250,mmio32,0xff130000 root=PARTUUID=${uuid} rw rootwait"
-
-load mmc ${devnum}:1 ${fdt_addr_r} rockchip.dtb
-load mmc ${devnum}:1 ${kernel_addr_r} kernel.img
-
-booti ${kernel_addr_r} - ${fdt_addr_r}

diff --git a/target/linux/rockchip/image/nanopi-r4s.bootscript b/target/linux/rockchip/image/nanopi-r4s.bootscript
deleted file mode 100644 (file)
index abe9c24..0000000
--- a/target/linux/rockchip/image/nanopi-r4s.bootscript
+++ /dev/null
@@ -1,8 +0,0 @@
-part uuid mmc ${devnum}:2 uuid
-
-setenv bootargs "console=ttyS2,1500000 earlycon=uart8250,mmio32,0xff1a0000 root=PARTUUID=${uuid} rw rootwait"
-
-load mmc ${devnum}:1 ${fdt_addr_r} rockchip.dtb
-load mmc ${devnum}:1 ${kernel_addr_r} kernel.img
-
-booti ${kernel_addr_r} - ${fdt_addr_r}