qualcommax: switch to qca8081 upstream PHY driver

[openwrt/staging/svanheule.git] / target / linux / qualcommax / files / arch / arm64 / boot / dts / qcom / ipq8072-ax9000.dts

diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-ax9000.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-ax9000.dts
index 3b175ec1624a8468b8c5bc2f4d45949c2b9ea88e..0408c6ed859363e9151799225ff5540a708fce69 100644 (file)
--- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-ax9000.dts
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-ax9000.dts
@@ -280,32 +280,34 @@
                                reg = <0xf80000 0x80000>;
                                read-only;
 
-                               compatible = "nvmem-cells";
-                               #address-cells = <1>;
-                               #size-cells = <1>;
-
-                               macaddr_dp1: macaddr@0 {
-                                       reg = <0x0 0x6>;
-                               };
-
-                               macaddr_dp2: macaddr@6 {
-                                       reg = <0x6 0x6>;
-                               };
-
-                               macaddr_dp3: macaddr@c {
-                                       reg = <0xc 0x6>;
-                               };
-
-                               macaddr_dp4: macaddr@12 {
-                                       reg = <0x12 0x6>;
-                               };
-
-                               macaddr_dp5: macaddr@18 {
-                                       reg = <0x18 0x6>;
-                               };
-
-                               caldata_qca9889: caldata@4d000 {
-                                       reg = <0x4d000 0x844>;
+                               nvmem-layout {
+                                       compatible = "fixed-layout";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       macaddr_dp1: macaddr@0 {
+                                               reg = <0x0 0x6>;
+                                       };
+
+                                       macaddr_dp2: macaddr@6 {
+                                               reg = <0x6 0x6>;
+                                       };
+
+                                       macaddr_dp3: macaddr@c {
+                                               reg = <0xc 0x6>;
+                                       };
+
+                                       macaddr_dp4: macaddr@12 {
+                                               reg = <0x12 0x6>;
+                                       };
+
+                                       macaddr_dp5: macaddr@18 {
+                                               reg = <0x18 0x6>;
+                                       };
+
+                                       caldata_qca9889: caldata@4d000 {
+                                               reg = <0x4d000 0x844>;
+                                       };
                                };
                        };
 
@@ -376,6 +378,18 @@
                compatible = "ethernet-phy-id004d.d101";
                reg = <24>;
                reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
+
+               leds {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       led@0 {
+                               reg = <0>;
+                               color = <LED_COLOR_ID_GREEN>;
+                               function = LED_FUNCTION_WAN;
+                               default-state = "keep";
+                       };
+               };
        };
 };
 
@@ -386,27 +400,25 @@
        switch_wan_bmp = <ESS_PORT5>; /* wan port bitmap */
        switch_mac_mode = <MAC_MODE_QSGMII>; /* mac mode for uniphy instance0*/
        switch_mac_mode1 = <MAC_MODE_SGMII_PLUS>; /* mac mode for uniphy instance1*/
-       bm_tick_mode = <0>; /* bm tick mode */
-       tm_tick_mode = <0>; /* tm tick mode */
 
        qcom,port_phyinfo {
-               port@0 {
+               port@1 {
                        port_id = <1>;
                        phy_address = <0>;
                };
-               port@1 {
+               port@2 {
                        port_id = <2>;
                        phy_address = <1>;
                };
-               port@2 {
+               port@3 {
                        port_id = <3>;
                        phy_address = <2>;
                };
-               port@3 {
+               port@4 {
                        port_id = <4>;
                        phy_address = <3>;
                };
-               port@4 {
+               port@5 {
                        port_id = <5>;
                        phy_address = <24>;
                        port_mac_sel = "QGMAC_PORT";