// SPDX-License-Identifier: GPL-2.0-or-later
-#include "qcom-ipq8065.dtsi"
+#include "qcom-ipq8065-smb208.dtsi"
#include <dt-bindings/input/input.h>
/ {
};
};
- rgmii2_pins: rgmii2_pins {
+ rgmii2_pins: rgmii2-pins {
mux {
pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31",
"gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62";
input-disable;
};
};
+
+ spi_pins: spi_pins {
+ cs {
+ pins = "gpio20";
+ drive-strength = <12>;
+ };
+ };
};
-&nand {
+&gsbi5 {
+ qcom,mode = <GSBI_PROT_SPI>;
status = "okay";
- pinctrl-0 = <&nand_pins>;
- pinctrl-names = "default";
+ spi@1a280000 {
+ status = "okay";
+
+ pinctrl-0 = <&spi_pins>;
+ pinctrl-names = "default";
+
+ cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
+
+ flash@0 {
+ compatible = "everspin,mr25h256";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <40000000>;
+ reg = <0>;
+ };
+ };
+};
+
+&nand {
+ status = "okay";
nand@0 {
reg = <0>;
nand-bus-width = <8>;
nand-ecc-step-size = <512>;
+ qcom,boot-partitions = <0x0 0x1180000 0x1340000 0x10c0000>;
+
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
reg = <0x0000000 0x0040000>;
read-only;
};
+
partition@40000 {
label = "0:MIBIB";
reg = <0x0040000 0x0140000>;
read-only;
};
+
partition@180000 {
label = "0:SBL2";
reg = <0x0180000 0x0140000>;
read-only;
};
+
partition@2c0000 {
label = "0:SBL3";
reg = <0x02c0000 0x0280000>;
read-only;
};
+
partition@540000 {
label = "0:DDRCONFIG";
reg = <0x0540000 0x0120000>;
read-only;
};
+
partition@660000 {
label = "0:SSD";
reg = <0x0660000 0x0120000>;
read-only;
};
+
partition@780000 {
label = "0:TZ";
reg = <0x0780000 0x0280000>;
read-only;
};
+
partition@a00000 {
label = "0:RPM";
reg = <0x0a00000 0x0280000>;
read-only;
};
+
partition@c80000 {
label = "0:APPSBL";
reg = <0x0c80000 0x0500000>;
read-only;
};
+
partition@1180000 {
label = "0:APPSBLENV";
reg = <0x1180000 0x0080000>;
};
- ART: partition@1200000 {
+
+ partition@1200000 {
label = "0:ART";
reg = <0x1200000 0x0140000>;
read-only;
+ compatible = "nvmem-cells";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_ART_0: macaddr@0 {
+ reg = <0x0 0x6>;
+ };
+
+ macaddr_ART_6: macaddr@6 {
+ reg = <0x6 0x6>;
+ };
+
+ precal_ART_1000: precal@1000 {
+ reg = <0x1000 0x2f20>;
+ };
+
+ precal_ART_5000: precal@5000 {
+ reg = <0x5000 0x2f20>;
+ };
};
+
partition@1340000 {
label = "0:BOOTCONFIG";
reg = <0x1340000 0x0060000>;
read-only;
};
+
partition@13a0000 {
label = "0:SBL2_1";
reg = <0x13a0000 0x0140000>;
read-only;
};
+
partition@14e0000 {
label = "0:SBL3_1";
reg = <0x14e0000 0x0280000>;
read-only;
};
+
partition@1760000 {
label = "0:DDRCONFIG_1";
reg = <0x1760000 0x0120000>;
read-only;
};
+
partition@1880000 {
label = "0:SSD_1";
reg = <0x1880000 0x0120000>;
read-only;
};
+
partition@19a0000 {
label = "0:TZ_1";
reg = <0x19a0000 0x0280000>;
read-only;
};
+
partition@1c20000 {
label = "0:RPM_1";
reg = <0x1c20000 0x0280000>;
read-only;
};
+
partition@1ea0000 {
label = "0:BOOTCONFIG1";
reg = <0x1ea0000 0x0060000>;
read-only;
};
+
partition@1f00000 {
label = "0:APPSBL_1";
reg = <0x1f00000 0x0500000>;
read-only;
};
+
partition@2400000 {
label = "ubi";
reg = <0x2400000 0x1a000000>;
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
- phy0: ethernet-phy@0 {
- reg = <0x0>;
- qca,ar8327-initvals = <
- 0x00004 0x7600000 /* PAD0_MODE */
- 0x00008 0x1000000 /* PAD5_MODE */
- 0x0000c 0x80 /* PAD6_MODE */
- 0x000e4 0xaa545 /* MAC_POWER_SEL */
- 0x000e0 0xc74164de /* SGMII_CTRL */
- 0x0007c 0x4e /* PORT0_STATUS */
- 0x00094 0x4e /* PORT6_STATUS */
- 0x00050 0xcf02cf02 /* LED_CTRL_0 */
- 0x00054 0xc832c832 /* LED_CTRL_1 */
- >;
+ switch@10 {
+ compatible = "qca,qca8337";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ phy-mode = "rgmii";
+ tx-internal-delay-ps = <1000>;
+ rx-internal-delay-ps = <1000>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "wan";
+ phy-mode = "internal";
+ phy-handle = <&phy_port1>;
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan1";
+ phy-mode = "internal";
+ phy-handle = <&phy_port2>;
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan2";
+ phy-mode = "internal";
+ phy-handle = <&phy_port3>;
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "lan3";
+ phy-mode = "internal";
+ phy-handle = <&phy_port4>;
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "lan4";
+ phy-mode = "internal";
+ phy-handle = <&phy_port5>;
+ };
+
+ /*
+ port@6 {
+ reg = <0>;
+ label = "cpu";
+ ethernet = <&gmac2>;
+ phy-mode = "rgmii";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ pause;
+ asym-pause;
+ };
+ };
+ */
+ };
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy_port1: phy@0 {
+ reg = <0>;
+ };
+
+ phy_port2: phy@1 {
+ reg = <1>;
+ };
+
+ phy_port3: phy@2 {
+ reg = <2>;
+ };
+
+ phy_port4: phy@3 {
+ reg = <3>;
+ };
+
+ phy_port5: phy@4 {
+ reg = <4>;
+ };
+ };
};
};
status = "okay";
};
+&hs_phy_0 {
+ status = "okay";
+};
+
+&ss_phy_0 {
+ status = "okay";
+};
+
&usb3_0 {
status = "okay";
};
+&hs_phy_1 {
+ status = "okay";
+};
+
+&ss_phy_1 {
+ status = "okay";
+};
+
&usb3_1 {
status = "okay";
};
reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&pcie0_pins>;
pinctrl-names = "default";
+
+ bridge@0,0 {
+ reg = <0x00000000 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+
+ wifi0: wifi@1,0 {
+ compatible = "pci168c,0046";
+ reg = <0x00010000 0 0 0 0>;
+
+ nvmem-cells = <&precal_ART_1000>;
+ nvmem-cell-names = "pre-calibration";
+ };
+ };
};
&pcie1 {
pinctrl-0 = <&pcie1_pins>;
pinctrl-names = "default";
max-link-speed = <1>;
-};
-&ART {
- compatible = "nvmem-cells";
- #address-cells = <1>;
- #size-cells = <1>;
+ bridge@0,0 {
+ reg = <0x00000000 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
- macaddr_ART_0: macaddr@0 {
- reg = <0x0 0x6>;
- };
+ wifi1: wifi@1,0 {
+ compatible = "pci168c,0046";
+ reg = <0x00010000 0 0 0 0>;
- macaddr_ART_6: macaddr@6 {
- reg = <0x6 0x6>;
+ nvmem-cells = <&precal_ART_5000>;
+ nvmem-cell-names = "pre-calibration";
+ };
};
};
projects / openwrt / staging / svanheule.git / blobdiff