d3e0ca6624b1d815e0edb13b54d6519c4fc6a893
[openwrt/staging/wigyori.git] / target / linux / sunxi / patches-6.1 / 0013-add-myir-spi.patch
1 diff -ruN linux-6.1.32/arch/arm/boot/dts.old/Makefile linux-6.1.32/arch/arm/boot/dts/Makefile
2 --- linux-6.1.32/arch/arm/boot/dts.old/Makefile 2023-06-08 12:31:43.836149794 +0200
3 +++ linux-6.1.32/arch/arm/boot/dts/Makefile 2023-06-08 13:54:54.227133463 +0200
4 @@ -1384,6 +1384,7 @@
5 sun8i-t113s-mangopi-mq-r-t113.dtb \
6 sun8i-t113s-mangopi-mqdual-t113.dtb \
7 sun8i-t113s-myd-yt113x.dtb \
8 + sun8i-t113s-myd-yt113x-spi.dtb \
9 sun8i-t113s-rp-t113.dtb \
10 sun8i-t3-cqa3t-bv3.dtb \
11 sun8i-v3-sl631-imx179.dtb \
12 diff -ruN a/arch/arm/boot/dts/sun8i-t113s-myd-yt113x-spi.dts b/arch/arm/boot/dts/sun8i-t113s-myd-yt113x-spi.dts
13 --- a/arch/arm/boot/dts/sun8i-t113s-myd-yt113x-spi.dts 1970-01-01 01:00:00.000000000 +0100
14 +++ b/arch/arm/boot/dts/sun8i-t113s-myd-yt113x-spi.dts 2023-07-20 12:50:37.379366802 +0200
15 @@ -0,0 +1,274 @@
16 +// SPDX-License-Identifier: (GPL-2.0+ or MIT)
17 +// Copyright (C) 2022 Arm Ltd.
18 +
19 +#include <dt-bindings/interrupt-controller/irq.h>
20 +#include <dt-bindings/gpio/gpio.h>
21 +
22 +/dts-v1/;
23 +
24 +#include "sun8i-t113s.dtsi"
25 +
26 +/ {
27 + model = "MYIR MYD-YT113X SPI";
28 + compatible = "myir,myd-yt113x", "myir,myc-yt113x", "allwinner,sun8i-t113s";
29 +
30 + aliases {
31 + serial5 = &uart5;
32 +
33 + led-boot = &led_blue;
34 + led-failsafe = &led_blue;
35 + led-running = &led_blue;
36 + led-upgrade = &led_blue;
37 + };
38 +
39 + chosen {
40 + stdout-path = "serial5:115200n8";
41 + };
42 +
43 + leds {
44 + compatible = "gpio-leds";
45 +
46 + led_blue: blue {
47 + label = "blue";
48 + gpios = <&pio 4 2 GPIO_ACTIVE_LOW>; /* PD2 */
49 + };
50 +
51 + green {
52 + label = "green";
53 + gpios = <&pcf9555 6 GPIO_ACTIVE_LOW>;
54 + default-state = "on";
55 + };
56 + };
57 +
58 + /* board wide 5V supply directly from the USB-C socket */
59 + reg_vcc5v: regulator-5v {
60 + compatible = "regulator-fixed";
61 + regulator-name = "vcc-5v";
62 + regulator-min-microvolt = <5000000>;
63 + regulator-max-microvolt = <5000000>;
64 + regulator-always-on;
65 + };
66 +
67 + /* SY8008 DC/DC regulator on the board */
68 + reg_3v3: regulator-3v3 {
69 + compatible = "regulator-fixed";
70 + regulator-name = "vcc-3v3";
71 + regulator-min-microvolt = <3300000>;
72 + regulator-max-microvolt = <3300000>;
73 + vin-supply = <&reg_vcc5v>;
74 + };
75 +
76 + /* SY8008 DC/DC regulator on the board, also supplying VDD-SYS */
77 + reg_vcc_core: regulator-core {
78 + compatible = "regulator-fixed";
79 + regulator-name = "vcc-core";
80 + regulator-min-microvolt = <880000>;
81 + regulator-max-microvolt = <880000>;
82 + vin-supply = <&reg_vcc5v>;
83 + };
84 +
85 + /* XC6206 LDO on the board */
86 + reg_avdd2v8: regulator-avdd {
87 + compatible = "regulator-fixed";
88 + regulator-name = "avdd2v8";
89 + regulator-min-microvolt = <2800000>;
90 + regulator-max-microvolt = <2800000>;
91 + vin-supply = <&reg_3v3>;
92 + };
93 +
94 + reg_gmac_3v3: gmac-3v3 {
95 + compatible = "regulator-fixed";
96 + regulator-name = "gmac-3v3";
97 + regulator-min-microvolt = <3300000>;
98 + regulator-max-microvolt = <3300000>;
99 + startup-delay-us = <100000>;
100 + enable-active-high;
101 + gpio = <&pio 4 12 GPIO_ACTIVE_HIGH>; /* PE12 */
102 + };
103 +};
104 +
105 +
106 +&cpu0 {
107 + cpu-supply = <&reg_vcc_core>;
108 +};
109 +
110 +&cpu1 {
111 + cpu-supply = <&reg_vcc_core>;
112 +};
113 +
114 +&dcxo {
115 + clock-frequency = <24000000>;
116 +};
117 +
118 +&pio {
119 + vcc-pb-supply = <&reg_3v3>;
120 + vcc-pd-supply = <&reg_3v3>;
121 + vcc-pe-supply = <&reg_avdd2v8>;
122 + vcc-pf-supply = <&reg_3v3>;
123 + vcc-pg-supply = <&reg_3v3>;
124 +
125 + /omit-if-no-ref/
126 + uart5_pins: uart5-pins {
127 + pins = "PE6", "PE7";
128 + function = "uart5";
129 + };
130 +
131 +// rmii_pg_pins: rmii-pg-pins {
132 +// pins = "PG0", "PG1", "PG2", "PG3", "PG4",
133 +// "PG5", "PG12", "PG13", "PG14", "PG15";
134 +// function = "emac";
135 +// };
136 +
137 + rgmii_pg_pins: rgmii-pg-pins {
138 + pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5",
139 + "PG6", "PG7", "PG8", "PG9", "PG10",
140 + "PG12", "PG14", "PG15";
141 + function = "emac";
142 + };
143 +
144 + i2c1_pb_pins: i2c1-pb-pins {
145 + pins = "PB4", "PB5";
146 + function = "i2c1";
147 + };
148 +
149 + i2c3_pb_pins: i2c3-pb-pins {
150 + pins = "PB6", "PB7";
151 + function = "i2c3";
152 + };
153 +};
154 +
155 +&uart5 {
156 + pinctrl-names = "default";
157 + pinctrl-0 = <&uart5_pins>;
158 + status = "okay";
159 +};
160 +
161 +&mmc0 {
162 + pinctrl-0 = <&mmc0_pins>;
163 + pinctrl-names = "default";
164 + vmmc-supply = <&reg_3v3>;
165 + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
166 + disable-wp;
167 + bus-width = <4>;
168 + status = "okay";
169 +};
170 +
171 +/* don't enable mmc2 on the SPI board, as the SPINAND and eMMC use the same pins across the two CPU modules
172 +
173 +[ 1.126495] sun20i-d1-pinctrl 2000000.pinctrl: request pin 66 (PC2) for 4025000.spi
174 +[ 1.135827] sun20i-d1-pinctrl 2000000.pinctrl: request pin 67 (PC3) for 4025000.spi
175 +[ 1.135890] sun20i-d1-pinctrl 2000000.pinctrl: request pin 68 (PC4) for 4025000.spi
176 +[ 1.135930] sun20i-d1-pinctrl 2000000.pinctrl: request pin 69 (PC5) for 4025000.spi
177 +[ 1.481816] sun20i-d1-pinctrl 2000000.pinctrl: pin PC2 already requested by 4025000.spi; cannot claim for 4022000.mmc
178 +
179 +*/
180 +
181 +//&mmc2_pins {
182 +// bias-pull-up;
183 +// drive-strength = <40>;
184 +//};
185 +
186 +//&mmc2 {
187 +// pinctrl-0 = <&mmc2_pins>;
188 +// pinctrl-names = "default";
189 +// vmmc-supply = <&reg_3v3>;
190 +// non-removable;
191 +// bus-width = <4>;
192 +// status = "okay";
193 +//};
194 +
195 +
196 +&ehci0 {
197 + status = "okay";
198 +};
199 +
200 +&ohci0 {
201 + status = "okay";
202 +};
203 +
204 +&ehci1 {
205 + status = "okay";
206 +};
207 +
208 +&ohci1 {
209 + status = "okay";
210 +};
211 +
212 +&usbphy {
213 + usb1_vbus-supply = <&reg_vcc5v>;
214 + status = "okay";
215 +};
216 +
217 +&i2c1 {
218 + pinctrl-0 = <&i2c1_pb_pins>;
219 + pinctrl-names = "default";
220 +
221 + status = "okay";
222 +
223 + rtc@32 {
224 + compatible = "epson,rx8025";
225 + reg = <0x32>;
226 + };
227 +};
228 +
229 +&i2c3 {
230 + pinctrl-0 = <&i2c3_pb_pins>;
231 + pinctrl-names = "default";
232 +
233 + status = "okay";
234 +
235 + eeprom@50 {
236 + compatible = "atmel,24c32";
237 + reg = <0x50>;
238 + };
239 +
240 + pcf9555: pcf9555@20 {
241 + #gpio-cells = <2>;
242 + compatible = "nxp,pca9555";
243 + reg = <0x20>;
244 + };
245 +};
246 +
247 +
248 +
249 +
250 +
251 +&mdio {
252 + ext_rgmii_phy: ethernet-phy@0 {
253 +// #address-cells = <1>;
254 +// #size-cells = <0>;
255 +// compatible = "snps,dwmac-mdio";
256 + compatible = "ethernet-phy-ieee802.3-c22";
257 +
258 + reg = <0>;
259 + reset-gpios = <&pio 4 11 GPIO_ACTIVE_HIGH>;
260 + };
261 +};
262 +
263 +&emac {
264 + pinctrl-names = "default";
265 + pinctrl-0 = <&rgmii_pg_pins>;
266 +
267 + phy-supply = <&reg_3v3>;
268 + phy-handle = <&ext_rgmii_phy>;
269 + phy-mode = "rgmii";
270 +
271 + status = "okay";
272 +};
273 +
274 +&spi0 {
275 + status = "okay";
276 +
277 + pinctrl-names = "default";
278 + pinctrl-0 = <&qspi0_pc_pins>;
279 +
280 + flash@0 {
281 + #address-cells = <1>;
282 + #size-cells = <1>;
283 +
284 + compatible = "spi-nand";
285 + reg = <0>;
286 + spi-max-frequency = <40000000>;
287 + };
288 +
289 +};