libbpf: Update to v1.4.1
[openwrt/staging/nbd.git] / target / linux / rockchip / patches-6.1 / 024-v6.3-arm64-dts-rockchip-Add-Radxa-CM3I-E25.patch
1 From 2bf2f4d9f673013a58109626b87329310537a611 Mon Sep 17 00:00:00 2001
2 From: Chukun Pan <amadeus@jmu.edu.cn>
3 Date: Fri, 9 Dec 2022 18:25:24 +0800
4 Subject: [PATCH] arm64: dts: rockchip: Add Radxa CM3I E25
5
6 Radxa E25 is a network application carrier board for the Radxa CM3
7 Industrial (CM3I) SoM, which is based on the Rockchip RK3568 SoC.
8
9 It has the following features:
10
11 - MicroSD card socket, on board eMMC flash
12 - 2x 2.5GbE Realtek RTL8125B Ethernet transceiver
13 - 1x USB Type-C port (Power and Serial console)
14 - 1x USB 3.0 OTG port
15 - mini PCIe socket (USB or PCIe)
16 - ngff PCIe socket (USB or SATA)
17 - 1x User LED and 16x RGB LEDs
18 - 26-pin expansion header
19
20 Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
21 Link: https://lore.kernel.org/r/20221209102524.129367-3-amadeus@jmu.edu.cn
22 Signed-off-by: Heiko Stuebner <heiko@sntech.de>
23 ---
24 arch/arm64/boot/dts/rockchip/Makefile | 1 +
25 .../boot/dts/rockchip/rk3568-radxa-cm3i.dtsi | 416 ++++++++++++++++++
26 .../boot/dts/rockchip/rk3568-radxa-e25.dts | 229 ++++++++++
27 3 files changed, 646 insertions(+)
28 create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi
29 create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts
30
31 --- a/arch/arm64/boot/dts/rockchip/Makefile
32 +++ b/arch/arm64/boot/dts/rockchip/Makefile
33 @@ -78,4 +78,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bp
34 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
35 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5c.dtb
36 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
37 +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb
38 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
39 --- /dev/null
40 +++ b/arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi
41 @@ -0,0 +1,416 @@
42 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
43 +
44 +#include <dt-bindings/gpio/gpio.h>
45 +#include <dt-bindings/leds/common.h>
46 +#include <dt-bindings/pinctrl/rockchip.h>
47 +#include "rk3568.dtsi"
48 +
49 +/ {
50 + model = "Radxa CM3 Industrial Board";
51 + compatible = "radxa,cm3i", "rockchip,rk3568";
52 +
53 + aliases {
54 + mmc0 = &sdhci;
55 + };
56 +
57 + chosen {
58 + stdout-path = "serial2:115200n8";
59 + };
60 +
61 + gpio-leds {
62 + compatible = "gpio-leds";
63 +
64 + led_user: led-0 {
65 + gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
66 + function = LED_FUNCTION_HEARTBEAT;
67 + color = <LED_COLOR_ID_GREEN>;
68 + linux,default-trigger = "heartbeat";
69 + pinctrl-names = "default";
70 + pinctrl-0 = <&led_user_en>;
71 + };
72 + };
73 +
74 + pcie30_avdd0v9: pcie30-avdd0v9-regulator {
75 + compatible = "regulator-fixed";
76 + regulator-name = "pcie30_avdd0v9";
77 + regulator-always-on;
78 + regulator-boot-on;
79 + regulator-min-microvolt = <900000>;
80 + regulator-max-microvolt = <900000>;
81 + vin-supply = <&vcc3v3_sys>;
82 + };
83 +
84 + pcie30_avdd1v8: pcie30-avdd1v8-regulator {
85 + compatible = "regulator-fixed";
86 + regulator-name = "pcie30_avdd1v8";
87 + regulator-always-on;
88 + regulator-boot-on;
89 + regulator-min-microvolt = <1800000>;
90 + regulator-max-microvolt = <1800000>;
91 + vin-supply = <&vcc3v3_sys>;
92 + };
93 +
94 + vcc3v3_sys: vcc3v3-sys-regulator {
95 + compatible = "regulator-fixed";
96 + regulator-name = "vcc3v3_sys";
97 + regulator-always-on;
98 + regulator-boot-on;
99 + regulator-min-microvolt = <3300000>;
100 + regulator-max-microvolt = <3300000>;
101 + vin-supply = <&vcc5v_input>;
102 + };
103 +
104 + vcc5v0_sys: vcc5v0-sys-regulator {
105 + compatible = "regulator-fixed";
106 + regulator-name = "vcc5v0_sys";
107 + regulator-always-on;
108 + regulator-boot-on;
109 + regulator-min-microvolt = <5000000>;
110 + regulator-max-microvolt = <5000000>;
111 + vin-supply = <&vcc5v_input>;
112 + };
113 +
114 + /* labeled +5v_input in schematic */
115 + vcc5v_input: vcc5v-input-regulator {
116 + compatible = "regulator-fixed";
117 + regulator-name = "vcc5v_input";
118 + regulator-always-on;
119 + regulator-boot-on;
120 + regulator-min-microvolt = <5000000>;
121 + regulator-max-microvolt = <5000000>;
122 + };
123 +};
124 +
125 +&combphy0 {
126 + status = "okay";
127 +};
128 +
129 +&combphy1 {
130 + status = "okay";
131 +};
132 +
133 +&combphy2 {
134 + status = "okay";
135 +};
136 +
137 +&cpu0 {
138 + cpu-supply = <&vdd_cpu>;
139 +};
140 +
141 +&cpu1 {
142 + cpu-supply = <&vdd_cpu>;
143 +};
144 +
145 +&cpu2 {
146 + cpu-supply = <&vdd_cpu>;
147 +};
148 +
149 +&cpu3 {
150 + cpu-supply = <&vdd_cpu>;
151 +};
152 +
153 +&display_subsystem {
154 + status = "disabled";
155 +};
156 +
157 +&gpu {
158 + mali-supply = <&vdd_gpu>;
159 + status = "okay";
160 +};
161 +
162 +&i2c0 {
163 + status = "okay";
164 +
165 + vdd_cpu: regulator@1c {
166 + compatible = "tcs,tcs4525";
167 + reg = <0x1c>;
168 + fcs,suspend-voltage-selector = <1>;
169 + regulator-name = "vdd_cpu";
170 + regulator-always-on;
171 + regulator-boot-on;
172 + regulator-min-microvolt = <800000>;
173 + regulator-max-microvolt = <1150000>;
174 + regulator-ramp-delay = <2300>;
175 + vin-supply = <&vcc5v_input>;
176 +
177 + regulator-state-mem {
178 + regulator-off-in-suspend;
179 + };
180 + };
181 +
182 + rk809: pmic@20 {
183 + compatible = "rockchip,rk809";
184 + reg = <0x20>;
185 + interrupt-parent = <&gpio0>;
186 + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
187 + #clock-cells = <1>;
188 + pinctrl-names = "default";
189 + pinctrl-0 = <&pmic_int>;
190 + rockchip,system-power-controller;
191 + wakeup-source;
192 +
193 + vcc1-supply = <&vcc3v3_sys>;
194 + vcc2-supply = <&vcc3v3_sys>;
195 + vcc3-supply = <&vcc3v3_sys>;
196 + vcc4-supply = <&vcc3v3_sys>;
197 + vcc5-supply = <&vcc3v3_sys>;
198 + vcc6-supply = <&vcc3v3_sys>;
199 + vcc7-supply = <&vcc3v3_sys>;
200 + vcc8-supply = <&vcc3v3_sys>;
201 + vcc9-supply = <&vcc3v3_sys>;
202 +
203 + regulators {
204 + vdd_logic: DCDC_REG1 {
205 + regulator-name = "vdd_logic";
206 + regulator-always-on;
207 + regulator-boot-on;
208 + regulator-init-microvolt = <900000>;
209 + regulator-initial-mode = <0x2>;
210 + regulator-min-microvolt = <500000>;
211 + regulator-max-microvolt = <1350000>;
212 + regulator-ramp-delay = <6001>;
213 +
214 + regulator-state-mem {
215 + regulator-off-in-suspend;
216 + };
217 + };
218 +
219 + vdd_gpu: DCDC_REG2 {
220 + regulator-name = "vdd_gpu";
221 + regulator-always-on;
222 + regulator-init-microvolt = <900000>;
223 + regulator-initial-mode = <0x2>;
224 + regulator-min-microvolt = <500000>;
225 + regulator-max-microvolt = <1350000>;
226 + regulator-ramp-delay = <6001>;
227 +
228 + regulator-state-mem {
229 + regulator-off-in-suspend;
230 + };
231 + };
232 +
233 + vcc_ddr: DCDC_REG3 {
234 + regulator-name = "vcc_ddr";
235 + regulator-always-on;
236 + regulator-boot-on;
237 + regulator-initial-mode = <0x2>;
238 +
239 + regulator-state-mem {
240 + regulator-on-in-suspend;
241 + };
242 + };
243 +
244 + vdd_npu: DCDC_REG4 {
245 + regulator-name = "vdd_npu";
246 + regulator-init-microvolt = <900000>;
247 + regulator-initial-mode = <0x2>;
248 + regulator-min-microvolt = <500000>;
249 + regulator-max-microvolt = <1350000>;
250 + regulator-ramp-delay = <6001>;
251 +
252 + regulator-state-mem {
253 + regulator-off-in-suspend;
254 + };
255 + };
256 +
257 + vcc_1v8: DCDC_REG5 {
258 + regulator-name = "vcc_1v8";
259 + regulator-always-on;
260 + regulator-boot-on;
261 + regulator-min-microvolt = <1800000>;
262 + regulator-max-microvolt = <1800000>;
263 +
264 + regulator-state-mem {
265 + regulator-off-in-suspend;
266 + };
267 + };
268 +
269 + vdda0v9_image: LDO_REG1 {
270 + regulator-name = "vdda0v9_image";
271 + regulator-min-microvolt = <900000>;
272 + regulator-max-microvolt = <900000>;
273 +
274 + regulator-state-mem {
275 + regulator-off-in-suspend;
276 + };
277 + };
278 +
279 + vdda_0v9: LDO_REG2 {
280 + regulator-name = "vdda_0v9";
281 + regulator-always-on;
282 + regulator-boot-on;
283 + regulator-min-microvolt = <900000>;
284 + regulator-max-microvolt = <900000>;
285 +
286 + regulator-state-mem {
287 + regulator-off-in-suspend;
288 + };
289 + };
290 +
291 + vdda0v9_pmu: LDO_REG3 {
292 + regulator-name = "vdda0v9_pmu";
293 + regulator-always-on;
294 + regulator-boot-on;
295 + regulator-min-microvolt = <900000>;
296 + regulator-max-microvolt = <900000>;
297 +
298 + regulator-state-mem {
299 + regulator-on-in-suspend;
300 + regulator-suspend-microvolt = <900000>;
301 + };
302 + };
303 +
304 + vccio_acodec: LDO_REG4 {
305 + regulator-name = "vccio_acodec";
306 + regulator-always-on;
307 + regulator-min-microvolt = <3300000>;
308 + regulator-max-microvolt = <3300000>;
309 +
310 + regulator-state-mem {
311 + regulator-off-in-suspend;
312 + };
313 + };
314 +
315 + vccio_sd: LDO_REG5 {
316 + regulator-name = "vccio_sd";
317 + regulator-min-microvolt = <1800000>;
318 + regulator-max-microvolt = <3300000>;
319 +
320 + regulator-state-mem {
321 + regulator-off-in-suspend;
322 + };
323 + };
324 +
325 + vcc3v3_pmu: LDO_REG6 {
326 + regulator-name = "vcc3v3_pmu";
327 + regulator-always-on;
328 + regulator-boot-on;
329 + regulator-min-microvolt = <3300000>;
330 + regulator-max-microvolt = <3300000>;
331 +
332 + regulator-state-mem {
333 + regulator-on-in-suspend;
334 + regulator-suspend-microvolt = <3300000>;
335 + };
336 + };
337 +
338 + vcca_1v8: LDO_REG7 {
339 + regulator-name = "vcca_1v8";
340 + regulator-always-on;
341 + regulator-boot-on;
342 + regulator-min-microvolt = <1800000>;
343 + regulator-max-microvolt = <1800000>;
344 +
345 + regulator-state-mem {
346 + regulator-off-in-suspend;
347 + };
348 + };
349 +
350 + vcca1v8_pmu: LDO_REG8 {
351 + regulator-name = "vcca1v8_pmu";
352 + regulator-always-on;
353 + regulator-boot-on;
354 + regulator-min-microvolt = <1800000>;
355 + regulator-max-microvolt = <1800000>;
356 +
357 + regulator-state-mem {
358 + regulator-on-in-suspend;
359 + regulator-suspend-microvolt = <1800000>;
360 + };
361 + };
362 +
363 + vcca1v8_image: LDO_REG9 {
364 + regulator-name = "vcca1v8_image";
365 + regulator-min-microvolt = <1800000>;
366 + regulator-max-microvolt = <1800000>;
367 +
368 + regulator-state-mem {
369 + regulator-off-in-suspend;
370 + };
371 + };
372 +
373 + vcc_3v3: SWITCH_REG1 {
374 + regulator-name = "vcc_3v3";
375 + regulator-always-on;
376 + regulator-boot-on;
377 +
378 + regulator-state-mem {
379 + regulator-off-in-suspend;
380 + };
381 + };
382 +
383 + vcc3v3_sd: SWITCH_REG2 {
384 + regulator-name = "vcc3v3_sd";
385 +
386 + regulator-state-mem {
387 + regulator-off-in-suspend;
388 + };
389 + };
390 + };
391 + };
392 +};
393 +
394 +&pinctrl {
395 + leds {
396 + led_user_en: led_user_en {
397 + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
398 + };
399 + };
400 +
401 + pmic {
402 + pmic_int: pmic_int {
403 + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
404 + };
405 + };
406 +};
407 +
408 +&pmu_io_domains {
409 + pmuio1-supply = <&vcc3v3_pmu>;
410 + pmuio2-supply = <&vcc3v3_pmu>;
411 + vccio1-supply = <&vccio_acodec>;
412 + vccio2-supply = <&vcc_1v8>;
413 + vccio3-supply = <&vccio_sd>;
414 + vccio4-supply = <&vcc_1v8>;
415 + vccio5-supply = <&vcc_3v3>;
416 + vccio6-supply = <&vcc_1v8>;
417 + vccio7-supply = <&vcc_3v3>;
418 + status = "okay";
419 +};
420 +
421 +&saradc {
422 + vref-supply = <&vcca_1v8>;
423 + status = "okay";
424 +};
425 +
426 +&sdhci {
427 + bus-width = <8>;
428 + max-frequency = <200000000>;
429 + non-removable;
430 + pinctrl-names = "default";
431 + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
432 + vmmc-supply = <&vcc_3v3>;
433 + vqmmc-supply = <&vcc_1v8>;
434 + status = "okay";
435 +};
436 +
437 +&tsadc {
438 + rockchip,hw-tshut-mode = <1>;
439 + rockchip,hw-tshut-polarity = <0>;
440 + status = "okay";
441 +};
442 +
443 +&uart2 {
444 + status = "okay";
445 +};
446 +
447 +&usb2phy0 {
448 + status = "okay";
449 +};
450 +
451 +&usb2phy1 {
452 + status = "okay";
453 +};
454 +
455 +&usb_host0_xhci {
456 + extcon = <&usb2phy0>;
457 +};
458 --- /dev/null
459 +++ b/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts
460 @@ -0,0 +1,229 @@
461 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
462 +
463 +/dts-v1/;
464 +#include "rk3568-radxa-cm3i.dtsi"
465 +
466 +/ {
467 + model = "Radxa E25";
468 + compatible = "radxa,e25", "rockchip,rk3568";
469 +
470 + aliases {
471 + mmc0 = &sdmmc0;
472 + mmc1 = &sdhci;
473 + };
474 +
475 + pwm-leds {
476 + compatible = "pwm-leds-multicolor";
477 +
478 + multi-led {
479 + color = <LED_COLOR_ID_RGB>;
480 + max-brightness = <255>;
481 +
482 + led-red {
483 + color = <LED_COLOR_ID_RED>;
484 + pwms = <&pwm1 0 1000000 0>;
485 + };
486 +
487 + led-green {
488 + color = <LED_COLOR_ID_GREEN>;
489 + pwms = <&pwm2 0 1000000 0>;
490 + };
491 +
492 + led-blue {
493 + color = <LED_COLOR_ID_BLUE>;
494 + pwms = <&pwm12 0 1000000 0>;
495 + };
496 + };
497 + };
498 +
499 + vbus_typec: vbus-typec-regulator {
500 + compatible = "regulator-fixed";
501 + enable-active-high;
502 + gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
503 + pinctrl-names = "default";
504 + pinctrl-0 = <&vbus_typec_en>;
505 + regulator-name = "vbus_typec";
506 + regulator-min-microvolt = <5000000>;
507 + regulator-max-microvolt = <5000000>;
508 + vin-supply = <&vcc5v0_sys>;
509 + };
510 +
511 + vcc3v3_minipcie: vcc3v3-minipcie-regulator {
512 + compatible = "regulator-fixed";
513 + enable-active-high;
514 + gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
515 + pinctrl-names = "default";
516 + pinctrl-0 = <&minipcie_enable_h>;
517 + regulator-name = "vcc3v3_minipcie";
518 + regulator-min-microvolt = <5000000>;
519 + regulator-max-microvolt = <5000000>;
520 + vin-supply = <&vcc5v0_sys>;
521 + };
522 +
523 + vcc3v3_ngff: vcc3v3-ngff-regulator {
524 + compatible = "regulator-fixed";
525 + enable-active-high;
526 + gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
527 + pinctrl-names = "default";
528 + pinctrl-0 = <&ngffpcie_enable_h>;
529 + regulator-name = "vcc3v3_ngff";
530 + regulator-min-microvolt = <3300000>;
531 + regulator-max-microvolt = <3300000>;
532 + vin-supply = <&vcc5v0_sys>;
533 + };
534 +
535 + /* actually fed by vcc5v0_sys, dependent
536 + * on pi6c clock generator
537 + */
538 + vcc3v3_pcie30x1: vcc3v3-pcie30x1-regulator {
539 + compatible = "regulator-fixed";
540 + enable-active-high;
541 + gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
542 + pinctrl-names = "default";
543 + pinctrl-0 = <&pcie30x1_enable_h>;
544 + regulator-name = "vcc3v3_pcie30x1";
545 + regulator-min-microvolt = <3300000>;
546 + regulator-max-microvolt = <3300000>;
547 + vin-supply = <&vcc3v3_pi6c_05>;
548 + };
549 +
550 + vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator {
551 + compatible = "regulator-fixed";
552 + enable-active-high;
553 + gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
554 + pinctrl-names = "default";
555 + pinctrl-0 = <&pcie_enable_h>;
556 + regulator-name = "vcc3v3_pcie";
557 + regulator-min-microvolt = <3300000>;
558 + regulator-max-microvolt = <3300000>;
559 + vin-supply = <&vcc5v0_sys>;
560 + };
561 +};
562 +
563 +&pcie2x1 {
564 + pinctrl-names = "default";
565 + pinctrl-0 = <&pcie20_reset_h>;
566 + reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
567 + vpcie3v3-supply = <&vcc3v3_pi6c_05>;
568 + status = "okay";
569 +};
570 +
571 +&pcie30phy {
572 + data-lanes = <1 2>;
573 + status = "okay";
574 +};
575 +
576 +&pcie3x1 {
577 + num-lanes = <1>;
578 + pinctrl-names = "default";
579 + pinctrl-0 = <&pcie30x1m0_pins>;
580 + reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
581 + vpcie3v3-supply = <&vcc3v3_pcie30x1>;
582 + status = "okay";
583 +};
584 +
585 +&pcie3x2 {
586 + num-lanes = <1>;
587 + pinctrl-names = "default";
588 + pinctrl-0 = <&pcie30x2_reset_h>;
589 + reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
590 + vpcie3v3-supply = <&vcc3v3_pi6c_05>;
591 + status = "okay";
592 +};
593 +
594 +&pinctrl {
595 + pcie {
596 + pcie20_reset_h: pcie20-reset-h {
597 + rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
598 + };
599 +
600 + pcie30x1_enable_h: pcie30x1-enable-h {
601 + rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
602 + };
603 +
604 + pcie30x2_reset_h: pcie30x2-reset-h {
605 + rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
606 + };
607 +
608 + pcie_enable_h: pcie-enable-h {
609 + rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
610 + };
611 + };
612 +
613 + usb {
614 + minipcie_enable_h: minipcie-enable-h {
615 + rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
616 + };
617 +
618 + ngffpcie_enable_h: ngffpcie-enable-h {
619 + rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
620 + };
621 +
622 + vbus_typec_en: vbus_typec_en {
623 + rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
624 + };
625 + };
626 +};
627 +
628 +&pwm1 {
629 + status = "okay";
630 +};
631 +
632 +&pwm2 {
633 + status = "okay";
634 +};
635 +
636 +&pwm12 {
637 + pinctrl-names = "default";
638 + pinctrl-0 = <&pwm12m1_pins>;
639 + status = "okay";
640 +};
641 +
642 +&sdmmc0 {
643 + bus-width = <4>;
644 + cap-sd-highspeed;
645 + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
646 + /* Also used in pcie30x1_clkreqnm0 */
647 + disable-wp;
648 + pinctrl-names = "default";
649 + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd>;
650 + sd-uhs-sdr104;
651 + vmmc-supply = <&vcc3v3_sd>;
652 + vqmmc-supply = <&vccio_sd>;
653 + status = "okay";
654 +};
655 +
656 +&usb_host0_ehci {
657 + status = "okay";
658 +};
659 +
660 +&usb_host0_ohci {
661 + status = "okay";
662 +};
663 +
664 +&usb_host0_xhci {
665 + status = "okay";
666 +};
667 +
668 +&usb_host1_ehci {
669 + status = "okay";
670 +};
671 +
672 +&usb_host1_ohci {
673 + status = "okay";
674 +};
675 +
676 +&usb2phy0_otg {
677 + phy-supply = <&vbus_typec>;
678 + status = "okay";
679 +};
680 +
681 +&usb2phy1_host {
682 + phy-supply = <&vcc3v3_minipcie>;
683 + status = "okay";
684 +};
685 +
686 +&usb2phy1_otg {
687 + phy-supply = <&vcc3v3_ngff>;
688 + status = "okay";
689 +};