realtek: more generic platform initialization
[openwrt/staging/lynxis.git] / target / linux / realtek / files-5.10 / arch / mips / rtl838x / setup.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Setup for the Realtek RTL838X SoC:
4 * Memory, Timer and Serial
5 *
6 * Copyright (C) 2020 B. Koblitz
7 * based on the original BSP by
8 * Copyright (C) 2006-2012 Tony Wu (tonywu@realtek.com)
9 *
10 */
11
12 #include <linux/console.h>
13 #include <linux/init.h>
14 #include <linux/clkdev.h>
15 #include <linux/clk-provider.h>
16 #include <linux/clk.h>
17 #include <linux/delay.h>
18 #include <linux/of_fdt.h>
19 #include <linux/irqchip.h>
20
21 #include <asm/addrspace.h>
22 #include <asm/io.h>
23 #include <asm/bootinfo.h>
24 #include <asm/time.h>
25 #include <asm/prom.h>
26 #include <asm/smp-ops.h>
27
28 #include "mach-rtl83xx.h"
29
30 extern struct rtl83xx_soc_info soc_info;
31
32 void __init plat_mem_setup(void)
33 {
34 void *dtb;
35
36 set_io_port_base(KSEG1);
37
38 if (fw_passed_dtb) /* UHI interface */
39 dtb = (void *)fw_passed_dtb;
40 else if (&__dtb_start[0] != &__dtb_end[0])
41 dtb = (void *)__dtb_start;
42 else
43 panic("no dtb found");
44
45 /*
46 * Load the devicetree. This causes the chosen node to be
47 * parsed resulting in our memory appearing
48 */
49 __dt_setup_arch(dtb);
50 }
51
52 void plat_time_init_fallback(void)
53 {
54 struct device_node *np;
55 u32 freq = 500000000;
56
57 np = of_find_node_by_name(NULL, "cpus");
58 if (!np) {
59 pr_err("Missing 'cpus' DT node, using default frequency.");
60 } else {
61 if (of_property_read_u32(np, "frequency", &freq) < 0)
62 pr_err("No 'frequency' property in DT, using default.");
63 else
64 pr_info("CPU frequency from device tree: %dMHz", freq / 1000000);
65 of_node_put(np);
66 }
67 mips_hpt_frequency = freq / 2;
68 }
69
70 void __init plat_time_init(void)
71 {
72 /*
73 * Initialization routine resembles generic MIPS plat_time_init() with
74 * lazy error handling. The final fallback is only needed until we have
75 * converted all device trees to new clock syntax.
76 */
77 struct device_node *np;
78 struct clk *clk;
79
80 of_clk_init(NULL);
81
82 mips_hpt_frequency = 0;
83 np = of_get_cpu_node(0, NULL);
84 if (!np) {
85 pr_err("Failed to get CPU node\n");
86 } else {
87 clk = of_clk_get(np, 0);
88 if (IS_ERR(clk)) {
89 pr_err("Failed to get CPU clock: %ld\n", PTR_ERR(clk));
90 } else {
91 mips_hpt_frequency = clk_get_rate(clk) / 2;
92 clk_put(clk);
93 }
94 }
95
96 if (!mips_hpt_frequency)
97 plat_time_init_fallback();
98
99 timer_probe();
100 }
101
102 void __init arch_init_irq(void)
103 {
104 irqchip_init();
105 }