target/linux/mediatek/dts/mt7981b-zbtlink-zbt-z8102ax.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 /dts-v1/;
   4
   5 #include "mt7981.dtsi"
   6
   7 / {
   8         model = "Zbtlink ZBT-Z8102AX";
   9         compatible = "zbtlink,zbt-z8102ax", "mediatek,mt7981";
  10
  11         aliases {
  12                 serial0 = &uart0;
  13                 led-boot = &led_status_green;
  14                 led-failsafe = &led_status_red;
  15                 led-running = &led_status_green;
  16                 led-upgrade = &led_status_green;
  17                 label-mac-device = &gmac0;
  18         };
  19
  20         chosen {
  21                 stdout-path = "serial0:115200n8";
  22                 bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 loglevel=8";
  23         };
  24
  25         memory {
  26                 reg = <0 0x40000000 0 0x40000000>;
  27         };
  28
  29         gpio-keys {
  30                 compatible = "gpio-keys";
  31
  32                 button-reset {
  33                         label = "reset";
  34                         linux,code = <KEY_RESTART>;
  35                         gpios = <&pio 1 GPIO_ACTIVE_LOW>;
  36                 };
  37
  38                 button-mesh {
  39                         label = "mesh";
  40                         linux,code = <BTN_0>;
  41                         gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
  42                 };
  43
  44                 button-hub {
  45                         label = "hub";
  46                         linux,code = <BTN_1>;
  47                         gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
  48                 };
  49         };
  50
  51         leds {
  52                 compatible = "gpio-leds";
  53
  54                 led_status_red: red {
  55                         label = "red:status";
  56                         gpios = <&pio 9 GPIO_ACTIVE_HIGH>;
  57                         color = <LED_COLOR_ID_RED>;
  58                         function = LED_FUNCTION_STATUS;
  59                 };
  60
  61                 led_status_green: green {
  62                         label = "green:status";
  63                         gpios = <&pio 10 GPIO_ACTIVE_LOW>;
  64                         color = <LED_COLOR_ID_GREEN>;
  65                         function = LED_FUNCTION_STATUS;
  66                 };
  67
  68                 blue {
  69                         label = "blue:status";
  70                         gpios = <&pio 11 GPIO_ACTIVE_LOW>;
  71                         color = <LED_COLOR_ID_BLUE>;
  72                         function = LED_FUNCTION_STATUS;
  73                 };
  74
  75                 4g {
  76                         label = "blue:4g";
  77                         gpios = <&pio 8 GPIO_ACTIVE_LOW>;
  78                         color = <LED_COLOR_ID_BLUE>;
  79                         function = LED_FUNCTION_USB;
  80                         function-enumerator = <0>;
  81                 };
  82
  83                 4g2 {
  84                         label = "blue:4g2";
  85                         gpios = <&pio 14 GPIO_ACTIVE_LOW>;
  86                         color = <LED_COLOR_ID_BLUE>;
  87                         function = LED_FUNCTION_USB;
  88                         function-enumerator = <1>;
  89                 };
  90         };
  91
  92         watchdog {
  93                 compatible = "linux,wdt-gpio";
  94                 gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
  95                 hw_algo = "toggle";
  96                 hw_margin_ms = <1000>;
  97         };
  98
  99         gpio-export {
 100                 compatible = "gpio-export";
 101                 #size-cells = <0>;
 102
 103                 pcie {
 104                         gpio-export,name = "pcie_power";
 105                         gpio-export,output = <1>;
 106                         gpios = <&pio 3 GPIO_ACTIVE_HIGH>;
 107                 };
 108
 109                 5g1 {
 110                         gpio-export,name = "5g1";
 111                         gpio-export,output = <1>;
 112                         gpios = <&pio 4 GPIO_ACTIVE_HIGH>;
 113                 };
 114
 115                 5g2 {
 116                         gpio-export,name = "5g2";
 117                         gpio-export,output = <1>;
 118                         gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
 119                 };
 120
 121                 sim1 {
 122                         gpio-export,name = "sim1";
 123                         gpio-export,output = <1>;
 124                         gpios = <&pio 6 GPIO_ACTIVE_HIGH>;
 125                 };
 126
 127                 sim2 {
 128                         gpio-export,name = "sim2";
 129                         gpio-export,output = <1>;
 130                         gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
 131                 };
 132         };
 133 };
 134
 135 &eth {
 136         status = "okay";
 137
 138         gmac0: mac@0 {
 139                 /* LAN */
 140                 compatible = "mediatek,eth-mac";
 141                 reg = <0>;
 142                 phy-mode = "2500base-x";
 143
 144                 nvmem-cell-names = "mac-address";
 145                 nvmem-cells = <&macaddr_factory_4 2>;
 146
 147                 fixed-link {
 148                         speed = <2500>;
 149                         full-duplex;
 150                         pause;
 151                 };
 152         };
 153
 154         gmac1: mac@1 {
 155                 /* WAN */
 156                 compatible = "mediatek,eth-mac";
 157                 reg = <1>;
 158                 phy-mode = "gmii";
 159                 phy-handle = <&int_gbe_phy>;
 160
 161                 nvmem-cell-names = "mac-address";
 162                 nvmem-cells = <&macaddr_factory_4 3>;
 163         };
 164 };
 165
 166 &mdio_bus {
 167         switch: switch@1f {
 168                 compatible = "mediatek,mt7531";
 169                 reg = <0x1f>;
 170                 reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
 171                 interrupt-controller;
 172                 #interrupt-cells = <1>;
 173                 interrupt-parent = <&pio>;
 174                 interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
 175         };
 176 };
 177
 178 &spi0 {
 179         pinctrl-names = "default";
 180         pinctrl-0 = <&spi0_flash_pins>;
 181         status = "okay";
 182
 183         spi_nand@0 {
 184                 compatible = "spi-nand";
 185                 #address-cells = <1>;
 186                 #size-cells = <1>;
 187                 reg = <0>;
 188
 189                 spi-max-frequency = <52000000>;
 190                 spi-tx-bus-width = <4>;
 191                 spi-rx-bus-width = <4>;
 192
 193                 mediatek,nmbm;
 194                 mediatek,bmt-max-ratio = <1>;
 195                 mediatek,bmt-max-reserved-blocks = <64>;
 196
 197                 partitions {
 198                         compatible = "fixed-partitions";
 199                         #address-cells = <1>;
 200                         #size-cells = <1>;
 201
 202                         partition@0 {
 203                                 label = "bl2";
 204                                 reg = <0x0000000 0x0100000>;
 205                                 read-only;
 206                         };
 207
 208                         partition@100000 {
 209                                 label = "u-boot-env";
 210                                 reg = <0x100000 0x80000>;
 211                         };
 212
 213                         partition@180000 {
 214                                 label = "Factory";
 215                                 reg = <0x180000 0x200000>;
 216                                 read-only;
 217
 218                                 nvmem-layout {
 219                                         compatible = "fixed-layout";
 220                                         #address-cells = <1>;
 221                                         #size-cells = <1>;
 222
 223                                         eeprom_factory: eeprom@0 {
 224                                                 reg = <0x0 0x1000>;
 225                                         };
 226
 227                                         macaddr_factory_4: macaddr@4 {
 228                                                 compatible = "mac-base";
 229                                                 reg = <0x4 0x6>;
 230                                                 #nvmem-cell-cells = <1>;
 231                                         };
 232                                 };
 233                         };
 234
 235                         partition@380000 {
 236                                 label = "FIP";
 237                                 reg = <0x380000 0x200000>;
 238                                 read-only;
 239                         };
 240
 241                         partition@580000 {
 242                                 label = "ubi";
 243                                 reg = <0x580000 0x4000000>;
 244                         };
 245                 };
 246         };
 247 };
 248
 249 &switch {
 250         ports {
 251                 #address-cells = <1>;
 252                 #size-cells = <0>;
 253
 254                 port@0 {
 255                         reg = <0>;
 256                         label = "lan1";
 257                 };
 258
 259                 port@1 {
 260                         reg = <1>;
 261                         label = "lan2";
 262                 };
 263
 264                 port@2 {
 265                         reg = <2>;
 266                         label = "lan3";
 267                 };
 268
 269                 port@3 {
 270                         reg = <3>;
 271                         label = "lan4";
 272                 };
 273
 274                 port@6 {
 275                         reg = <6>;
 276                         label = "cpu";
 277                         ethernet = <&gmac0>;
 278                         phy-mode = "2500base-x";
 279
 280                         fixed-link {
 281                                 speed = <2500>;
 282                                 full-duplex;
 283                                 pause;
 284                         };
 285                 };
 286         };
 287 };
 288
 289 &pio {
 290         spi0_flash_pins: spi0-pins {
 291                 mux {
 292                         function = "spi";
 293                         groups = "spi0", "spi0_wp_hold";
 294                 };
 295
 296                 conf-pu {
 297                         pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
 298                         drive-strength = <8>;
 299                         bias-pull-up = <103>;
 300                 };
 301
 302                 conf-pd {
 303                         pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
 304                         drive-strength = <8>;
 305                         bias-pull-down = <103>;
 306                 };
 307         };
 308 };
 309
 310 &uart0 {
 311         status = "okay";
 312 };
 313
 314 &watchdog {
 315         status = "okay";
 316 };
 317
 318 &usb_phy {
 319         status = "okay";
 320 };
 321
 322 &xhci {
 323         status = "okay";
 324 };
 325
 326 &wifi {
 327         status = "okay";
 328
 329         nvmem-cells = <&eeprom_factory>;
 330         nvmem-cell-names = "eeprom";
 331 };