target/linux/mediatek/dts/mt7981a-glinet-gl-x3000-xe3000-common.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 /dts-v1/;
   4
   5 #include "mt7981.dtsi"
   6
   7 / {
   8         chosen {
   9                 bootargs = "console=ttyS0,115200n8 root=PARTLABEL=rootfs rootwait";
  10         };
  11
  12         aliases {
  13                 label-mac-device = &gmac0;
  14                 led-boot = &led_power;
  15                 led-failsafe = &led_power;
  16                 led-running = &led_power;
  17                 led-upgrade = &led_power;
  18         };
  19
  20         reg_5v: regulator-5v {
  21                 compatible = "regulator-fixed";
  22                 regulator-name = "fixed-5V";
  23                 regulator-min-microvolt = <5000000>;
  24                 regulator-max-microvolt = <5000000>;
  25                 regulator-boot-on;
  26                 regulator-always-on;
  27         };
  28
  29         fan_5v: regulator-fan-5v {
  30                 compatible = "regulator-fixed";
  31                 regulator-name = "fan";
  32                 regulator-min-microvolt = <5000000>;
  33                 regulator-max-microvolt = <5000000>;
  34                 gpio = <&pio 28 GPIO_ACTIVE_HIGH>;
  35                 enable-active-high;
  36         };
  37
  38         gpio-keys {
  39                 compatible = "gpio-keys";
  40
  41                 reset {
  42                         label = "reset";
  43                         linux,code = <KEY_RESTART>;
  44                         gpios = <&pio 1 GPIO_ACTIVE_LOW>;
  45                 };
  46         };
  47
  48         gpio-export {
  49                 compatible = "gpio-export";
  50
  51                 hub_power {
  52                         gpio-export,name = "hub_power";
  53                         gpio-export,output = <1>;
  54                         gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
  55                 };
  56
  57                 5G_power {
  58                         gpio-export,name = "5G_power";
  59                         gpio-export,output = <1>;
  60                         gpios = <&pio 11 GPIO_ACTIVE_HIGH>;
  61                 };
  62
  63                 5G_control {
  64                         gpio-export,name = "5G_control";
  65                         gpio-export,output = <1>;
  66                         gpios = <&pio 9 GPIO_ACTIVE_HIGH>;
  67                 };
  68
  69                 5G_reset {
  70                         gpio-export,name = "5G_reset";
  71                         gpio-export,output = <0>;
  72                         gpios = <&pio 10 GPIO_ACTIVE_HIGH>;
  73                 };
  74         };
  75
  76         leds {
  77                 compatible = "gpio-leds";
  78
  79                 wifi2g {
  80                         label = "green:wifi2g";
  81                         gpios = <&pio 30 GPIO_ACTIVE_LOW>;
  82                 };
  83
  84                 wifi5g {
  85                         label = "green:wifi5g";
  86                         gpios = <&pio 38 GPIO_ACTIVE_LOW>;
  87                 };
  88
  89                 5g_led1 {
  90                         label = "green:5g:led1";
  91                         gpios = <&pio 6 GPIO_ACTIVE_LOW>;
  92                 };
  93
  94                 5g_led2 {
  95                         label = "green:5g:led2";
  96                         gpios = <&pio 7 GPIO_ACTIVE_LOW>;
  97                 };
  98
  99                 5g_led3 {
 100                         label = "green:5g:led3";
 101                         gpios = <&pio 8 GPIO_ACTIVE_LOW>;
 102                 };
 103
 104                 5g_led4 {
 105                         label = "green:5g:led4";
 106                         gpios = <&pio 4 GPIO_ACTIVE_HIGH>;
 107                 };
 108
 109                 led_power: power {
 110                         label = "green:power";
 111                         gpios = <&pio 39 GPIO_ACTIVE_LOW>;
 112                 };
 113
 114                 wan {
 115                         label = "green:wan";
 116                         gpios = <&pio 31 GPIO_ACTIVE_LOW>;
 117                 };
 118         };
 119 };
 120
 121 &uart0 {
 122         status = "okay";
 123 };
 124
 125 &watchdog {
 126         status = "okay";
 127 };
 128
 129 &mmc0 {
 130         pinctrl-names = "default", "state_uhs";
 131         pinctrl-0 = <&mmc0_pins_default>;
 132         pinctrl-1 = <&mmc0_pins_uhs>;
 133         bus-width = <8>;
 134         max-frequency = <52000000>;
 135         cap-mmc-highspeed;
 136         vmmc-supply = <&reg_3p3v>;
 137         non-removable;
 138         status = "okay";
 139
 140         card@0 {
 141                 compatible = "mmc-card";
 142                 reg = <0>;
 143
 144                 block {
 145                         compatible = "block-device";
 146                         partitions {
 147                                 block-partition-env {
 148                                         partname = "u-boot-env";
 149
 150                                         nvmem-layout {
 151                                                 compatible = "u-boot,env-layout";
 152                                         };
 153                                 };
 154
 155                                 block-partition-factory {
 156                                         partname = "factory";
 157
 158                                         nvmem-layout {
 159                                                 compatible = "fixed-layout";
 160                                                 #address-cells = <1>;
 161                                                 #size-cells = <1>;
 162
 163                                                 eeprom_factory_0: eeprom@0 {
 164                                                         reg = <0x0 0x1000>;
 165                                                 };
 166
 167                                                 macaddr_factory_a: macaddr@a {
 168                                                         compatible = "mac-base";
 169                                                         reg = <0xa 0x6>;
 170                                                         #nvmem-cell-cells = <1>;
 171                                                 };
 172                                         };
 173                                 };
 174                         };
 175                 };
 176         };
 177 };
 178
 179 &mdio_bus {
 180         reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>;
 181         reset-delay-us = <600>;
 182         reset-post-delay-us = <20000>;
 183
 184         phy5: ethernet-phy@5 {
 185                 reg = <5>;
 186                 compatible = "ethernet-phy-ieee802.3-c45";
 187         };
 188 };
 189
 190 &eth {
 191         status = "okay";
 192
 193         gmac0: mac@0 {
 194                 compatible = "mediatek,eth-mac";
 195                 reg = <0>;
 196                 phy-mode = "2500base-x";
 197                 phy-handle = <&phy5>;
 198                 nvmem-cells = <&macaddr_factory_a 0>;
 199                 nvmem-cell-names = "mac-address";
 200         };
 201
 202         gmac1: mac@1 {
 203                 compatible = "mediatek,eth-mac";
 204                 reg = <1>;
 205                 phy-mode = "gmii";
 206                 phy-handle = <&int_gbe_phy>;
 207                 nvmem-cells = <&macaddr_factory_a 1>;
 208                 nvmem-cell-names = "mac-address";
 209         };
 210 };
 211
 212 &pio {
 213         mmc0_pins_default: mmc0-pins-default {
 214                 mux {
 215                         function = "flash";
 216                         groups = "emmc_8";
 217                 };
 218         };
 219         mmc0_pins_uhs: mmc0-pins-uhs {
 220                 mux {
 221                         function = "flash";
 222                         groups = "emmc_8";
 223                 };
 224         };
 225         pcie_pins: pcie-pins {
 226                 mux {
 227                         function = "pcie";
 228                         groups = "pcie_pereset", "pcie_clk", "pcie_wake";
 229                 };
 230         };
 231         pwm0_pin: pwm0-pin-g0 {
 232                 mux {
 233                         function = "pwm";
 234                         groups = "pwm0_1";
 235                 };
 236         };
 237 };
 238
 239 &xhci {
 240         phys = <&u2port0 PHY_TYPE_USB2>;
 241         vbus-supply = <&reg_5v>;
 242         mediatek,u3p-dis-msk = <0x01>;
 243         status = "okay";
 244 };
 245
 246 &usb_phy {
 247         status = "okay";
 248 };
 249
 250 &pcie {
 251         pinctrl-names = "default";
 252         pinctrl-0 = <&pcie_pins>;
 253         status = "okay";
 254 };
 255
 256 &pwm {
 257         pinctrl-names = "default";
 258         pinctrl-0 = <&pwm0_pin>;
 259 };
 260
 261 &wifi {
 262         nvmem-cells = <&eeprom_factory_0>;
 263         nvmem-cell-names = "eeprom";
 264         status = "okay";
 265 };
 266
 267 &fan {
 268         pwms = <&pwm 0 40000 0>;
 269         fan-supply = <&fan_5v>;
 270         interrupt-parent = <&pio>;
 271         interrupts = <29 IRQ_TYPE_EDGE_RISING>;
 272         status = "okay";
 273 };