lantiq: convert to new LED color/function format where possible
[openwrt/staging/robimarko.git] / target / linux / lantiq / files / arch / mips / boot / dts / lantiq / vr9_avm_fritzxx90.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "vr9.dtsi"
4
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
8
9 / {
10 chosen {
11 bootargs = "console=ttyLTQ0,115200";
12 };
13
14 memory@0 {
15 device_type = "memory";
16 reg = <0x0 0x10000000>;
17 };
18
19 aliases: aliases {
20 led-boot = &led_power_green;
21 led-failsafe = &led_info_red;
22 led-running = &led_power_green;
23 led-upgrade = &led_info_red;
24 };
25
26 keys {
27 compatible = "gpio-keys-polled";
28 poll-interval = <100>;
29
30 power {
31 label = "power";
32 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
33 linux,code = <KEY_POWER>;
34 };
35
36 wifi {
37 label = "wifi";
38 gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
39 linux,code = <KEY_RFKILL>;
40 };
41 };
42
43 leds: leds {
44 compatible = "gpio-leds";
45
46 led_power_green: power_green {
47 function = LED_FUNCTION_POWER;
48 color = <LED_COLOR_ID_GREEN>;
49 gpios = <&gpio 45 GPIO_ACTIVE_LOW>;
50 default-state = "keep";
51 };
52
53 led_info_green: info_green {
54 label = "green:info";
55 gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
56 };
57
58 led_info_red: info_red {
59 label = "red:info";
60 gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
61 };
62 };
63 };
64
65 &gphy0 {
66 lantiq,gphy-mode = <GPHY_MODE_GE>;
67 };
68
69 &gphy1 {
70 lantiq,gphy-mode = <GPHY_MODE_GE>;
71 };
72
73 &gpio {
74 pinctrl-names = "default";
75 pinctrl-0 = <&state_default>;
76 gpio-ranges = <&gpio 0 0 56>;
77
78 state_default: pinmux {
79 phy-rst {
80 lantiq,pins = "io32", "io44";
81 lantiq,pull = <0>;
82 lantiq,open-drain;
83 lantiq,output = <1>;
84 };
85
86 pcie-rst {
87 lantiq,pins = "io21";
88 lantiq,open-drain;
89 lantiq,output = <1>;
90 };
91 };
92
93 usb-vbus {
94 gpio-hog;
95 line-name = "usb-vbus";
96 gpios = <14 GPIO_ACTIVE_HIGH>;
97 output-high;
98 };
99
100 pcie-enable-dev {
101 gpio-hog;
102 line-name = "pcie-enable-dev";
103 gpios = <22 GPIO_ACTIVE_LOW>;
104 output-low;
105 };
106 };
107
108 &gswip {
109 pinctrl-0 = <&mdio_pins>;
110 pinctrl-names = "default";
111 };
112
113 &spi {
114 status = "okay";
115
116 flash@4 {
117 compatible = "jedec,spi-nor";
118 reg = <4>;
119 spi-max-frequency = <10000000>;
120
121 partitions {
122 compatible = "fixed-partitions";
123 #address-cells = <1>;
124 #size-cells = <1>;
125
126 urlader: partition@0 {
127 reg = <0x0 0x40000>;
128 label = "urlader";
129 read-only;
130 };
131
132 partition@40000 {
133 reg = <0x40000 0x60000>;
134 label = "tffs (1)";
135 read-only;
136 };
137
138 partition@a0000 {
139 reg = <0xa0000 0x60000>;
140 label = "tffs (2)";
141 read-only;
142 };
143 };
144 };
145 };
146
147 &localbus {
148 nand1: nand@1 {
149 compatible = "lantiq,nand-xway";
150 bank-width = <2>;
151 reg = <0x1 0x0 0x2000000>;
152
153 partitions {
154 compatible = "fixed-partitions";
155 #address-cells = <1>;
156 #size-cells = <1>;
157
158 partition@0 {
159 label = "kernel";
160 reg = <0x0 0x400000>;
161 };
162
163 partition@400000 {
164 label = "ubi";
165 reg = <0x400000 0x1fc00000>;
166 };
167 };
168 };
169 };
170
171 &pcie0 {
172 status = "okay";
173
174 gpio-reset = <&gpio 21 GPIO_ACTIVE_LOW>;
175 lantiq,switch-pcie-endianess;
176 };