target/linux/jh71x0/patches-6.1/0086-soc-starfive-Add-JH7110-AON-PMU-support.patch

   1 From 8ce000aa0be7755036ab4c674002920846889f2d Mon Sep 17 00:00:00 2001
   2 From: Changhuang Liang <changhuang.liang@starfivetech.com>
   3 Date: Thu, 18 May 2023 23:02:02 -0700
   4 Subject: [PATCH 086/129] soc: starfive: Add JH7110 AON PMU support
   5
   6 Add AON PMU for StarFive JH7110 SoC. It can be used to turn on/off the
   7 dphy rx/tx power switch.
   8
   9 Reviewed-by: Walker Chen <walker.chen@starfivetech.com>
  10 Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
  11 ---
  12  drivers/soc/starfive/jh71xx_pmu.c | 57 ++++++++++++++++++++++++++++---
  13  1 file changed, 52 insertions(+), 5 deletions(-)
  14
  15 diff --git a/drivers/soc/starfive/jh71xx_pmu.c b/drivers/soc/starfive/jh71xx_pmu.c
  16 index 0dbdcc0d2..c7b474409 100644
  17 --- a/drivers/soc/starfive/jh71xx_pmu.c
  18 +++ b/drivers/soc/starfive/jh71xx_pmu.c
  19 @@ -2,7 +2,7 @@
  20  /*
  21   * StarFive JH71XX PMU (Power Management Unit) Controller Driver
  22   *
  23 - * Copyright (C) 2022 StarFive Technology Co., Ltd.
  24 + * Copyright (C) 2022-2023 StarFive Technology Co., Ltd.
  25   */
  26
  27  #include <linux/interrupt.h>
  28 @@ -24,6 +24,9 @@
  29  #define JH71XX_PMU_EVENT_STATUS                0x88
  30  #define JH71XX_PMU_INT_STATUS          0x8C
  31
  32 +/* aon pmu register offset */
  33 +#define JH71XX_AON_PMU_SWITCH          0x00
  34 +
  35  /* sw encourage cfg */
  36  #define JH71XX_PMU_SW_ENCOURAGE_EN_LO  0x05
  37  #define JH71XX_PMU_SW_ENCOURAGE_EN_HI  0x50
  38 @@ -160,6 +163,26 @@ static int jh7110_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
  39         return 0;
  40  }
  41
  42 +static int jh7110_aon_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
  43 +{
  44 +       struct jh71xx_pmu *pmu = pmd->pmu;
  45 +       unsigned long flags;
  46 +       u32 val;
  47 +
  48 +       spin_lock_irqsave(&pmu->lock, flags);
  49 +       val = readl(pmu->base + JH71XX_AON_PMU_SWITCH);
  50 +
  51 +       if (on)
  52 +               val |= mask;
  53 +       else
  54 +               val &= ~mask;
  55 +
  56 +       writel(val, pmu->base + JH71XX_AON_PMU_SWITCH);
  57 +       spin_unlock_irqrestore(&pmu->lock, flags);
  58 +
  59 +       return 0;
  60 +}
  61 +
  62  static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
  63  {
  64         struct jh71xx_pmu *pmu = pmd->pmu;
  65 @@ -317,10 +340,12 @@ static int jh71xx_pmu_probe(struct platform_device *pdev)
  66         if (!match_data)
  67                 return -EINVAL;
  68
  69 -       ret = match_data->pmu_parse_irq(pdev, pmu);
  70 -       if (ret) {
  71 -               dev_err(dev, "failed to parse irq\n");
  72 -               return ret;
  73 +       if (match_data->pmu_parse_irq) {
  74 +               ret = match_data->pmu_parse_irq(pdev, pmu);
  75 +               if (ret) {
  76 +                       dev_err(dev, "failed to parse irq\n");
  77 +                       return ret;
  78 +               }
  79         }
  80
  81         pmu->genpd = devm_kcalloc(dev, match_data->num_domains,
  82 @@ -394,10 +419,31 @@ static const struct jh71xx_pmu_match_data jh7110_pmu = {
  83         .pmu_set_state = jh7110_pmu_set_state,
  84  };
  85
  86 +static const struct jh71xx_domain_info jh7110_aon_power_domains[] = {
  87 +       [JH7110_PD_DPHY_TX] = {
  88 +               .name = "DPHY-TX",
  89 +               .bit = 30,
  90 +       },
  91 +       [JH7110_PD_DPHY_RX] = {
  92 +               .name = "DPHY-RX",
  93 +               .bit = 31,
  94 +       },
  95 +};
  96 +
  97 +static const struct jh71xx_pmu_match_data jh7110_aon_pmu = {
  98 +       .num_domains = ARRAY_SIZE(jh7110_aon_power_domains),
  99 +       .domain_info = jh7110_aon_power_domains,
 100 +       .pmu_status = JH71XX_AON_PMU_SWITCH,
 101 +       .pmu_set_state = jh7110_aon_pmu_set_state,
 102 +};
 103 +
 104  static const struct of_device_id jh71xx_pmu_of_match[] = {
 105         {
 106                 .compatible = "starfive,jh7110-pmu",
 107                 .data = (void *)&jh7110_pmu,
 108 +       }, {
 109 +               .compatible = "starfive,jh7110-aon-syscon",
 110 +               .data = (void *)&jh7110_aon_pmu,
 111         }, {
 112                 /* sentinel */
 113         }
 114 @@ -414,5 +460,6 @@ static struct platform_driver jh71xx_pmu_driver = {
 115  builtin_platform_driver(jh71xx_pmu_driver);
 116
 117  MODULE_AUTHOR("Walker Chen <walker.chen@starfivetech.com>");
 118 +MODULE_AUTHOR("Changhuang Liang <changhuang.liang@starfivetech.com>");
 119  MODULE_DESCRIPTION("StarFive JH71XX PMU Driver");
 120  MODULE_LICENSE("GPL");
 121 --
 122 2.25.1
 123