target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-le1.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/soc/qcom,tcsr.h>
   7
   8 / {
   9         model = "YYeTs LE1";
  10         compatible = "yyets,le1";
  11
  12         aliases {
  13                 led-boot = &led_usb;
  14                 led-failsafe = &led_usb;
  15                 led-upgrade = &led_usb;
  16
  17                 ethernet0 = &swport5;
  18                 ethernet1 = &gmac;
  19                 label-mac-device = &gmac;
  20         };
  21
  22         keys {
  23                 compatible = "gpio-keys";
  24
  25                 reset {
  26                         label = "reset";
  27                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
  28                         linux,code = <KEY_RESTART>;
  29                 };
  30         };
  31
  32         leds {
  33                 compatible = "gpio-leds";
  34
  35                 led_usb: usb {
  36                         label = "green:usb";
  37                         gpios = <&tlmm 36 GPIO_ACTIVE_LOW>;
  38                         linux,default-trigger = "usbport";
  39                         trigger-sources = <&usb3_port1>, <&usb3_port2>, <&usb2_port1>;
  40                 };
  41
  42                 wlan2g {
  43                         label = "green:wlan2g";
  44                         gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
  45                         linux,default-trigger = "phy0tpt";
  46                 };
  47
  48                 wlan5g {
  49                         label = "green:wlan5g";
  50                         gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
  51                         linux,default-trigger = "phy1tpt";
  52                 };
  53         };
  54
  55         soc {
  56                 tcsr@1949000 {
  57                         compatible = "qcom,tcsr";
  58                         reg = <0x1949000 0x100>;
  59                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  60                 };
  61
  62                 tcsr@194b000 {
  63                         compatible = "qcom,tcsr";
  64                         reg = <0x194b000 0x100>;
  65                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  66                 };
  67
  68                 ess_tcsr@1953000 {
  69                         compatible = "qcom,tcsr";
  70                         reg = <0x1953000 0x1000>;
  71                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  72                 };
  73
  74                 tcsr@1957000 {
  75                         compatible = "qcom,tcsr";
  76                         reg = <0x1957000 0x100>;
  77                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  78                 };
  79         };
  80 };
  81
  82 &blsp_dma {
  83         status = "okay";
  84 };
  85
  86 &blsp1_spi1 {
  87         cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
  88         pinctrl-0 = <&spi_0_pins>;
  89         pinctrl-names = "default";
  90         status = "okay";
  91
  92         flash@0 {
  93                 compatible = "jedec,spi-nor";
  94                 #address-cells = <1>;
  95                 #size-cells = <1>;
  96                 reg = <0>;
  97                 spi-max-frequency = <24000000>;
  98
  99                 partitions {
 100                         compatible = "fixed-partitions";
 101                         #address-cells = <1>;
 102                         #size-cells = <1>;
 103
 104                         partition@0 {
 105                                 label = "SBL1";
 106                                 reg = <0x0 0x40000>;
 107                                 read-only;
 108                         };
 109
 110                         partition@40000 {
 111                                 label = "MIBIB";
 112                                 reg = <0x40000 0x20000>;
 113                                 read-only;
 114                         };
 115
 116                         partition@60000 {
 117                                 label = "QSEE";
 118                                 reg = <0x60000 0x60000>;
 119                                 read-only;
 120                         };
 121
 122                         partition@c0000 {
 123                                 label = "CDT";
 124                                 reg = <0xc0000 0x10000>;
 125                                 read-only;
 126                         };
 127
 128                         partition@d0000 {
 129                                 label = "DDRPARAMS";
 130                                 reg = <0xd0000 0x10000>;
 131                                 read-only;
 132                         };
 133
 134                         partition@e0000 {
 135                                 label = "APPSBLENV";
 136                                 reg = <0xe0000 0x10000>;
 137                                 read-only;
 138                         };
 139
 140                         partition@f0000 {
 141                                 label = "APPSBL";
 142                                 reg = <0xf0000 0x80000>;
 143                                 read-only;
 144                         };
 145
 146                         partition@170000 {
 147                                 label = "ART";
 148                                 reg = <0x170000 0x10000>;
 149                                 read-only;
 150
 151                                 compatible = "nvmem-cells";
 152                                 #address-cells = <1>;
 153                                 #size-cells = <1>;
 154
 155                                 precal_art_1000: precal@1000 {
 156                                         reg = <0x1000 0x2f20>;
 157                                 };
 158
 159                                 precal_art_5000: precal@5000 {
 160                                         reg = <0x5000 0x2f20>;
 161                                 };
 162                         };
 163
 164                         partition@180000 {
 165                                 compatible = "denx,fit";
 166                                 label = "firmware";
 167                                 reg = <0x180000 0x1e80000>;
 168                         };
 169                 };
 170         };
 171 };
 172
 173 &blsp1_uart1 {
 174         pinctrl-0 = <&serial_pins>;
 175         pinctrl-names = "default";
 176         status = "okay";
 177 };
 178
 179 &cryptobam {
 180         status = "okay";
 181 };
 182
 183 &crypto {
 184         status = "okay";
 185 };
 186
 187 &gmac {
 188         status = "okay";
 189 };
 190
 191 &mdio {
 192         pinctrl-0 = <&mdio_pins>;
 193         pinctrl-names = "default";
 194         status = "okay";
 195 };
 196
 197 &prng {
 198         status = "okay";
 199 };
 200
 201 &switch {
 202         status = "okay";
 203 };
 204
 205 &swport1 {
 206         status = "okay";
 207 };
 208
 209 &swport2 {
 210         status = "okay";
 211 };
 212
 213 &swport3 {
 214         status = "okay";
 215 };
 216
 217 &swport4 {
 218         status = "okay";
 219 };
 220
 221 &swport5 {
 222         status = "okay";
 223 };
 224
 225 &tlmm {
 226         mdio_pins: mdio_pinmux {
 227                 mux_1 {
 228                         pins = "gpio6";
 229                         function = "mdio";
 230                         bias-pull-up;
 231                 };
 232                 mux_2 {
 233                         pins = "gpio7";
 234                         function = "mdc";
 235                         bias-pull-up;
 236                 };
 237         };
 238
 239         serial_pins: serial_pinmux {
 240                 mux {
 241                         pins = "gpio16", "gpio17";
 242                         function = "blsp_uart0";
 243                         bias-disable;
 244                 };
 245         };
 246
 247         spi_0_pins: spi_0_pinmux {
 248                 pinmux {
 249                         function = "blsp_spi0";
 250                         pins = "gpio13", "gpio14", "gpio15";
 251                         drive-strength = <12>;
 252                         bias-disable;
 253                 };
 254
 255                 pinmux_cs {
 256                         function = "gpio";
 257                         pins = "gpio12";
 258                         drive-strength = <2>;
 259                         bias-disable;
 260                         output-high;
 261                 };
 262         };
 263 };
 264
 265 &usb2 {
 266         status = "okay";
 267
 268         dwc3@6000000 {
 269                 #address-cells = <1>;
 270                 #size-cells = <0>;
 271
 272                 usb2_port1: port@1 {
 273                         reg = <1>;
 274                         #trigger-source-cells = <0>;
 275                 };
 276         };
 277 };
 278
 279 &usb2_hs_phy {
 280         status = "okay";
 281 };
 282
 283 &usb3 {
 284         status = "okay";
 285
 286         dwc3@8a00000 {
 287                 #address-cells = <1>;
 288                 #size-cells = <0>;
 289
 290                 usb3_port1: port@1 {
 291                         reg = <1>;
 292                         #trigger-source-cells = <0>;
 293                 };
 294
 295                 usb3_port2: port@2 {
 296                         reg = <2>;
 297                         #trigger-source-cells = <0>;
 298                 };
 299         };
 300 };
 301
 302 &usb3_hs_phy {
 303         status = "okay";
 304 };
 305
 306 &usb3_ss_phy {
 307         status = "okay";
 308 };
 309
 310 &watchdog {
 311         status = "okay";
 312 };
 313
 314 &wifi0 {
 315         status = "okay";
 316         nvmem-cells = <&precal_art_1000>;
 317         nvmem-cell-names = "pre-calibration";
 318         qcom,ath10k-calibration-variant = "YYeTs-LE1";
 319 };
 320
 321 &wifi1 {
 322         status = "okay";
 323         nvmem-cells = <&precal_art_5000>;
 324         nvmem-cell-names = "pre-calibration";
 325         qcom,ath10k-calibration-variant = "YYeTs-LE1";
 326 };