ipq40xx: convert to nvmem-layout
[openwrt/staging/wigyori.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4019-cm520-79f.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/soc/qcom,tcsr.h>
7
8 / {
9 model = "MobiPromo CM520-79F";
10 compatible = "mobipromo,cm520-79f";
11
12 aliases {
13 led-boot = &led_sys;
14 led-failsafe = &led_sys;
15 led-running = &led_sys;
16 led-upgrade = &led_sys;
17 };
18
19 soc {
20 rng@22000 {
21 status = "okay";
22 };
23
24 mdio@90000 {
25 status = "okay";
26 pinctrl-0 = <&mdio_pins>;
27 pinctrl-names = "default";
28 reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
29 reset-delay-us = <1000>;
30 };
31
32 tcsr@1949000 {
33 compatible = "qcom,tcsr";
34 reg = <0x1949000 0x100>;
35 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
36 };
37
38 tcsr@194b000 {
39 compatible = "qcom,tcsr";
40 reg = <0x194b000 0x100>;
41 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
42 };
43
44 ess_tcsr@1953000 {
45 compatible = "qcom,tcsr";
46 reg = <0x1953000 0x1000>;
47 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
48 };
49
50 tcsr@1957000 {
51 compatible = "qcom,tcsr";
52 reg = <0x1957000 0x100>;
53 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
54 };
55
56 usb2@60f8800 {
57 status = "okay";
58
59 dwc3@6000000 {
60 #address-cells = <1>;
61 #size-cells = <0>;
62
63 usb2_port1: port@1 {
64 reg = <1>;
65 #trigger-source-cells = <0>;
66 };
67 };
68 };
69
70 usb3@8af8800 {
71 status = "okay";
72
73 dwc3@8a00000 {
74 #address-cells = <1>;
75 #size-cells = <0>;
76
77 usb3_port1: port@1 {
78 reg = <1>;
79 #trigger-source-cells = <0>;
80 };
81
82 usb3_port2: port@2 {
83 reg = <2>;
84 #trigger-source-cells = <0>;
85 };
86 };
87 };
88
89 crypto@8e3a000 {
90 status = "okay";
91 };
92
93 watchdog@b017000 {
94 status = "okay";
95 };
96 };
97
98 led_spi {
99 compatible = "spi-gpio";
100 #address-cells = <1>;
101 #size-cells = <0>;
102
103 sck-gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
104 mosi-gpios = <&tlmm 36 GPIO_ACTIVE_HIGH>;
105 num-chipselects = <0>;
106
107 led_gpio: led_gpio@0 {
108 compatible = "fairchild,74hc595";
109 reg = <0>;
110 gpio-controller;
111 #gpio-cells = <2>;
112 registers-number = <1>;
113 spi-max-frequency = <1000000>;
114 };
115 };
116
117 leds {
118 compatible = "gpio-leds";
119
120 usb {
121 label = "blue:usb";
122 gpios = <&tlmm 10 GPIO_ACTIVE_HIGH>;
123 linux,default-trigger = "usbport";
124 trigger-sources = <&usb3_port1>, <&usb3_port2>, <&usb2_port1>;
125 };
126
127 led_sys: can {
128 label = "blue:can";
129 gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
130 };
131
132 wan {
133 label = "blue:wan";
134 gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>;
135 };
136
137 lan1 {
138 label = "blue:lan1";
139 gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>;
140 };
141
142 lan2 {
143 label = "blue:lan2";
144 gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>;
145 };
146
147 wlan2g {
148 label = "blue:wlan2g";
149 gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>;
150 linux,default-trigger = "phy0tpt";
151 };
152
153 wlan5g {
154 label = "blue:wlan5g";
155 gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
156 linux,default-trigger = "phy1tpt";
157 };
158 };
159
160 keys {
161 compatible = "gpio-keys";
162
163 reset {
164 label = "reset";
165 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
166 linux,code = <KEY_RESTART>;
167 };
168 };
169 };
170
171 &blsp_dma {
172 status = "okay";
173 };
174
175 &blsp1_uart1 {
176 status = "okay";
177 };
178
179 &blsp1_uart2 {
180 status = "okay";
181 };
182
183 &cryptobam {
184 status = "okay";
185 };
186
187 &nand {
188 pinctrl-0 = <&nand_pins>;
189 pinctrl-names = "default";
190 status = "okay";
191
192 nand@0 {
193 partitions {
194 compatible = "fixed-partitions";
195 #address-cells = <1>;
196 #size-cells = <1>;
197
198 partition@0 {
199 label = "SBL1";
200 reg = <0x0 0x100000>;
201 read-only;
202 };
203
204 partition@100000 {
205 label = "MIBIB";
206 reg = <0x100000 0x100000>;
207 read-only;
208 };
209
210 partition@200000 {
211 label = "BOOTCONFIG";
212 reg = <0x200000 0x100000>;
213 };
214
215 partition@300000 {
216 label = "QSEE";
217 reg = <0x300000 0x100000>;
218 read-only;
219 };
220
221 partition@400000 {
222 label = "QSEE_1";
223 reg = <0x400000 0x100000>;
224 read-only;
225 };
226
227 partition@500000 {
228 label = "CDT";
229 reg = <0x500000 0x80000>;
230 read-only;
231 };
232
233 partition@580000 {
234 label = "CDT_1";
235 reg = <0x580000 0x80000>;
236 read-only;
237 };
238
239 partition@600000 {
240 label = "BOOTCONFIG1";
241 reg = <0x600000 0x80000>;
242 };
243
244 partition@680000 {
245 label = "APPSBLENV";
246 reg = <0x680000 0x80000>;
247 };
248
249 partition@700000 {
250 label = "APPSBL";
251 reg = <0x700000 0x200000>;
252 read-only;
253 };
254
255 partition@900000 {
256 label = "APPSBL_1";
257 reg = <0x900000 0x200000>;
258 read-only;
259 };
260
261 art: partition@b00000 {
262 label = "ART";
263 reg = <0xb00000 0x80000>;
264 read-only;
265
266 nvmem-layout {
267 compatible = "fixed-layout";
268 #address-cells = <1>;
269 #size-cells = <1>;
270
271 precal_art_1000: precal@1000 {
272 reg = <0x1000 0x2f20>;
273 };
274
275 macaddr_art_1006: macaddr@1006 {
276 reg = <0x1006 0x6>;
277 };
278
279 precal_art_5000: precal@5000 {
280 reg = <0x5000 0x2f20>;
281 };
282
283 macaddr_art_5006: macaddr@5006 {
284 reg = <0x5006 0x6>;
285 };
286 };
287 };
288
289 partition@b80000 {
290 label = "ubi";
291 reg = <0xb80000 0x7480000>;
292 };
293 };
294 };
295 };
296
297 &qpic_bam {
298 status = "okay";
299 };
300
301 &tlmm {
302 mdio_pins: mdio_pinmux {
303 mux_1 {
304 pins = "gpio6";
305 function = "mdio";
306 bias-pull-up;
307 };
308
309 mux_2 {
310 pins = "gpio7";
311 function = "mdc";
312 bias-pull-up;
313 };
314 };
315
316 nand_pins: nand_pins {
317 pullups {
318 pins = "gpio52", "gpio53", "gpio58",
319 "gpio59";
320 function = "qpic";
321 bias-pull-up;
322 };
323
324 pulldowns {
325 pins = "gpio54", "gpio55", "gpio56",
326 "gpio57", "gpio60", "gpio61",
327 "gpio62", "gpio63", "gpio64",
328 "gpio65", "gpio66", "gpio67",
329 "gpio68", "gpio69";
330 function = "qpic";
331 bias-pull-down;
332 };
333 };
334 };
335
336 &usb3_ss_phy {
337 status = "okay";
338 };
339
340 &usb3_hs_phy {
341 status = "okay";
342 };
343
344 &usb2_hs_phy {
345 status = "okay";
346 };
347
348 &gmac {
349 status = "okay";
350
351 nvmem-cells = <&macaddr_art_1006>;
352 nvmem-cell-names = "mac-address";
353 };
354
355 &switch {
356 status = "okay";
357 };
358
359 &swport3 {
360 status = "okay";
361
362 label = "lan2";
363 };
364
365 &swport4 {
366 status = "okay";
367
368 label = "lan1";
369 };
370
371 &swport5 {
372 status = "okay";
373
374 nvmem-cells = <&macaddr_art_5006>;
375 nvmem-cell-names = "mac-address";
376 };
377
378 &wifi0 {
379 status = "okay";
380 nvmem-cell-names = "pre-calibration";
381 nvmem-cells = <&precal_art_1000>;
382 qcom,ath10k-calibration-variant = "CM520-79F";
383 };
384
385 &wifi1 {
386 status = "okay";
387 nvmem-cell-names = "pre-calibration";
388 nvmem-cells = <&precal_art_5000>;
389 qcom,ath10k-calibration-variant = "CM520-79F";
390 };