target/linux/d1/patches-6.1/0107-drm-panel-Add-driver-for-Clockwork-cwd686-panel.patch

   1 From 5bf84a1a0a282a18bf9dd2d752537525aefc2e05 Mon Sep 17 00:00:00 2001
   2 From: Max Fierke <max@maxfierke.com>
   3 Date: Wed, 1 Jun 2022 00:17:48 -0500
   4 Subject: [PATCH 107/117] drm: panel: Add driver for Clockwork cwd686 panel
   5
   6 The Clockwork DevTerm (all models) uses a 6.86" IPS display
   7 of unknown provenance, which uses the Chipone ICNL9707 IC driver.
   8
   9 The display panel I have has two model numbers: TXW686001 and WTL068601G,
  10 but cannot find any manufacturer associated with either, so opting for the
  11 Clockwork model number.
  12
  13 This driver is based on the GPL-licensed driver released by Clockwork,
  14 authored by Pinfan Zhu, with some additional cleanup, rotation support,
  15 and display sleep re-enabling done by me.
  16
  17 Original driver here for reference: https://github.com/clockworkpi/DevTerm/blob/main/Code/patch/armbian_build_a06/patch/kernel-004-panel.patch
  18 Display IC datasheet provided here: https://github.com/clockworkpi/DevTerm/blob/main/Schematics/ICNL9707_Datasheet.pdf
  19
  20 Signed-off-by: Max Fierke <max@maxfierke.com>
  21 Signed-off-by: Samuel Holland <samuel@sholland.org>
  22 ---
  23  drivers/gpu/drm/panel/Kconfig                 |  12 +
  24  drivers/gpu/drm/panel/Makefile                |   1 +
  25  .../gpu/drm/panel/panel-clockwork-cwd686.c    | 456 ++++++++++++++++++
  26  3 files changed, 469 insertions(+)
  27  create mode 100644 drivers/gpu/drm/panel/panel-clockwork-cwd686.c
  28
  29 diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
  30 index 39d6f2f9cd51..7a76b966f8ec 100644
  31 --- a/drivers/gpu/drm/panel/Kconfig
  32 +++ b/drivers/gpu/drm/panel/Kconfig
  33 @@ -68,6 +68,18 @@ config DRM_PANEL_BOE_TV101WUM_NL6
  34           Say Y here if you want to support for BOE TV101WUM and AUO KD101N80
  35           45NA WUXGA PANEL DSI Video Mode panel
  36
  37 +config DRM_PANEL_CLOCKWORK_CWD686
  38 +       tristate "Clockwork CWD686 panel"
  39 +       depends on OF
  40 +       depends on DRM_MIPI_DSI
  41 +       depends on BACKLIGHT_CLASS_DEVICE
  42 +       help
  43 +         Say Y here if you want to enable support for the Clockwork CWD686
  44 +         ICNL9707-based panel, e.g. as used within the Clockwork DevTerm.
  45 +         The panel has a 480x1280 resolution and uses 24 bit RGB per pixel.
  46 +
  47 +         To compile this driver as a module, choose M here.
  48 +
  49  config DRM_PANEL_DSI_CM
  50         tristate "Generic DSI command mode panels"
  51         depends on OF
  52 diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
  53 index a689956fb3ab..c94344350ed9 100644
  54 --- a/drivers/gpu/drm/panel/Makefile
  55 +++ b/drivers/gpu/drm/panel/Makefile
  56 @@ -5,6 +5,7 @@ obj-$(CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596) += panel-asus-z00t-tm5p5-n35596.
  57  obj-$(CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0) += panel-boe-bf060y8m-aj0.o
  58  obj-$(CONFIG_DRM_PANEL_BOE_HIMAX8279D) += panel-boe-himax8279d.o
  59  obj-$(CONFIG_DRM_PANEL_BOE_TV101WUM_NL6) += panel-boe-tv101wum-nl6.o
  60 +obj-$(CONFIG_DRM_PANEL_CLOCKWORK_CWD686) += panel-clockwork-cwd686.o
  61  obj-$(CONFIG_DRM_PANEL_DSI_CM) += panel-dsi-cm.o
  62  obj-$(CONFIG_DRM_PANEL_LVDS) += panel-lvds.o
  63  obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple.o
  64 diff --git a/drivers/gpu/drm/panel/panel-clockwork-cwd686.c b/drivers/gpu/drm/panel/panel-clockwork-cwd686.c
  65 new file mode 100644
  66 index 000000000000..b1026deb81b2
  67 --- /dev/null
  68 +++ b/drivers/gpu/drm/panel/panel-clockwork-cwd686.c
  69 @@ -0,0 +1,456 @@
  70 +// SPDX-License-Identifier: GPL-2.0+
  71 +/*
  72 + * Copyright (c) 2021 Clockwork Tech LLC
  73 + * Copyright (c) 2021-2022 Max Fierke <max@maxfierke.com>
  74 + *
  75 + * Based on Pinfan Zhu's work on panel-cwd686.c for ClockworkPi's 5.10 BSP
  76 + */
  77 +
  78 +#include <drm/drm_modes.h>
  79 +#include <drm/drm_mipi_dsi.h>
  80 +#include <drm/drm_panel.h>
  81 +#include <linux/backlight.h>
  82 +#include <linux/gpio/consumer.h>
  83 +#include <linux/regulator/consumer.h>
  84 +#include <linux/delay.h>
  85 +#include <linux/of_device.h>
  86 +#include <linux/module.h>
  87 +#include <video/mipi_display.h>
  88 +
  89 +struct cwd686 {
  90 +       struct device *dev;
  91 +       struct drm_panel panel;
  92 +       struct regulator *supply;
  93 +       struct gpio_desc *enable_gpio;
  94 +       struct gpio_desc *reset_gpio;
  95 +       struct backlight_device *backlight;
  96 +       enum drm_panel_orientation orientation;
  97 +       bool prepared;
  98 +       bool enabled;
  99 +};
 100 +
 101 +static const struct drm_display_mode default_mode = {
 102 +       .clock = 54465,
 103 +       .hdisplay = 480,
 104 +       .hsync_start = 480 + 150,
 105 +       .hsync_end = 480 + 150 + 24,
 106 +       .htotal = 480 + 150 + 24 + 40,
 107 +       .vdisplay = 1280,
 108 +       .vsync_start = 1280 + 12,
 109 +       .vsync_end = 1280 + 12 + 6,
 110 +       .vtotal = 1280 + 12 + 6 + 10,
 111 +};
 112 +
 113 +static inline struct cwd686 *panel_to_cwd686(struct drm_panel *panel)
 114 +{
 115 +       return container_of(panel, struct cwd686, panel);
 116 +}
 117 +
 118 +#define ICNL9707_DCS(seq...)                              \
 119 +({                                                              \
 120 +       static const u8 d[] = { seq };                          \
 121 +       mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d));        \
 122 +})
 123 +
 124 +#define ICNL9707_CMD_CGOUTL 0xB3
 125 +#define ICNL9707_CMD_CGOUTR 0xB4
 126 +#define ICNL9707_P_CGOUT_VGL 0x00
 127 +#define ICNL9707_P_CGOUT_VGH 0x01
 128 +#define ICNL9707_P_CGOUT_HZ 0x02
 129 +#define ICNL9707_P_CGOUT_GND 0x03
 130 +#define ICNL9707_P_CGOUT_GSP1 0x04
 131 +#define ICNL9707_P_CGOUT_GSP2 0x05
 132 +#define ICNL9707_P_CGOUT_GSP3 0x06
 133 +#define ICNL9707_P_CGOUT_GSP4 0x07
 134 +#define ICNL9707_P_CGOUT_GSP5 0x08
 135 +#define ICNL9707_P_CGOUT_GSP6 0x09
 136 +#define ICNL9707_P_CGOUT_GSP7 0x0A
 137 +#define ICNL9707_P_CGOUT_GSP8 0x0B
 138 +#define ICNL9707_P_CGOUT_GCK1 0x0C
 139 +#define ICNL9707_P_CGOUT_GCK2 0x0D
 140 +#define ICNL9707_P_CGOUT_GCK3 0x0E
 141 +#define ICNL9707_P_CGOUT_GCK4 0x0F
 142 +#define ICNL9707_P_CGOUT_GCK5 0x10
 143 +#define ICNL9707_P_CGOUT_GCK6 0x11
 144 +#define ICNL9707_P_CGOUT_GCK7 0x12
 145 +#define ICNL9707_P_CGOUT_GCK8 0x13
 146 +#define ICNL9707_P_CGOUT_GCK9 0x14
 147 +#define ICNL9707_P_CGOUT_GCK10 0x15
 148 +#define ICNL9707_P_CGOUT_GCK11 0x16
 149 +#define ICNL9707_P_CGOUT_GCK12 0x17
 150 +#define ICNL9707_P_CGOUT_GCK13 0x18
 151 +#define ICNL9707_P_CGOUT_GCK14 0x19
 152 +#define ICNL9707_P_CGOUT_GCK15 0x1A
 153 +#define ICNL9707_P_CGOUT_GCK16 0x1B
 154 +#define ICNL9707_P_CGOUT_DIR 0x1C
 155 +#define ICNL9707_P_CGOUT_DIRB 0x1D
 156 +#define ICNL9707_P_CGOUT_ECLK_AC 0x1E
 157 +#define ICNL9707_P_CGOUT_ECLK_ACB 0x1F
 158 +#define ICNL9707_P_CGOUT_ECLK_AC2 0x20
 159 +#define ICNL9707_P_CGOUT_ECLK_AC2B 0x21
 160 +#define ICNL9707_P_CGOUT_GCH 0x22
 161 +#define ICNL9707_P_CGOUT_GCL 0x23
 162 +#define ICNL9707_P_CGOUT_XDON 0x24
 163 +#define ICNL9707_P_CGOUT_XDONB 0x25
 164 +
 165 +#define ICNL9707_MADCTL_ML  0x10
 166 +#define ICNL9707_MADCTL_RGB 0x00
 167 +#define ICNL9707_MADCTL_BGR 0x08
 168 +#define ICNL9707_MADCTL_MH  0x04
 169 +
 170 +#define ICNL9707_CMD_PWRCON_VCOM 0xB6
 171 +#define ICNL9707_P_PWRCON_VCOM_0495V 0x0D
 172 +
 173 +#define ICNL9707_CMD_PWRCON_SEQ 0xB7
 174 +#define ICNL9707_CMD_PWRCON_CLK 0xB8
 175 +#define ICNL9707_CMD_PWRCON_BTA 0xB9
 176 +#define ICNL9707_CMD_PWRCON_MODE 0xBA
 177 +#define ICNL9707_CMD_PWRCON_REG 0xBD
 178 +
 179 +#define ICNL9707_CMD_TCON 0xC1
 180 +#define ICNL9707_CMD_TCON2 0xC2
 181 +#define ICNL9707_CMD_TCON3 0xC3
 182 +#define ICNL9707_CMD_SRC_TIM 0xC6
 183 +#define ICNL9707_CMD_SRCCON 0xC7
 184 +#define ICNL9707_CMD_SET_GAMMA 0xC8
 185 +
 186 +#define ICNL9707_CMD_ETC 0xD0
 187 +
 188 +#define ICNL9707_CMD_PASSWORD1 0xF0
 189 +#define ICNL9707_P_PASSWORD1_DEFAULT 0xA5
 190 +#define ICNL9707_P_PASSWORD1_ENABLE_LVL2 0x5A
 191 +
 192 +#define ICNL9707_CMD_PASSWORD2 0xF1
 193 +#define ICNL9707_P_PASSWORD2_DEFAULT 0x5A
 194 +#define ICNL9707_P_PASSWORD2_ENABLE_LVL2 0xA5
 195 +
 196 +static int cwd686_init_sequence(struct cwd686 *ctx)
 197 +{
 198 +       struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
 199 +       int err;
 200 +
 201 +       /* Enable access to Level 2 registers */
 202 +       ICNL9707_DCS(ICNL9707_CMD_PASSWORD1,
 203 +                    ICNL9707_P_PASSWORD1_ENABLE_LVL2,
 204 +                    ICNL9707_P_PASSWORD1_ENABLE_LVL2);
 205 +       ICNL9707_DCS(ICNL9707_CMD_PASSWORD2,
 206 +                    ICNL9707_P_PASSWORD2_ENABLE_LVL2,
 207 +                    ICNL9707_P_PASSWORD2_ENABLE_LVL2);
 208 +
 209 +       /* Set PWRCON_VCOM (-0.495V, -0.495V) */
 210 +       ICNL9707_DCS(ICNL9707_CMD_PWRCON_VCOM,
 211 +                    ICNL9707_P_PWRCON_VCOM_0495V,
 212 +                    ICNL9707_P_PWRCON_VCOM_0495V);
 213 +
 214 +       /* Map ASG output signals */
 215 +       ICNL9707_DCS(ICNL9707_CMD_CGOUTR,
 216 +                    ICNL9707_P_CGOUT_GSP7, ICNL9707_P_CGOUT_GSP5,
 217 +                    ICNL9707_P_CGOUT_GCK7, ICNL9707_P_CGOUT_GCK5,
 218 +                    ICNL9707_P_CGOUT_GCK3, ICNL9707_P_CGOUT_GCK1,
 219 +                    ICNL9707_P_CGOUT_VGL, ICNL9707_P_CGOUT_VGL,
 220 +                    ICNL9707_P_CGOUT_VGL, ICNL9707_P_CGOUT_GND,
 221 +                    ICNL9707_P_CGOUT_VGL, ICNL9707_P_CGOUT_GND,
 222 +                    ICNL9707_P_CGOUT_GND, ICNL9707_P_CGOUT_GND,
 223 +                    ICNL9707_P_CGOUT_GND, ICNL9707_P_CGOUT_GND,
 224 +                    ICNL9707_P_CGOUT_GND, ICNL9707_P_CGOUT_GND,
 225 +                    ICNL9707_P_CGOUT_GSP1, ICNL9707_P_CGOUT_GSP3);
 226 +       ICNL9707_DCS(ICNL9707_CMD_CGOUTL,
 227 +                    ICNL9707_P_CGOUT_GSP8, ICNL9707_P_CGOUT_GSP6,
 228 +                    ICNL9707_P_CGOUT_GCK8, ICNL9707_P_CGOUT_GCK6,
 229 +                    ICNL9707_P_CGOUT_GCK4, ICNL9707_P_CGOUT_GCK2,
 230 +                    ICNL9707_P_CGOUT_VGL, ICNL9707_P_CGOUT_VGL,
 231 +                    ICNL9707_P_CGOUT_VGL, ICNL9707_P_CGOUT_GND,
 232 +                    ICNL9707_P_CGOUT_VGL, ICNL9707_P_CGOUT_GND,
 233 +                    ICNL9707_P_CGOUT_GND, ICNL9707_P_CGOUT_GND,
 234 +                    ICNL9707_P_CGOUT_GND, ICNL9707_P_CGOUT_GND,
 235 +                    ICNL9707_P_CGOUT_GND, ICNL9707_P_CGOUT_GND,
 236 +                    ICNL9707_P_CGOUT_GSP2, ICNL9707_P_CGOUT_GSP4);
 237 +
 238 +       /* Undocumented commands provided by the vendor */
 239 +       ICNL9707_DCS(0xB0, 0x54, 0x32, 0x23, 0x45, 0x44, 0x44, 0x44, 0x44, 0x90, 0x01, 0x90, 0x01);
 240 +       ICNL9707_DCS(0xB1, 0x32, 0x84, 0x02, 0x83, 0x30, 0x01, 0x6B, 0x01);
 241 +       ICNL9707_DCS(0xB2, 0x73);
 242 +
 243 +       ICNL9707_DCS(ICNL9707_CMD_PWRCON_REG,
 244 +                    0x4E, 0x0E, 0x50, 0x50, 0x26,
 245 +                    0x1D, 0x00, 0x14, 0x42, 0x03);
 246 +       ICNL9707_DCS(ICNL9707_CMD_PWRCON_SEQ,
 247 +                    0x01, 0x01, 0x09, 0x11, 0x0D, 0x55,
 248 +                    0x19, 0x19, 0x21, 0x1D, 0x00, 0x00,
 249 +                    0x00, 0x00, 0x02, 0xFF, 0x3C);
 250 +       ICNL9707_DCS(ICNL9707_CMD_PWRCON_CLK, 0x23, 0x01, 0x30, 0x34, 0x63);
 251 +
 252 +       /* Disable abnormal power-off flag */
 253 +       ICNL9707_DCS(ICNL9707_CMD_PWRCON_BTA, 0xA0, 0x22, 0x00, 0x44);
 254 +
 255 +       ICNL9707_DCS(ICNL9707_CMD_PWRCON_MODE, 0x12, 0x63);
 256 +
 257 +       /* Set VBP, VFP, VSW, HBP, HFP, HSW */
 258 +       ICNL9707_DCS(ICNL9707_CMD_TCON, 0x0C, 0x16, 0x04, 0x0C, 0x10, 0x04);
 259 +
 260 +       /* Set resolution */
 261 +       ICNL9707_DCS(ICNL9707_CMD_TCON2, 0x11, 0x41);
 262 +
 263 +       /* Set frame blanking */
 264 +       ICNL9707_DCS(ICNL9707_CMD_TCON3, 0x22, 0x31, 0x04);
 265 +
 266 +       ICNL9707_DCS(ICNL9707_CMD_SRCCON, 0x05, 0x23, 0x6B, 0x49, 0x00);
 267 +
 268 +       /* Another undocumented command */
 269 +       ICNL9707_DCS(0xC5, 0x00);
 270 +
 271 +       ICNL9707_DCS(ICNL9707_CMD_ETC, 0x37, 0xFF, 0xFF);
 272 +
 273 +       /* Another set of undocumented commands */
 274 +       ICNL9707_DCS(0xD2, 0x63, 0x0B, 0x08, 0x88);
 275 +       ICNL9707_DCS(0xD3, 0x01, 0x00, 0x00, 0x01, 0x01, 0x37, 0x25, 0x38, 0x31, 0x06, 0x07);
 276 +
 277 +       /* Set Gamma to 2.2 */
 278 +       ICNL9707_DCS(ICNL9707_CMD_SET_GAMMA,
 279 +                    0x7C, 0x6A, 0x5D, 0x53, 0x53, 0x45, 0x4B,
 280 +                    0x35, 0x4D, 0x4A, 0x49, 0x66, 0x53, 0x57,
 281 +                    0x4A, 0x48, 0x3B, 0x2A, 0x06, 0x7C, 0x6A,
 282 +                    0x5D, 0x53, 0x53, 0x45, 0x4B, 0x35, 0x4D,
 283 +                    0x4A, 0x49, 0x66, 0x53, 0x57, 0x4A, 0x48,
 284 +                    0x3B, 0x2A, 0x06);
 285 +
 286 +       ICNL9707_DCS(ICNL9707_CMD_SRC_TIM, 0x00, 0x00, 0xFF, 0x00, 0x00, 0xFF, 0x00, 0x00);
 287 +
 288 +       /* Another undocumented command */
 289 +       ICNL9707_DCS(0xF4, 0x08, 0x77);
 290 +
 291 +       ICNL9707_DCS(MIPI_DCS_SET_ADDRESS_MODE,
 292 +                    ICNL9707_MADCTL_RGB | ICNL9707_MADCTL_ML | ICNL9707_MADCTL_MH);
 293 +
 294 +       /* Enable tearing mode at VBLANK */
 295 +       err = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
 296 +       if (err) {
 297 +               dev_err(ctx->dev, "failed to enable vblank TE (%d)\n", err);
 298 +               return err;
 299 +       }
 300 +
 301 +       /* Disable access to Level 2 registers */
 302 +       ICNL9707_DCS(ICNL9707_CMD_PASSWORD2,
 303 +                    ICNL9707_P_PASSWORD2_DEFAULT,
 304 +                    ICNL9707_P_PASSWORD2_DEFAULT);
 305 +       ICNL9707_DCS(ICNL9707_CMD_PASSWORD1,
 306 +                    ICNL9707_P_PASSWORD1_DEFAULT,
 307 +                    ICNL9707_P_PASSWORD1_DEFAULT);
 308 +
 309 +       return 0;
 310 +}
 311 +
 312 +static int cwd686_disable(struct drm_panel *panel)
 313 +{
 314 +       struct cwd686 *ctx = panel_to_cwd686(panel);
 315 +
 316 +       if (!ctx->enabled)
 317 +               return 0;
 318 +
 319 +       backlight_disable(ctx->backlight);
 320 +
 321 +       ctx->enabled = false;
 322 +
 323 +       return 0;
 324 +}
 325 +
 326 +static int cwd686_unprepare(struct drm_panel *panel)
 327 +{
 328 +       struct cwd686 *ctx = panel_to_cwd686(panel);
 329 +       struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
 330 +       int err;
 331 +
 332 +       if (!ctx->prepared)
 333 +               return 0;
 334 +
 335 +       err = mipi_dsi_dcs_set_display_off(dsi);
 336 +       if (err) {
 337 +               dev_err(ctx->dev, "failed to turn display off (%d)\n", err);
 338 +               return err;
 339 +       }
 340 +
 341 +       err = mipi_dsi_dcs_enter_sleep_mode(dsi);
 342 +       if (err) {
 343 +               dev_err(ctx->dev, "failed to enter sleep mode (%d)\n", err);
 344 +               return err;
 345 +       }
 346 +
 347 +       msleep(120);
 348 +
 349 +       gpiod_set_value_cansleep(ctx->reset_gpio, 1);
 350 +
 351 +       ctx->prepared = false;
 352 +
 353 +       return 0;
 354 +}
 355 +
 356 +static int cwd686_prepare(struct drm_panel *panel)
 357 +{
 358 +       struct cwd686 *ctx = panel_to_cwd686(panel);
 359 +       struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
 360 +       int err;
 361 +
 362 +       if (ctx->prepared)
 363 +               return 0;
 364 +
 365 +       gpiod_set_value_cansleep(ctx->reset_gpio, 1);
 366 +       /* T2 */
 367 +       msleep(10);
 368 +
 369 +       gpiod_set_value_cansleep(ctx->reset_gpio, 0);
 370 +       /* T3 */
 371 +       msleep(20);
 372 +
 373 +       /* Exit sleep mode and power on */
 374 +
 375 +       err = cwd686_init_sequence(ctx);
 376 +       if (err) {
 377 +               dev_err(ctx->dev, "failed to initialize display (%d)\n", err);
 378 +               return err;
 379 +       }
 380 +
 381 +       err = mipi_dsi_dcs_exit_sleep_mode(dsi);
 382 +       if (err) {
 383 +               dev_err(ctx->dev, "failed to exit sleep mode (%d)\n", err);
 384 +               return err;
 385 +       }
 386 +       /* T6 */
 387 +       msleep(120);
 388 +
 389 +       err = mipi_dsi_dcs_set_display_on(dsi);
 390 +       if (err) {
 391 +               dev_err(ctx->dev, "failed to turn display on (%d)\n", err);
 392 +               return err;
 393 +       }
 394 +       msleep(20);
 395 +
 396 +       ctx->prepared = true;
 397 +
 398 +       return 0;
 399 +}
 400 +
 401 +static int cwd686_enable(struct drm_panel *panel)
 402 +{
 403 +       struct cwd686 *ctx = panel_to_cwd686(panel);
 404 +
 405 +       if (ctx->enabled)
 406 +               return 0;
 407 +
 408 +       backlight_enable(ctx->backlight);
 409 +
 410 +       ctx->enabled = true;
 411 +
 412 +       return 0;
 413 +}
 414 +
 415 +static int cwd686_get_modes(struct drm_panel *panel, struct drm_connector *connector)
 416 +{
 417 +       struct cwd686 *ctx = panel_to_cwd686(panel);
 418 +       struct drm_display_mode *mode;
 419 +
 420 +       mode = drm_mode_duplicate(connector->dev, &default_mode);
 421 +       if (!mode) {
 422 +               dev_err(panel->dev, "bad mode or failed to add mode\n");
 423 +               return -EINVAL;
 424 +       }
 425 +       drm_mode_set_name(mode);
 426 +       mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
 427 +
 428 +       connector->display_info.width_mm = mode->width_mm;
 429 +       connector->display_info.height_mm = mode->height_mm;
 430 +
 431 +       /* set up connector's "panel orientation" property */
 432 +       drm_connector_set_panel_orientation(connector, ctx->orientation);
 433 +
 434 +       drm_mode_probed_add(connector, mode);
 435 +
 436 +       return 1; /* Number of modes */
 437 +}
 438 +
 439 +static const struct drm_panel_funcs cwd686_drm_funcs = {
 440 +       .disable = cwd686_disable,
 441 +       .unprepare = cwd686_unprepare,
 442 +       .prepare = cwd686_prepare,
 443 +       .enable = cwd686_enable,
 444 +       .get_modes = cwd686_get_modes,
 445 +};
 446 +
 447 +static int cwd686_probe(struct mipi_dsi_device *dsi)
 448 +{
 449 +       struct device *dev = &dsi->dev;
 450 +       struct cwd686 *ctx;
 451 +       int err;
 452 +
 453 +       ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
 454 +       if (!ctx)
 455 +               return -ENOMEM;
 456 +
 457 +       mipi_dsi_set_drvdata(dsi, ctx);
 458 +       ctx->dev = dev;
 459 +
 460 +       dsi->lanes = 4;
 461 +       dsi->format = MIPI_DSI_FMT_RGB888;
 462 +       dsi->mode_flags = MIPI_DSI_MODE_VIDEO |
 463 +                         MIPI_DSI_MODE_VIDEO_BURST |
 464 +                         MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
 465 +
 466 +       ctx->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
 467 +       if (IS_ERR(ctx->reset_gpio)) {
 468 +               err = PTR_ERR(ctx->reset_gpio);
 469 +               if (err != -EPROBE_DEFER)
 470 +                       dev_err(dev, "failed to request GPIO (%d)\n", err);
 471 +               return err;
 472 +       }
 473 +
 474 +       ctx->backlight = devm_of_find_backlight(dev);
 475 +       if (IS_ERR(ctx->backlight))
 476 +               return PTR_ERR(ctx->backlight);
 477 +
 478 +       err = of_drm_get_panel_orientation(dev->of_node, &ctx->orientation);
 479 +       if (err) {
 480 +               dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err);
 481 +               return err;
 482 +       }
 483 +
 484 +       drm_panel_init(&ctx->panel, dev, &cwd686_drm_funcs, DRM_MODE_CONNECTOR_DSI);
 485 +
 486 +       drm_panel_add(&ctx->panel);
 487 +
 488 +       err = mipi_dsi_attach(dsi);
 489 +       if (err < 0) {
 490 +               dev_err(dev, "mipi_dsi_attach() failed: %d\n", err);
 491 +               drm_panel_remove(&ctx->panel);
 492 +               return err;
 493 +       }
 494 +
 495 +       return 0;
 496 +}
 497 +
 498 +static void cwd686_remove(struct mipi_dsi_device *dsi)
 499 +{
 500 +       struct cwd686 *ctx = mipi_dsi_get_drvdata(dsi);
 501 +
 502 +       mipi_dsi_detach(dsi);
 503 +       drm_panel_remove(&ctx->panel);
 504 +}
 505 +
 506 +static const struct of_device_id cwd686_of_match[] = {
 507 +       { .compatible = "clockwork,cwd686" },
 508 +       { /* sentinel */ }
 509 +};
 510 +MODULE_DEVICE_TABLE(of, cwd686_of_match);
 511 +
 512 +static struct mipi_dsi_driver cwd686_driver = {
 513 +       .probe = cwd686_probe,
 514 +       .remove = cwd686_remove,
 515 +       .driver = {
 516 +               .name = "panel-clockwork-cwd686",
 517 +               .of_match_table = cwd686_of_match,
 518 +       },
 519 +};
 520 +module_mipi_dsi_driver(cwd686_driver);
 521 +
 522 +MODULE_AUTHOR("Pinfan Zhu <zhu@clockworkpi.com>");
 523 +MODULE_AUTHOR("Max Fierke <max@maxfierke.com>");
 524 +MODULE_DESCRIPTION("ClockworkPi CWD686 panel driver");
 525 +MODULE_LICENSE("GPL");
 526 --
 527 2.20.1
 528