1 From 4c72279c90469971ca5ec627a76e50bf51bf076f Mon Sep 17 00:00:00 2001
2 From: Samuel Holland <samuel@sholland.org>
3 Date: Sun, 7 Aug 2022 10:59:29 -0500
4 Subject: [PATCH 090/117] riscv: dts: allwinner: d1: Add DSI pipeline
6 Signed-off-by: Samuel Holland <samuel@sholland.org>
8 arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi | 49 ++++++++++++++++++++
9 1 file changed, 49 insertions(+)
11 diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi
12 index df711e83039a..0dca38fc0a82 100644
13 --- a/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi
14 +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi
17 #interrupt-cells = <3>;
20 + dsi_4lane_pins: dsi-4lane-pins {
21 + pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5",
22 + "PD6", "PD7", "PD8", "PD9";
23 + drive-strength = <30>;
28 i2c0_pb10_pins: i2c0-pb10-pins {
29 pins = "PB10", "PB11";
35 + compatible = "allwinner,sun20i-d1-mipi-dsi",
36 + "allwinner,sun50i-a100-mipi-dsi";
37 + reg = <0x5450000 0x1000>;
38 + interrupts = <108 IRQ_TYPE_LEVEL_HIGH>;
39 + clocks = <&ccu CLK_BUS_MIPI_DSI>,
40 + <&tcon_top CLK_TCON_TOP_DSI>;
41 + clock-names = "bus", "mod";
42 + resets = <&ccu RST_BUS_MIPI_DSI>;
45 + status = "disabled";
46 + #address-cells = <1>;
50 + dsi_in_tcon_lcd0: endpoint {
51 + remote-endpoint = <&tcon_lcd0_out_dsi>;
57 + compatible = "allwinner,sun20i-d1-mipi-dphy",
58 + "allwinner,sun50i-a100-mipi-dphy";
59 + reg = <0x5451000 0x1000>;
60 + interrupts = <108 IRQ_TYPE_LEVEL_HIGH>;
61 + clocks = <&ccu CLK_BUS_MIPI_DSI>,
62 + <&ccu CLK_MIPI_DSI>;
63 + clock-names = "bus", "mod";
64 + resets = <&ccu RST_BUS_MIPI_DSI>;
68 tcon_top: tcon-top@5460000 {
69 compatible = "allwinner,sun20i-d1-tcon-top";
70 reg = <0x5460000 0x1000>;
71 @@ -1022,6 +1064,13 @@
73 tcon_lcd0_out: port@1 {
75 + #address-cells = <1>;
78 + tcon_lcd0_out_dsi: endpoint@1 {
80 + remote-endpoint = <&dsi_in_tcon_lcd0>;