1 From f666d95c1443854555044d3d4b52c463cf845ccc Mon Sep 17 00:00:00 2001
2 From: Samuel Holland <samuel@sholland.org>
3 Date: Sun, 17 Jul 2022 20:33:40 -0500
4 Subject: [PATCH 020/117] regulator: dt-bindings: Add Allwinner D1 LDOs
6 The Allwinner D1 SoC contains two pairs of in-package LDOs. One pair is
7 for general purpose use. LDOA generally powers the board's 1.8 V rail.
8 LDOB generally powers the in-package DRAM, where applicable.
10 The other pair of LDOs powers the analog power domains inside the SoC,
11 including the audio codec, thermal sensor, and ADCs. These LDOs require
12 a 0.9 V bandgap voltage reference. The calibration value for the voltage
13 reference is stored in an eFuse, accessed via an NVMEM cell.
15 Neither LDO control register is in its own MMIO range; instead, each
16 regulator device relies on a regmap/syscon exported by its parent.
19 - Remove syscon property from bindings
20 - Update binding examples to fix warnings and provide context
23 - Add "reg" property to bindings
24 - Add "unevaluatedProperties: true" to regulator nodes
25 - Minor changes to regulator node name patterns
26 - Remove system-ldos example (now added in patch 3)
29 - Fix the order of the maintainer/description sections
30 - Replace unevaluatedProperties with "additionalProperties: false"
32 Signed-off-by: Samuel Holland <samuel@sholland.org>
34 .../allwinner,sun20i-d1-analog-ldos.yaml | 74 +++++++++++++++++++
35 .../allwinner,sun20i-d1-system-ldos.yaml | 37 ++++++++++
36 2 files changed, 111 insertions(+)
37 create mode 100644 Documentation/devicetree/bindings/regulator/allwinner,sun20i-d1-analog-ldos.yaml
38 create mode 100644 Documentation/devicetree/bindings/regulator/allwinner,sun20i-d1-system-ldos.yaml
41 +++ b/Documentation/devicetree/bindings/regulator/allwinner,sun20i-d1-analog-ldos.yaml
43 +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
46 +$id: http://devicetree.org/schemas/regulator/allwinner,sun20i-d1-analog-ldos.yaml#
47 +$schema: http://devicetree.org/meta-schemas/core.yaml#
49 +title: Allwinner D1 Analog LDOs
52 + - Samuel Holland <samuel@sholland.org>
55 + Allwinner D1 contains a set of LDOs which are designed to supply analog power
56 + inside and outside the SoC. They are controlled by a register within the audio
57 + codec MMIO space, but which is not part of the audio codec clock/reset domain.
62 + - allwinner,sun20i-d1-analog-ldos
69 + - description: NVMEM cell for the calibrated bandgap reference trim value
78 + $ref: regulator.yaml#
79 + unevaluatedProperties: false
87 +additionalProperties: false
91 + audio-codec@2030000 {
92 + compatible = "simple-mfd", "syscon";
93 + reg = <0x2030000 0x1000>;
95 + #address-cells = <1>;
98 + regulators@2030348 {
99 + compatible = "allwinner,sun20i-d1-analog-ldos";
100 + reg = <0x2030348 0x4>;
101 + nvmem-cells = <&bg_trim>;
102 + nvmem-cell-names = "bg_trim";
105 + regulator-min-microvolt = <1800000>;
106 + regulator-max-microvolt = <1800000>;
110 + regulator-min-microvolt = <1800000>;
111 + regulator-max-microvolt = <1800000>;
118 +++ b/Documentation/devicetree/bindings/regulator/allwinner,sun20i-d1-system-ldos.yaml
120 +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
123 +$id: http://devicetree.org/schemas/regulator/allwinner,sun20i-d1-system-ldos.yaml#
124 +$schema: http://devicetree.org/meta-schemas/core.yaml#
126 +title: Allwinner D1 System LDOs
129 + - Samuel Holland <samuel@sholland.org>
132 + Allwinner D1 contains a pair of general-purpose LDOs which are designed to
133 + supply power inside and outside the SoC. They are controlled by a register
134 + within the system control MMIO space.
139 + - allwinner,sun20i-d1-system-ldos
147 + $ref: regulator.yaml#
148 + unevaluatedProperties: false
154 +additionalProperties: false