target/linux/bcm53xx/patches-5.15/038-v6.7-0003-ARM-dts-BCM5301X-Relicense-Felix-s-code-to-the-GPL-2.patch

   1 From 81ea360a16978a4df61df9db56b171909bd659c0 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
   3 Date: Sat, 16 Sep 2023 10:30:57 +0200
   4 Subject: [PATCH] ARM: dts: BCM5301X: Relicense Felix's code to the GPL 2.0+ /
   5  MIT
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   9
  10 Move code added by Felix to the bcm-ns.dtsi which uses dual licensing.
  11 That syncs more Northstar code to be based on the same licensing schema.
  12
  13 This code was added in the commit 1ff80363524c ("ARM: BCM5301X: Add
  14 profiling support").
  15
  16 Cc: Felix Fietkau <nbd@nbd.name>
  17 Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
  18 Acked-by: Felix Fietkau <nbd@nbd.name>
  19 Link: https://lore.kernel.org/r/20230916083057.10458-1-zajec5@gmail.com
  20 Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
  21 ---
  22  arch/arm/boot/dts/broadcom/bcm-ns.dtsi   | 7 +++++++
  23  arch/arm/boot/dts/broadcom/bcm5301x.dtsi | 7 -------
  24  2 files changed, 7 insertions(+), 7 deletions(-)
  25
  26 --- a/arch/arm/boot/dts/bcm-ns.dtsi
  27 +++ b/arch/arm/boot/dts/bcm-ns.dtsi
  28 @@ -14,6 +14,13 @@
  29         #address-cells = <1>;
  30         #size-cells = <1>;
  31
  32 +       pmu {
  33 +               compatible = "arm,cortex-a9-pmu";
  34 +               interrupts =
  35 +                       <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
  36 +                       <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
  37 +       };
  38 +
  39         chipcommon-a-bus@18000000 {
  40                 compatible = "simple-bus";
  41                 ranges = <0x00000000 0x18000000 0x00001000>;
  42 --- a/arch/arm/boot/dts/bcm5301x.dtsi
  43 +++ b/arch/arm/boot/dts/bcm5301x.dtsi
  44 @@ -26,13 +26,6 @@
  45                 };
  46         };
  47
  48 -       pmu {
  49 -               compatible = "arm,cortex-a9-pmu";
  50 -               interrupts =
  51 -                       <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
  52 -                       <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
  53 -       };
  54 -
  55         clocks {
  56                 #address-cells = <1>;
  57                 #size-cells = <1>;