target/linux/ath79/dts/qca9531_comfast_cf-e314n-v2.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qca953x.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         compatible = "comfast,cf-e314n-v2", "qca,qca9531";
  10         model = "COMFAST CF-E314N v2";
  11
  12         aliases {
  13                 serial0 = &uart;
  14                 led-boot = &led_rssihigh;
  15                 led-failsafe = &led_rssihigh;
  16                 led-upgrade = &led_rssihigh;
  17         };
  18
  19         leds {
  20                 compatible = "gpio-leds";
  21
  22                 pinctrl-names = "default";
  23                 pinctrl-0 = <&jtag_disable_pins &led_rssilow_pin &led_rssimediumhigh_pin &led_rssihigh_pin>;
  24
  25                 wan {
  26                         label = "green:wan";
  27                         gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
  28                 };
  29
  30                 lan {
  31                         label = "green:lan";
  32                         gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
  33                 };
  34
  35                 rssilow {
  36                         label = "red:rssilow";
  37                         gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
  38                 };
  39
  40                 rssimediumlow {
  41                         label = "red:rssimediumlow";
  42                         gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
  43                 };
  44
  45                 rssimediumhigh {
  46                         label = "green:rssimediumhigh";
  47                         gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
  48                 };
  49
  50                 led_rssihigh: rssihigh {
  51                         label = "green:rssihigh";
  52                         gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
  53                 };
  54
  55                 wlan {
  56                         label = "green:wlan";
  57                         gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
  58                         linux,default-trigger = "phy0tpt";
  59                 };
  60         };
  61
  62         keys {
  63                 compatible = "gpio-keys";
  64
  65                 reset {
  66                         label = "reset";
  67                         linux,code = <KEY_RESTART>;
  68                         gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
  69                         debounce-interval = <60>;
  70                 };
  71         };
  72 };
  73
  74 &pinmux {
  75         led_rssilow_pin: pinmux_rssilow_pin {
  76                 pinctrl-single,bits = <0x8 0x0 0xff000000>;
  77         };
  78
  79         led_rssimediumhigh_pin: pinmux_rssimediumhigh_pin {
  80                 pinctrl-single,bits = <0xc 0x0 0x00ff0000>;
  81         };
  82
  83         led_rssihigh_pin: pinmux_rssihigh_pin {
  84                 pinctrl-single,bits = <0x10 0x0 0x000000ff>;
  85         };
  86 };
  87
  88 &spi {
  89         status = "okay";
  90
  91         flash@0 {
  92                 compatible = "jedec,spi-nor";
  93                 reg = <0>;
  94                 spi-max-frequency = <25000000>;
  95
  96                 partitions {
  97                         compatible = "fixed-partitions";
  98                         #address-cells = <1>;
  99                         #size-cells = <1>;
 100
 101                         partition@0 {
 102                                 label = "u-boot";
 103                                 reg = <0x000000 0x010000>;
 104                                 read-only;
 105                         };
 106
 107                         art: partition@10000 {
 108                                 label = "art";
 109                                 reg = <0x010000 0x010000>;
 110                                 read-only;
 111
 112                                 nvmem-layout {
 113                                         compatible = "fixed-layout";
 114                                         #address-cells = <1>;
 115                                         #size-cells = <1>;
 116
 117                                         macaddr_art_0: macaddr@0 {
 118                                                 reg = <0x0 0x6>;
 119                                         };
 120
 121                                         macaddr_art_6: macaddr@6 {
 122                                                 reg = <0x6 0x6>;
 123                                         };
 124                                 };
 125                         };
 126
 127                         partition@20000 {
 128                                 compatible = "denx,uimage";
 129                                 label = "firmware";
 130                                 reg = <0x020000 0x7c0000>;
 131                         };
 132
 133                         partition@7e0000 {
 134                                 label = "configs";
 135                                 reg = <0x7e0000 0x010000>;
 136                                 read-only;
 137                         };
 138
 139                         partition@7f0000 {
 140                                 label = "nvram";
 141                                 reg = <0x7f0000 0x010000>;
 142                                 read-only;
 143                         };
 144                 };
 145         };
 146 };
 147
 148 &eth0 {
 149         status = "okay";
 150
 151         phy-handle = <&swphy4>;
 152
 153         nvmem-cells = <&macaddr_art_0>;
 154         nvmem-cell-names = "mac-address";
 155 };
 156
 157 &eth1 {
 158         nvmem-cells = <&macaddr_art_6>;
 159         nvmem-cell-names = "mac-address";
 160 };
 161
 162 &wmac {
 163         status = "okay";
 164         mtd-cal-data = <&art 0x1000>;
 165 };