plat/arm/css/common/css_pm.c

   1 /*
   2  * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
   3  *
   4  * Redistribution and use in source and binary forms, with or without
   5  * modification, are permitted provided that the following conditions are met:
   6  *
   7  * Redistributions of source code must retain the above copyright notice, this
   8  * list of conditions and the following disclaimer.
   9  *
  10  * Redistributions in binary form must reproduce the above copyright notice,
  11  * this list of conditions and the following disclaimer in the documentation
  12  * and/or other materials provided with the distribution.
  13  *
  14  * Neither the name of ARM nor the names of its contributors may be used
  15  * to endorse or promote products derived from this software without specific
  16  * prior written permission.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  19  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  21  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
  22  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  28  * POSSIBILITY OF SUCH DAMAGE.
  29  */
  30
  31 #include <arch_helpers.h>
  32 #include <assert.h>
  33 #include <cassert.h>
  34 #include <cci.h>
  35 #include <css_pm.h>
  36 #include <debug.h>
  37 #include <errno.h>
  38 #include <plat_arm.h>
  39 #include <platform.h>
  40 #include <platform_def.h>
  41 #include "css_scpi.h"
  42
  43 /* Macros to read the CSS power domain state */
  44 #define CSS_CORE_PWR_STATE(state)       (state)->pwr_domain_state[ARM_PWR_LVL0]
  45 #define CSS_CLUSTER_PWR_STATE(state)    (state)->pwr_domain_state[ARM_PWR_LVL1]
  46 #define CSS_SYSTEM_PWR_STATE(state)     ((PLAT_MAX_PWR_LVL > ARM_PWR_LVL1) ?\
  47                                 (state)->pwr_domain_state[ARM_PWR_LVL2] : 0)
  48
  49 /* Allow CSS platforms to override `plat_arm_psci_pm_ops` */
  50 #pragma weak plat_arm_psci_pm_ops
  51
  52 #if ARM_RECOM_STATE_ID_ENC
  53 /*
  54  *  The table storing the valid idle power states. Ensure that the
  55  *  array entries are populated in ascending order of state-id to
  56  *  enable us to use binary search during power state validation.
  57  *  The table must be terminated by a NULL entry.
  58  */
  59 const unsigned int arm_pm_idle_states[] = {
  60         /* State-id - 0x001 */
  61         arm_make_pwrstate_lvl2(ARM_LOCAL_STATE_RUN, ARM_LOCAL_STATE_RUN,
  62                 ARM_LOCAL_STATE_RET, ARM_PWR_LVL0, PSTATE_TYPE_STANDBY),
  63         /* State-id - 0x002 */
  64         arm_make_pwrstate_lvl2(ARM_LOCAL_STATE_RUN, ARM_LOCAL_STATE_RUN,
  65                 ARM_LOCAL_STATE_OFF, ARM_PWR_LVL0, PSTATE_TYPE_POWERDOWN),
  66         /* State-id - 0x022 */
  67         arm_make_pwrstate_lvl2(ARM_LOCAL_STATE_RUN, ARM_LOCAL_STATE_OFF,
  68                 ARM_LOCAL_STATE_OFF, ARM_PWR_LVL1, PSTATE_TYPE_POWERDOWN),
  69 #if PLAT_MAX_PWR_LVL > ARM_PWR_LVL1
  70         /* State-id - 0x222 */
  71         arm_make_pwrstate_lvl2(ARM_LOCAL_STATE_OFF, ARM_LOCAL_STATE_OFF,
  72                 ARM_LOCAL_STATE_OFF, ARM_PWR_LVL2, PSTATE_TYPE_POWERDOWN),
  73 #endif
  74         0,
  75 };
  76 #endif /* __ARM_RECOM_STATE_ID_ENC__ */
  77
  78 /*
  79  * All the power management helpers in this file assume at least cluster power
  80  * level is supported.
  81  */
  82 CASSERT(PLAT_MAX_PWR_LVL >= ARM_PWR_LVL1,
  83                 assert_max_pwr_lvl_supported_mismatch);
  84
  85 /*******************************************************************************
  86  * Handler called when a power domain is about to be turned on. The
  87  * level and mpidr determine the affinity instance.
  88  ******************************************************************************/
  89 int css_pwr_domain_on(u_register_t mpidr)
  90 {
  91         /*
  92          * SCP takes care of powering up parent power domains so we
  93          * only need to care about level 0
  94          */
  95         scpi_set_css_power_state(mpidr, scpi_power_on, scpi_power_on,
  96                                  scpi_power_on);
  97
  98         return PSCI_E_SUCCESS;
  99 }
 100
 101 static void css_pwr_domain_on_finisher_common(
 102                 const psci_power_state_t *target_state)
 103 {
 104         assert(CSS_CORE_PWR_STATE(target_state) == ARM_LOCAL_STATE_OFF);
 105
 106         /*
 107          * Perform the common cluster specific operations i.e enable coherency
 108          * if this cluster was off.
 109          */
 110         if (CSS_CLUSTER_PWR_STATE(target_state) == ARM_LOCAL_STATE_OFF)
 111                 cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1()));
 112 }
 113
 114 /*******************************************************************************
 115  * Handler called when a power level has just been powered on after
 116  * being turned off earlier. The target_state encodes the low power state that
 117  * each level has woken up from. This handler would never be invoked with
 118  * the system power domain uninitialized as either the primary would have taken
 119  * care of it as part of cold boot or the first core awakened from system
 120  * suspend would have already initialized it.
 121  ******************************************************************************/
 122 void css_pwr_domain_on_finish(const psci_power_state_t *target_state)
 123 {
 124         /* Assert that the system power domain need not be initialized */
 125         assert(CSS_SYSTEM_PWR_STATE(target_state) == ARM_LOCAL_STATE_RUN);
 126
 127         css_pwr_domain_on_finisher_common(target_state);
 128
 129         /* Program the gic per-cpu distributor or re-distributor interface */
 130         plat_arm_gic_pcpu_init();
 131
 132         /* Enable the gic cpu interface */
 133         plat_arm_gic_cpuif_enable();
 134 }
 135
 136 /*******************************************************************************
 137  * Common function called while turning a cpu off or suspending it. It is called
 138  * from css_off() or css_suspend() when these functions in turn are called for
 139  * power domain at the highest power level which will be powered down. It
 140  * performs the actions common to the OFF and SUSPEND calls.
 141  ******************************************************************************/
 142 static void css_power_down_common(const psci_power_state_t *target_state)
 143 {
 144         uint32_t cluster_state = scpi_power_on;
 145         uint32_t system_state = scpi_power_on;
 146
 147         /* Prevent interrupts from spuriously waking up this cpu */
 148         plat_arm_gic_cpuif_disable();
 149
 150         /* Check if power down at system power domain level is requested */
 151         if (CSS_SYSTEM_PWR_STATE(target_state) == ARM_LOCAL_STATE_OFF)
 152                         system_state = scpi_power_retention;
 153
 154         /* Cluster is to be turned off, so disable coherency */
 155         if (CSS_CLUSTER_PWR_STATE(target_state) == ARM_LOCAL_STATE_OFF) {
 156                 cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr()));
 157                 cluster_state = scpi_power_off;
 158         }
 159
 160         /*
 161          * Ask the SCP to power down the appropriate components depending upon
 162          * their state.
 163          */
 164         scpi_set_css_power_state(read_mpidr_el1(),
 165                                  scpi_power_off,
 166                                  cluster_state,
 167                                  system_state);
 168 }
 169
 170 /*******************************************************************************
 171  * Handler called when a power domain is about to be turned off. The
 172  * target_state encodes the power state that each level should transition to.
 173  ******************************************************************************/
 174 void css_pwr_domain_off(const psci_power_state_t *target_state)
 175 {
 176         assert(CSS_CORE_PWR_STATE(target_state) == ARM_LOCAL_STATE_OFF);
 177         css_power_down_common(target_state);
 178 }
 179
 180 /*******************************************************************************
 181  * Handler called when a power domain is about to be suspended. The
 182  * target_state encodes the power state that each level should transition to.
 183  ******************************************************************************/
 184 void css_pwr_domain_suspend(const psci_power_state_t *target_state)
 185 {
 186         /*
 187          * CSS currently supports retention only at cpu level. Just return
 188          * as nothing is to be done for retention.
 189          */
 190         if (CSS_CORE_PWR_STATE(target_state) == ARM_LOCAL_STATE_RET)
 191                 return;
 192
 193         assert(CSS_CORE_PWR_STATE(target_state) == ARM_LOCAL_STATE_OFF);
 194         css_power_down_common(target_state);
 195 }
 196
 197 /*******************************************************************************
 198  * Handler called when a power domain has just been powered on after
 199  * having been suspended earlier. The target_state encodes the low power state
 200  * that each level has woken up from.
 201  * TODO: At the moment we reuse the on finisher and reinitialize the secure
 202  * context. Need to implement a separate suspend finisher.
 203  ******************************************************************************/
 204 void css_pwr_domain_suspend_finish(
 205                                 const psci_power_state_t *target_state)
 206 {
 207         /* Return as nothing is to be done on waking up from retention. */
 208         if (CSS_CORE_PWR_STATE(target_state) == ARM_LOCAL_STATE_RET)
 209                 return;
 210
 211         /* Perform system domain restore if woken up from system suspend */
 212         if (CSS_SYSTEM_PWR_STATE(target_state) == ARM_LOCAL_STATE_OFF)
 213                 arm_system_pwr_domain_resume();
 214         else
 215                 /* Enable the gic cpu interface */
 216                 plat_arm_gic_cpuif_enable();
 217
 218         css_pwr_domain_on_finisher_common(target_state);
 219 }
 220
 221 /*******************************************************************************
 222  * Handlers to shutdown/reboot the system
 223  ******************************************************************************/
 224 void __dead2 css_system_off(void)
 225 {
 226         uint32_t response;
 227
 228         /* Send the power down request to the SCP */
 229         response = scpi_sys_power_state(scpi_system_shutdown);
 230
 231         if (response != SCP_OK) {
 232                 ERROR("CSS System Off: SCP error %u.\n", response);
 233                 panic();
 234         }
 235         wfi();
 236         ERROR("CSS System Off: operation not handled.\n");
 237         panic();
 238 }
 239
 240 void __dead2 css_system_reset(void)
 241 {
 242         uint32_t response;
 243
 244         /* Send the system reset request to the SCP */
 245         response = scpi_sys_power_state(scpi_system_reboot);
 246
 247         if (response != SCP_OK) {
 248                 ERROR("CSS System Reset: SCP error %u.\n", response);
 249                 panic();
 250         }
 251         wfi();
 252         ERROR("CSS System Reset: operation not handled.\n");
 253         panic();
 254 }
 255
 256 /*******************************************************************************
 257  * Handler called when the CPU power domain is about to enter standby.
 258  ******************************************************************************/
 259 void css_cpu_standby(plat_local_state_t cpu_state)
 260 {
 261         unsigned int scr;
 262
 263         assert(cpu_state == ARM_LOCAL_STATE_RET);
 264
 265         scr = read_scr_el3();
 266         /* Enable PhysicalIRQ bit for NS world to wake the CPU */
 267         write_scr_el3(scr | SCR_IRQ_BIT);
 268         isb();
 269         dsb();
 270         wfi();
 271
 272         /*
 273          * Restore SCR to the original value, synchronisation of scr_el3 is
 274          * done by eret while el3_exit to save some execution cycles.
 275          */
 276         write_scr_el3(scr);
 277 }
 278
 279 /*******************************************************************************
 280  * Handler called to return the 'req_state' for system suspend.
 281  ******************************************************************************/
 282 void css_get_sys_suspend_power_state(psci_power_state_t *req_state)
 283 {
 284         unsigned int i;
 285
 286         /*
 287          * System Suspend is supported only if the system power domain node
 288          * is implemented.
 289          */
 290         assert(PLAT_MAX_PWR_LVL >= ARM_PWR_LVL2);
 291
 292         for (i = ARM_PWR_LVL0; i <= PLAT_MAX_PWR_LVL; i++)
 293                 req_state->pwr_domain_state[i] = ARM_LOCAL_STATE_OFF;
 294 }
 295
 296 /*******************************************************************************
 297  * Export the platform handlers via plat_arm_psci_pm_ops. The ARM Standard
 298  * platform will take care of registering the handlers with PSCI.
 299  ******************************************************************************/
 300 const plat_psci_ops_t plat_arm_psci_pm_ops = {
 301         .pwr_domain_on          = css_pwr_domain_on,
 302         .pwr_domain_on_finish   = css_pwr_domain_on_finish,
 303         .pwr_domain_off         = css_pwr_domain_off,
 304         .cpu_standby            = css_cpu_standby,
 305         .pwr_domain_suspend     = css_pwr_domain_suspend,
 306         .pwr_domain_suspend_finish      = css_pwr_domain_suspend_finish,
 307         .system_off             = css_system_off,
 308         .system_reset           = css_system_reset,
 309         .validate_power_state   = arm_validate_power_state,
 310         .validate_ns_entrypoint = arm_validate_ns_entrypoint
 311 };