package/boot/uboot-sunxi/patches/4009-pinctrl-sunxi-add-GPIO-in-out-wrappers.patch

   1 From 83871970cde779ab23107aa46cc840afd435314e Mon Sep 17 00:00:00 2001
   2 From: Andre Przywara <andre.przywara@arm.com>
   3 Date: Fri, 21 Jul 2023 14:45:49 +0100
   4 Subject: [PATCH 4009/4044] pinctrl: sunxi: add GPIO in/out wrappers
   5
   6 So far we were open-coding the pincontroller's GPIO output/input access
   7 in each function using that.
   8
   9 Provide functions that wrap that nicely, and follow the existing pattern
  10 (set/get_{bank,}), so users don't need to know about the internals, and
  11 we can abstract the new D1 pinctrl more easily.
  12
  13 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
  14 Reviewed-by: Sam Edwards <CFSworks@gmail.com>
  15 Tested-by: Sam Edwards <CFSworks@gmail.com>
  16 ---
  17  arch/arm/include/asm/arch-sunxi/gpio.h |  4 +++
  18  arch/arm/mach-sunxi/pinmux.c           | 28 +++++++++++++++
  19  drivers/gpio/sunxi_gpio.c              | 49 +++++---------------------
  20  3 files changed, 40 insertions(+), 41 deletions(-)
  21
  22 diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
  23 index 437e86479c..2e7c84e410 100644
  24 --- a/arch/arm/include/asm/arch-sunxi/gpio.h
  25 +++ b/arch/arm/include/asm/arch-sunxi/gpio.h
  26 @@ -222,6 +222,10 @@ void sunxi_gpio_set_cfgbank(struct sunxi_gpio *pio, int bank_offset, u32 val);
  27  void sunxi_gpio_set_cfgpin(u32 pin, u32 val);
  28  int sunxi_gpio_get_cfgbank(struct sunxi_gpio *pio, int bank_offset);
  29  int sunxi_gpio_get_cfgpin(u32 pin);
  30 +void sunxi_gpio_set_output_bank(struct sunxi_gpio *pio, int pin, bool set);
  31 +void sunxi_gpio_set_output(u32 pin, bool set);
  32 +int sunxi_gpio_get_output_bank(struct sunxi_gpio *pio, int pin);
  33 +int sunxi_gpio_get_output(u32 pin);
  34  void sunxi_gpio_set_drv(u32 pin, u32 val);
  35  void sunxi_gpio_set_drv_bank(struct sunxi_gpio *pio, u32 bank_offset, u32 val);
  36  void sunxi_gpio_set_pull(u32 pin, u32 val);
  37 diff --git a/arch/arm/mach-sunxi/pinmux.c b/arch/arm/mach-sunxi/pinmux.c
  38 index c95fcee9f6..751cac8e09 100644
  39 --- a/arch/arm/mach-sunxi/pinmux.c
  40 +++ b/arch/arm/mach-sunxi/pinmux.c
  41 @@ -45,6 +45,34 @@ int sunxi_gpio_get_cfgpin(u32 pin)
  42         return sunxi_gpio_get_cfgbank(pio, pin);
  43  }
  44
  45 +void sunxi_gpio_set_output_bank(struct sunxi_gpio *pio, int pin, bool set)
  46 +{
  47 +       u32 mask = 1U << GPIO_NUM(pin);
  48 +
  49 +       clrsetbits_le32(&pio->dat, set ? 0 : mask, set ? mask : 0);
  50 +}
  51 +
  52 +void sunxi_gpio_set_output(u32 pin, bool set)
  53 +{
  54 +       u32 bank = GPIO_BANK(pin);
  55 +       struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
  56 +
  57 +       sunxi_gpio_set_output_bank(pio, pin, set);
  58 +}
  59 +
  60 +int sunxi_gpio_get_output_bank(struct sunxi_gpio *pio, int pin)
  61 +{
  62 +       return !!(readl(&pio->dat) & (1U << GPIO_NUM(pin)));
  63 +}
  64 +
  65 +int sunxi_gpio_get_output(u32 pin)
  66 +{
  67 +       u32 bank = GPIO_BANK(pin);
  68 +       struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
  69 +
  70 +       return sunxi_gpio_get_output_bank(pio, pin);
  71 +}
  72 +
  73  void sunxi_gpio_set_drv(u32 pin, u32 val)
  74  {
  75         u32 bank = GPIO_BANK(pin);
  76 diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c
  77 index 1e85db179a..6796375d35 100644
  78 --- a/drivers/gpio/sunxi_gpio.c
  79 +++ b/drivers/gpio/sunxi_gpio.c
  80 @@ -19,37 +19,6 @@
  81  #include <dt-bindings/gpio/gpio.h>
  82
  83  #if !CONFIG_IS_ENABLED(DM_GPIO)
  84 -static int sunxi_gpio_output(u32 pin, u32 val)
  85 -{
  86 -       u32 dat;
  87 -       u32 bank = GPIO_BANK(pin);
  88 -       u32 num = GPIO_NUM(pin);
  89 -       struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
  90 -
  91 -       dat = readl(&pio->dat);
  92 -       if (val)
  93 -               dat |= 0x1 << num;
  94 -       else
  95 -               dat &= ~(0x1 << num);
  96 -
  97 -       writel(dat, &pio->dat);
  98 -
  99 -       return 0;
 100 -}
 101 -
 102 -static int sunxi_gpio_input(u32 pin)
 103 -{
 104 -       u32 dat;
 105 -       u32 bank = GPIO_BANK(pin);
 106 -       u32 num = GPIO_NUM(pin);
 107 -       struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
 108 -
 109 -       dat = readl(&pio->dat);
 110 -       dat >>= num;
 111 -
 112 -       return dat & 0x1;
 113 -}
 114 -
 115  int gpio_request(unsigned gpio, const char *label)
 116  {
 117         return 0;
 118 @@ -70,18 +39,21 @@ int gpio_direction_input(unsigned gpio)
 119  int gpio_direction_output(unsigned gpio, int value)
 120  {
 121         sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_OUTPUT);
 122 +       sunxi_gpio_set_output(gpio, value);
 123
 124 -       return sunxi_gpio_output(gpio, value);
 125 +       return 0;
 126  }
 127
 128  int gpio_get_value(unsigned gpio)
 129  {
 130 -       return sunxi_gpio_input(gpio);
 131 +       return sunxi_gpio_get_output(gpio);
 132  }
 133
 134  int gpio_set_value(unsigned gpio, int value)
 135  {
 136 -       return sunxi_gpio_output(gpio, value);
 137 +       sunxi_gpio_set_output(gpio, value);
 138 +
 139 +       return 0;
 140  }
 141
 142  int sunxi_name_to_gpio(const char *name)
 143 @@ -135,13 +107,8 @@ int sunxi_name_to_gpio(const char *name)
 144  static int sunxi_gpio_get_value(struct udevice *dev, unsigned offset)
 145  {
 146         struct sunxi_gpio_plat *plat = dev_get_plat(dev);
 147 -       u32 num = GPIO_NUM(offset);
 148 -       unsigned dat;
 149 -
 150 -       dat = readl(&plat->regs->dat);
 151 -       dat >>= num;
 152
 153 -       return dat & 0x1;
 154 +       return sunxi_gpio_get_output_bank(plat->regs, offset) & 0x1;
 155  }
 156
 157  static int sunxi_gpio_get_function(struct udevice *dev, unsigned offset)
 158 @@ -181,7 +148,7 @@ static int sunxi_gpio_set_flags(struct udevice *dev, unsigned int offset,
 159                 u32 value = !!(flags & GPIOD_IS_OUT_ACTIVE);
 160                 u32 num = GPIO_NUM(offset);
 161
 162 -               clrsetbits_le32(&plat->regs->dat, 1 << num, value << num);
 163 +               sunxi_gpio_set_output_bank(plat->regs, num, value);
 164                 sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_OUTPUT);
 165         } else if (flags & GPIOD_IS_IN) {
 166                 u32 pull = 0;
 167 --
 168 2.20.1
 169