uboot-ramips: add support for MT7621, merge into uboot-mediatek
[openwrt/staging/aparcar.git] / package / boot / uboot-mediatek / patches / 001-mtk-0024-tools-mtk_image-add-support-for-MT7621-NAND-images.patch
1 From 18dd1ef9417d0880f2f492b55bd4d9ede499f137 Mon Sep 17 00:00:00 2001
2 From: Weijie Gao <weijie.gao@mediatek.com>
3 Date: Fri, 20 May 2022 11:24:10 +0800
4 Subject: [PATCH 24/25] tools: mtk_image: add support for MT7621 NAND images
5
6 The BootROM of MT7621 requires a image header for SPL to record its size
7 and load address when booting from NAND.
8
9 To create such an image, one can use the following command line:
10 mkimage -T mtk_image -a 0x80200000 -e 0x80200000 -n "mt7621=1"
11 -d u-boot-spl-ddr.bin u-boot-spl-ddr.img
12
13 Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
14 Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
15 ---
16 tools/mtk_image.c | 182 ++++++++++++++++++++++++++++++++++++++++++++++
17 tools/mtk_image.h | 24 ++++++
18 2 files changed, 206 insertions(+)
19
20 diff --git a/tools/mtk_image.c b/tools/mtk_image.c
21 index 418c5fd54b..de5ce4d964 100644
22 --- a/tools/mtk_image.c
23 +++ b/tools/mtk_image.c
24 @@ -6,7 +6,9 @@
25 * Author: Weijie Gao <weijie.gao@mediatek.com>
26 */
27
28 +#include <time.h>
29 #include <image.h>
30 +#include <u-boot/crc.h>
31 #include <u-boot/sha256.h>
32 #include "imagetool.h"
33 #include "mtk_image.h"
34 @@ -251,17 +253,45 @@ static uint32_t img_size;
35 static enum brlyt_img_type hdr_media;
36 static uint32_t hdr_offset;
37 static int use_lk_hdr;
38 +static int use_mt7621_hdr;
39 static bool is_arm64_image;
40
41 /* LK image name */
42 static char lk_name[32] = "U-Boot";
43
44 +/* CRC32 normal table required by MT7621 image */
45 +static uint32_t crc32tbl[256];
46 +
47 /* NAND header selected by user */
48 static const union nand_boot_header *hdr_nand;
49
50 /* GFH header + 2 * 4KB pages of NAND */
51 static char hdr_tmp[sizeof(struct gfh_header) + 0x2000];
52
53 +static uint32_t crc32_normal_cal(uint32_t crc, const void *data, size_t length,
54 + const uint32_t *crc32c_table)
55 +{
56 + const uint8_t *p = data;
57 +
58 + while (length--)
59 + crc = crc32c_table[(uint8_t)((crc >> 24) ^ *p++)] ^ (crc << 8);
60 +
61 + return crc;
62 +}
63 +
64 +static void crc32_normal_init(uint32_t *crc32c_table, uint32_t poly)
65 +{
66 + uint32_t v, i, j;
67 +
68 + for (i = 0; i < 256; i++) {
69 + v = i << 24;
70 + for (j = 0; j < 8; j++)
71 + v = (v << 1) ^ ((v & (1 << 31)) ? poly : 0);
72 +
73 + crc32c_table[i] = v;
74 + }
75 +}
76 +
77 static int mtk_image_check_image_types(uint8_t type)
78 {
79 if (type == IH_TYPE_MTKIMAGE)
80 @@ -283,6 +313,7 @@ static int mtk_brom_parse_imagename(const char *imagename)
81 static const char *hdr_offs = "";
82 static const char *nandinfo = "";
83 static const char *lk = "";
84 + static const char *mt7621 = "";
85 static const char *arm64_param = "";
86
87 key = buf;
88 @@ -332,6 +363,9 @@ static int mtk_brom_parse_imagename(const char *imagename)
89 if (!strcmp(key, "lk"))
90 lk = val;
91
92 + if (!strcmp(key, "mt7621"))
93 + mt7621 = val;
94 +
95 if (!strcmp(key, "lkname"))
96 snprintf(lk_name, sizeof(lk_name), "%s", val);
97
98 @@ -352,6 +386,13 @@ static int mtk_brom_parse_imagename(const char *imagename)
99 return 0;
100 }
101
102 + /* if user specified MT7621 image header, skip following checks */
103 + if (mt7621 && mt7621[0] == '1') {
104 + use_mt7621_hdr = 1;
105 + free(buf);
106 + return 0;
107 + }
108 +
109 /* parse media type */
110 for (i = 0; i < ARRAY_SIZE(brom_images); i++) {
111 if (!strcmp(brom_images[i].name, media)) {
112 @@ -419,6 +460,13 @@ static int mtk_image_vrec_header(struct image_tool_params *params,
113 return 0;
114 }
115
116 + if (use_mt7621_hdr) {
117 + tparams->header_size = image_get_header_size();
118 + tparams->hdr = &hdr_tmp;
119 + memset(&hdr_tmp, 0, tparams->header_size);
120 + return 0;
121 + }
122 +
123 if (hdr_media == BRLYT_TYPE_NAND || hdr_media == BRLYT_TYPE_SNAND)
124 tparams->header_size = 2 * le16_to_cpu(hdr_nand->pagesize);
125 else
126 @@ -579,9 +627,90 @@ static int mtk_image_verify_nand_header(const uint8_t *ptr, int print)
127 return 0;
128 }
129
130 +static uint32_t crc32be_cal(const void *data, size_t length)
131 +{
132 + uint32_t crc = 0;
133 + uint8_t c;
134 +
135 + if (crc32tbl[1] != MT7621_IH_CRC_POLYNOMIAL)
136 + crc32_normal_init(crc32tbl, MT7621_IH_CRC_POLYNOMIAL);
137 +
138 + crc = crc32_normal_cal(crc, data, length, crc32tbl);
139 +
140 + for (; length; length >>= 8) {
141 + c = length & 0xff;
142 + crc = crc32_normal_cal(crc, &c, 1, crc32tbl);
143 + }
144 +
145 + return ~crc;
146 +}
147 +
148 +static int mtk_image_verify_mt7621_header(const uint8_t *ptr, int print)
149 +{
150 + const image_header_t *hdr = (const image_header_t *)ptr;
151 + struct mt7621_nand_header *nhdr;
152 + uint32_t spl_size, crcval;
153 + image_header_t header;
154 + int ret;
155 +
156 + spl_size = image_get_size(hdr);
157 +
158 + if (spl_size > img_size) {
159 + if (print)
160 + printf("Incomplete SPL image\n");
161 + return -1;
162 + }
163 +
164 + ret = image_check_hcrc(hdr);
165 + if (!ret) {
166 + if (print)
167 + printf("Bad header CRC\n");
168 + return -1;
169 + }
170 +
171 + ret = image_check_dcrc(hdr);
172 + if (!ret) {
173 + if (print)
174 + printf("Bad data CRC\n");
175 + return -1;
176 + }
177 +
178 + /* Copy header so we can blank CRC field for re-calculation */
179 + memmove(&header, hdr, image_get_header_size());
180 + image_set_hcrc(&header, 0);
181 +
182 + nhdr = (struct mt7621_nand_header *)header.ih_name;
183 + crcval = be32_to_cpu(nhdr->crc);
184 + nhdr->crc = 0;
185 +
186 + if (crcval != crc32be_cal(&header, image_get_header_size())) {
187 + if (print)
188 + printf("Bad NAND header CRC\n");
189 + return -1;
190 + }
191 +
192 + if (print) {
193 + printf("Load Address: %08x\n", image_get_load(hdr));
194 +
195 + printf("Image Name: %.*s\n", MT7621_IH_NMLEN,
196 + image_get_name(hdr));
197 +
198 + if (IMAGE_ENABLE_TIMESTAMP) {
199 + printf("Created: ");
200 + genimg_print_time((time_t)image_get_time(hdr));
201 + }
202 +
203 + printf("Data Size: ");
204 + genimg_print_size(image_get_data_size(hdr));
205 + }
206 +
207 + return 0;
208 +}
209 +
210 static int mtk_image_verify_header(unsigned char *ptr, int image_size,
211 struct image_tool_params *params)
212 {
213 + image_header_t *hdr = (image_header_t *)ptr;
214 union lk_hdr *lk = (union lk_hdr *)ptr;
215
216 /* nothing to verify for LK image header */
217 @@ -590,6 +719,9 @@ static int mtk_image_verify_header(unsigned char *ptr, int image_size,
218
219 img_size = image_size;
220
221 + if (image_get_magic(hdr) == IH_MAGIC)
222 + return mtk_image_verify_mt7621_header(ptr, 0);
223 +
224 if (!strcmp((char *)ptr, NAND_BOOT_NAME))
225 return mtk_image_verify_nand_header(ptr, 0);
226 else
227 @@ -600,6 +732,7 @@ static int mtk_image_verify_header(unsigned char *ptr, int image_size,
228
229 static void mtk_image_print_header(const void *ptr)
230 {
231 + image_header_t *hdr = (image_header_t *)ptr;
232 union lk_hdr *lk = (union lk_hdr *)ptr;
233
234 if (le32_to_cpu(lk->magic) == LK_PART_MAGIC) {
235 @@ -610,6 +743,11 @@ static void mtk_image_print_header(const void *ptr)
236
237 printf("Image Type: MediaTek BootROM Loadable Image\n");
238
239 + if (image_get_magic(hdr) == IH_MAGIC) {
240 + mtk_image_verify_mt7621_header(ptr, 1);
241 + return;
242 + }
243 +
244 if (!strcmp((char *)ptr, NAND_BOOT_NAME))
245 mtk_image_verify_nand_header(ptr, 1);
246 else
247 @@ -773,6 +911,45 @@ static void mtk_image_set_nand_header(void *ptr, off_t filesize,
248 filesize - 2 * le16_to_cpu(hdr_nand->pagesize) - SHA256_SUM_LEN);
249 }
250
251 +static void mtk_image_set_mt7621_header(void *ptr, off_t filesize,
252 + uint32_t loadaddr)
253 +{
254 + image_header_t *hdr = (image_header_t *)ptr;
255 + struct mt7621_stage1_header *shdr;
256 + struct mt7621_nand_header *nhdr;
257 + uint32_t datasize, crcval;
258 +
259 + datasize = filesize - image_get_header_size();
260 + nhdr = (struct mt7621_nand_header *)hdr->ih_name;
261 + shdr = (struct mt7621_stage1_header *)(ptr + image_get_header_size());
262 +
263 + shdr->ep = cpu_to_be32(loadaddr);
264 + shdr->stage_size = cpu_to_be32(datasize);
265 +
266 + image_set_magic(hdr, IH_MAGIC);
267 + image_set_time(hdr, time(NULL));
268 + image_set_size(hdr, datasize);
269 + image_set_load(hdr, loadaddr);
270 + image_set_ep(hdr, loadaddr);
271 + image_set_os(hdr, IH_OS_U_BOOT);
272 + image_set_arch(hdr, IH_ARCH_MIPS);
273 + image_set_type(hdr, IH_TYPE_STANDALONE);
274 + image_set_comp(hdr, IH_COMP_NONE);
275 +
276 + crcval = crc32(0, (uint8_t *)shdr, datasize);
277 + image_set_dcrc(hdr, crcval);
278 +
279 + strncpy(nhdr->ih_name, "MT7621 NAND", MT7621_IH_NMLEN);
280 +
281 + nhdr->ih_stage_offset = cpu_to_be32(image_get_header_size());
282 +
283 + crcval = crc32be_cal(hdr, image_get_header_size());
284 + nhdr->crc = cpu_to_be32(crcval);
285 +
286 + crcval = crc32(0, (uint8_t *)hdr, image_get_header_size());
287 + image_set_hcrc(hdr, crcval);
288 +}
289 +
290 static void mtk_image_set_header(void *ptr, struct stat *sbuf, int ifd,
291 struct image_tool_params *params)
292 {
293 @@ -791,6 +968,11 @@ static void mtk_image_set_header(void *ptr, struct stat *sbuf, int ifd,
294 img_gen = true;
295 img_size = sbuf->st_size;
296
297 + if (use_mt7621_hdr) {
298 + mtk_image_set_mt7621_header(ptr, sbuf->st_size, params->addr);
299 + return;
300 + }
301 +
302 if (hdr_media == BRLYT_TYPE_NAND || hdr_media == BRLYT_TYPE_SNAND)
303 mtk_image_set_nand_header(ptr, sbuf->st_size, params->addr);
304 else
305 diff --git a/tools/mtk_image.h b/tools/mtk_image.h
306 index 7dda71ce88..d868545a33 100644
307 --- a/tools/mtk_image.h
308 +++ b/tools/mtk_image.h
309 @@ -200,4 +200,28 @@ union lk_hdr {
310
311 #define LK_PART_MAGIC 0x58881688
312
313 +/* MT7621 NAND SPL image header */
314 +
315 +#define MT7621_IH_NMLEN 12
316 +#define MT7621_IH_CRC_POLYNOMIAL 0x04c11db7
317 +
318 +struct mt7621_nand_header {
319 + char ih_name[MT7621_IH_NMLEN];
320 + uint32_t nand_ac_timing;
321 + uint32_t ih_stage_offset;
322 + uint32_t ih_bootloader_offset;
323 + uint32_t nand_info_1_data;
324 + uint32_t crc;
325 +};
326 +
327 +struct mt7621_stage1_header {
328 + uint32_t jump_insn[2];
329 + uint32_t ep;
330 + uint32_t stage_size;
331 + uint32_t has_stage2;
332 + uint32_t next_ep;
333 + uint32_t next_size;
334 + uint32_t next_offset;
335 +};
336 +
337 #endif /* _MTK_IMAGE_H */
338 --
339 2.36.1
340