2 * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
4 * SPDX-License-Identifier: BSD-3-Clause
12 * Macro to save the General purpose registers (r0 - r12), the banked
13 * spsr, lr, sp registers and the `scr` register to the SMC context on entry
14 * due a SMC call. The `lr` of the current mode (monitor) is expected to be
15 * already saved. The `sp` must point to the `smc_ctx_t` to save to.
16 * Additionally, also save the 'pmcr' register as this is updated whilst
17 * executing in the secure world.
19 .macro smccc_save_gp_mode_regs
20 /* Save r0 - r12 in the SMC context */
23 add r0, r0, #SMC_CTX_SP_USR
25 #if ARM_ARCH_MAJOR == 7 && !defined(ARMV7_SUPPORTS_VIRTUALIZATION)
26 /* Must be in secure state to restore Monitor mode */
28 bic r2, r4, #SCR_NS_BIT
55 /* lr_mon is already saved by caller */
63 /* Save the banked registers including the current SPSR and LR */
85 /* lr_mon is already saved by caller */
89 str r4, [sp, #SMC_CTX_SCR]
91 str r4, [sp, #SMC_CTX_PMCR]
95 * Macro to restore the `smc_ctx_t`, which includes the General purpose
96 * registers and banked mode registers, and exit from the monitor mode.
97 * r0 must point to the `smc_ctx_t` to restore from.
101 * Save the current sp and restore the smc context
102 * pointer to sp which will be used for handling the
105 str sp, [r0, #SMC_CTX_SP_MON]
109 * Restore SCR first so that we access the right banked register
110 * when the other mode registers are restored.
112 ldr r1, [r0, #SMC_CTX_SCR]
117 * Restore the PMCR register.
119 ldr r1, [r0, #SMC_CTX_PMCR]
122 /* Restore the banked registers including the current SPSR */
123 add r1, r0, #SMC_CTX_SP_USR
125 #if ARM_ARCH_MAJOR == 7 && !defined(ARMV7_SUPPORTS_VIRTUALIZATION)
126 /* Must be in secure state to restore Monitor mode */
128 bic r2, r4, #SCR_NS_BIT
136 ldm r1!, {r2, sp, lr}
140 ldm r1!, {r2, sp, lr}
144 ldm r1!, {r2, sp, lr}
148 ldm r1!, {r2, sp, lr}
152 ldm r1!, {r2, sp, lr}
183 * Use the `_fsxc` suffix explicitly to instruct the assembler
184 * to update all the 32 bits of SPSR. Else, by default, the
185 * assembler assumes `_fc` suffix which only modifies
186 * f->[31:24] and c->[7:0] bits of SPSR.
192 ldr lr, [r0, #SMC_CTX_LR_MON]
194 /* Restore the rest of the general purpose registers */
199 #endif /* SMCCC_MACROS_S */