ipq806x: convert each device to DSA implementation
[openwrt/staging/svanheule.git] / target / linux / ipq806x / files / arch / arm / boot / dts / qcom-ipq8064-g10.dts
1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-ipq8064-v2.0-smb208.dtsi"
3
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/soc/qcom,tcsr.h>
6
7 / {
8 compatible = "asrock,g10", "qcom,ipq8064";
9 model = "ASRock G10";
10
11 aliases {
12 ethernet0 = &gmac1;
13 ethernet1 = &gmac0;
14
15 led-boot = &led_status_blue;
16 led-failsafe = &led_status_amber;
17 led-running = &led_status_blue;
18 led-upgrade = &led_status_amber;
19 };
20
21 chosen {
22 bootargs-override = "console=ttyMSM0,115200n8";
23 };
24
25 leds {
26 compatible = "gpio-leds";
27
28 pinctrl-0 = <&led_pins>;
29 pinctrl-names = "default";
30
31 /*
32 * this is a bit misleading. Because there are about seven
33 * multicolor LEDs connected all wired together in parallel.
34 */
35
36 status_yellow {
37 label = "yellow:status";
38 gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
39 };
40
41 led_status_amber: status_amber {
42 label = "amber:status";
43 gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
44 };
45
46 led_status_blue: status_blue {
47 label = "blue:status";
48 gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
49 };
50
51 /*
52 * LED is declared in vendors boardfile but it's not
53 * working and the manual doesn't mention anything
54 * about the LED being white.
55
56 status_white {
57 label = "white:status";
58 gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
59 };
60 */
61 };
62
63 i2c-gpio {
64 #address-cells = <1>;
65 #size-cells = <0>;
66
67 compatible = "i2c-gpio";
68 gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>, /* sda */
69 <&qcom_pinmux 54 GPIO_ACTIVE_HIGH>; /* scl */
70 i2c-gpio,delay-us = <5>;
71 i2c-gpio,scl-output-only;
72
73 mcu@50 {
74 reg = <0x50>;
75 compatible = "sonix,sn8f25e21";
76 };
77 };
78
79 keys {
80 compatible = "gpio-keys";
81
82 pinctrl-0 = <&button_pins>;
83 pinctrl-names = "default";
84
85 ir-remote {
86 label = "ir-remote";
87 gpios = <&qcom_pinmux 15 GPIO_ACTIVE_LOW>;
88 linux,code = <BTN_0>;
89 debounce-interval = <60>;
90 wakeup-source;
91 };
92
93 reset {
94 label = "reset";
95 gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
96 linux,code = <KEY_RESTART>;
97 debounce-interval = <60>;
98 wakeup-source;
99 };
100
101 wps5g {
102 label = "wps5g";
103 gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
104 linux,code = <KEY_WPS_BUTTON>;
105 debounce-interval = <60>;
106 wakeup-source;
107 };
108
109 wps2g {
110 label = "wps2g";
111 gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
112 linux,code = <KEY_WPS_BUTTON>;
113 debounce-interval = <60>;
114 wakeup-source;
115 };
116 };
117 };
118
119 &adm_dma {
120 status = "okay";
121 };
122
123 &gmac1 {
124 status = "okay";
125
126 pinctrl-0 = <&rgmii2_pins>;
127 pinctrl-names = "default";
128
129 phy-mode = "rgmii";
130 qcom,id = <1>;
131
132 fixed-link {
133 speed = <1000>;
134 full-duplex;
135 };
136 };
137
138 &gmac2 {
139 status = "okay";
140
141 phy-mode = "sgmii";
142 qcom,id = <2>;
143
144 fixed-link {
145 speed = <1000>;
146 full-duplex;
147 };
148 };
149
150 &gsbi4_serial {
151 pinctrl-0 = <&uart0_pins>;
152 pinctrl-names = "default";
153 };
154
155 &mdio0 {
156 status = "okay";
157
158 pinctrl-0 = <&mdio0_pins>;
159 pinctrl-names = "default";
160
161 switch@10 {
162 compatible = "qca,qca8337";
163 #address-cells = <1>;
164 #size-cells = <0>;
165 reg = <0x10>;
166
167 ports {
168 #address-cells = <1>;
169 #size-cells = <0>;
170
171 port@0 {
172 reg = <0>;
173 label = "cpu";
174 ethernet = <&gmac1>;
175 phy-mode = "rgmii";
176 tx-internal-delay-ps = <1000>;
177 rx-internal-delay-ps = <1000>;
178
179 fixed-link {
180 speed = <1000>;
181 full-duplex;
182 };
183 };
184
185 port@1 {
186 reg = <1>;
187 label = "wan";
188 phy-mode = "internal";
189 phy-handle = <&phy_port1>;
190 };
191
192 port@2 {
193 reg = <2>;
194 label = "lan1";
195 phy-mode = "internal";
196 phy-handle = <&phy_port2>;
197 };
198
199 port@3 {
200 reg = <3>;
201 label = "lan2";
202 phy-mode = "internal";
203 phy-handle = <&phy_port3>;
204 };
205
206 port@4 {
207 reg = <4>;
208 label = "lan3";
209 phy-mode = "internal";
210 phy-handle = <&phy_port4>;
211 };
212
213 port@5 {
214 reg = <5>;
215 label = "lan4";
216 phy-mode = "internal";
217 phy-handle = <&phy_port5>;
218 };
219
220 /*
221 port@6 {
222 reg = <0>;
223 label = "cpu";
224 ethernet = <&gmac2>;
225 phy-mode = "rgmii";
226
227 fixed-link {
228 speed = <1000>;
229 full-duplex;
230 pause;
231 asym-pause;
232 };
233 };
234 */
235 };
236
237 mdio {
238 #address-cells = <1>;
239 #size-cells = <0>;
240
241 phy_port1: phy@0 {
242 reg = <0>;
243 };
244
245 phy_port2: phy@1 {
246 reg = <1>;
247 };
248
249 phy_port3: phy@2 {
250 reg = <2>;
251 };
252
253 phy_port4: phy@3 {
254 reg = <3>;
255 };
256
257 phy_port5: phy@4 {
258 reg = <4>;
259 };
260 };
261 };
262 };
263
264 &nand {
265 status = "okay";
266
267 nand@0 {
268 reg = <0>;
269 compatible = "qcom,nandcs";
270
271 nand-ecc-strength = <4>;
272 nand-bus-width = <8>;
273 nand-ecc-step-size = <512>;
274
275 nand-is-boot-medium;
276 qcom,boot-partitions = <0x0 0x1200000>;
277
278 partitions {
279 compatible = "qcom,smem-part";
280 };
281 };
282 };
283
284 &pcie0 {
285 status = "okay";
286
287 bridge@0,0 {
288 reg = <0x00000000 0 0 0 0>;
289 #address-cells = <3>;
290 #size-cells = <2>;
291 ranges;
292
293 wifi5g: wifi@1,0 {
294 reg = <0x00010000 0 0 0 0>;
295 compatible = "qcom,ath10k";
296 qcom,ath10k-calibration-variant = "ASRock-G10";
297 };
298 };
299 };
300
301 &pcie1 {
302 status = "okay";
303
304 bridge@0,0 {
305 reg = <0x00000000 0 0 0 0>;
306 #address-cells = <3>;
307 #size-cells = <2>;
308 ranges;
309
310 wifi2g: wifi@1,0 {
311 reg = <0x00010000 0 0 0 0>;
312 compatible = "qcom,ath10k";
313 qcom,ath10k-calibration-variant = "ASRock-G10";
314 };
315 };
316 };
317
318 &qcom_pinmux {
319 led_pins: led_pins {
320 mux {
321 pins = "gpio7", "gpio8", "gpio9", "gpio26";
322 function = "gpio";
323 drive-strength = <2>;
324 bias-pull-up;
325 };
326 };
327
328 button_pins: button_pins {
329 mux {
330 pins = "gpio15", "gpio16", "gpio64", "gpio65";
331 function = "gpio";
332 drive-strength = <2>;
333 bias-pull-up;
334 };
335 };
336
337 uart0_pins: uart0_pins {
338 mux {
339 pins = "gpio10", "gpio11";
340 function = "gsbi4";
341 drive-strength = <10>;
342 bias-disable;
343 };
344 };
345 };
346
347 &rpm {
348 pinctrl-0 = <&i2c4_pins>;
349 pinctrl-names = "default";
350 };
351
352 &hs_phy_0 {
353 status = "okay";
354 };
355
356 &ss_phy_0 {
357 status = "okay";
358 };
359
360 &usb3_0 {
361 status = "okay";
362 };
363
364 &hs_phy_1 {
365 status = "okay";
366 };
367
368 &ss_phy_1 {
369 status = "okay";
370 };
371
372 &usb3_1 {
373 status = "okay";
374 };
375
376 &tcsr {
377 qcom,usb-ctrl-select = <TCSR_USB_SELECT_USB3_DUAL>;
378 };
379
380 /delete-node/ &pcie2_pins;
381 /delete-node/ &pcie2;