2bba6bd097cfb74f65f7002751860346d4eae054
[project/bcm63xx/atf.git] / plat / arm / board / fvp / platform.mk
1 #
2 # Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
3 #
4 # SPDX-License-Identifier: BSD-3-Clause
5 #
6
7 # Use the GICv3 driver on the FVP by default
8 FVP_USE_GIC_DRIVER := FVP_GICV3
9
10 # Use the SP804 timer instead of the generic one
11 FVP_USE_SP804_TIMER := 0
12
13 # Default cluster count for FVP
14 FVP_CLUSTER_COUNT := 2
15
16 # Default number of CPUs per cluster on FVP
17 FVP_MAX_CPUS_PER_CLUSTER := 4
18
19 # Default number of threads per CPU on FVP
20 FVP_MAX_PE_PER_CPU := 1
21
22 FVP_DT_PREFIX := fvp-base-gicv3-psci
23
24 $(eval $(call assert_boolean,FVP_USE_SP804_TIMER))
25 $(eval $(call add_define,FVP_USE_SP804_TIMER))
26
27 # The FVP platform depends on this macro to build with correct GIC driver.
28 $(eval $(call add_define,FVP_USE_GIC_DRIVER))
29
30 # Pass FVP_CLUSTER_COUNT to the build system.
31 $(eval $(call add_define,FVP_CLUSTER_COUNT))
32
33 # Pass FVP_MAX_CPUS_PER_CLUSTER to the build system.
34 $(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER))
35
36 # Pass FVP_MAX_PE_PER_CPU to the build system.
37 $(eval $(call add_define,FVP_MAX_PE_PER_CPU))
38
39 # Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2,
40 # choose the CCI driver , else the CCN driver
41 ifeq ($(FVP_CLUSTER_COUNT), 0)
42 $(error "Incorrect cluster count specified for FVP port")
43 else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2))
44 FVP_INTERCONNECT_DRIVER := FVP_CCI
45 else
46 FVP_INTERCONNECT_DRIVER := FVP_CCN
47 endif
48
49 $(eval $(call add_define,FVP_INTERCONNECT_DRIVER))
50
51 FVP_GICV3_SOURCES := drivers/arm/gic/common/gic_common.c \
52 drivers/arm/gic/v3/gicv3_main.c \
53 drivers/arm/gic/v3/gicv3_helpers.c \
54 plat/common/plat_gicv3.c \
55 plat/arm/common/arm_gicv3.c
56
57 # Choose the GIC sources depending upon the how the FVP will be invoked
58 ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3)
59 FVP_GIC_SOURCES := ${FVP_GICV3_SOURCES} \
60 drivers/arm/gic/v3/gic500.c
61 else ifeq (${FVP_USE_GIC_DRIVER},FVP_GIC600)
62 FVP_GIC_SOURCES := ${FVP_GICV3_SOURCES} \
63 drivers/arm/gic/v3/gic600.c
64 else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2)
65 FVP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
66 drivers/arm/gic/v2/gicv2_main.c \
67 drivers/arm/gic/v2/gicv2_helpers.c \
68 plat/common/plat_gicv2.c \
69 plat/arm/common/arm_gicv2.c
70
71 FVP_DT_PREFIX := fvp-base-gicv2-psci
72 else
73 $(error "Incorrect GIC driver chosen on FVP port")
74 endif
75
76 ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI)
77 FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c
78 else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN)
79 FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \
80 plat/arm/common/arm_ccn.c
81 else
82 $(error "Incorrect CCN driver chosen on FVP port")
83 endif
84
85 FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \
86 plat/arm/board/fvp/fvp_security.c \
87 plat/arm/common/arm_tzc400.c
88
89
90 PLAT_INCLUDES := -Iplat/arm/board/fvp/include
91
92
93 PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c
94
95 FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S
96
97 ifeq (${ARCH}, aarch64)
98
99 # select a different set of CPU files, depending on whether we compile for
100 # hardware assisted coherency cores or not
101 ifeq (${HW_ASSISTED_COHERENCY}, 0)
102 # Cores used without DSU
103 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \
104 lib/cpus/aarch64/cortex_a53.S \
105 lib/cpus/aarch64/cortex_a57.S \
106 lib/cpus/aarch64/cortex_a72.S \
107 lib/cpus/aarch64/cortex_a73.S
108 else
109 # Cores used with DSU only
110 ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0)
111 # AArch64-only cores
112 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a76.S \
113 lib/cpus/aarch64/cortex_a76ae.S \
114 lib/cpus/aarch64/cortex_a77.S \
115 lib/cpus/aarch64/neoverse_n1.S \
116 lib/cpus/aarch64/neoverse_e1.S \
117 lib/cpus/aarch64/neoverse_zeus.S \
118 lib/cpus/aarch64/cortex_hercules.S \
119 lib/cpus/aarch64/cortex_hercules_ae.S
120 endif
121 # AArch64/AArch32 cores
122 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \
123 lib/cpus/aarch64/cortex_a75.S
124 endif
125
126 else
127 FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S
128 endif
129
130 BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \
131 drivers/arm/sp805/sp805.c \
132 drivers/delay_timer/delay_timer.c \
133 drivers/io/io_semihosting.c \
134 lib/semihosting/semihosting.c \
135 lib/semihosting/${ARCH}/semihosting_call.S \
136 plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
137 plat/arm/board/fvp/fvp_bl1_setup.c \
138 plat/arm/board/fvp/fvp_err.c \
139 plat/arm/board/fvp/fvp_io_storage.c \
140 plat/arm/board/fvp/fvp_trusted_boot.c \
141 ${FVP_CPU_LIBS} \
142 ${FVP_INTERCONNECT_SOURCES}
143
144 ifeq (${FVP_USE_SP804_TIMER},1)
145 BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
146 else
147 BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c
148 endif
149
150
151 BL2_SOURCES += drivers/arm/sp805/sp805.c \
152 drivers/io/io_semihosting.c \
153 lib/utils/mem_region.c \
154 lib/semihosting/semihosting.c \
155 lib/semihosting/${ARCH}/semihosting_call.S \
156 plat/arm/board/fvp/fvp_bl2_setup.c \
157 plat/arm/board/fvp/fvp_err.c \
158 plat/arm/board/fvp/fvp_io_storage.c \
159 plat/arm/board/fvp/fvp_trusted_boot.c \
160 plat/arm/common/arm_nor_psci_mem_protect.c \
161 ${FVP_SECURITY_SOURCES}
162
163
164
165 ifeq (${BL2_AT_EL3},1)
166 BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
167 plat/arm/board/fvp/fvp_bl2_el3_setup.c \
168 ${FVP_CPU_LIBS} \
169 ${FVP_INTERCONNECT_SOURCES}
170 endif
171
172 ifeq (${FVP_USE_SP804_TIMER},1)
173 BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
174 endif
175
176 BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \
177 ${FVP_SECURITY_SOURCES}
178
179 ifeq (${FVP_USE_SP804_TIMER},1)
180 BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
181 endif
182
183 BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \
184 drivers/arm/smmu/smmu_v3.c \
185 drivers/delay_timer/delay_timer.c \
186 drivers/cfi/v2m/v2m_flash.c \
187 lib/utils/mem_region.c \
188 plat/arm/board/fvp/fvp_bl31_setup.c \
189 plat/arm/board/fvp/fvp_pm.c \
190 plat/arm/board/fvp/fvp_topology.c \
191 plat/arm/board/fvp/aarch64/fvp_helpers.S \
192 plat/arm/common/arm_nor_psci_mem_protect.c \
193 ${FVP_CPU_LIBS} \
194 ${FVP_GIC_SOURCES} \
195 ${FVP_INTERCONNECT_SOURCES} \
196 ${FVP_SECURITY_SOURCES}
197
198 ifeq (${FVP_USE_SP804_TIMER},1)
199 BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
200 else
201 BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c
202 endif
203
204 # Add the FDT_SOURCES and options for Dynamic Config (only for Unix env)
205 ifdef UNIX_MK
206 FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts
207 FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \
208 ${PLAT}_tb_fw_config.dts \
209 ${PLAT}_soc_fw_config.dts \
210 ${PLAT}_nt_fw_config.dts \
211 )
212
213 FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
214 FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb
215 FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
216
217 ifeq (${SPD},tspd)
218 FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts
219 FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb
220
221 # Add the TOS_FW_CONFIG to FIP and specify the same to certtool
222 $(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config))
223 endif
224
225 # Add the TB_FW_CONFIG to FIP and specify the same to certtool
226 $(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config))
227 # Add the SOC_FW_CONFIG to FIP and specify the same to certtool
228 $(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config))
229 # Add the NT_FW_CONFIG to FIP and specify the same to certtool
230 $(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config))
231
232 FDT_SOURCES += ${FVP_HW_CONFIG_DTS}
233 $(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS)))
234
235 # Add the HW_CONFIG to FIP and specify the same to certtool
236 $(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config))
237 endif
238
239 # Enable Activity Monitor Unit extensions by default
240 ENABLE_AMU := 1
241
242 # Enable dynamic mitigation support by default
243 DYNAMIC_WORKAROUND_CVE_2018_3639 := 1
244
245 ifneq (${RESET_TO_BL31},1)
246 # Enable reclaiming of BL31 initialisation code for secondary cores stacks for
247 # FVP. We cannot enable PIE for this case because the overlayed init section
248 # creates some dynamic relocations which cannot be handled by the fixup
249 # logic currently.
250 RECLAIM_INIT_CODE := 1
251 else
252 # Enable PIE support when RESET_TO_BL31=1
253 ENABLE_PIE := 1
254 endif
255
256 ifeq (${ENABLE_AMU},1)
257 BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \
258 lib/cpus/aarch64/cpuamu_helpers.S
259
260 ifeq (${HW_ASSISTED_COHERENCY}, 1)
261 BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \
262 lib/cpus/aarch64/neoverse_n1_pubsub.c
263 endif
264 endif
265
266 ifeq (${RAS_EXTENSION},1)
267 BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c
268 endif
269
270 ifneq (${ENABLE_STACK_PROTECTOR},0)
271 PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c
272 endif
273
274 ifeq (${ARCH},aarch32)
275 NEED_BL32 := yes
276 endif
277
278 # Enable the dynamic translation tables library.
279 ifeq (${ARCH},aarch32)
280 ifeq (${RESET_TO_SP_MIN},1)
281 BL32_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
282 endif
283 else # if AArch64
284 ifeq (${RESET_TO_BL31},1)
285 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
286 endif
287 ifeq (${ENABLE_SPM},1)
288 ifeq (${SPM_MM},0)
289 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
290 endif
291 endif
292 ifeq (${SPD},trusty)
293 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
294 endif
295 endif
296
297 # Add support for platform supplied linker script for BL31 build
298 $(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
299
300 ifneq (${BL2_AT_EL3}, 0)
301 override BL1_SOURCES =
302 endif
303
304 include plat/arm/board/common/board_common.mk
305 include plat/arm/common/arm_common.mk
306
307 # FVP being a development platform, enable capability to disable Authentication
308 # dynamically if TRUSTED_BOARD_BOOT is set.
309 ifeq (${TRUSTED_BOARD_BOOT}, 1)
310 DYN_DISABLE_AUTH := 1
311 endif